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r8152: autoresume before setting feature
[linux-beck.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27
28 /* Version Information */
29 #define DRIVER_VERSION "v1.06.1 (2014/10/01)"
30 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
31 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
32 #define MODULENAME "r8152"
33
34 #define R8152_PHY_ID            32
35
36 #define PLA_IDR                 0xc000
37 #define PLA_RCR                 0xc010
38 #define PLA_RMS                 0xc016
39 #define PLA_RXFIFO_CTRL0        0xc0a0
40 #define PLA_RXFIFO_CTRL1        0xc0a4
41 #define PLA_RXFIFO_CTRL2        0xc0a8
42 #define PLA_FMC                 0xc0b4
43 #define PLA_CFG_WOL             0xc0b6
44 #define PLA_TEREDO_CFG          0xc0bc
45 #define PLA_MAR                 0xcd00
46 #define PLA_BACKUP              0xd000
47 #define PAL_BDC_CR              0xd1a0
48 #define PLA_TEREDO_TIMER        0xd2cc
49 #define PLA_REALWOW_TIMER       0xd2e8
50 #define PLA_LEDSEL              0xdd90
51 #define PLA_LED_FEATURE         0xdd92
52 #define PLA_PHYAR               0xde00
53 #define PLA_BOOT_CTRL           0xe004
54 #define PLA_GPHY_INTR_IMR       0xe022
55 #define PLA_EEE_CR              0xe040
56 #define PLA_EEEP_CR             0xe080
57 #define PLA_MAC_PWR_CTRL        0xe0c0
58 #define PLA_MAC_PWR_CTRL2       0xe0ca
59 #define PLA_MAC_PWR_CTRL3       0xe0cc
60 #define PLA_MAC_PWR_CTRL4       0xe0ce
61 #define PLA_WDT6_CTRL           0xe428
62 #define PLA_TCR0                0xe610
63 #define PLA_TCR1                0xe612
64 #define PLA_MTPS                0xe615
65 #define PLA_TXFIFO_CTRL         0xe618
66 #define PLA_RSTTALLY            0xe800
67 #define PLA_CR                  0xe813
68 #define PLA_CRWECR              0xe81c
69 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
70 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
71 #define PLA_CONFIG5             0xe822
72 #define PLA_PHY_PWR             0xe84c
73 #define PLA_OOB_CTRL            0xe84f
74 #define PLA_CPCR                0xe854
75 #define PLA_MISC_0              0xe858
76 #define PLA_MISC_1              0xe85a
77 #define PLA_OCP_GPHY_BASE       0xe86c
78 #define PLA_TALLYCNT            0xe890
79 #define PLA_SFF_STS_7           0xe8de
80 #define PLA_PHYSTATUS           0xe908
81 #define PLA_BP_BA               0xfc26
82 #define PLA_BP_0                0xfc28
83 #define PLA_BP_1                0xfc2a
84 #define PLA_BP_2                0xfc2c
85 #define PLA_BP_3                0xfc2e
86 #define PLA_BP_4                0xfc30
87 #define PLA_BP_5                0xfc32
88 #define PLA_BP_6                0xfc34
89 #define PLA_BP_7                0xfc36
90 #define PLA_BP_EN               0xfc38
91
92 #define USB_U2P3_CTRL           0xb460
93 #define USB_DEV_STAT            0xb808
94 #define USB_USB_CTRL            0xd406
95 #define USB_PHY_CTRL            0xd408
96 #define USB_TX_AGG              0xd40a
97 #define USB_RX_BUF_TH           0xd40c
98 #define USB_USB_TIMER           0xd428
99 #define USB_RX_EARLY_AGG        0xd42c
100 #define USB_PM_CTRL_STATUS      0xd432
101 #define USB_TX_DMA              0xd434
102 #define USB_TOLERANCE           0xd490
103 #define USB_LPM_CTRL            0xd41a
104 #define USB_UPS_CTRL            0xd800
105 #define USB_MISC_0              0xd81a
106 #define USB_POWER_CUT           0xd80a
107 #define USB_AFE_CTRL2           0xd824
108 #define USB_WDT11_CTRL          0xe43c
109 #define USB_BP_BA               0xfc26
110 #define USB_BP_0                0xfc28
111 #define USB_BP_1                0xfc2a
112 #define USB_BP_2                0xfc2c
113 #define USB_BP_3                0xfc2e
114 #define USB_BP_4                0xfc30
115 #define USB_BP_5                0xfc32
116 #define USB_BP_6                0xfc34
117 #define USB_BP_7                0xfc36
118 #define USB_BP_EN               0xfc38
119
120 /* OCP Registers */
121 #define OCP_ALDPS_CONFIG        0x2010
122 #define OCP_EEE_CONFIG1         0x2080
123 #define OCP_EEE_CONFIG2         0x2092
124 #define OCP_EEE_CONFIG3         0x2094
125 #define OCP_BASE_MII            0xa400
126 #define OCP_EEE_AR              0xa41a
127 #define OCP_EEE_DATA            0xa41c
128 #define OCP_PHY_STATUS          0xa420
129 #define OCP_POWER_CFG           0xa430
130 #define OCP_EEE_CFG             0xa432
131 #define OCP_SRAM_ADDR           0xa436
132 #define OCP_SRAM_DATA           0xa438
133 #define OCP_DOWN_SPEED          0xa442
134 #define OCP_EEE_ABLE            0xa5c4
135 #define OCP_EEE_ADV             0xa5d0
136 #define OCP_EEE_LPABLE          0xa5d2
137 #define OCP_ADC_CFG             0xbc06
138
139 /* SRAM Register */
140 #define SRAM_LPF_CFG            0x8012
141 #define SRAM_10M_AMP1           0x8080
142 #define SRAM_10M_AMP2           0x8082
143 #define SRAM_IMPEDANCE          0x8084
144
145 /* PLA_RCR */
146 #define RCR_AAP                 0x00000001
147 #define RCR_APM                 0x00000002
148 #define RCR_AM                  0x00000004
149 #define RCR_AB                  0x00000008
150 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
151
152 /* PLA_RXFIFO_CTRL0 */
153 #define RXFIFO_THR1_NORMAL      0x00080002
154 #define RXFIFO_THR1_OOB         0x01800003
155
156 /* PLA_RXFIFO_CTRL1 */
157 #define RXFIFO_THR2_FULL        0x00000060
158 #define RXFIFO_THR2_HIGH        0x00000038
159 #define RXFIFO_THR2_OOB         0x0000004a
160 #define RXFIFO_THR2_NORMAL      0x00a0
161
162 /* PLA_RXFIFO_CTRL2 */
163 #define RXFIFO_THR3_FULL        0x00000078
164 #define RXFIFO_THR3_HIGH        0x00000048
165 #define RXFIFO_THR3_OOB         0x0000005a
166 #define RXFIFO_THR3_NORMAL      0x0110
167
168 /* PLA_TXFIFO_CTRL */
169 #define TXFIFO_THR_NORMAL       0x00400008
170 #define TXFIFO_THR_NORMAL2      0x01000008
171
172 /* PLA_FMC */
173 #define FMC_FCR_MCU_EN          0x0001
174
175 /* PLA_EEEP_CR */
176 #define EEEP_CR_EEEP_TX         0x0002
177
178 /* PLA_WDT6_CTRL */
179 #define WDT6_SET_MODE           0x0010
180
181 /* PLA_TCR0 */
182 #define TCR0_TX_EMPTY           0x0800
183 #define TCR0_AUTO_FIFO          0x0080
184
185 /* PLA_TCR1 */
186 #define VERSION_MASK            0x7cf0
187
188 /* PLA_MTPS */
189 #define MTPS_JUMBO              (12 * 1024 / 64)
190 #define MTPS_DEFAULT            (6 * 1024 / 64)
191
192 /* PLA_RSTTALLY */
193 #define TALLY_RESET             0x0001
194
195 /* PLA_CR */
196 #define CR_RST                  0x10
197 #define CR_RE                   0x08
198 #define CR_TE                   0x04
199
200 /* PLA_CRWECR */
201 #define CRWECR_NORAML           0x00
202 #define CRWECR_CONFIG           0xc0
203
204 /* PLA_OOB_CTRL */
205 #define NOW_IS_OOB              0x80
206 #define TXFIFO_EMPTY            0x20
207 #define RXFIFO_EMPTY            0x10
208 #define LINK_LIST_READY         0x02
209 #define DIS_MCU_CLROOB          0x01
210 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
211
212 /* PLA_MISC_1 */
213 #define RXDY_GATED_EN           0x0008
214
215 /* PLA_SFF_STS_7 */
216 #define RE_INIT_LL              0x8000
217 #define MCU_BORW_EN             0x4000
218
219 /* PLA_CPCR */
220 #define CPCR_RX_VLAN            0x0040
221
222 /* PLA_CFG_WOL */
223 #define MAGIC_EN                0x0001
224
225 /* PLA_TEREDO_CFG */
226 #define TEREDO_SEL              0x8000
227 #define TEREDO_WAKE_MASK        0x7f00
228 #define TEREDO_RS_EVENT_MASK    0x00fe
229 #define OOB_TEREDO_EN           0x0001
230
231 /* PAL_BDC_CR */
232 #define ALDPS_PROXY_MODE        0x0001
233
234 /* PLA_CONFIG34 */
235 #define LINK_ON_WAKE_EN         0x0010
236 #define LINK_OFF_WAKE_EN        0x0008
237
238 /* PLA_CONFIG5 */
239 #define BWF_EN                  0x0040
240 #define MWF_EN                  0x0020
241 #define UWF_EN                  0x0010
242 #define LAN_WAKE_EN             0x0002
243
244 /* PLA_LED_FEATURE */
245 #define LED_MODE_MASK           0x0700
246
247 /* PLA_PHY_PWR */
248 #define TX_10M_IDLE_EN          0x0080
249 #define PFM_PWM_SWITCH          0x0040
250
251 /* PLA_MAC_PWR_CTRL */
252 #define D3_CLK_GATED_EN         0x00004000
253 #define MCU_CLK_RATIO           0x07010f07
254 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
255 #define ALDPS_SPDWN_RATIO       0x0f87
256
257 /* PLA_MAC_PWR_CTRL2 */
258 #define EEE_SPDWN_RATIO         0x8007
259
260 /* PLA_MAC_PWR_CTRL3 */
261 #define PKT_AVAIL_SPDWN_EN      0x0100
262 #define SUSPEND_SPDWN_EN        0x0004
263 #define U1U2_SPDWN_EN           0x0002
264 #define L1_SPDWN_EN             0x0001
265
266 /* PLA_MAC_PWR_CTRL4 */
267 #define PWRSAVE_SPDWN_EN        0x1000
268 #define RXDV_SPDWN_EN           0x0800
269 #define TX10MIDLE_EN            0x0100
270 #define TP100_SPDWN_EN          0x0020
271 #define TP500_SPDWN_EN          0x0010
272 #define TP1000_SPDWN_EN         0x0008
273 #define EEE_SPDWN_EN            0x0001
274
275 /* PLA_GPHY_INTR_IMR */
276 #define GPHY_STS_MSK            0x0001
277 #define SPEED_DOWN_MSK          0x0002
278 #define SPDWN_RXDV_MSK          0x0004
279 #define SPDWN_LINKCHG_MSK       0x0008
280
281 /* PLA_PHYAR */
282 #define PHYAR_FLAG              0x80000000
283
284 /* PLA_EEE_CR */
285 #define EEE_RX_EN               0x0001
286 #define EEE_TX_EN               0x0002
287
288 /* PLA_BOOT_CTRL */
289 #define AUTOLOAD_DONE           0x0002
290
291 /* USB_DEV_STAT */
292 #define STAT_SPEED_MASK         0x0006
293 #define STAT_SPEED_HIGH         0x0000
294 #define STAT_SPEED_FULL         0x0002
295
296 /* USB_TX_AGG */
297 #define TX_AGG_MAX_THRESHOLD    0x03
298
299 /* USB_RX_BUF_TH */
300 #define RX_THR_SUPPER           0x0c350180
301 #define RX_THR_HIGH             0x7a120180
302 #define RX_THR_SLOW             0xffff0180
303
304 /* USB_TX_DMA */
305 #define TEST_MODE_DISABLE       0x00000001
306 #define TX_SIZE_ADJUST1         0x00000100
307
308 /* USB_UPS_CTRL */
309 #define POWER_CUT               0x0100
310
311 /* USB_PM_CTRL_STATUS */
312 #define RESUME_INDICATE         0x0001
313
314 /* USB_USB_CTRL */
315 #define RX_AGG_DISABLE          0x0010
316
317 /* USB_U2P3_CTRL */
318 #define U2P3_ENABLE             0x0001
319
320 /* USB_POWER_CUT */
321 #define PWR_EN                  0x0001
322 #define PHASE2_EN               0x0008
323
324 /* USB_MISC_0 */
325 #define PCUT_STATUS             0x0001
326
327 /* USB_RX_EARLY_AGG */
328 #define EARLY_AGG_SUPPER        0x0e832981
329 #define EARLY_AGG_HIGH          0x0e837a12
330 #define EARLY_AGG_SLOW          0x0e83ffff
331
332 /* USB_WDT11_CTRL */
333 #define TIMER11_EN              0x0001
334
335 /* USB_LPM_CTRL */
336 #define LPM_TIMER_MASK          0x0c
337 #define LPM_TIMER_500MS         0x04    /* 500 ms */
338 #define LPM_TIMER_500US         0x0c    /* 500 us */
339
340 /* USB_AFE_CTRL2 */
341 #define SEN_VAL_MASK            0xf800
342 #define SEN_VAL_NORMAL          0xa000
343 #define SEL_RXIDLE              0x0100
344
345 /* OCP_ALDPS_CONFIG */
346 #define ENPWRSAVE               0x8000
347 #define ENPDNPS                 0x0200
348 #define LINKENA                 0x0100
349 #define DIS_SDSAVE              0x0010
350
351 /* OCP_PHY_STATUS */
352 #define PHY_STAT_MASK           0x0007
353 #define PHY_STAT_LAN_ON         3
354 #define PHY_STAT_PWRDN          5
355
356 /* OCP_POWER_CFG */
357 #define EEE_CLKDIV_EN           0x8000
358 #define EN_ALDPS                0x0004
359 #define EN_10M_PLLOFF           0x0001
360
361 /* OCP_EEE_CONFIG1 */
362 #define RG_TXLPI_MSK_HFDUP      0x8000
363 #define RG_MATCLR_EN            0x4000
364 #define EEE_10_CAP              0x2000
365 #define EEE_NWAY_EN             0x1000
366 #define TX_QUIET_EN             0x0200
367 #define RX_QUIET_EN             0x0100
368 #define sd_rise_time_mask       0x0070
369 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
370 #define RG_RXLPI_MSK_HFDUP      0x0008
371 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
372
373 /* OCP_EEE_CONFIG2 */
374 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
375 #define RG_DACQUIET_EN          0x0400
376 #define RG_LDVQUIET_EN          0x0200
377 #define RG_CKRSEL               0x0020
378 #define RG_EEEPRG_EN            0x0010
379
380 /* OCP_EEE_CONFIG3 */
381 #define fast_snr_mask           0xff80
382 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
383 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
384 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
385
386 /* OCP_EEE_AR */
387 /* bit[15:14] function */
388 #define FUN_ADDR                0x0000
389 #define FUN_DATA                0x4000
390 /* bit[4:0] device addr */
391
392 /* OCP_EEE_CFG */
393 #define CTAP_SHORT_EN           0x0040
394 #define EEE10_EN                0x0010
395
396 /* OCP_DOWN_SPEED */
397 #define EN_10M_BGOFF            0x0080
398
399 /* OCP_ADC_CFG */
400 #define CKADSEL_L               0x0100
401 #define ADC_EN                  0x0080
402 #define EN_EMI_L                0x0040
403
404 /* SRAM_LPF_CFG */
405 #define LPF_AUTO_TUNE           0x8000
406
407 /* SRAM_10M_AMP1 */
408 #define GDAC_IB_UPALL           0x0008
409
410 /* SRAM_10M_AMP2 */
411 #define AMP_DN                  0x0200
412
413 /* SRAM_IMPEDANCE */
414 #define RX_DRIVING_MASK         0x6000
415
416 enum rtl_register_content {
417         _1000bps        = 0x10,
418         _100bps         = 0x08,
419         _10bps          = 0x04,
420         LINK_STATUS     = 0x02,
421         FULL_DUP        = 0x01,
422 };
423
424 #define RTL8152_MAX_TX          4
425 #define RTL8152_MAX_RX          10
426 #define INTBUFSIZE              2
427 #define CRC_SIZE                4
428 #define TX_ALIGN                4
429 #define RX_ALIGN                8
430
431 #define INTR_LINK               0x0004
432
433 #define RTL8152_REQT_READ       0xc0
434 #define RTL8152_REQT_WRITE      0x40
435 #define RTL8152_REQ_GET_REGS    0x05
436 #define RTL8152_REQ_SET_REGS    0x05
437
438 #define BYTE_EN_DWORD           0xff
439 #define BYTE_EN_WORD            0x33
440 #define BYTE_EN_BYTE            0x11
441 #define BYTE_EN_SIX_BYTES       0x3f
442 #define BYTE_EN_START_MASK      0x0f
443 #define BYTE_EN_END_MASK        0xf0
444
445 #define RTL8153_MAX_PACKET      9216 /* 9K */
446 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
447 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
448 #define RTL8153_RMS             RTL8153_MAX_PACKET
449 #define RTL8152_TX_TIMEOUT      (5 * HZ)
450
451 /* rtl8152 flags */
452 enum rtl8152_flags {
453         RTL8152_UNPLUG = 0,
454         RTL8152_SET_RX_MODE,
455         WORK_ENABLE,
456         RTL8152_LINK_CHG,
457         SELECTIVE_SUSPEND,
458         PHY_RESET,
459         SCHEDULE_TASKLET,
460 };
461
462 /* Define these values to match your device */
463 #define VENDOR_ID_REALTEK               0x0bda
464 #define PRODUCT_ID_RTL8152              0x8152
465 #define PRODUCT_ID_RTL8153              0x8153
466
467 #define VENDOR_ID_SAMSUNG               0x04e8
468 #define PRODUCT_ID_SAMSUNG              0xa101
469
470 #define MCU_TYPE_PLA                    0x0100
471 #define MCU_TYPE_USB                    0x0000
472
473 #define REALTEK_USB_DEVICE(vend, prod)  \
474         USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
475
476 struct tally_counter {
477         __le64  tx_packets;
478         __le64  rx_packets;
479         __le64  tx_errors;
480         __le32  rx_errors;
481         __le16  rx_missed;
482         __le16  align_errors;
483         __le32  tx_one_collision;
484         __le32  tx_multi_collision;
485         __le64  rx_unicast;
486         __le64  rx_broadcast;
487         __le32  rx_multicast;
488         __le16  tx_aborted;
489         __le16  tx_underun;
490 };
491
492 struct rx_desc {
493         __le32 opts1;
494 #define RX_LEN_MASK                     0x7fff
495
496         __le32 opts2;
497 #define RD_UDP_CS                       (1 << 23)
498 #define RD_TCP_CS                       (1 << 22)
499 #define RD_IPV6_CS                      (1 << 20)
500 #define RD_IPV4_CS                      (1 << 19)
501
502         __le32 opts3;
503 #define IPF                             (1 << 23) /* IP checksum fail */
504 #define UDPF                            (1 << 22) /* UDP checksum fail */
505 #define TCPF                            (1 << 21) /* TCP checksum fail */
506 #define RX_VLAN_TAG                     (1 << 16)
507
508         __le32 opts4;
509         __le32 opts5;
510         __le32 opts6;
511 };
512
513 struct tx_desc {
514         __le32 opts1;
515 #define TX_FS                   (1 << 31) /* First segment of a packet */
516 #define TX_LS                   (1 << 30) /* Final segment of a packet */
517 #define GTSENDV4                (1 << 28)
518 #define GTSENDV6                (1 << 27)
519 #define GTTCPHO_SHIFT           18
520 #define GTTCPHO_MAX             0x7fU
521 #define TX_LEN_MAX              0x3ffffU
522
523         __le32 opts2;
524 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
525 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
526 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
527 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
528 #define MSS_SHIFT               17
529 #define MSS_MAX                 0x7ffU
530 #define TCPHO_SHIFT             17
531 #define TCPHO_MAX               0x7ffU
532 #define TX_VLAN_TAG                     (1 << 16)
533 };
534
535 struct r8152;
536
537 struct rx_agg {
538         struct list_head list;
539         struct urb *urb;
540         struct r8152 *context;
541         void *buffer;
542         void *head;
543 };
544
545 struct tx_agg {
546         struct list_head list;
547         struct urb *urb;
548         struct r8152 *context;
549         void *buffer;
550         void *head;
551         u32 skb_num;
552         u32 skb_len;
553 };
554
555 struct r8152 {
556         unsigned long flags;
557         struct usb_device *udev;
558         struct tasklet_struct tl;
559         struct usb_interface *intf;
560         struct net_device *netdev;
561         struct urb *intr_urb;
562         struct tx_agg tx_info[RTL8152_MAX_TX];
563         struct rx_agg rx_info[RTL8152_MAX_RX];
564         struct list_head rx_done, tx_free;
565         struct sk_buff_head tx_queue;
566         spinlock_t rx_lock, tx_lock;
567         struct delayed_work schedule;
568         struct mii_if_info mii;
569
570         struct rtl_ops {
571                 void (*init)(struct r8152 *);
572                 int (*enable)(struct r8152 *);
573                 void (*disable)(struct r8152 *);
574                 void (*up)(struct r8152 *);
575                 void (*down)(struct r8152 *);
576                 void (*unload)(struct r8152 *);
577                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
578                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
579         } rtl_ops;
580
581         int intr_interval;
582         u32 saved_wolopts;
583         u32 msg_enable;
584         u32 tx_qlen;
585         u16 ocp_base;
586         u8 *intr_buff;
587         u8 version;
588         u8 speed;
589 };
590
591 enum rtl_version {
592         RTL_VER_UNKNOWN = 0,
593         RTL_VER_01,
594         RTL_VER_02,
595         RTL_VER_03,
596         RTL_VER_04,
597         RTL_VER_05,
598         RTL_VER_MAX
599 };
600
601 enum tx_csum_stat {
602         TX_CSUM_SUCCESS = 0,
603         TX_CSUM_TSO,
604         TX_CSUM_NONE
605 };
606
607 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
608  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
609  */
610 static const int multicast_filter_limit = 32;
611 static unsigned int agg_buf_sz = 16384;
612
613 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
614                                  VLAN_ETH_HLEN - VLAN_HLEN)
615
616 static
617 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
618 {
619         int ret;
620         void *tmp;
621
622         tmp = kmalloc(size, GFP_KERNEL);
623         if (!tmp)
624                 return -ENOMEM;
625
626         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
627                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
628                               value, index, tmp, size, 500);
629
630         memcpy(data, tmp, size);
631         kfree(tmp);
632
633         return ret;
634 }
635
636 static
637 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
638 {
639         int ret;
640         void *tmp;
641
642         tmp = kmemdup(data, size, GFP_KERNEL);
643         if (!tmp)
644                 return -ENOMEM;
645
646         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
647                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
648                               value, index, tmp, size, 500);
649
650         kfree(tmp);
651
652         return ret;
653 }
654
655 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
656                             void *data, u16 type)
657 {
658         u16 limit = 64;
659         int ret = 0;
660
661         if (test_bit(RTL8152_UNPLUG, &tp->flags))
662                 return -ENODEV;
663
664         /* both size and indix must be 4 bytes align */
665         if ((size & 3) || !size || (index & 3) || !data)
666                 return -EPERM;
667
668         if ((u32)index + (u32)size > 0xffff)
669                 return -EPERM;
670
671         while (size) {
672                 if (size > limit) {
673                         ret = get_registers(tp, index, type, limit, data);
674                         if (ret < 0)
675                                 break;
676
677                         index += limit;
678                         data += limit;
679                         size -= limit;
680                 } else {
681                         ret = get_registers(tp, index, type, size, data);
682                         if (ret < 0)
683                                 break;
684
685                         index += size;
686                         data += size;
687                         size = 0;
688                         break;
689                 }
690         }
691
692         return ret;
693 }
694
695 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
696                              u16 size, void *data, u16 type)
697 {
698         int ret;
699         u16 byteen_start, byteen_end, byen;
700         u16 limit = 512;
701
702         if (test_bit(RTL8152_UNPLUG, &tp->flags))
703                 return -ENODEV;
704
705         /* both size and indix must be 4 bytes align */
706         if ((size & 3) || !size || (index & 3) || !data)
707                 return -EPERM;
708
709         if ((u32)index + (u32)size > 0xffff)
710                 return -EPERM;
711
712         byteen_start = byteen & BYTE_EN_START_MASK;
713         byteen_end = byteen & BYTE_EN_END_MASK;
714
715         byen = byteen_start | (byteen_start << 4);
716         ret = set_registers(tp, index, type | byen, 4, data);
717         if (ret < 0)
718                 goto error1;
719
720         index += 4;
721         data += 4;
722         size -= 4;
723
724         if (size) {
725                 size -= 4;
726
727                 while (size) {
728                         if (size > limit) {
729                                 ret = set_registers(tp, index,
730                                                     type | BYTE_EN_DWORD,
731                                                     limit, data);
732                                 if (ret < 0)
733                                         goto error1;
734
735                                 index += limit;
736                                 data += limit;
737                                 size -= limit;
738                         } else {
739                                 ret = set_registers(tp, index,
740                                                     type | BYTE_EN_DWORD,
741                                                     size, data);
742                                 if (ret < 0)
743                                         goto error1;
744
745                                 index += size;
746                                 data += size;
747                                 size = 0;
748                                 break;
749                         }
750                 }
751
752                 byen = byteen_end | (byteen_end >> 4);
753                 ret = set_registers(tp, index, type | byen, 4, data);
754                 if (ret < 0)
755                         goto error1;
756         }
757
758 error1:
759         return ret;
760 }
761
762 static inline
763 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
764 {
765         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
766 }
767
768 static inline
769 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
770 {
771         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
772 }
773
774 static inline
775 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
776 {
777         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
778 }
779
780 static inline
781 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
782 {
783         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
784 }
785
786 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
787 {
788         __le32 data;
789
790         generic_ocp_read(tp, index, sizeof(data), &data, type);
791
792         return __le32_to_cpu(data);
793 }
794
795 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
796 {
797         __le32 tmp = __cpu_to_le32(data);
798
799         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
800 }
801
802 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
803 {
804         u32 data;
805         __le32 tmp;
806         u8 shift = index & 2;
807
808         index &= ~3;
809
810         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
811
812         data = __le32_to_cpu(tmp);
813         data >>= (shift * 8);
814         data &= 0xffff;
815
816         return (u16)data;
817 }
818
819 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
820 {
821         u32 mask = 0xffff;
822         __le32 tmp;
823         u16 byen = BYTE_EN_WORD;
824         u8 shift = index & 2;
825
826         data &= mask;
827
828         if (index & 2) {
829                 byen <<= shift;
830                 mask <<= (shift * 8);
831                 data <<= (shift * 8);
832                 index &= ~3;
833         }
834
835         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
836
837         data |= __le32_to_cpu(tmp) & ~mask;
838         tmp = __cpu_to_le32(data);
839
840         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
841 }
842
843 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
844 {
845         u32 data;
846         __le32 tmp;
847         u8 shift = index & 3;
848
849         index &= ~3;
850
851         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
852
853         data = __le32_to_cpu(tmp);
854         data >>= (shift * 8);
855         data &= 0xff;
856
857         return (u8)data;
858 }
859
860 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
861 {
862         u32 mask = 0xff;
863         __le32 tmp;
864         u16 byen = BYTE_EN_BYTE;
865         u8 shift = index & 3;
866
867         data &= mask;
868
869         if (index & 3) {
870                 byen <<= shift;
871                 mask <<= (shift * 8);
872                 data <<= (shift * 8);
873                 index &= ~3;
874         }
875
876         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
877
878         data |= __le32_to_cpu(tmp) & ~mask;
879         tmp = __cpu_to_le32(data);
880
881         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
882 }
883
884 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
885 {
886         u16 ocp_base, ocp_index;
887
888         ocp_base = addr & 0xf000;
889         if (ocp_base != tp->ocp_base) {
890                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
891                 tp->ocp_base = ocp_base;
892         }
893
894         ocp_index = (addr & 0x0fff) | 0xb000;
895         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
896 }
897
898 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
899 {
900         u16 ocp_base, ocp_index;
901
902         ocp_base = addr & 0xf000;
903         if (ocp_base != tp->ocp_base) {
904                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
905                 tp->ocp_base = ocp_base;
906         }
907
908         ocp_index = (addr & 0x0fff) | 0xb000;
909         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
910 }
911
912 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
913 {
914         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
915 }
916
917 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
918 {
919         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
920 }
921
922 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
923 {
924         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
925         ocp_reg_write(tp, OCP_SRAM_DATA, data);
926 }
927
928 static u16 sram_read(struct r8152 *tp, u16 addr)
929 {
930         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
931         return ocp_reg_read(tp, OCP_SRAM_DATA);
932 }
933
934 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
935 {
936         struct r8152 *tp = netdev_priv(netdev);
937         int ret;
938
939         if (test_bit(RTL8152_UNPLUG, &tp->flags))
940                 return -ENODEV;
941
942         if (phy_id != R8152_PHY_ID)
943                 return -EINVAL;
944
945         ret = usb_autopm_get_interface(tp->intf);
946         if (ret < 0)
947                 goto out;
948
949         ret = r8152_mdio_read(tp, reg);
950
951         usb_autopm_put_interface(tp->intf);
952
953 out:
954         return ret;
955 }
956
957 static
958 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
959 {
960         struct r8152 *tp = netdev_priv(netdev);
961
962         if (test_bit(RTL8152_UNPLUG, &tp->flags))
963                 return;
964
965         if (phy_id != R8152_PHY_ID)
966                 return;
967
968         if (usb_autopm_get_interface(tp->intf) < 0)
969                 return;
970
971         r8152_mdio_write(tp, reg, val);
972
973         usb_autopm_put_interface(tp->intf);
974 }
975
976 static int
977 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
978
979 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
980 {
981         struct r8152 *tp = netdev_priv(netdev);
982         struct sockaddr *addr = p;
983         int ret = -EADDRNOTAVAIL;
984
985         if (!is_valid_ether_addr(addr->sa_data))
986                 goto out1;
987
988         ret = usb_autopm_get_interface(tp->intf);
989         if (ret < 0)
990                 goto out1;
991
992         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
993
994         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
995         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
996         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
997
998         usb_autopm_put_interface(tp->intf);
999 out1:
1000         return ret;
1001 }
1002
1003 static int set_ethernet_addr(struct r8152 *tp)
1004 {
1005         struct net_device *dev = tp->netdev;
1006         struct sockaddr sa;
1007         int ret;
1008
1009         if (tp->version == RTL_VER_01)
1010                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1011         else
1012                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1013
1014         if (ret < 0) {
1015                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1016         } else if (!is_valid_ether_addr(sa.sa_data)) {
1017                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1018                           sa.sa_data);
1019                 eth_hw_addr_random(dev);
1020                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1021                 ret = rtl8152_set_mac_address(dev, &sa);
1022                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1023                            sa.sa_data);
1024         } else {
1025                 if (tp->version == RTL_VER_01)
1026                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1027                 else
1028                         ret = rtl8152_set_mac_address(dev, &sa);
1029         }
1030
1031         return ret;
1032 }
1033
1034 static void read_bulk_callback(struct urb *urb)
1035 {
1036         struct net_device *netdev;
1037         int status = urb->status;
1038         struct rx_agg *agg;
1039         struct r8152 *tp;
1040         int result;
1041
1042         agg = urb->context;
1043         if (!agg)
1044                 return;
1045
1046         tp = agg->context;
1047         if (!tp)
1048                 return;
1049
1050         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1051                 return;
1052
1053         if (!test_bit(WORK_ENABLE, &tp->flags))
1054                 return;
1055
1056         netdev = tp->netdev;
1057
1058         /* When link down, the driver would cancel all bulks. */
1059         /* This avoid the re-submitting bulk */
1060         if (!netif_carrier_ok(netdev))
1061                 return;
1062
1063         usb_mark_last_busy(tp->udev);
1064
1065         switch (status) {
1066         case 0:
1067                 if (urb->actual_length < ETH_ZLEN)
1068                         break;
1069
1070                 spin_lock(&tp->rx_lock);
1071                 list_add_tail(&agg->list, &tp->rx_done);
1072                 spin_unlock(&tp->rx_lock);
1073                 tasklet_schedule(&tp->tl);
1074                 return;
1075         case -ESHUTDOWN:
1076                 set_bit(RTL8152_UNPLUG, &tp->flags);
1077                 netif_device_detach(tp->netdev);
1078                 return;
1079         case -ENOENT:
1080                 return; /* the urb is in unlink state */
1081         case -ETIME:
1082                 if (net_ratelimit())
1083                         netdev_warn(netdev, "maybe reset is needed?\n");
1084                 break;
1085         default:
1086                 if (net_ratelimit())
1087                         netdev_warn(netdev, "Rx status %d\n", status);
1088                 break;
1089         }
1090
1091         result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1092         if (result == -ENODEV) {
1093                 netif_device_detach(tp->netdev);
1094         } else if (result) {
1095                 spin_lock(&tp->rx_lock);
1096                 list_add_tail(&agg->list, &tp->rx_done);
1097                 spin_unlock(&tp->rx_lock);
1098                 tasklet_schedule(&tp->tl);
1099         }
1100 }
1101
1102 static void write_bulk_callback(struct urb *urb)
1103 {
1104         struct net_device_stats *stats;
1105         struct net_device *netdev;
1106         struct tx_agg *agg;
1107         struct r8152 *tp;
1108         int status = urb->status;
1109
1110         agg = urb->context;
1111         if (!agg)
1112                 return;
1113
1114         tp = agg->context;
1115         if (!tp)
1116                 return;
1117
1118         netdev = tp->netdev;
1119         stats = &netdev->stats;
1120         if (status) {
1121                 if (net_ratelimit())
1122                         netdev_warn(netdev, "Tx status %d\n", status);
1123                 stats->tx_errors += agg->skb_num;
1124         } else {
1125                 stats->tx_packets += agg->skb_num;
1126                 stats->tx_bytes += agg->skb_len;
1127         }
1128
1129         spin_lock(&tp->tx_lock);
1130         list_add_tail(&agg->list, &tp->tx_free);
1131         spin_unlock(&tp->tx_lock);
1132
1133         usb_autopm_put_interface_async(tp->intf);
1134
1135         if (!netif_carrier_ok(netdev))
1136                 return;
1137
1138         if (!test_bit(WORK_ENABLE, &tp->flags))
1139                 return;
1140
1141         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1142                 return;
1143
1144         if (!skb_queue_empty(&tp->tx_queue))
1145                 tasklet_schedule(&tp->tl);
1146 }
1147
1148 static void intr_callback(struct urb *urb)
1149 {
1150         struct r8152 *tp;
1151         __le16 *d;
1152         int status = urb->status;
1153         int res;
1154
1155         tp = urb->context;
1156         if (!tp)
1157                 return;
1158
1159         if (!test_bit(WORK_ENABLE, &tp->flags))
1160                 return;
1161
1162         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1163                 return;
1164
1165         switch (status) {
1166         case 0:                 /* success */
1167                 break;
1168         case -ECONNRESET:       /* unlink */
1169         case -ESHUTDOWN:
1170                 netif_device_detach(tp->netdev);
1171         case -ENOENT:
1172                 return;
1173         case -EOVERFLOW:
1174                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1175                 goto resubmit;
1176         /* -EPIPE:  should clear the halt */
1177         default:
1178                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1179                 goto resubmit;
1180         }
1181
1182         d = urb->transfer_buffer;
1183         if (INTR_LINK & __le16_to_cpu(d[0])) {
1184                 if (!(tp->speed & LINK_STATUS)) {
1185                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1186                         schedule_delayed_work(&tp->schedule, 0);
1187                 }
1188         } else {
1189                 if (tp->speed & LINK_STATUS) {
1190                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1191                         schedule_delayed_work(&tp->schedule, 0);
1192                 }
1193         }
1194
1195 resubmit:
1196         res = usb_submit_urb(urb, GFP_ATOMIC);
1197         if (res == -ENODEV)
1198                 netif_device_detach(tp->netdev);
1199         else if (res)
1200                 netif_err(tp, intr, tp->netdev,
1201                           "can't resubmit intr, status %d\n", res);
1202 }
1203
1204 static inline void *rx_agg_align(void *data)
1205 {
1206         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1207 }
1208
1209 static inline void *tx_agg_align(void *data)
1210 {
1211         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1212 }
1213
1214 static void free_all_mem(struct r8152 *tp)
1215 {
1216         int i;
1217
1218         for (i = 0; i < RTL8152_MAX_RX; i++) {
1219                 usb_free_urb(tp->rx_info[i].urb);
1220                 tp->rx_info[i].urb = NULL;
1221
1222                 kfree(tp->rx_info[i].buffer);
1223                 tp->rx_info[i].buffer = NULL;
1224                 tp->rx_info[i].head = NULL;
1225         }
1226
1227         for (i = 0; i < RTL8152_MAX_TX; i++) {
1228                 usb_free_urb(tp->tx_info[i].urb);
1229                 tp->tx_info[i].urb = NULL;
1230
1231                 kfree(tp->tx_info[i].buffer);
1232                 tp->tx_info[i].buffer = NULL;
1233                 tp->tx_info[i].head = NULL;
1234         }
1235
1236         usb_free_urb(tp->intr_urb);
1237         tp->intr_urb = NULL;
1238
1239         kfree(tp->intr_buff);
1240         tp->intr_buff = NULL;
1241 }
1242
1243 static int alloc_all_mem(struct r8152 *tp)
1244 {
1245         struct net_device *netdev = tp->netdev;
1246         struct usb_interface *intf = tp->intf;
1247         struct usb_host_interface *alt = intf->cur_altsetting;
1248         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1249         struct urb *urb;
1250         int node, i;
1251         u8 *buf;
1252
1253         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1254
1255         spin_lock_init(&tp->rx_lock);
1256         spin_lock_init(&tp->tx_lock);
1257         INIT_LIST_HEAD(&tp->rx_done);
1258         INIT_LIST_HEAD(&tp->tx_free);
1259         skb_queue_head_init(&tp->tx_queue);
1260
1261         for (i = 0; i < RTL8152_MAX_RX; i++) {
1262                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1263                 if (!buf)
1264                         goto err1;
1265
1266                 if (buf != rx_agg_align(buf)) {
1267                         kfree(buf);
1268                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1269                                            node);
1270                         if (!buf)
1271                                 goto err1;
1272                 }
1273
1274                 urb = usb_alloc_urb(0, GFP_KERNEL);
1275                 if (!urb) {
1276                         kfree(buf);
1277                         goto err1;
1278                 }
1279
1280                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1281                 tp->rx_info[i].context = tp;
1282                 tp->rx_info[i].urb = urb;
1283                 tp->rx_info[i].buffer = buf;
1284                 tp->rx_info[i].head = rx_agg_align(buf);
1285         }
1286
1287         for (i = 0; i < RTL8152_MAX_TX; i++) {
1288                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1289                 if (!buf)
1290                         goto err1;
1291
1292                 if (buf != tx_agg_align(buf)) {
1293                         kfree(buf);
1294                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1295                                            node);
1296                         if (!buf)
1297                                 goto err1;
1298                 }
1299
1300                 urb = usb_alloc_urb(0, GFP_KERNEL);
1301                 if (!urb) {
1302                         kfree(buf);
1303                         goto err1;
1304                 }
1305
1306                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1307                 tp->tx_info[i].context = tp;
1308                 tp->tx_info[i].urb = urb;
1309                 tp->tx_info[i].buffer = buf;
1310                 tp->tx_info[i].head = tx_agg_align(buf);
1311
1312                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1313         }
1314
1315         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1316         if (!tp->intr_urb)
1317                 goto err1;
1318
1319         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1320         if (!tp->intr_buff)
1321                 goto err1;
1322
1323         tp->intr_interval = (int)ep_intr->desc.bInterval;
1324         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1325                          tp->intr_buff, INTBUFSIZE, intr_callback,
1326                          tp, tp->intr_interval);
1327
1328         return 0;
1329
1330 err1:
1331         free_all_mem(tp);
1332         return -ENOMEM;
1333 }
1334
1335 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1336 {
1337         struct tx_agg *agg = NULL;
1338         unsigned long flags;
1339
1340         if (list_empty(&tp->tx_free))
1341                 return NULL;
1342
1343         spin_lock_irqsave(&tp->tx_lock, flags);
1344         if (!list_empty(&tp->tx_free)) {
1345                 struct list_head *cursor;
1346
1347                 cursor = tp->tx_free.next;
1348                 list_del_init(cursor);
1349                 agg = list_entry(cursor, struct tx_agg, list);
1350         }
1351         spin_unlock_irqrestore(&tp->tx_lock, flags);
1352
1353         return agg;
1354 }
1355
1356 static inline __be16 get_protocol(struct sk_buff *skb)
1357 {
1358         __be16 protocol;
1359
1360         if (skb->protocol == htons(ETH_P_8021Q))
1361                 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1362         else
1363                 protocol = skb->protocol;
1364
1365         return protocol;
1366 }
1367
1368 /* r8152_csum_workaround()
1369  * The hw limites the value the transport offset. When the offset is out of the
1370  * range, calculate the checksum by sw.
1371  */
1372 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1373                                   struct sk_buff_head *list)
1374 {
1375         if (skb_shinfo(skb)->gso_size) {
1376                 netdev_features_t features = tp->netdev->features;
1377                 struct sk_buff_head seg_list;
1378                 struct sk_buff *segs, *nskb;
1379
1380                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1381                 segs = skb_gso_segment(skb, features);
1382                 if (IS_ERR(segs) || !segs)
1383                         goto drop;
1384
1385                 __skb_queue_head_init(&seg_list);
1386
1387                 do {
1388                         nskb = segs;
1389                         segs = segs->next;
1390                         nskb->next = NULL;
1391                         __skb_queue_tail(&seg_list, nskb);
1392                 } while (segs);
1393
1394                 skb_queue_splice(&seg_list, list);
1395                 dev_kfree_skb(skb);
1396         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1397                 if (skb_checksum_help(skb) < 0)
1398                         goto drop;
1399
1400                 __skb_queue_head(list, skb);
1401         } else {
1402                 struct net_device_stats *stats;
1403
1404 drop:
1405                 stats = &tp->netdev->stats;
1406                 stats->tx_dropped++;
1407                 dev_kfree_skb(skb);
1408         }
1409 }
1410
1411 /* msdn_giant_send_check()
1412  * According to the document of microsoft, the TCP Pseudo Header excludes the
1413  * packet length for IPv6 TCP large packets.
1414  */
1415 static int msdn_giant_send_check(struct sk_buff *skb)
1416 {
1417         const struct ipv6hdr *ipv6h;
1418         struct tcphdr *th;
1419         int ret;
1420
1421         ret = skb_cow_head(skb, 0);
1422         if (ret)
1423                 return ret;
1424
1425         ipv6h = ipv6_hdr(skb);
1426         th = tcp_hdr(skb);
1427
1428         th->check = 0;
1429         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1430
1431         return ret;
1432 }
1433
1434 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1435 {
1436         if (vlan_tx_tag_present(skb)) {
1437                 u32 opts2;
1438
1439                 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1440                 desc->opts2 |= cpu_to_le32(opts2);
1441         }
1442 }
1443
1444 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1445 {
1446         u32 opts2 = le32_to_cpu(desc->opts2);
1447
1448         if (opts2 & RX_VLAN_TAG)
1449                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1450                                        swab16(opts2 & 0xffff));
1451 }
1452
1453 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1454                          struct sk_buff *skb, u32 len, u32 transport_offset)
1455 {
1456         u32 mss = skb_shinfo(skb)->gso_size;
1457         u32 opts1, opts2 = 0;
1458         int ret = TX_CSUM_SUCCESS;
1459
1460         WARN_ON_ONCE(len > TX_LEN_MAX);
1461
1462         opts1 = len | TX_FS | TX_LS;
1463
1464         if (mss) {
1465                 if (transport_offset > GTTCPHO_MAX) {
1466                         netif_warn(tp, tx_err, tp->netdev,
1467                                    "Invalid transport offset 0x%x for TSO\n",
1468                                    transport_offset);
1469                         ret = TX_CSUM_TSO;
1470                         goto unavailable;
1471                 }
1472
1473                 switch (get_protocol(skb)) {
1474                 case htons(ETH_P_IP):
1475                         opts1 |= GTSENDV4;
1476                         break;
1477
1478                 case htons(ETH_P_IPV6):
1479                         if (msdn_giant_send_check(skb)) {
1480                                 ret = TX_CSUM_TSO;
1481                                 goto unavailable;
1482                         }
1483                         opts1 |= GTSENDV6;
1484                         break;
1485
1486                 default:
1487                         WARN_ON_ONCE(1);
1488                         break;
1489                 }
1490
1491                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1492                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1493         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1494                 u8 ip_protocol;
1495
1496                 if (transport_offset > TCPHO_MAX) {
1497                         netif_warn(tp, tx_err, tp->netdev,
1498                                    "Invalid transport offset 0x%x\n",
1499                                    transport_offset);
1500                         ret = TX_CSUM_NONE;
1501                         goto unavailable;
1502                 }
1503
1504                 switch (get_protocol(skb)) {
1505                 case htons(ETH_P_IP):
1506                         opts2 |= IPV4_CS;
1507                         ip_protocol = ip_hdr(skb)->protocol;
1508                         break;
1509
1510                 case htons(ETH_P_IPV6):
1511                         opts2 |= IPV6_CS;
1512                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1513                         break;
1514
1515                 default:
1516                         ip_protocol = IPPROTO_RAW;
1517                         break;
1518                 }
1519
1520                 if (ip_protocol == IPPROTO_TCP)
1521                         opts2 |= TCP_CS;
1522                 else if (ip_protocol == IPPROTO_UDP)
1523                         opts2 |= UDP_CS;
1524                 else
1525                         WARN_ON_ONCE(1);
1526
1527                 opts2 |= transport_offset << TCPHO_SHIFT;
1528         }
1529
1530         desc->opts2 = cpu_to_le32(opts2);
1531         desc->opts1 = cpu_to_le32(opts1);
1532
1533 unavailable:
1534         return ret;
1535 }
1536
1537 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1538 {
1539         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1540         int remain, ret;
1541         u8 *tx_data;
1542
1543         __skb_queue_head_init(&skb_head);
1544         spin_lock(&tx_queue->lock);
1545         skb_queue_splice_init(tx_queue, &skb_head);
1546         spin_unlock(&tx_queue->lock);
1547
1548         tx_data = agg->head;
1549         agg->skb_num = 0;
1550         agg->skb_len = 0;
1551         remain = agg_buf_sz;
1552
1553         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1554                 struct tx_desc *tx_desc;
1555                 struct sk_buff *skb;
1556                 unsigned int len;
1557                 u32 offset;
1558
1559                 skb = __skb_dequeue(&skb_head);
1560                 if (!skb)
1561                         break;
1562
1563                 len = skb->len + sizeof(*tx_desc);
1564
1565                 if (len > remain) {
1566                         __skb_queue_head(&skb_head, skb);
1567                         break;
1568                 }
1569
1570                 tx_data = tx_agg_align(tx_data);
1571                 tx_desc = (struct tx_desc *)tx_data;
1572
1573                 offset = (u32)skb_transport_offset(skb);
1574
1575                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1576                         r8152_csum_workaround(tp, skb, &skb_head);
1577                         continue;
1578                 }
1579
1580                 rtl_tx_vlan_tag(tx_desc, skb);
1581
1582                 tx_data += sizeof(*tx_desc);
1583
1584                 len = skb->len;
1585                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1586                         struct net_device_stats *stats = &tp->netdev->stats;
1587
1588                         stats->tx_dropped++;
1589                         dev_kfree_skb_any(skb);
1590                         tx_data -= sizeof(*tx_desc);
1591                         continue;
1592                 }
1593
1594                 tx_data += len;
1595                 agg->skb_len += len;
1596                 agg->skb_num++;
1597
1598                 dev_kfree_skb_any(skb);
1599
1600                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1601         }
1602
1603         if (!skb_queue_empty(&skb_head)) {
1604                 spin_lock(&tx_queue->lock);
1605                 skb_queue_splice(&skb_head, tx_queue);
1606                 spin_unlock(&tx_queue->lock);
1607         }
1608
1609         netif_tx_lock(tp->netdev);
1610
1611         if (netif_queue_stopped(tp->netdev) &&
1612             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1613                 netif_wake_queue(tp->netdev);
1614
1615         netif_tx_unlock(tp->netdev);
1616
1617         ret = usb_autopm_get_interface_async(tp->intf);
1618         if (ret < 0)
1619                 goto out_tx_fill;
1620
1621         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1622                           agg->head, (int)(tx_data - (u8 *)agg->head),
1623                           (usb_complete_t)write_bulk_callback, agg);
1624
1625         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1626         if (ret < 0)
1627                 usb_autopm_put_interface_async(tp->intf);
1628
1629 out_tx_fill:
1630         return ret;
1631 }
1632
1633 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1634 {
1635         u8 checksum = CHECKSUM_NONE;
1636         u32 opts2, opts3;
1637
1638         if (tp->version == RTL_VER_01)
1639                 goto return_result;
1640
1641         opts2 = le32_to_cpu(rx_desc->opts2);
1642         opts3 = le32_to_cpu(rx_desc->opts3);
1643
1644         if (opts2 & RD_IPV4_CS) {
1645                 if (opts3 & IPF)
1646                         checksum = CHECKSUM_NONE;
1647                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1648                         checksum = CHECKSUM_NONE;
1649                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1650                         checksum = CHECKSUM_NONE;
1651                 else
1652                         checksum = CHECKSUM_UNNECESSARY;
1653         } else if (RD_IPV6_CS) {
1654                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1655                         checksum = CHECKSUM_UNNECESSARY;
1656                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1657                         checksum = CHECKSUM_UNNECESSARY;
1658         }
1659
1660 return_result:
1661         return checksum;
1662 }
1663
1664 static void rx_bottom(struct r8152 *tp)
1665 {
1666         unsigned long flags;
1667         struct list_head *cursor, *next, rx_queue;
1668
1669         if (list_empty(&tp->rx_done))
1670                 return;
1671
1672         INIT_LIST_HEAD(&rx_queue);
1673         spin_lock_irqsave(&tp->rx_lock, flags);
1674         list_splice_init(&tp->rx_done, &rx_queue);
1675         spin_unlock_irqrestore(&tp->rx_lock, flags);
1676
1677         list_for_each_safe(cursor, next, &rx_queue) {
1678                 struct rx_desc *rx_desc;
1679                 struct rx_agg *agg;
1680                 int len_used = 0;
1681                 struct urb *urb;
1682                 u8 *rx_data;
1683                 int ret;
1684
1685                 list_del_init(cursor);
1686
1687                 agg = list_entry(cursor, struct rx_agg, list);
1688                 urb = agg->urb;
1689                 if (urb->actual_length < ETH_ZLEN)
1690                         goto submit;
1691
1692                 rx_desc = agg->head;
1693                 rx_data = agg->head;
1694                 len_used += sizeof(struct rx_desc);
1695
1696                 while (urb->actual_length > len_used) {
1697                         struct net_device *netdev = tp->netdev;
1698                         struct net_device_stats *stats = &netdev->stats;
1699                         unsigned int pkt_len;
1700                         struct sk_buff *skb;
1701
1702                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1703                         if (pkt_len < ETH_ZLEN)
1704                                 break;
1705
1706                         len_used += pkt_len;
1707                         if (urb->actual_length < len_used)
1708                                 break;
1709
1710                         pkt_len -= CRC_SIZE;
1711                         rx_data += sizeof(struct rx_desc);
1712
1713                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1714                         if (!skb) {
1715                                 stats->rx_dropped++;
1716                                 goto find_next_rx;
1717                         }
1718
1719                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1720                         memcpy(skb->data, rx_data, pkt_len);
1721                         skb_put(skb, pkt_len);
1722                         skb->protocol = eth_type_trans(skb, netdev);
1723                         rtl_rx_vlan_tag(rx_desc, skb);
1724                         netif_receive_skb(skb);
1725                         stats->rx_packets++;
1726                         stats->rx_bytes += pkt_len;
1727
1728 find_next_rx:
1729                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1730                         rx_desc = (struct rx_desc *)rx_data;
1731                         len_used = (int)(rx_data - (u8 *)agg->head);
1732                         len_used += sizeof(struct rx_desc);
1733                 }
1734
1735 submit:
1736                 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1737                 if (ret && ret != -ENODEV) {
1738                         spin_lock_irqsave(&tp->rx_lock, flags);
1739                         list_add_tail(&agg->list, &tp->rx_done);
1740                         spin_unlock_irqrestore(&tp->rx_lock, flags);
1741                         tasklet_schedule(&tp->tl);
1742                 }
1743         }
1744 }
1745
1746 static void tx_bottom(struct r8152 *tp)
1747 {
1748         int res;
1749
1750         do {
1751                 struct tx_agg *agg;
1752
1753                 if (skb_queue_empty(&tp->tx_queue))
1754                         break;
1755
1756                 agg = r8152_get_tx_agg(tp);
1757                 if (!agg)
1758                         break;
1759
1760                 res = r8152_tx_agg_fill(tp, agg);
1761                 if (res) {
1762                         struct net_device *netdev = tp->netdev;
1763
1764                         if (res == -ENODEV) {
1765                                 netif_device_detach(netdev);
1766                         } else {
1767                                 struct net_device_stats *stats = &netdev->stats;
1768                                 unsigned long flags;
1769
1770                                 netif_warn(tp, tx_err, netdev,
1771                                            "failed tx_urb %d\n", res);
1772                                 stats->tx_dropped += agg->skb_num;
1773
1774                                 spin_lock_irqsave(&tp->tx_lock, flags);
1775                                 list_add_tail(&agg->list, &tp->tx_free);
1776                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1777                         }
1778                 }
1779         } while (res == 0);
1780 }
1781
1782 static void bottom_half(unsigned long data)
1783 {
1784         struct r8152 *tp;
1785
1786         tp = (struct r8152 *)data;
1787
1788         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1789                 return;
1790
1791         if (!test_bit(WORK_ENABLE, &tp->flags))
1792                 return;
1793
1794         /* When link down, the driver would cancel all bulks. */
1795         /* This avoid the re-submitting bulk */
1796         if (!netif_carrier_ok(tp->netdev))
1797                 return;
1798
1799         rx_bottom(tp);
1800         tx_bottom(tp);
1801 }
1802
1803 static
1804 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1805 {
1806         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1807                           agg->head, agg_buf_sz,
1808                           (usb_complete_t)read_bulk_callback, agg);
1809
1810         return usb_submit_urb(agg->urb, mem_flags);
1811 }
1812
1813 static void rtl_drop_queued_tx(struct r8152 *tp)
1814 {
1815         struct net_device_stats *stats = &tp->netdev->stats;
1816         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1817         struct sk_buff *skb;
1818
1819         if (skb_queue_empty(tx_queue))
1820                 return;
1821
1822         __skb_queue_head_init(&skb_head);
1823         spin_lock_bh(&tx_queue->lock);
1824         skb_queue_splice_init(tx_queue, &skb_head);
1825         spin_unlock_bh(&tx_queue->lock);
1826
1827         while ((skb = __skb_dequeue(&skb_head))) {
1828                 dev_kfree_skb(skb);
1829                 stats->tx_dropped++;
1830         }
1831 }
1832
1833 static void rtl8152_tx_timeout(struct net_device *netdev)
1834 {
1835         struct r8152 *tp = netdev_priv(netdev);
1836         int i;
1837
1838         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1839         for (i = 0; i < RTL8152_MAX_TX; i++)
1840                 usb_unlink_urb(tp->tx_info[i].urb);
1841 }
1842
1843 static void rtl8152_set_rx_mode(struct net_device *netdev)
1844 {
1845         struct r8152 *tp = netdev_priv(netdev);
1846
1847         if (tp->speed & LINK_STATUS) {
1848                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1849                 schedule_delayed_work(&tp->schedule, 0);
1850         }
1851 }
1852
1853 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1854 {
1855         struct r8152 *tp = netdev_priv(netdev);
1856         u32 mc_filter[2];       /* Multicast hash filter */
1857         __le32 tmp[2];
1858         u32 ocp_data;
1859
1860         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1861         netif_stop_queue(netdev);
1862         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1863         ocp_data &= ~RCR_ACPT_ALL;
1864         ocp_data |= RCR_AB | RCR_APM;
1865
1866         if (netdev->flags & IFF_PROMISC) {
1867                 /* Unconditionally log net taps. */
1868                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1869                 ocp_data |= RCR_AM | RCR_AAP;
1870                 mc_filter[1] = 0xffffffff;
1871                 mc_filter[0] = 0xffffffff;
1872         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1873                    (netdev->flags & IFF_ALLMULTI)) {
1874                 /* Too many to filter perfectly -- accept all multicasts. */
1875                 ocp_data |= RCR_AM;
1876                 mc_filter[1] = 0xffffffff;
1877                 mc_filter[0] = 0xffffffff;
1878         } else {
1879                 struct netdev_hw_addr *ha;
1880
1881                 mc_filter[1] = 0;
1882                 mc_filter[0] = 0;
1883                 netdev_for_each_mc_addr(ha, netdev) {
1884                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1885
1886                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1887                         ocp_data |= RCR_AM;
1888                 }
1889         }
1890
1891         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1892         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1893
1894         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1895         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1896         netif_wake_queue(netdev);
1897 }
1898
1899 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1900                                       struct net_device *netdev)
1901 {
1902         struct r8152 *tp = netdev_priv(netdev);
1903
1904         skb_tx_timestamp(skb);
1905
1906         skb_queue_tail(&tp->tx_queue, skb);
1907
1908         if (!list_empty(&tp->tx_free)) {
1909                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1910                         set_bit(SCHEDULE_TASKLET, &tp->flags);
1911                         schedule_delayed_work(&tp->schedule, 0);
1912                 } else {
1913                         usb_mark_last_busy(tp->udev);
1914                         tasklet_schedule(&tp->tl);
1915                 }
1916         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1917                 netif_stop_queue(netdev);
1918         }
1919
1920         return NETDEV_TX_OK;
1921 }
1922
1923 static void r8152b_reset_packet_filter(struct r8152 *tp)
1924 {
1925         u32     ocp_data;
1926
1927         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1928         ocp_data &= ~FMC_FCR_MCU_EN;
1929         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1930         ocp_data |= FMC_FCR_MCU_EN;
1931         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1932 }
1933
1934 static void rtl8152_nic_reset(struct r8152 *tp)
1935 {
1936         int     i;
1937
1938         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1939
1940         for (i = 0; i < 1000; i++) {
1941                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1942                         break;
1943                 usleep_range(100, 400);
1944         }
1945 }
1946
1947 static void set_tx_qlen(struct r8152 *tp)
1948 {
1949         struct net_device *netdev = tp->netdev;
1950
1951         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1952                                     sizeof(struct tx_desc));
1953 }
1954
1955 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1956 {
1957         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1958 }
1959
1960 static void rtl_set_eee_plus(struct r8152 *tp)
1961 {
1962         u32 ocp_data;
1963         u8 speed;
1964
1965         speed = rtl8152_get_speed(tp);
1966         if (speed & _10bps) {
1967                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1968                 ocp_data |= EEEP_CR_EEEP_TX;
1969                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1970         } else {
1971                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1972                 ocp_data &= ~EEEP_CR_EEEP_TX;
1973                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1974         }
1975 }
1976
1977 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1978 {
1979         u32 ocp_data;
1980
1981         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1982         if (enable)
1983                 ocp_data |= RXDY_GATED_EN;
1984         else
1985                 ocp_data &= ~RXDY_GATED_EN;
1986         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1987 }
1988
1989 static int rtl_start_rx(struct r8152 *tp)
1990 {
1991         int i, ret = 0;
1992
1993         INIT_LIST_HEAD(&tp->rx_done);
1994         for (i = 0; i < RTL8152_MAX_RX; i++) {
1995                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1996                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
1997                 if (ret)
1998                         break;
1999         }
2000
2001         return ret;
2002 }
2003
2004 static int rtl_stop_rx(struct r8152 *tp)
2005 {
2006         int i;
2007
2008         for (i = 0; i < RTL8152_MAX_RX; i++)
2009                 usb_kill_urb(tp->rx_info[i].urb);
2010
2011         return 0;
2012 }
2013
2014 static int rtl_enable(struct r8152 *tp)
2015 {
2016         u32 ocp_data;
2017
2018         r8152b_reset_packet_filter(tp);
2019
2020         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2021         ocp_data |= CR_RE | CR_TE;
2022         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2023
2024         rxdy_gated_en(tp, false);
2025
2026         return rtl_start_rx(tp);
2027 }
2028
2029 static int rtl8152_enable(struct r8152 *tp)
2030 {
2031         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2032                 return -ENODEV;
2033
2034         set_tx_qlen(tp);
2035         rtl_set_eee_plus(tp);
2036
2037         return rtl_enable(tp);
2038 }
2039
2040 static void r8153_set_rx_agg(struct r8152 *tp)
2041 {
2042         u8 speed;
2043
2044         speed = rtl8152_get_speed(tp);
2045         if (speed & _1000bps) {
2046                 if (tp->udev->speed == USB_SPEED_SUPER) {
2047                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2048                                         RX_THR_SUPPER);
2049                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2050                                         EARLY_AGG_SUPPER);
2051                 } else {
2052                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2053                                         RX_THR_HIGH);
2054                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2055                                         EARLY_AGG_HIGH);
2056                 }
2057         } else {
2058                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2059                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2060                                 EARLY_AGG_SLOW);
2061         }
2062 }
2063
2064 static int rtl8153_enable(struct r8152 *tp)
2065 {
2066         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2067                 return -ENODEV;
2068
2069         set_tx_qlen(tp);
2070         rtl_set_eee_plus(tp);
2071         r8153_set_rx_agg(tp);
2072
2073         return rtl_enable(tp);
2074 }
2075
2076 static void rtl_disable(struct r8152 *tp)
2077 {
2078         u32 ocp_data;
2079         int i;
2080
2081         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2082                 rtl_drop_queued_tx(tp);
2083                 return;
2084         }
2085
2086         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2087         ocp_data &= ~RCR_ACPT_ALL;
2088         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2089
2090         rtl_drop_queued_tx(tp);
2091
2092         for (i = 0; i < RTL8152_MAX_TX; i++)
2093                 usb_kill_urb(tp->tx_info[i].urb);
2094
2095         rxdy_gated_en(tp, true);
2096
2097         for (i = 0; i < 1000; i++) {
2098                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2099                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2100                         break;
2101                 usleep_range(1000, 2000);
2102         }
2103
2104         for (i = 0; i < 1000; i++) {
2105                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2106                         break;
2107                 usleep_range(1000, 2000);
2108         }
2109
2110         rtl_stop_rx(tp);
2111
2112         rtl8152_nic_reset(tp);
2113 }
2114
2115 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2116 {
2117         u32 ocp_data;
2118
2119         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2120         if (enable)
2121                 ocp_data |= POWER_CUT;
2122         else
2123                 ocp_data &= ~POWER_CUT;
2124         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2125
2126         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2127         ocp_data &= ~RESUME_INDICATE;
2128         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2129 }
2130
2131 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2132 {
2133         u32 ocp_data;
2134
2135         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2136         if (enable)
2137                 ocp_data |= CPCR_RX_VLAN;
2138         else
2139                 ocp_data &= ~CPCR_RX_VLAN;
2140         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2141 }
2142
2143 static int rtl8152_set_features(struct net_device *dev,
2144                                 netdev_features_t features)
2145 {
2146         netdev_features_t changed = features ^ dev->features;
2147         struct r8152 *tp = netdev_priv(dev);
2148         int ret;
2149
2150         ret = usb_autopm_get_interface(tp->intf);
2151         if (ret < 0)
2152                 goto out;
2153
2154         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2155                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2156                         rtl_rx_vlan_en(tp, true);
2157                 else
2158                         rtl_rx_vlan_en(tp, false);
2159         }
2160
2161         usb_autopm_put_interface(tp->intf);
2162
2163 out:
2164         return ret;
2165 }
2166
2167 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2168
2169 static u32 __rtl_get_wol(struct r8152 *tp)
2170 {
2171         u32 ocp_data;
2172         u32 wolopts = 0;
2173
2174         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2175         if (!(ocp_data & LAN_WAKE_EN))
2176                 return 0;
2177
2178         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2179         if (ocp_data & LINK_ON_WAKE_EN)
2180                 wolopts |= WAKE_PHY;
2181
2182         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2183         if (ocp_data & UWF_EN)
2184                 wolopts |= WAKE_UCAST;
2185         if (ocp_data & BWF_EN)
2186                 wolopts |= WAKE_BCAST;
2187         if (ocp_data & MWF_EN)
2188                 wolopts |= WAKE_MCAST;
2189
2190         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2191         if (ocp_data & MAGIC_EN)
2192                 wolopts |= WAKE_MAGIC;
2193
2194         return wolopts;
2195 }
2196
2197 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2198 {
2199         u32 ocp_data;
2200
2201         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2202
2203         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2204         ocp_data &= ~LINK_ON_WAKE_EN;
2205         if (wolopts & WAKE_PHY)
2206                 ocp_data |= LINK_ON_WAKE_EN;
2207         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2208
2209         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2210         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2211         if (wolopts & WAKE_UCAST)
2212                 ocp_data |= UWF_EN;
2213         if (wolopts & WAKE_BCAST)
2214                 ocp_data |= BWF_EN;
2215         if (wolopts & WAKE_MCAST)
2216                 ocp_data |= MWF_EN;
2217         if (wolopts & WAKE_ANY)
2218                 ocp_data |= LAN_WAKE_EN;
2219         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2220
2221         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2222
2223         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2224         ocp_data &= ~MAGIC_EN;
2225         if (wolopts & WAKE_MAGIC)
2226                 ocp_data |= MAGIC_EN;
2227         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2228
2229         if (wolopts & WAKE_ANY)
2230                 device_set_wakeup_enable(&tp->udev->dev, true);
2231         else
2232                 device_set_wakeup_enable(&tp->udev->dev, false);
2233 }
2234
2235 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2236 {
2237         if (enable) {
2238                 u32 ocp_data;
2239
2240                 __rtl_set_wol(tp, WAKE_ANY);
2241
2242                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2243
2244                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2245                 ocp_data |= LINK_OFF_WAKE_EN;
2246                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2247
2248                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2249         } else {
2250                 __rtl_set_wol(tp, tp->saved_wolopts);
2251         }
2252 }
2253
2254 static void rtl_phy_reset(struct r8152 *tp)
2255 {
2256         u16 data;
2257         int i;
2258
2259         clear_bit(PHY_RESET, &tp->flags);
2260
2261         data = r8152_mdio_read(tp, MII_BMCR);
2262
2263         /* don't reset again before the previous one complete */
2264         if (data & BMCR_RESET)
2265                 return;
2266
2267         data |= BMCR_RESET;
2268         r8152_mdio_write(tp, MII_BMCR, data);
2269
2270         for (i = 0; i < 50; i++) {
2271                 msleep(20);
2272                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2273                         break;
2274         }
2275 }
2276
2277 static void r8153_teredo_off(struct r8152 *tp)
2278 {
2279         u32 ocp_data;
2280
2281         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2282         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2283         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2284
2285         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2286         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2287         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2288 }
2289
2290 static void r8152b_disable_aldps(struct r8152 *tp)
2291 {
2292         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2293         msleep(20);
2294 }
2295
2296 static inline void r8152b_enable_aldps(struct r8152 *tp)
2297 {
2298         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2299                                             LINKENA | DIS_SDSAVE);
2300 }
2301
2302 static void rtl8152_disable(struct r8152 *tp)
2303 {
2304         r8152b_disable_aldps(tp);
2305         rtl_disable(tp);
2306         r8152b_enable_aldps(tp);
2307 }
2308
2309 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2310 {
2311         u16 data;
2312
2313         data = r8152_mdio_read(tp, MII_BMCR);
2314         if (data & BMCR_PDOWN) {
2315                 data &= ~BMCR_PDOWN;
2316                 r8152_mdio_write(tp, MII_BMCR, data);
2317         }
2318
2319         set_bit(PHY_RESET, &tp->flags);
2320 }
2321
2322 static void r8152b_exit_oob(struct r8152 *tp)
2323 {
2324         u32 ocp_data;
2325         int i;
2326
2327         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2328         ocp_data &= ~RCR_ACPT_ALL;
2329         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2330
2331         rxdy_gated_en(tp, true);
2332         r8153_teredo_off(tp);
2333         r8152b_hw_phy_cfg(tp);
2334
2335         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2336         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2337
2338         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2339         ocp_data &= ~NOW_IS_OOB;
2340         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2341
2342         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2343         ocp_data &= ~MCU_BORW_EN;
2344         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2345
2346         for (i = 0; i < 1000; i++) {
2347                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2348                 if (ocp_data & LINK_LIST_READY)
2349                         break;
2350                 usleep_range(1000, 2000);
2351         }
2352
2353         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2354         ocp_data |= RE_INIT_LL;
2355         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2356
2357         for (i = 0; i < 1000; i++) {
2358                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2359                 if (ocp_data & LINK_LIST_READY)
2360                         break;
2361                 usleep_range(1000, 2000);
2362         }
2363
2364         rtl8152_nic_reset(tp);
2365
2366         /* rx share fifo credit full threshold */
2367         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2368
2369         if (tp->udev->speed == USB_SPEED_FULL ||
2370             tp->udev->speed == USB_SPEED_LOW) {
2371                 /* rx share fifo credit near full threshold */
2372                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2373                                 RXFIFO_THR2_FULL);
2374                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2375                                 RXFIFO_THR3_FULL);
2376         } else {
2377                 /* rx share fifo credit near full threshold */
2378                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2379                                 RXFIFO_THR2_HIGH);
2380                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2381                                 RXFIFO_THR3_HIGH);
2382         }
2383
2384         /* TX share fifo free credit full threshold */
2385         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2386
2387         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2388         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2389         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2390                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2391
2392         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2393
2394         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2395
2396         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2397         ocp_data |= TCR0_AUTO_FIFO;
2398         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2399 }
2400
2401 static void r8152b_enter_oob(struct r8152 *tp)
2402 {
2403         u32 ocp_data;
2404         int i;
2405
2406         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2407         ocp_data &= ~NOW_IS_OOB;
2408         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2409
2410         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2411         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2412         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2413
2414         rtl_disable(tp);
2415
2416         for (i = 0; i < 1000; i++) {
2417                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2418                 if (ocp_data & LINK_LIST_READY)
2419                         break;
2420                 usleep_range(1000, 2000);
2421         }
2422
2423         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2424         ocp_data |= RE_INIT_LL;
2425         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2426
2427         for (i = 0; i < 1000; i++) {
2428                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2429                 if (ocp_data & LINK_LIST_READY)
2430                         break;
2431                 usleep_range(1000, 2000);
2432         }
2433
2434         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2435
2436         rtl_rx_vlan_en(tp, true);
2437
2438         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2439         ocp_data |= ALDPS_PROXY_MODE;
2440         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2441
2442         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2443         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2444         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2445
2446         rxdy_gated_en(tp, false);
2447
2448         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2449         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2450         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2451 }
2452
2453 static void r8153_hw_phy_cfg(struct r8152 *tp)
2454 {
2455         u32 ocp_data;
2456         u16 data;
2457
2458         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2459         data = r8152_mdio_read(tp, MII_BMCR);
2460         if (data & BMCR_PDOWN) {
2461                 data &= ~BMCR_PDOWN;
2462                 r8152_mdio_write(tp, MII_BMCR, data);
2463         }
2464
2465         if (tp->version == RTL_VER_03) {
2466                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2467                 data &= ~CTAP_SHORT_EN;
2468                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2469         }
2470
2471         data = ocp_reg_read(tp, OCP_POWER_CFG);
2472         data |= EEE_CLKDIV_EN;
2473         ocp_reg_write(tp, OCP_POWER_CFG, data);
2474
2475         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2476         data |= EN_10M_BGOFF;
2477         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2478         data = ocp_reg_read(tp, OCP_POWER_CFG);
2479         data |= EN_10M_PLLOFF;
2480         ocp_reg_write(tp, OCP_POWER_CFG, data);
2481         data = sram_read(tp, SRAM_IMPEDANCE);
2482         data &= ~RX_DRIVING_MASK;
2483         sram_write(tp, SRAM_IMPEDANCE, data);
2484
2485         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2486         ocp_data |= PFM_PWM_SWITCH;
2487         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2488
2489         data = sram_read(tp, SRAM_LPF_CFG);
2490         data |= LPF_AUTO_TUNE;
2491         sram_write(tp, SRAM_LPF_CFG, data);
2492
2493         data = sram_read(tp, SRAM_10M_AMP1);
2494         data |= GDAC_IB_UPALL;
2495         sram_write(tp, SRAM_10M_AMP1, data);
2496         data = sram_read(tp, SRAM_10M_AMP2);
2497         data |= AMP_DN;
2498         sram_write(tp, SRAM_10M_AMP2, data);
2499
2500         set_bit(PHY_RESET, &tp->flags);
2501 }
2502
2503 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2504 {
2505         u8 u1u2[8];
2506
2507         if (enable)
2508                 memset(u1u2, 0xff, sizeof(u1u2));
2509         else
2510                 memset(u1u2, 0x00, sizeof(u1u2));
2511
2512         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2513 }
2514
2515 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2516 {
2517         u32 ocp_data;
2518
2519         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2520         if (enable)
2521                 ocp_data |= U2P3_ENABLE;
2522         else
2523                 ocp_data &= ~U2P3_ENABLE;
2524         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2525 }
2526
2527 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2528 {
2529         u32 ocp_data;
2530
2531         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2532         if (enable)
2533                 ocp_data |= PWR_EN | PHASE2_EN;
2534         else
2535                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2536         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2537
2538         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2539         ocp_data &= ~PCUT_STATUS;
2540         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2541 }
2542
2543 static void r8153_first_init(struct r8152 *tp)
2544 {
2545         u32 ocp_data;
2546         int i;
2547
2548         rxdy_gated_en(tp, true);
2549         r8153_teredo_off(tp);
2550
2551         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2552         ocp_data &= ~RCR_ACPT_ALL;
2553         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2554
2555         r8153_hw_phy_cfg(tp);
2556
2557         rtl8152_nic_reset(tp);
2558
2559         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2560         ocp_data &= ~NOW_IS_OOB;
2561         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2562
2563         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2564         ocp_data &= ~MCU_BORW_EN;
2565         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2566
2567         for (i = 0; i < 1000; i++) {
2568                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2569                 if (ocp_data & LINK_LIST_READY)
2570                         break;
2571                 usleep_range(1000, 2000);
2572         }
2573
2574         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2575         ocp_data |= RE_INIT_LL;
2576         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2577
2578         for (i = 0; i < 1000; i++) {
2579                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2580                 if (ocp_data & LINK_LIST_READY)
2581                         break;
2582                 usleep_range(1000, 2000);
2583         }
2584
2585         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2586
2587         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2588         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2589
2590         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2591         ocp_data |= TCR0_AUTO_FIFO;
2592         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2593
2594         rtl8152_nic_reset(tp);
2595
2596         /* rx share fifo credit full threshold */
2597         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2598         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2599         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2600         /* TX share fifo free credit full threshold */
2601         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2602
2603         /* rx aggregation */
2604         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2605         ocp_data &= ~RX_AGG_DISABLE;
2606         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2607 }
2608
2609 static void r8153_enter_oob(struct r8152 *tp)
2610 {
2611         u32 ocp_data;
2612         int i;
2613
2614         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2615         ocp_data &= ~NOW_IS_OOB;
2616         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2617
2618         rtl_disable(tp);
2619
2620         for (i = 0; i < 1000; i++) {
2621                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2622                 if (ocp_data & LINK_LIST_READY)
2623                         break;
2624                 usleep_range(1000, 2000);
2625         }
2626
2627         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2628         ocp_data |= RE_INIT_LL;
2629         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2630
2631         for (i = 0; i < 1000; i++) {
2632                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2633                 if (ocp_data & LINK_LIST_READY)
2634                         break;
2635                 usleep_range(1000, 2000);
2636         }
2637
2638         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2639
2640         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2641         ocp_data &= ~TEREDO_WAKE_MASK;
2642         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2643
2644         rtl_rx_vlan_en(tp, true);
2645
2646         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2647         ocp_data |= ALDPS_PROXY_MODE;
2648         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2649
2650         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2651         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2652         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2653
2654         rxdy_gated_en(tp, false);
2655
2656         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2657         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2658         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2659 }
2660
2661 static void r8153_disable_aldps(struct r8152 *tp)
2662 {
2663         u16 data;
2664
2665         data = ocp_reg_read(tp, OCP_POWER_CFG);
2666         data &= ~EN_ALDPS;
2667         ocp_reg_write(tp, OCP_POWER_CFG, data);
2668         msleep(20);
2669 }
2670
2671 static void r8153_enable_aldps(struct r8152 *tp)
2672 {
2673         u16 data;
2674
2675         data = ocp_reg_read(tp, OCP_POWER_CFG);
2676         data |= EN_ALDPS;
2677         ocp_reg_write(tp, OCP_POWER_CFG, data);
2678 }
2679
2680 static void rtl8153_disable(struct r8152 *tp)
2681 {
2682         r8153_disable_aldps(tp);
2683         rtl_disable(tp);
2684         r8153_enable_aldps(tp);
2685 }
2686
2687 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2688 {
2689         u16 bmcr, anar, gbcr;
2690         int ret = 0;
2691
2692         cancel_delayed_work_sync(&tp->schedule);
2693         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2694         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2695                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2696         if (tp->mii.supports_gmii) {
2697                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2698                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2699         } else {
2700                 gbcr = 0;
2701         }
2702
2703         if (autoneg == AUTONEG_DISABLE) {
2704                 if (speed == SPEED_10) {
2705                         bmcr = 0;
2706                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2707                 } else if (speed == SPEED_100) {
2708                         bmcr = BMCR_SPEED100;
2709                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2710                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2711                         bmcr = BMCR_SPEED1000;
2712                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2713                 } else {
2714                         ret = -EINVAL;
2715                         goto out;
2716                 }
2717
2718                 if (duplex == DUPLEX_FULL)
2719                         bmcr |= BMCR_FULLDPLX;
2720         } else {
2721                 if (speed == SPEED_10) {
2722                         if (duplex == DUPLEX_FULL)
2723                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2724                         else
2725                                 anar |= ADVERTISE_10HALF;
2726                 } else if (speed == SPEED_100) {
2727                         if (duplex == DUPLEX_FULL) {
2728                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2729                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2730                         } else {
2731                                 anar |= ADVERTISE_10HALF;
2732                                 anar |= ADVERTISE_100HALF;
2733                         }
2734                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2735                         if (duplex == DUPLEX_FULL) {
2736                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2737                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2738                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2739                         } else {
2740                                 anar |= ADVERTISE_10HALF;
2741                                 anar |= ADVERTISE_100HALF;
2742                                 gbcr |= ADVERTISE_1000HALF;
2743                         }
2744                 } else {
2745                         ret = -EINVAL;
2746                         goto out;
2747                 }
2748
2749                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2750         }
2751
2752         if (test_bit(PHY_RESET, &tp->flags))
2753                 bmcr |= BMCR_RESET;
2754
2755         if (tp->mii.supports_gmii)
2756                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2757
2758         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2759         r8152_mdio_write(tp, MII_BMCR, bmcr);
2760
2761         if (test_bit(PHY_RESET, &tp->flags)) {
2762                 int i;
2763
2764                 clear_bit(PHY_RESET, &tp->flags);
2765                 for (i = 0; i < 50; i++) {
2766                         msleep(20);
2767                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2768                                 break;
2769                 }
2770         }
2771
2772 out:
2773
2774         return ret;
2775 }
2776
2777 static void rtl8152_up(struct r8152 *tp)
2778 {
2779         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2780                 return;
2781
2782         r8152b_disable_aldps(tp);
2783         r8152b_exit_oob(tp);
2784         r8152b_enable_aldps(tp);
2785 }
2786
2787 static void rtl8152_down(struct r8152 *tp)
2788 {
2789         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2790                 rtl_drop_queued_tx(tp);
2791                 return;
2792         }
2793
2794         r8152_power_cut_en(tp, false);
2795         r8152b_disable_aldps(tp);
2796         r8152b_enter_oob(tp);
2797         r8152b_enable_aldps(tp);
2798 }
2799
2800 static void rtl8153_up(struct r8152 *tp)
2801 {
2802         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2803                 return;
2804
2805         r8153_disable_aldps(tp);
2806         r8153_first_init(tp);
2807         r8153_enable_aldps(tp);
2808 }
2809
2810 static void rtl8153_down(struct r8152 *tp)
2811 {
2812         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2813                 rtl_drop_queued_tx(tp);
2814                 return;
2815         }
2816
2817         r8153_u1u2en(tp, false);
2818         r8153_power_cut_en(tp, false);
2819         r8153_disable_aldps(tp);
2820         r8153_enter_oob(tp);
2821         r8153_enable_aldps(tp);
2822 }
2823
2824 static void set_carrier(struct r8152 *tp)
2825 {
2826         struct net_device *netdev = tp->netdev;
2827         u8 speed;
2828
2829         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2830         speed = rtl8152_get_speed(tp);
2831
2832         if (speed & LINK_STATUS) {
2833                 if (!(tp->speed & LINK_STATUS)) {
2834                         tp->rtl_ops.enable(tp);
2835                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2836                         netif_carrier_on(netdev);
2837                 }
2838         } else {
2839                 if (tp->speed & LINK_STATUS) {
2840                         netif_carrier_off(netdev);
2841                         tasklet_disable(&tp->tl);
2842                         tp->rtl_ops.disable(tp);
2843                         tasklet_enable(&tp->tl);
2844                 }
2845         }
2846         tp->speed = speed;
2847 }
2848
2849 static void rtl_work_func_t(struct work_struct *work)
2850 {
2851         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2852
2853         if (usb_autopm_get_interface(tp->intf) < 0)
2854                 return;
2855
2856         if (!test_bit(WORK_ENABLE, &tp->flags))
2857                 goto out1;
2858
2859         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2860                 goto out1;
2861
2862         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2863                 set_carrier(tp);
2864
2865         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2866                 _rtl8152_set_rx_mode(tp->netdev);
2867
2868         if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2869             (tp->speed & LINK_STATUS)) {
2870                 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2871                 tasklet_schedule(&tp->tl);
2872         }
2873
2874         if (test_bit(PHY_RESET, &tp->flags))
2875                 rtl_phy_reset(tp);
2876
2877 out1:
2878         usb_autopm_put_interface(tp->intf);
2879 }
2880
2881 static int rtl8152_open(struct net_device *netdev)
2882 {
2883         struct r8152 *tp = netdev_priv(netdev);
2884         int res = 0;
2885
2886         res = alloc_all_mem(tp);
2887         if (res)
2888                 goto out;
2889
2890         res = usb_autopm_get_interface(tp->intf);
2891         if (res < 0) {
2892                 free_all_mem(tp);
2893                 goto out;
2894         }
2895
2896         /* The WORK_ENABLE may be set when autoresume occurs */
2897         if (test_bit(WORK_ENABLE, &tp->flags)) {
2898                 clear_bit(WORK_ENABLE, &tp->flags);
2899                 usb_kill_urb(tp->intr_urb);
2900                 cancel_delayed_work_sync(&tp->schedule);
2901                 if (tp->speed & LINK_STATUS)
2902                         tp->rtl_ops.disable(tp);
2903         }
2904
2905         tp->rtl_ops.up(tp);
2906
2907         rtl8152_set_speed(tp, AUTONEG_ENABLE,
2908                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2909                           DUPLEX_FULL);
2910         tp->speed = 0;
2911         netif_carrier_off(netdev);
2912         netif_start_queue(netdev);
2913         set_bit(WORK_ENABLE, &tp->flags);
2914
2915         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2916         if (res) {
2917                 if (res == -ENODEV)
2918                         netif_device_detach(tp->netdev);
2919                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2920                            res);
2921                 free_all_mem(tp);
2922         }
2923
2924         usb_autopm_put_interface(tp->intf);
2925
2926 out:
2927         return res;
2928 }
2929
2930 static int rtl8152_close(struct net_device *netdev)
2931 {
2932         struct r8152 *tp = netdev_priv(netdev);
2933         int res = 0;
2934
2935         clear_bit(WORK_ENABLE, &tp->flags);
2936         usb_kill_urb(tp->intr_urb);
2937         cancel_delayed_work_sync(&tp->schedule);
2938         netif_stop_queue(netdev);
2939
2940         res = usb_autopm_get_interface(tp->intf);
2941         if (res < 0) {
2942                 rtl_drop_queued_tx(tp);
2943         } else {
2944                 /* The autosuspend may have been enabled and wouldn't
2945                  * be disable when autoresume occurs, because the
2946                  * netif_running() would be false.
2947                  */
2948                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2949                         rtl_runtime_suspend_enable(tp, false);
2950                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2951                 }
2952
2953                 tasklet_disable(&tp->tl);
2954                 tp->rtl_ops.down(tp);
2955                 tasklet_enable(&tp->tl);
2956                 usb_autopm_put_interface(tp->intf);
2957         }
2958
2959         free_all_mem(tp);
2960
2961         return res;
2962 }
2963
2964 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2965 {
2966         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2967         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2968         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2969 }
2970
2971 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2972 {
2973         u16 data;
2974
2975         r8152_mmd_indirect(tp, dev, reg);
2976         data = ocp_reg_read(tp, OCP_EEE_DATA);
2977         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2978
2979         return data;
2980 }
2981
2982 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2983 {
2984         r8152_mmd_indirect(tp, dev, reg);
2985         ocp_reg_write(tp, OCP_EEE_DATA, data);
2986         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2987 }
2988
2989 static void r8152_eee_en(struct r8152 *tp, bool enable)
2990 {
2991         u16 config1, config2, config3;
2992         u32 ocp_data;
2993
2994         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2995         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2996         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2997         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2998
2999         if (enable) {
3000                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3001                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3002                 config1 |= sd_rise_time(1);
3003                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3004                 config3 |= fast_snr(42);
3005         } else {
3006                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3007                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3008                              RX_QUIET_EN);
3009                 config1 |= sd_rise_time(7);
3010                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3011                 config3 |= fast_snr(511);
3012         }
3013
3014         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3015         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3016         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3017         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3018 }
3019
3020 static void r8152b_enable_eee(struct r8152 *tp)
3021 {
3022         r8152_eee_en(tp, true);
3023         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3024 }
3025
3026 static void r8153_eee_en(struct r8152 *tp, bool enable)
3027 {
3028         u32 ocp_data;
3029         u16 config;
3030
3031         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3032         config = ocp_reg_read(tp, OCP_EEE_CFG);
3033
3034         if (enable) {
3035                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3036                 config |= EEE10_EN;
3037         } else {
3038                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3039                 config &= ~EEE10_EN;
3040         }
3041
3042         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3043         ocp_reg_write(tp, OCP_EEE_CFG, config);
3044 }
3045
3046 static void r8153_enable_eee(struct r8152 *tp)
3047 {
3048         r8153_eee_en(tp, true);
3049         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3050 }
3051
3052 static void r8152b_enable_fc(struct r8152 *tp)
3053 {
3054         u16 anar;
3055
3056         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3057         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3058         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3059 }
3060
3061 static void rtl_tally_reset(struct r8152 *tp)
3062 {
3063         u32 ocp_data;
3064
3065         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3066         ocp_data |= TALLY_RESET;
3067         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3068 }
3069
3070 static void r8152b_init(struct r8152 *tp)
3071 {
3072         u32 ocp_data;
3073
3074         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3075                 return;
3076
3077         r8152b_disable_aldps(tp);
3078
3079         if (tp->version == RTL_VER_01) {
3080                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3081                 ocp_data &= ~LED_MODE_MASK;
3082                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3083         }
3084
3085         r8152_power_cut_en(tp, false);
3086
3087         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3088         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3089         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3090         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3091         ocp_data &= ~MCU_CLK_RATIO_MASK;
3092         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3093         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3094         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3095                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3096         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3097
3098         r8152b_enable_eee(tp);
3099         r8152b_enable_aldps(tp);
3100         r8152b_enable_fc(tp);
3101         rtl_tally_reset(tp);
3102
3103         /* enable rx aggregation */
3104         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3105         ocp_data &= ~RX_AGG_DISABLE;
3106         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3107 }
3108
3109 static void r8153_init(struct r8152 *tp)
3110 {
3111         u32 ocp_data;
3112         int i;
3113
3114         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3115                 return;
3116
3117         r8153_disable_aldps(tp);
3118         r8153_u1u2en(tp, false);
3119
3120         for (i = 0; i < 500; i++) {
3121                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3122                     AUTOLOAD_DONE)
3123                         break;
3124                 msleep(20);
3125         }
3126
3127         for (i = 0; i < 500; i++) {
3128                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3129                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3130                         break;
3131                 msleep(20);
3132         }
3133
3134         r8153_u2p3en(tp, false);
3135
3136         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3137         ocp_data &= ~TIMER11_EN;
3138         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3139
3140         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3141         ocp_data &= ~LED_MODE_MASK;
3142         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3143
3144         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3145         ocp_data &= ~LPM_TIMER_MASK;
3146         if (tp->udev->speed == USB_SPEED_SUPER)
3147                 ocp_data |= LPM_TIMER_500US;
3148         else
3149                 ocp_data |= LPM_TIMER_500MS;
3150         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3151
3152         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3153         ocp_data &= ~SEN_VAL_MASK;
3154         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3155         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3156
3157         r8153_power_cut_en(tp, false);
3158         r8153_u1u2en(tp, true);
3159
3160         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3161         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3162         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3163                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3164                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3165         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3166                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3167                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3168                        EEE_SPDWN_EN);
3169
3170         r8153_enable_eee(tp);
3171         r8153_enable_aldps(tp);
3172         r8152b_enable_fc(tp);
3173         rtl_tally_reset(tp);
3174 }
3175
3176 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3177 {
3178         struct r8152 *tp = usb_get_intfdata(intf);
3179
3180         if (PMSG_IS_AUTO(message))
3181                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3182         else
3183                 netif_device_detach(tp->netdev);
3184
3185         if (netif_running(tp->netdev)) {
3186                 clear_bit(WORK_ENABLE, &tp->flags);
3187                 usb_kill_urb(tp->intr_urb);
3188                 cancel_delayed_work_sync(&tp->schedule);
3189                 tasklet_disable(&tp->tl);
3190                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3191                         rtl_stop_rx(tp);
3192                         rtl_runtime_suspend_enable(tp, true);
3193                 } else {
3194                         tp->rtl_ops.down(tp);
3195                 }
3196                 tasklet_enable(&tp->tl);
3197         }
3198
3199         return 0;
3200 }
3201
3202 static int rtl8152_resume(struct usb_interface *intf)
3203 {
3204         struct r8152 *tp = usb_get_intfdata(intf);
3205
3206         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3207                 tp->rtl_ops.init(tp);
3208                 netif_device_attach(tp->netdev);
3209         }
3210
3211         if (netif_running(tp->netdev)) {
3212                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3213                         rtl_runtime_suspend_enable(tp, false);
3214                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3215                         set_bit(WORK_ENABLE, &tp->flags);
3216                         if (tp->speed & LINK_STATUS)
3217                                 rtl_start_rx(tp);
3218                 } else {
3219                         tp->rtl_ops.up(tp);
3220                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3221                                           tp->mii.supports_gmii ?
3222                                           SPEED_1000 : SPEED_100,
3223                                           DUPLEX_FULL);
3224                         tp->speed = 0;
3225                         netif_carrier_off(tp->netdev);
3226                         set_bit(WORK_ENABLE, &tp->flags);
3227                 }
3228                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3229         }
3230
3231         return 0;
3232 }
3233
3234 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3235 {
3236         struct r8152 *tp = netdev_priv(dev);
3237
3238         if (usb_autopm_get_interface(tp->intf) < 0)
3239                 return;
3240
3241         wol->supported = WAKE_ANY;
3242         wol->wolopts = __rtl_get_wol(tp);
3243
3244         usb_autopm_put_interface(tp->intf);
3245 }
3246
3247 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3248 {
3249         struct r8152 *tp = netdev_priv(dev);
3250         int ret;
3251
3252         ret = usb_autopm_get_interface(tp->intf);
3253         if (ret < 0)
3254                 goto out_set_wol;
3255
3256         __rtl_set_wol(tp, wol->wolopts);
3257         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3258
3259         usb_autopm_put_interface(tp->intf);
3260
3261 out_set_wol:
3262         return ret;
3263 }
3264
3265 static u32 rtl8152_get_msglevel(struct net_device *dev)
3266 {
3267         struct r8152 *tp = netdev_priv(dev);
3268
3269         return tp->msg_enable;
3270 }
3271
3272 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3273 {
3274         struct r8152 *tp = netdev_priv(dev);
3275
3276         tp->msg_enable = value;
3277 }
3278
3279 static void rtl8152_get_drvinfo(struct net_device *netdev,
3280                                 struct ethtool_drvinfo *info)
3281 {
3282         struct r8152 *tp = netdev_priv(netdev);
3283
3284         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3285         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3286         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3287 }
3288
3289 static
3290 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3291 {
3292         struct r8152 *tp = netdev_priv(netdev);
3293
3294         if (!tp->mii.mdio_read)
3295                 return -EOPNOTSUPP;
3296
3297         return mii_ethtool_gset(&tp->mii, cmd);
3298 }
3299
3300 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3301 {
3302         struct r8152 *tp = netdev_priv(dev);
3303         int ret;
3304
3305         ret = usb_autopm_get_interface(tp->intf);
3306         if (ret < 0)
3307                 goto out;
3308
3309         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3310
3311         usb_autopm_put_interface(tp->intf);
3312
3313 out:
3314         return ret;
3315 }
3316
3317 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3318         "tx_packets",
3319         "rx_packets",
3320         "tx_errors",
3321         "rx_errors",
3322         "rx_missed",
3323         "align_errors",
3324         "tx_single_collisions",
3325         "tx_multi_collisions",
3326         "rx_unicast",
3327         "rx_broadcast",
3328         "rx_multicast",
3329         "tx_aborted",
3330         "tx_underrun",
3331 };
3332
3333 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3334 {
3335         switch (sset) {
3336         case ETH_SS_STATS:
3337                 return ARRAY_SIZE(rtl8152_gstrings);
3338         default:
3339                 return -EOPNOTSUPP;
3340         }
3341 }
3342
3343 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3344                                       struct ethtool_stats *stats, u64 *data)
3345 {
3346         struct r8152 *tp = netdev_priv(dev);
3347         struct tally_counter tally;
3348
3349         if (usb_autopm_get_interface(tp->intf) < 0)
3350                 return;
3351
3352         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3353
3354         usb_autopm_put_interface(tp->intf);
3355
3356         data[0] = le64_to_cpu(tally.tx_packets);
3357         data[1] = le64_to_cpu(tally.rx_packets);
3358         data[2] = le64_to_cpu(tally.tx_errors);
3359         data[3] = le32_to_cpu(tally.rx_errors);
3360         data[4] = le16_to_cpu(tally.rx_missed);
3361         data[5] = le16_to_cpu(tally.align_errors);
3362         data[6] = le32_to_cpu(tally.tx_one_collision);
3363         data[7] = le32_to_cpu(tally.tx_multi_collision);
3364         data[8] = le64_to_cpu(tally.rx_unicast);
3365         data[9] = le64_to_cpu(tally.rx_broadcast);
3366         data[10] = le32_to_cpu(tally.rx_multicast);
3367         data[11] = le16_to_cpu(tally.tx_aborted);
3368         data[12] = le16_to_cpu(tally.tx_underun);
3369 }
3370
3371 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3372 {
3373         switch (stringset) {
3374         case ETH_SS_STATS:
3375                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3376                 break;
3377         }
3378 }
3379
3380 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3381 {
3382         u32 ocp_data, lp, adv, supported = 0;
3383         u16 val;
3384
3385         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3386         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3387
3388         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3389         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3390
3391         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3392         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3393
3394         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3395         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3396
3397         eee->eee_enabled = !!ocp_data;
3398         eee->eee_active = !!(supported & adv & lp);
3399         eee->supported = supported;
3400         eee->advertised = adv;
3401         eee->lp_advertised = lp;
3402
3403         return 0;
3404 }
3405
3406 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3407 {
3408         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3409
3410         r8152_eee_en(tp, eee->eee_enabled);
3411
3412         if (!eee->eee_enabled)
3413                 val = 0;
3414
3415         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3416
3417         return 0;
3418 }
3419
3420 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3421 {
3422         u32 ocp_data, lp, adv, supported = 0;
3423         u16 val;
3424
3425         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3426         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3427
3428         val = ocp_reg_read(tp, OCP_EEE_ADV);
3429         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3430
3431         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3432         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3433
3434         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3435         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3436
3437         eee->eee_enabled = !!ocp_data;
3438         eee->eee_active = !!(supported & adv & lp);
3439         eee->supported = supported;
3440         eee->advertised = adv;
3441         eee->lp_advertised = lp;
3442
3443         return 0;
3444 }
3445
3446 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3447 {
3448         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3449
3450         r8153_eee_en(tp, eee->eee_enabled);
3451
3452         if (!eee->eee_enabled)
3453                 val = 0;
3454
3455         ocp_reg_write(tp, OCP_EEE_ADV, val);
3456
3457         return 0;
3458 }
3459
3460 static int
3461 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3462 {
3463         struct r8152 *tp = netdev_priv(net);
3464         int ret;
3465
3466         ret = usb_autopm_get_interface(tp->intf);
3467         if (ret < 0)
3468                 goto out;
3469
3470         ret = tp->rtl_ops.eee_get(tp, edata);
3471
3472         usb_autopm_put_interface(tp->intf);
3473
3474 out:
3475         return ret;
3476 }
3477
3478 static int
3479 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3480 {
3481         struct r8152 *tp = netdev_priv(net);
3482         int ret;
3483
3484         ret = usb_autopm_get_interface(tp->intf);
3485         if (ret < 0)
3486                 goto out;
3487
3488         ret = tp->rtl_ops.eee_set(tp, edata);
3489         if (!ret)
3490                 ret = mii_nway_restart(&tp->mii);
3491
3492         usb_autopm_put_interface(tp->intf);
3493
3494 out:
3495         return ret;
3496 }
3497
3498 static struct ethtool_ops ops = {
3499         .get_drvinfo = rtl8152_get_drvinfo,
3500         .get_settings = rtl8152_get_settings,
3501         .set_settings = rtl8152_set_settings,
3502         .get_link = ethtool_op_get_link,
3503         .get_msglevel = rtl8152_get_msglevel,
3504         .set_msglevel = rtl8152_set_msglevel,
3505         .get_wol = rtl8152_get_wol,
3506         .set_wol = rtl8152_set_wol,
3507         .get_strings = rtl8152_get_strings,
3508         .get_sset_count = rtl8152_get_sset_count,
3509         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3510         .get_eee = rtl_ethtool_get_eee,
3511         .set_eee = rtl_ethtool_set_eee,
3512 };
3513
3514 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3515 {
3516         struct r8152 *tp = netdev_priv(netdev);
3517         struct mii_ioctl_data *data = if_mii(rq);
3518         int res;
3519
3520         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3521                 return -ENODEV;
3522
3523         res = usb_autopm_get_interface(tp->intf);
3524         if (res < 0)
3525                 goto out;
3526
3527         switch (cmd) {
3528         case SIOCGMIIPHY:
3529                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3530                 break;
3531
3532         case SIOCGMIIREG:
3533                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3534                 break;
3535
3536         case SIOCSMIIREG:
3537                 if (!capable(CAP_NET_ADMIN)) {
3538                         res = -EPERM;
3539                         break;
3540                 }
3541                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3542                 break;
3543
3544         default:
3545                 res = -EOPNOTSUPP;
3546         }
3547
3548         usb_autopm_put_interface(tp->intf);
3549
3550 out:
3551         return res;
3552 }
3553
3554 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3555 {
3556         struct r8152 *tp = netdev_priv(dev);
3557
3558         switch (tp->version) {
3559         case RTL_VER_01:
3560         case RTL_VER_02:
3561                 return eth_change_mtu(dev, new_mtu);
3562         default:
3563                 break;
3564         }
3565
3566         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3567                 return -EINVAL;
3568
3569         dev->mtu = new_mtu;
3570
3571         return 0;
3572 }
3573
3574 static const struct net_device_ops rtl8152_netdev_ops = {
3575         .ndo_open               = rtl8152_open,
3576         .ndo_stop               = rtl8152_close,
3577         .ndo_do_ioctl           = rtl8152_ioctl,
3578         .ndo_start_xmit         = rtl8152_start_xmit,
3579         .ndo_tx_timeout         = rtl8152_tx_timeout,
3580         .ndo_set_features       = rtl8152_set_features,
3581         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3582         .ndo_set_mac_address    = rtl8152_set_mac_address,
3583         .ndo_change_mtu         = rtl8152_change_mtu,
3584         .ndo_validate_addr      = eth_validate_addr,
3585 };
3586
3587 static void r8152b_get_version(struct r8152 *tp)
3588 {
3589         u32     ocp_data;
3590         u16     version;
3591
3592         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3593         version = (u16)(ocp_data & VERSION_MASK);
3594
3595         switch (version) {
3596         case 0x4c00:
3597                 tp->version = RTL_VER_01;
3598                 break;
3599         case 0x4c10:
3600                 tp->version = RTL_VER_02;
3601                 break;
3602         case 0x5c00:
3603                 tp->version = RTL_VER_03;
3604                 tp->mii.supports_gmii = 1;
3605                 break;
3606         case 0x5c10:
3607                 tp->version = RTL_VER_04;
3608                 tp->mii.supports_gmii = 1;
3609                 break;
3610         case 0x5c20:
3611                 tp->version = RTL_VER_05;
3612                 tp->mii.supports_gmii = 1;
3613                 break;
3614         default:
3615                 netif_info(tp, probe, tp->netdev,
3616                            "Unknown version 0x%04x\n", version);
3617                 break;
3618         }
3619 }
3620
3621 static void rtl8152_unload(struct r8152 *tp)
3622 {
3623         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3624                 return;
3625
3626         if (tp->version != RTL_VER_01)
3627                 r8152_power_cut_en(tp, true);
3628 }
3629
3630 static void rtl8153_unload(struct r8152 *tp)
3631 {
3632         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3633                 return;
3634
3635         r8153_power_cut_en(tp, false);
3636 }
3637
3638 static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
3639 {
3640         struct rtl_ops *ops = &tp->rtl_ops;
3641         int ret = -ENODEV;
3642
3643         switch (id->idVendor) {
3644         case VENDOR_ID_REALTEK:
3645                 switch (id->idProduct) {
3646                 case PRODUCT_ID_RTL8152:
3647                         ops->init               = r8152b_init;
3648                         ops->enable             = rtl8152_enable;
3649                         ops->disable            = rtl8152_disable;
3650                         ops->up                 = rtl8152_up;
3651                         ops->down               = rtl8152_down;
3652                         ops->unload             = rtl8152_unload;
3653                         ops->eee_get            = r8152_get_eee;
3654                         ops->eee_set            = r8152_set_eee;
3655                         ret = 0;
3656                         break;
3657                 case PRODUCT_ID_RTL8153:
3658                         ops->init               = r8153_init;
3659                         ops->enable             = rtl8153_enable;
3660                         ops->disable            = rtl8153_disable;
3661                         ops->up                 = rtl8153_up;
3662                         ops->down               = rtl8153_down;
3663                         ops->unload             = rtl8153_unload;
3664                         ops->eee_get            = r8153_get_eee;
3665                         ops->eee_set            = r8153_set_eee;
3666                         ret = 0;
3667                         break;
3668                 default:
3669                         break;
3670                 }
3671                 break;
3672
3673         case VENDOR_ID_SAMSUNG:
3674                 switch (id->idProduct) {
3675                 case PRODUCT_ID_SAMSUNG:
3676                         ops->init               = r8153_init;
3677                         ops->enable             = rtl8153_enable;
3678                         ops->disable            = rtl8153_disable;
3679                         ops->up                 = rtl8153_up;
3680                         ops->down               = rtl8153_down;
3681                         ops->unload             = rtl8153_unload;
3682                         ops->eee_get            = r8153_get_eee;
3683                         ops->eee_set            = r8153_set_eee;
3684                         ret = 0;
3685                         break;
3686                 default:
3687                         break;
3688                 }
3689                 break;
3690
3691         default:
3692                 break;
3693         }
3694
3695         if (ret)
3696                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3697
3698         return ret;
3699 }
3700
3701 static int rtl8152_probe(struct usb_interface *intf,
3702                          const struct usb_device_id *id)
3703 {
3704         struct usb_device *udev = interface_to_usbdev(intf);
3705         struct r8152 *tp;
3706         struct net_device *netdev;
3707         int ret;
3708
3709         if (udev->actconfig->desc.bConfigurationValue != 1) {
3710                 usb_driver_set_configuration(udev, 1);
3711                 return -ENODEV;
3712         }
3713
3714         usb_reset_device(udev);
3715         netdev = alloc_etherdev(sizeof(struct r8152));
3716         if (!netdev) {
3717                 dev_err(&intf->dev, "Out of memory\n");
3718                 return -ENOMEM;
3719         }
3720
3721         SET_NETDEV_DEV(netdev, &intf->dev);
3722         tp = netdev_priv(netdev);
3723         tp->msg_enable = 0x7FFF;
3724
3725         tp->udev = udev;
3726         tp->netdev = netdev;
3727         tp->intf = intf;
3728
3729         ret = rtl_ops_init(tp, id);
3730         if (ret)
3731                 goto out;
3732
3733         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3734         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3735
3736         netdev->netdev_ops = &rtl8152_netdev_ops;
3737         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3738
3739         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3740                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3741                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3742                             NETIF_F_HW_VLAN_CTAG_TX;
3743         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3744                               NETIF_F_TSO | NETIF_F_FRAGLIST |
3745                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3746                               NETIF_F_HW_VLAN_CTAG_RX |
3747                               NETIF_F_HW_VLAN_CTAG_TX;
3748         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3749                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3750                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3751
3752         netdev->ethtool_ops = &ops;
3753         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3754
3755         tp->mii.dev = netdev;
3756         tp->mii.mdio_read = read_mii_word;
3757         tp->mii.mdio_write = write_mii_word;
3758         tp->mii.phy_id_mask = 0x3f;
3759         tp->mii.reg_num_mask = 0x1f;
3760         tp->mii.phy_id = R8152_PHY_ID;
3761         tp->mii.supports_gmii = 0;
3762
3763         intf->needs_remote_wakeup = 1;
3764
3765         r8152b_get_version(tp);
3766         tp->rtl_ops.init(tp);
3767         set_ethernet_addr(tp);
3768
3769         usb_set_intfdata(intf, tp);
3770
3771         ret = register_netdev(netdev);
3772         if (ret != 0) {
3773                 netif_err(tp, probe, netdev, "couldn't register the device\n");
3774                 goto out1;
3775         }
3776
3777         tp->saved_wolopts = __rtl_get_wol(tp);
3778         if (tp->saved_wolopts)
3779                 device_set_wakeup_enable(&udev->dev, true);
3780         else
3781                 device_set_wakeup_enable(&udev->dev, false);
3782
3783         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3784
3785         return 0;
3786
3787 out1:
3788         usb_set_intfdata(intf, NULL);
3789 out:
3790         free_netdev(netdev);
3791         return ret;
3792 }
3793
3794 static void rtl8152_disconnect(struct usb_interface *intf)
3795 {
3796         struct r8152 *tp = usb_get_intfdata(intf);
3797
3798         usb_set_intfdata(intf, NULL);
3799         if (tp) {
3800                 struct usb_device *udev = tp->udev;
3801
3802                 if (udev->state == USB_STATE_NOTATTACHED)
3803                         set_bit(RTL8152_UNPLUG, &tp->flags);
3804
3805                 tasklet_kill(&tp->tl);
3806                 unregister_netdev(tp->netdev);
3807                 tp->rtl_ops.unload(tp);
3808                 free_netdev(tp->netdev);
3809         }
3810 }
3811
3812 /* table of devices that work with this driver */
3813 static struct usb_device_id rtl8152_table[] = {
3814         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3815         {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3816         {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
3817         {}
3818 };
3819
3820 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3821
3822 static struct usb_driver rtl8152_driver = {
3823         .name =         MODULENAME,
3824         .id_table =     rtl8152_table,
3825         .probe =        rtl8152_probe,
3826         .disconnect =   rtl8152_disconnect,
3827         .suspend =      rtl8152_suspend,
3828         .resume =       rtl8152_resume,
3829         .reset_resume = rtl8152_resume,
3830         .supports_autosuspend = 1,
3831         .disable_hub_initiated_lpm = 1,
3832 };
3833
3834 module_usb_driver(rtl8152_driver);
3835
3836 MODULE_AUTHOR(DRIVER_AUTHOR);
3837 MODULE_DESCRIPTION(DRIVER_DESC);
3838 MODULE_LICENSE("GPL");