2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "9"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
504 #define rx_reserved_size(x) ((x) + VLAN_ETH_HLEN + CRC_SIZE + \
505 sizeof(struct rx_desc) + RX_ALIGN)
518 /* Define these values to match your device */
519 #define VENDOR_ID_REALTEK 0x0bda
520 #define VENDOR_ID_MICROSOFT 0x045e
521 #define VENDOR_ID_SAMSUNG 0x04e8
522 #define VENDOR_ID_LENOVO 0x17ef
523 #define VENDOR_ID_NVIDIA 0x0955
525 #define MCU_TYPE_PLA 0x0100
526 #define MCU_TYPE_USB 0x0000
528 struct tally_counter {
535 __le32 tx_one_collision;
536 __le32 tx_multi_collision;
546 #define RX_LEN_MASK 0x7fff
549 #define RD_UDP_CS BIT(23)
550 #define RD_TCP_CS BIT(22)
551 #define RD_IPV6_CS BIT(20)
552 #define RD_IPV4_CS BIT(19)
555 #define IPF BIT(23) /* IP checksum fail */
556 #define UDPF BIT(22) /* UDP checksum fail */
557 #define TCPF BIT(21) /* TCP checksum fail */
558 #define RX_VLAN_TAG BIT(16)
567 #define TX_FS BIT(31) /* First segment of a packet */
568 #define TX_LS BIT(30) /* Final segment of a packet */
569 #define GTSENDV4 BIT(28)
570 #define GTSENDV6 BIT(27)
571 #define GTTCPHO_SHIFT 18
572 #define GTTCPHO_MAX 0x7fU
573 #define TX_LEN_MAX 0x3ffffU
576 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
577 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
578 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
579 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
581 #define MSS_MAX 0x7ffU
582 #define TCPHO_SHIFT 17
583 #define TCPHO_MAX 0x7ffU
584 #define TX_VLAN_TAG BIT(16)
590 struct list_head list;
592 struct r8152 *context;
598 struct list_head list;
600 struct r8152 *context;
609 struct usb_device *udev;
610 struct napi_struct napi;
611 struct usb_interface *intf;
612 struct net_device *netdev;
613 struct urb *intr_urb;
614 struct tx_agg tx_info[RTL8152_MAX_TX];
615 struct rx_agg rx_info[RTL8152_MAX_RX];
616 struct list_head rx_done, tx_free;
617 struct sk_buff_head tx_queue, rx_queue;
618 spinlock_t rx_lock, tx_lock;
619 struct delayed_work schedule, hw_phy_work;
620 struct mii_if_info mii;
621 struct mutex control; /* use for hw setting */
622 #ifdef CONFIG_PM_SLEEP
623 struct notifier_block pm_notifier;
627 void (*init)(struct r8152 *);
628 int (*enable)(struct r8152 *);
629 void (*disable)(struct r8152 *);
630 void (*up)(struct r8152 *);
631 void (*down)(struct r8152 *);
632 void (*unload)(struct r8152 *);
633 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
634 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
635 bool (*in_nway)(struct r8152 *);
636 void (*hw_phy_cfg)(struct r8152 *);
637 void (*autosuspend_en)(struct r8152 *tp, bool enable);
670 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
671 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
673 static const int multicast_filter_limit = 32;
674 static unsigned int agg_buf_sz = 16384;
676 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
677 VLAN_ETH_HLEN - VLAN_HLEN)
680 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
685 tmp = kmalloc(size, GFP_KERNEL);
689 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
690 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
691 value, index, tmp, size, 500);
693 memcpy(data, tmp, size);
700 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
705 tmp = kmemdup(data, size, GFP_KERNEL);
709 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
710 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
711 value, index, tmp, size, 500);
718 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
719 void *data, u16 type)
724 if (test_bit(RTL8152_UNPLUG, &tp->flags))
727 /* both size and indix must be 4 bytes align */
728 if ((size & 3) || !size || (index & 3) || !data)
731 if ((u32)index + (u32)size > 0xffff)
736 ret = get_registers(tp, index, type, limit, data);
744 ret = get_registers(tp, index, type, size, data);
756 set_bit(RTL8152_UNPLUG, &tp->flags);
761 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
762 u16 size, void *data, u16 type)
765 u16 byteen_start, byteen_end, byen;
768 if (test_bit(RTL8152_UNPLUG, &tp->flags))
771 /* both size and indix must be 4 bytes align */
772 if ((size & 3) || !size || (index & 3) || !data)
775 if ((u32)index + (u32)size > 0xffff)
778 byteen_start = byteen & BYTE_EN_START_MASK;
779 byteen_end = byteen & BYTE_EN_END_MASK;
781 byen = byteen_start | (byteen_start << 4);
782 ret = set_registers(tp, index, type | byen, 4, data);
795 ret = set_registers(tp, index,
796 type | BYTE_EN_DWORD,
805 ret = set_registers(tp, index,
806 type | BYTE_EN_DWORD,
818 byen = byteen_end | (byteen_end >> 4);
819 ret = set_registers(tp, index, type | byen, 4, data);
826 set_bit(RTL8152_UNPLUG, &tp->flags);
832 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
834 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
838 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
840 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
844 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
846 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
850 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
852 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
855 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
859 generic_ocp_read(tp, index, sizeof(data), &data, type);
861 return __le32_to_cpu(data);
864 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
866 __le32 tmp = __cpu_to_le32(data);
868 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
871 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
875 u8 shift = index & 2;
879 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
881 data = __le32_to_cpu(tmp);
882 data >>= (shift * 8);
888 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
892 u16 byen = BYTE_EN_WORD;
893 u8 shift = index & 2;
899 mask <<= (shift * 8);
900 data <<= (shift * 8);
904 tmp = __cpu_to_le32(data);
906 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
909 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
913 u8 shift = index & 3;
917 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
919 data = __le32_to_cpu(tmp);
920 data >>= (shift * 8);
926 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
930 u16 byen = BYTE_EN_BYTE;
931 u8 shift = index & 3;
937 mask <<= (shift * 8);
938 data <<= (shift * 8);
942 tmp = __cpu_to_le32(data);
944 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
947 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
949 u16 ocp_base, ocp_index;
951 ocp_base = addr & 0xf000;
952 if (ocp_base != tp->ocp_base) {
953 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
954 tp->ocp_base = ocp_base;
957 ocp_index = (addr & 0x0fff) | 0xb000;
958 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
961 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
963 u16 ocp_base, ocp_index;
965 ocp_base = addr & 0xf000;
966 if (ocp_base != tp->ocp_base) {
967 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
968 tp->ocp_base = ocp_base;
971 ocp_index = (addr & 0x0fff) | 0xb000;
972 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
975 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
977 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
980 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
982 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
985 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
987 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
988 ocp_reg_write(tp, OCP_SRAM_DATA, data);
991 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
993 struct r8152 *tp = netdev_priv(netdev);
996 if (test_bit(RTL8152_UNPLUG, &tp->flags))
999 if (phy_id != R8152_PHY_ID)
1002 ret = r8152_mdio_read(tp, reg);
1008 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1010 struct r8152 *tp = netdev_priv(netdev);
1012 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1015 if (phy_id != R8152_PHY_ID)
1018 r8152_mdio_write(tp, reg, val);
1022 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1024 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1026 struct r8152 *tp = netdev_priv(netdev);
1027 struct sockaddr *addr = p;
1028 int ret = -EADDRNOTAVAIL;
1030 if (!is_valid_ether_addr(addr->sa_data))
1033 ret = usb_autopm_get_interface(tp->intf);
1037 mutex_lock(&tp->control);
1039 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1041 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1042 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1043 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1045 mutex_unlock(&tp->control);
1047 usb_autopm_put_interface(tp->intf);
1052 /* Devices containing RTL8153-AD can support a persistent
1053 * host system provided MAC address.
1054 * Examples of this are Dell TB15 and Dell WD15 docks
1056 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1059 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1060 union acpi_object *obj;
1063 unsigned char buf[6];
1065 /* test for -AD variant of RTL8153 */
1066 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1067 if ((ocp_data & AD_MASK) != 0x1000)
1070 /* test for MAC address pass-through bit */
1071 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1072 if ((ocp_data & PASS_THRU_MASK) != 1)
1075 /* returns _AUXMAC_#AABBCCDDEEFF# */
1076 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1077 obj = (union acpi_object *)buffer.pointer;
1078 if (!ACPI_SUCCESS(status))
1080 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1081 netif_warn(tp, probe, tp->netdev,
1082 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1083 obj->type, obj->string.length);
1086 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1087 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1088 netif_warn(tp, probe, tp->netdev,
1089 "Invalid header when reading pass-thru MAC addr\n");
1092 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1093 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1094 netif_warn(tp, probe, tp->netdev,
1095 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1100 memcpy(sa->sa_data, buf, 6);
1101 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1102 netif_info(tp, probe, tp->netdev,
1103 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1110 static int set_ethernet_addr(struct r8152 *tp)
1112 struct net_device *dev = tp->netdev;
1116 if (tp->version == RTL_VER_01) {
1117 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1119 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1120 * or system doesn't provide valid _SB.AMAC this will be
1121 * be expected to non-zero
1123 ret = vendor_mac_passthru_addr_read(tp, &sa);
1125 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1129 netif_err(tp, probe, dev, "Get ether addr fail\n");
1130 } else if (!is_valid_ether_addr(sa.sa_data)) {
1131 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1133 eth_hw_addr_random(dev);
1134 ether_addr_copy(sa.sa_data, dev->dev_addr);
1135 ret = rtl8152_set_mac_address(dev, &sa);
1136 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1139 if (tp->version == RTL_VER_01)
1140 ether_addr_copy(dev->dev_addr, sa.sa_data);
1142 ret = rtl8152_set_mac_address(dev, &sa);
1148 static void read_bulk_callback(struct urb *urb)
1150 struct net_device *netdev;
1151 int status = urb->status;
1163 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1166 if (!test_bit(WORK_ENABLE, &tp->flags))
1169 netdev = tp->netdev;
1171 /* When link down, the driver would cancel all bulks. */
1172 /* This avoid the re-submitting bulk */
1173 if (!netif_carrier_ok(netdev))
1176 usb_mark_last_busy(tp->udev);
1180 if (urb->actual_length < ETH_ZLEN)
1183 spin_lock(&tp->rx_lock);
1184 list_add_tail(&agg->list, &tp->rx_done);
1185 spin_unlock(&tp->rx_lock);
1186 napi_schedule(&tp->napi);
1189 set_bit(RTL8152_UNPLUG, &tp->flags);
1190 netif_device_detach(tp->netdev);
1193 return; /* the urb is in unlink state */
1195 if (net_ratelimit())
1196 netdev_warn(netdev, "maybe reset is needed?\n");
1199 if (net_ratelimit())
1200 netdev_warn(netdev, "Rx status %d\n", status);
1204 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1207 static void write_bulk_callback(struct urb *urb)
1209 struct net_device_stats *stats;
1210 struct net_device *netdev;
1213 int status = urb->status;
1223 netdev = tp->netdev;
1224 stats = &netdev->stats;
1226 if (net_ratelimit())
1227 netdev_warn(netdev, "Tx status %d\n", status);
1228 stats->tx_errors += agg->skb_num;
1230 stats->tx_packets += agg->skb_num;
1231 stats->tx_bytes += agg->skb_len;
1234 spin_lock(&tp->tx_lock);
1235 list_add_tail(&agg->list, &tp->tx_free);
1236 spin_unlock(&tp->tx_lock);
1238 usb_autopm_put_interface_async(tp->intf);
1240 if (!netif_carrier_ok(netdev))
1243 if (!test_bit(WORK_ENABLE, &tp->flags))
1246 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1249 if (!skb_queue_empty(&tp->tx_queue))
1250 napi_schedule(&tp->napi);
1253 static void intr_callback(struct urb *urb)
1257 int status = urb->status;
1264 if (!test_bit(WORK_ENABLE, &tp->flags))
1267 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1271 case 0: /* success */
1273 case -ECONNRESET: /* unlink */
1275 netif_device_detach(tp->netdev);
1278 netif_info(tp, intr, tp->netdev,
1279 "Stop submitting intr, status %d\n", status);
1282 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1284 /* -EPIPE: should clear the halt */
1286 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1290 d = urb->transfer_buffer;
1291 if (INTR_LINK & __le16_to_cpu(d[0])) {
1292 if (!netif_carrier_ok(tp->netdev)) {
1293 set_bit(RTL8152_LINK_CHG, &tp->flags);
1294 schedule_delayed_work(&tp->schedule, 0);
1297 if (netif_carrier_ok(tp->netdev)) {
1298 netif_stop_queue(tp->netdev);
1299 set_bit(RTL8152_LINK_CHG, &tp->flags);
1300 schedule_delayed_work(&tp->schedule, 0);
1305 res = usb_submit_urb(urb, GFP_ATOMIC);
1306 if (res == -ENODEV) {
1307 set_bit(RTL8152_UNPLUG, &tp->flags);
1308 netif_device_detach(tp->netdev);
1310 netif_err(tp, intr, tp->netdev,
1311 "can't resubmit intr, status %d\n", res);
1315 static inline void *rx_agg_align(void *data)
1317 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1320 static inline void *tx_agg_align(void *data)
1322 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1325 static void free_all_mem(struct r8152 *tp)
1329 for (i = 0; i < RTL8152_MAX_RX; i++) {
1330 usb_free_urb(tp->rx_info[i].urb);
1331 tp->rx_info[i].urb = NULL;
1333 kfree(tp->rx_info[i].buffer);
1334 tp->rx_info[i].buffer = NULL;
1335 tp->rx_info[i].head = NULL;
1338 for (i = 0; i < RTL8152_MAX_TX; i++) {
1339 usb_free_urb(tp->tx_info[i].urb);
1340 tp->tx_info[i].urb = NULL;
1342 kfree(tp->tx_info[i].buffer);
1343 tp->tx_info[i].buffer = NULL;
1344 tp->tx_info[i].head = NULL;
1347 usb_free_urb(tp->intr_urb);
1348 tp->intr_urb = NULL;
1350 kfree(tp->intr_buff);
1351 tp->intr_buff = NULL;
1354 static int alloc_all_mem(struct r8152 *tp)
1356 struct net_device *netdev = tp->netdev;
1357 struct usb_interface *intf = tp->intf;
1358 struct usb_host_interface *alt = intf->cur_altsetting;
1359 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1364 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1366 spin_lock_init(&tp->rx_lock);
1367 spin_lock_init(&tp->tx_lock);
1368 INIT_LIST_HEAD(&tp->tx_free);
1369 INIT_LIST_HEAD(&tp->rx_done);
1370 skb_queue_head_init(&tp->tx_queue);
1371 skb_queue_head_init(&tp->rx_queue);
1373 for (i = 0; i < RTL8152_MAX_RX; i++) {
1374 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1378 if (buf != rx_agg_align(buf)) {
1380 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1386 urb = usb_alloc_urb(0, GFP_KERNEL);
1392 INIT_LIST_HEAD(&tp->rx_info[i].list);
1393 tp->rx_info[i].context = tp;
1394 tp->rx_info[i].urb = urb;
1395 tp->rx_info[i].buffer = buf;
1396 tp->rx_info[i].head = rx_agg_align(buf);
1399 for (i = 0; i < RTL8152_MAX_TX; i++) {
1400 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1404 if (buf != tx_agg_align(buf)) {
1406 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1412 urb = usb_alloc_urb(0, GFP_KERNEL);
1418 INIT_LIST_HEAD(&tp->tx_info[i].list);
1419 tp->tx_info[i].context = tp;
1420 tp->tx_info[i].urb = urb;
1421 tp->tx_info[i].buffer = buf;
1422 tp->tx_info[i].head = tx_agg_align(buf);
1424 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1427 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1431 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1435 tp->intr_interval = (int)ep_intr->desc.bInterval;
1436 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1437 tp->intr_buff, INTBUFSIZE, intr_callback,
1438 tp, tp->intr_interval);
1447 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1449 struct tx_agg *agg = NULL;
1450 unsigned long flags;
1452 if (list_empty(&tp->tx_free))
1455 spin_lock_irqsave(&tp->tx_lock, flags);
1456 if (!list_empty(&tp->tx_free)) {
1457 struct list_head *cursor;
1459 cursor = tp->tx_free.next;
1460 list_del_init(cursor);
1461 agg = list_entry(cursor, struct tx_agg, list);
1463 spin_unlock_irqrestore(&tp->tx_lock, flags);
1468 /* r8152_csum_workaround()
1469 * The hw limites the value the transport offset. When the offset is out of the
1470 * range, calculate the checksum by sw.
1472 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1473 struct sk_buff_head *list)
1475 if (skb_shinfo(skb)->gso_size) {
1476 netdev_features_t features = tp->netdev->features;
1477 struct sk_buff_head seg_list;
1478 struct sk_buff *segs, *nskb;
1480 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1481 segs = skb_gso_segment(skb, features);
1482 if (IS_ERR(segs) || !segs)
1485 __skb_queue_head_init(&seg_list);
1491 __skb_queue_tail(&seg_list, nskb);
1494 skb_queue_splice(&seg_list, list);
1496 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1497 if (skb_checksum_help(skb) < 0)
1500 __skb_queue_head(list, skb);
1502 struct net_device_stats *stats;
1505 stats = &tp->netdev->stats;
1506 stats->tx_dropped++;
1511 /* msdn_giant_send_check()
1512 * According to the document of microsoft, the TCP Pseudo Header excludes the
1513 * packet length for IPv6 TCP large packets.
1515 static int msdn_giant_send_check(struct sk_buff *skb)
1517 const struct ipv6hdr *ipv6h;
1521 ret = skb_cow_head(skb, 0);
1525 ipv6h = ipv6_hdr(skb);
1529 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1534 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1536 if (skb_vlan_tag_present(skb)) {
1539 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1540 desc->opts2 |= cpu_to_le32(opts2);
1544 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1546 u32 opts2 = le32_to_cpu(desc->opts2);
1548 if (opts2 & RX_VLAN_TAG)
1549 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1550 swab16(opts2 & 0xffff));
1553 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1554 struct sk_buff *skb, u32 len, u32 transport_offset)
1556 u32 mss = skb_shinfo(skb)->gso_size;
1557 u32 opts1, opts2 = 0;
1558 int ret = TX_CSUM_SUCCESS;
1560 WARN_ON_ONCE(len > TX_LEN_MAX);
1562 opts1 = len | TX_FS | TX_LS;
1565 if (transport_offset > GTTCPHO_MAX) {
1566 netif_warn(tp, tx_err, tp->netdev,
1567 "Invalid transport offset 0x%x for TSO\n",
1573 switch (vlan_get_protocol(skb)) {
1574 case htons(ETH_P_IP):
1578 case htons(ETH_P_IPV6):
1579 if (msdn_giant_send_check(skb)) {
1591 opts1 |= transport_offset << GTTCPHO_SHIFT;
1592 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1593 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1596 if (transport_offset > TCPHO_MAX) {
1597 netif_warn(tp, tx_err, tp->netdev,
1598 "Invalid transport offset 0x%x\n",
1604 switch (vlan_get_protocol(skb)) {
1605 case htons(ETH_P_IP):
1607 ip_protocol = ip_hdr(skb)->protocol;
1610 case htons(ETH_P_IPV6):
1612 ip_protocol = ipv6_hdr(skb)->nexthdr;
1616 ip_protocol = IPPROTO_RAW;
1620 if (ip_protocol == IPPROTO_TCP)
1622 else if (ip_protocol == IPPROTO_UDP)
1627 opts2 |= transport_offset << TCPHO_SHIFT;
1630 desc->opts2 = cpu_to_le32(opts2);
1631 desc->opts1 = cpu_to_le32(opts1);
1637 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1639 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1643 __skb_queue_head_init(&skb_head);
1644 spin_lock(&tx_queue->lock);
1645 skb_queue_splice_init(tx_queue, &skb_head);
1646 spin_unlock(&tx_queue->lock);
1648 tx_data = agg->head;
1651 remain = agg_buf_sz;
1653 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1654 struct tx_desc *tx_desc;
1655 struct sk_buff *skb;
1659 skb = __skb_dequeue(&skb_head);
1663 len = skb->len + sizeof(*tx_desc);
1666 __skb_queue_head(&skb_head, skb);
1670 tx_data = tx_agg_align(tx_data);
1671 tx_desc = (struct tx_desc *)tx_data;
1673 offset = (u32)skb_transport_offset(skb);
1675 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1676 r8152_csum_workaround(tp, skb, &skb_head);
1680 rtl_tx_vlan_tag(tx_desc, skb);
1682 tx_data += sizeof(*tx_desc);
1685 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1686 struct net_device_stats *stats = &tp->netdev->stats;
1688 stats->tx_dropped++;
1689 dev_kfree_skb_any(skb);
1690 tx_data -= sizeof(*tx_desc);
1695 agg->skb_len += len;
1698 dev_kfree_skb_any(skb);
1700 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1703 if (!skb_queue_empty(&skb_head)) {
1704 spin_lock(&tx_queue->lock);
1705 skb_queue_splice(&skb_head, tx_queue);
1706 spin_unlock(&tx_queue->lock);
1709 netif_tx_lock(tp->netdev);
1711 if (netif_queue_stopped(tp->netdev) &&
1712 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1713 netif_wake_queue(tp->netdev);
1715 netif_tx_unlock(tp->netdev);
1717 ret = usb_autopm_get_interface_async(tp->intf);
1721 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1722 agg->head, (int)(tx_data - (u8 *)agg->head),
1723 (usb_complete_t)write_bulk_callback, agg);
1725 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1727 usb_autopm_put_interface_async(tp->intf);
1733 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1735 u8 checksum = CHECKSUM_NONE;
1738 if (!(tp->netdev->features & NETIF_F_RXCSUM))
1741 opts2 = le32_to_cpu(rx_desc->opts2);
1742 opts3 = le32_to_cpu(rx_desc->opts3);
1744 if (opts2 & RD_IPV4_CS) {
1746 checksum = CHECKSUM_NONE;
1747 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1748 checksum = CHECKSUM_NONE;
1749 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1750 checksum = CHECKSUM_NONE;
1752 checksum = CHECKSUM_UNNECESSARY;
1753 } else if (opts2 & RD_IPV6_CS) {
1754 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1755 checksum = CHECKSUM_UNNECESSARY;
1756 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1757 checksum = CHECKSUM_UNNECESSARY;
1764 static int rx_bottom(struct r8152 *tp, int budget)
1766 unsigned long flags;
1767 struct list_head *cursor, *next, rx_queue;
1768 int ret = 0, work_done = 0;
1770 if (!skb_queue_empty(&tp->rx_queue)) {
1771 while (work_done < budget) {
1772 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1773 struct net_device *netdev = tp->netdev;
1774 struct net_device_stats *stats = &netdev->stats;
1775 unsigned int pkt_len;
1781 napi_gro_receive(&tp->napi, skb);
1783 stats->rx_packets++;
1784 stats->rx_bytes += pkt_len;
1788 if (list_empty(&tp->rx_done))
1791 INIT_LIST_HEAD(&rx_queue);
1792 spin_lock_irqsave(&tp->rx_lock, flags);
1793 list_splice_init(&tp->rx_done, &rx_queue);
1794 spin_unlock_irqrestore(&tp->rx_lock, flags);
1796 list_for_each_safe(cursor, next, &rx_queue) {
1797 struct rx_desc *rx_desc;
1803 list_del_init(cursor);
1805 agg = list_entry(cursor, struct rx_agg, list);
1807 if (urb->actual_length < ETH_ZLEN)
1810 rx_desc = agg->head;
1811 rx_data = agg->head;
1812 len_used += sizeof(struct rx_desc);
1814 while (urb->actual_length > len_used) {
1815 struct net_device *netdev = tp->netdev;
1816 struct net_device_stats *stats = &netdev->stats;
1817 unsigned int pkt_len;
1818 struct sk_buff *skb;
1820 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1821 if (pkt_len < ETH_ZLEN)
1824 len_used += pkt_len;
1825 if (urb->actual_length < len_used)
1828 pkt_len -= CRC_SIZE;
1829 rx_data += sizeof(struct rx_desc);
1831 skb = napi_alloc_skb(&tp->napi, pkt_len);
1833 stats->rx_dropped++;
1837 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1838 memcpy(skb->data, rx_data, pkt_len);
1839 skb_put(skb, pkt_len);
1840 skb->protocol = eth_type_trans(skb, netdev);
1841 rtl_rx_vlan_tag(rx_desc, skb);
1842 if (work_done < budget) {
1843 napi_gro_receive(&tp->napi, skb);
1845 stats->rx_packets++;
1846 stats->rx_bytes += pkt_len;
1848 __skb_queue_tail(&tp->rx_queue, skb);
1852 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1853 rx_desc = (struct rx_desc *)rx_data;
1854 len_used = (int)(rx_data - (u8 *)agg->head);
1855 len_used += sizeof(struct rx_desc);
1860 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1862 urb->actual_length = 0;
1863 list_add_tail(&agg->list, next);
1867 if (!list_empty(&rx_queue)) {
1868 spin_lock_irqsave(&tp->rx_lock, flags);
1869 list_splice_tail(&rx_queue, &tp->rx_done);
1870 spin_unlock_irqrestore(&tp->rx_lock, flags);
1877 static void tx_bottom(struct r8152 *tp)
1884 if (skb_queue_empty(&tp->tx_queue))
1887 agg = r8152_get_tx_agg(tp);
1891 res = r8152_tx_agg_fill(tp, agg);
1893 struct net_device *netdev = tp->netdev;
1895 if (res == -ENODEV) {
1896 set_bit(RTL8152_UNPLUG, &tp->flags);
1897 netif_device_detach(netdev);
1899 struct net_device_stats *stats = &netdev->stats;
1900 unsigned long flags;
1902 netif_warn(tp, tx_err, netdev,
1903 "failed tx_urb %d\n", res);
1904 stats->tx_dropped += agg->skb_num;
1906 spin_lock_irqsave(&tp->tx_lock, flags);
1907 list_add_tail(&agg->list, &tp->tx_free);
1908 spin_unlock_irqrestore(&tp->tx_lock, flags);
1914 static void bottom_half(struct r8152 *tp)
1916 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1919 if (!test_bit(WORK_ENABLE, &tp->flags))
1922 /* When link down, the driver would cancel all bulks. */
1923 /* This avoid the re-submitting bulk */
1924 if (!netif_carrier_ok(tp->netdev))
1927 clear_bit(SCHEDULE_NAPI, &tp->flags);
1932 static int r8152_poll(struct napi_struct *napi, int budget)
1934 struct r8152 *tp = container_of(napi, struct r8152, napi);
1937 work_done = rx_bottom(tp, budget);
1940 if (work_done < budget) {
1941 napi_complete(napi);
1942 if (!list_empty(&tp->rx_done))
1943 napi_schedule(napi);
1944 else if (!skb_queue_empty(&tp->tx_queue) &&
1945 !list_empty(&tp->tx_free))
1946 napi_schedule(napi);
1953 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1957 /* The rx would be stopped, so skip submitting */
1958 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1959 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1962 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1963 agg->head, agg_buf_sz,
1964 (usb_complete_t)read_bulk_callback, agg);
1966 ret = usb_submit_urb(agg->urb, mem_flags);
1967 if (ret == -ENODEV) {
1968 set_bit(RTL8152_UNPLUG, &tp->flags);
1969 netif_device_detach(tp->netdev);
1971 struct urb *urb = agg->urb;
1972 unsigned long flags;
1974 urb->actual_length = 0;
1975 spin_lock_irqsave(&tp->rx_lock, flags);
1976 list_add_tail(&agg->list, &tp->rx_done);
1977 spin_unlock_irqrestore(&tp->rx_lock, flags);
1979 netif_err(tp, rx_err, tp->netdev,
1980 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1982 napi_schedule(&tp->napi);
1988 static void rtl_drop_queued_tx(struct r8152 *tp)
1990 struct net_device_stats *stats = &tp->netdev->stats;
1991 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1992 struct sk_buff *skb;
1994 if (skb_queue_empty(tx_queue))
1997 __skb_queue_head_init(&skb_head);
1998 spin_lock_bh(&tx_queue->lock);
1999 skb_queue_splice_init(tx_queue, &skb_head);
2000 spin_unlock_bh(&tx_queue->lock);
2002 while ((skb = __skb_dequeue(&skb_head))) {
2004 stats->tx_dropped++;
2008 static void rtl8152_tx_timeout(struct net_device *netdev)
2010 struct r8152 *tp = netdev_priv(netdev);
2012 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2014 usb_queue_reset_device(tp->intf);
2017 static void rtl8152_set_rx_mode(struct net_device *netdev)
2019 struct r8152 *tp = netdev_priv(netdev);
2021 if (netif_carrier_ok(netdev)) {
2022 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2023 schedule_delayed_work(&tp->schedule, 0);
2027 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2029 struct r8152 *tp = netdev_priv(netdev);
2030 u32 mc_filter[2]; /* Multicast hash filter */
2034 netif_stop_queue(netdev);
2035 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2036 ocp_data &= ~RCR_ACPT_ALL;
2037 ocp_data |= RCR_AB | RCR_APM;
2039 if (netdev->flags & IFF_PROMISC) {
2040 /* Unconditionally log net taps. */
2041 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2042 ocp_data |= RCR_AM | RCR_AAP;
2043 mc_filter[1] = 0xffffffff;
2044 mc_filter[0] = 0xffffffff;
2045 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2046 (netdev->flags & IFF_ALLMULTI)) {
2047 /* Too many to filter perfectly -- accept all multicasts. */
2049 mc_filter[1] = 0xffffffff;
2050 mc_filter[0] = 0xffffffff;
2052 struct netdev_hw_addr *ha;
2056 netdev_for_each_mc_addr(ha, netdev) {
2057 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2059 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2064 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2065 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2067 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2068 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2069 netif_wake_queue(netdev);
2072 static netdev_features_t
2073 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2074 netdev_features_t features)
2076 u32 mss = skb_shinfo(skb)->gso_size;
2077 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2078 int offset = skb_transport_offset(skb);
2080 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2081 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2082 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2083 features &= ~NETIF_F_GSO_MASK;
2088 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2089 struct net_device *netdev)
2091 struct r8152 *tp = netdev_priv(netdev);
2093 skb_tx_timestamp(skb);
2095 skb_queue_tail(&tp->tx_queue, skb);
2097 if (!list_empty(&tp->tx_free)) {
2098 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2099 set_bit(SCHEDULE_NAPI, &tp->flags);
2100 schedule_delayed_work(&tp->schedule, 0);
2102 usb_mark_last_busy(tp->udev);
2103 napi_schedule(&tp->napi);
2105 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2106 netif_stop_queue(netdev);
2109 return NETDEV_TX_OK;
2112 static void r8152b_reset_packet_filter(struct r8152 *tp)
2116 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2117 ocp_data &= ~FMC_FCR_MCU_EN;
2118 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2119 ocp_data |= FMC_FCR_MCU_EN;
2120 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2123 static void rtl8152_nic_reset(struct r8152 *tp)
2127 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2129 for (i = 0; i < 1000; i++) {
2130 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2132 usleep_range(100, 400);
2136 static void set_tx_qlen(struct r8152 *tp)
2138 struct net_device *netdev = tp->netdev;
2140 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2141 sizeof(struct tx_desc));
2144 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2146 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2149 static void rtl_set_eee_plus(struct r8152 *tp)
2154 speed = rtl8152_get_speed(tp);
2155 if (speed & _10bps) {
2156 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2157 ocp_data |= EEEP_CR_EEEP_TX;
2158 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2160 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2161 ocp_data &= ~EEEP_CR_EEEP_TX;
2162 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2166 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2170 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2172 ocp_data |= RXDY_GATED_EN;
2174 ocp_data &= ~RXDY_GATED_EN;
2175 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2178 static int rtl_start_rx(struct r8152 *tp)
2182 INIT_LIST_HEAD(&tp->rx_done);
2183 for (i = 0; i < RTL8152_MAX_RX; i++) {
2184 INIT_LIST_HEAD(&tp->rx_info[i].list);
2185 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2190 if (ret && ++i < RTL8152_MAX_RX) {
2191 struct list_head rx_queue;
2192 unsigned long flags;
2194 INIT_LIST_HEAD(&rx_queue);
2197 struct rx_agg *agg = &tp->rx_info[i++];
2198 struct urb *urb = agg->urb;
2200 urb->actual_length = 0;
2201 list_add_tail(&agg->list, &rx_queue);
2202 } while (i < RTL8152_MAX_RX);
2204 spin_lock_irqsave(&tp->rx_lock, flags);
2205 list_splice_tail(&rx_queue, &tp->rx_done);
2206 spin_unlock_irqrestore(&tp->rx_lock, flags);
2212 static int rtl_stop_rx(struct r8152 *tp)
2216 for (i = 0; i < RTL8152_MAX_RX; i++)
2217 usb_kill_urb(tp->rx_info[i].urb);
2219 while (!skb_queue_empty(&tp->rx_queue))
2220 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2225 static int rtl_enable(struct r8152 *tp)
2229 r8152b_reset_packet_filter(tp);
2231 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2232 ocp_data |= CR_RE | CR_TE;
2233 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2235 rxdy_gated_en(tp, false);
2240 static int rtl8152_enable(struct r8152 *tp)
2242 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2246 rtl_set_eee_plus(tp);
2248 return rtl_enable(tp);
2251 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2253 u32 ocp_data = tp->coalesce / 8;
2255 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2258 static void r8153_set_rx_early_size(struct r8152 *tp)
2260 u32 ocp_data = (agg_buf_sz - rx_reserved_size(tp->netdev->mtu)) / 4;
2262 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2265 static int rtl8153_enable(struct r8152 *tp)
2267 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2270 usb_disable_lpm(tp->udev);
2272 rtl_set_eee_plus(tp);
2273 r8153_set_rx_early_timeout(tp);
2274 r8153_set_rx_early_size(tp);
2276 return rtl_enable(tp);
2279 static void rtl_disable(struct r8152 *tp)
2284 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2285 rtl_drop_queued_tx(tp);
2289 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2290 ocp_data &= ~RCR_ACPT_ALL;
2291 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2293 rtl_drop_queued_tx(tp);
2295 for (i = 0; i < RTL8152_MAX_TX; i++)
2296 usb_kill_urb(tp->tx_info[i].urb);
2298 rxdy_gated_en(tp, true);
2300 for (i = 0; i < 1000; i++) {
2301 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2302 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2304 usleep_range(1000, 2000);
2307 for (i = 0; i < 1000; i++) {
2308 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2310 usleep_range(1000, 2000);
2315 rtl8152_nic_reset(tp);
2318 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2322 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2324 ocp_data |= POWER_CUT;
2326 ocp_data &= ~POWER_CUT;
2327 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2329 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2330 ocp_data &= ~RESUME_INDICATE;
2331 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2334 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2338 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2340 ocp_data |= CPCR_RX_VLAN;
2342 ocp_data &= ~CPCR_RX_VLAN;
2343 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2346 static int rtl8152_set_features(struct net_device *dev,
2347 netdev_features_t features)
2349 netdev_features_t changed = features ^ dev->features;
2350 struct r8152 *tp = netdev_priv(dev);
2353 ret = usb_autopm_get_interface(tp->intf);
2357 mutex_lock(&tp->control);
2359 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2360 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2361 rtl_rx_vlan_en(tp, true);
2363 rtl_rx_vlan_en(tp, false);
2366 mutex_unlock(&tp->control);
2368 usb_autopm_put_interface(tp->intf);
2374 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2376 static u32 __rtl_get_wol(struct r8152 *tp)
2381 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2382 if (ocp_data & LINK_ON_WAKE_EN)
2383 wolopts |= WAKE_PHY;
2385 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2386 if (ocp_data & UWF_EN)
2387 wolopts |= WAKE_UCAST;
2388 if (ocp_data & BWF_EN)
2389 wolopts |= WAKE_BCAST;
2390 if (ocp_data & MWF_EN)
2391 wolopts |= WAKE_MCAST;
2393 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2394 if (ocp_data & MAGIC_EN)
2395 wolopts |= WAKE_MAGIC;
2400 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2404 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2406 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2407 ocp_data &= ~LINK_ON_WAKE_EN;
2408 if (wolopts & WAKE_PHY)
2409 ocp_data |= LINK_ON_WAKE_EN;
2410 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2412 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2413 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2414 if (wolopts & WAKE_UCAST)
2416 if (wolopts & WAKE_BCAST)
2418 if (wolopts & WAKE_MCAST)
2420 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2422 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2424 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2425 ocp_data &= ~MAGIC_EN;
2426 if (wolopts & WAKE_MAGIC)
2427 ocp_data |= MAGIC_EN;
2428 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2430 if (wolopts & WAKE_ANY)
2431 device_set_wakeup_enable(&tp->udev->dev, true);
2433 device_set_wakeup_enable(&tp->udev->dev, false);
2436 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2441 memset(u1u2, 0xff, sizeof(u1u2));
2443 memset(u1u2, 0x00, sizeof(u1u2));
2445 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2448 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2452 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2453 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2454 ocp_data |= U2P3_ENABLE;
2456 ocp_data &= ~U2P3_ENABLE;
2457 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2460 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2464 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2466 ocp_data |= PWR_EN | PHASE2_EN;
2468 ocp_data &= ~(PWR_EN | PHASE2_EN);
2469 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2471 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2472 ocp_data &= ~PCUT_STATUS;
2473 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2476 static bool rtl_can_wakeup(struct r8152 *tp)
2478 struct usb_device *udev = tp->udev;
2480 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2483 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2488 __rtl_set_wol(tp, WAKE_ANY);
2490 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2492 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2493 ocp_data |= LINK_OFF_WAKE_EN;
2494 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2496 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2500 __rtl_set_wol(tp, tp->saved_wolopts);
2502 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2504 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2505 ocp_data &= ~LINK_OFF_WAKE_EN;
2506 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2508 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2512 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2514 rtl_runtime_suspend_enable(tp, enable);
2517 r8153_u1u2en(tp, false);
2518 r8153_u2p3en(tp, false);
2520 r8153_u2p3en(tp, true);
2521 r8153_u1u2en(tp, true);
2525 static void r8153_teredo_off(struct r8152 *tp)
2529 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2530 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2531 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2533 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2534 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2535 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2538 static void rtl_reset_bmu(struct r8152 *tp)
2542 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2543 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2544 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2545 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2546 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2549 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2552 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2553 LINKENA | DIS_SDSAVE);
2555 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2561 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2563 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2564 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2565 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2568 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2572 r8152_mmd_indirect(tp, dev, reg);
2573 data = ocp_reg_read(tp, OCP_EEE_DATA);
2574 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2579 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2581 r8152_mmd_indirect(tp, dev, reg);
2582 ocp_reg_write(tp, OCP_EEE_DATA, data);
2583 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2586 static void r8152_eee_en(struct r8152 *tp, bool enable)
2588 u16 config1, config2, config3;
2591 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2592 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2593 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2594 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2597 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2598 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2599 config1 |= sd_rise_time(1);
2600 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2601 config3 |= fast_snr(42);
2603 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2604 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2606 config1 |= sd_rise_time(7);
2607 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2608 config3 |= fast_snr(511);
2611 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2612 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2613 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2614 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2617 static void r8152b_enable_eee(struct r8152 *tp)
2619 r8152_eee_en(tp, true);
2620 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2623 static void r8152b_enable_fc(struct r8152 *tp)
2627 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2628 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2629 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2632 static void rtl8152_disable(struct r8152 *tp)
2634 r8152_aldps_en(tp, false);
2636 r8152_aldps_en(tp, true);
2639 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2641 r8152b_enable_eee(tp);
2642 r8152_aldps_en(tp, true);
2643 r8152b_enable_fc(tp);
2645 set_bit(PHY_RESET, &tp->flags);
2648 static void r8152b_exit_oob(struct r8152 *tp)
2653 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2654 ocp_data &= ~RCR_ACPT_ALL;
2655 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2657 rxdy_gated_en(tp, true);
2658 r8153_teredo_off(tp);
2659 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2660 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2662 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2663 ocp_data &= ~NOW_IS_OOB;
2664 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2666 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2667 ocp_data &= ~MCU_BORW_EN;
2668 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2670 for (i = 0; i < 1000; i++) {
2671 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2672 if (ocp_data & LINK_LIST_READY)
2674 usleep_range(1000, 2000);
2677 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2678 ocp_data |= RE_INIT_LL;
2679 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2681 for (i = 0; i < 1000; i++) {
2682 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2683 if (ocp_data & LINK_LIST_READY)
2685 usleep_range(1000, 2000);
2688 rtl8152_nic_reset(tp);
2690 /* rx share fifo credit full threshold */
2691 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2693 if (tp->udev->speed == USB_SPEED_FULL ||
2694 tp->udev->speed == USB_SPEED_LOW) {
2695 /* rx share fifo credit near full threshold */
2696 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2698 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2701 /* rx share fifo credit near full threshold */
2702 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2704 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2708 /* TX share fifo free credit full threshold */
2709 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2711 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2712 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2713 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2714 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2716 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2718 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2720 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2721 ocp_data |= TCR0_AUTO_FIFO;
2722 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2725 static void r8152b_enter_oob(struct r8152 *tp)
2730 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2731 ocp_data &= ~NOW_IS_OOB;
2732 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2734 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2735 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2736 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2740 for (i = 0; i < 1000; i++) {
2741 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2742 if (ocp_data & LINK_LIST_READY)
2744 usleep_range(1000, 2000);
2747 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2748 ocp_data |= RE_INIT_LL;
2749 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2751 for (i = 0; i < 1000; i++) {
2752 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2753 if (ocp_data & LINK_LIST_READY)
2755 usleep_range(1000, 2000);
2758 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2760 rtl_rx_vlan_en(tp, true);
2762 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2763 ocp_data |= ALDPS_PROXY_MODE;
2764 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2766 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2767 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2768 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2770 rxdy_gated_en(tp, false);
2772 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2773 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2774 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2777 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2781 data = ocp_reg_read(tp, OCP_POWER_CFG);
2784 ocp_reg_write(tp, OCP_POWER_CFG, data);
2787 ocp_reg_write(tp, OCP_POWER_CFG, data);
2792 static void r8153_eee_en(struct r8152 *tp, bool enable)
2797 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2798 config = ocp_reg_read(tp, OCP_EEE_CFG);
2801 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2804 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2805 config &= ~EEE10_EN;
2808 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2809 ocp_reg_write(tp, OCP_EEE_CFG, config);
2812 static void r8153_hw_phy_cfg(struct r8152 *tp)
2817 /* disable ALDPS before updating the PHY parameters */
2818 r8153_aldps_en(tp, false);
2820 /* disable EEE before updating the PHY parameters */
2821 r8153_eee_en(tp, false);
2822 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2824 if (tp->version == RTL_VER_03) {
2825 data = ocp_reg_read(tp, OCP_EEE_CFG);
2826 data &= ~CTAP_SHORT_EN;
2827 ocp_reg_write(tp, OCP_EEE_CFG, data);
2830 data = ocp_reg_read(tp, OCP_POWER_CFG);
2831 data |= EEE_CLKDIV_EN;
2832 ocp_reg_write(tp, OCP_POWER_CFG, data);
2834 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2835 data |= EN_10M_BGOFF;
2836 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2837 data = ocp_reg_read(tp, OCP_POWER_CFG);
2838 data |= EN_10M_PLLOFF;
2839 ocp_reg_write(tp, OCP_POWER_CFG, data);
2840 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2842 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2843 ocp_data |= PFM_PWM_SWITCH;
2844 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2846 /* Enable LPF corner auto tune */
2847 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2849 /* Adjust 10M Amplitude */
2850 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2851 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2853 r8153_eee_en(tp, true);
2854 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2856 r8153_aldps_en(tp, true);
2857 r8152b_enable_fc(tp);
2859 set_bit(PHY_RESET, &tp->flags);
2862 static void r8153_first_init(struct r8152 *tp)
2867 rxdy_gated_en(tp, true);
2868 r8153_teredo_off(tp);
2870 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2871 ocp_data &= ~RCR_ACPT_ALL;
2872 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2874 rtl8152_nic_reset(tp);
2877 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2878 ocp_data &= ~NOW_IS_OOB;
2879 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2881 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2882 ocp_data &= ~MCU_BORW_EN;
2883 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2885 for (i = 0; i < 1000; i++) {
2886 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2887 if (ocp_data & LINK_LIST_READY)
2889 usleep_range(1000, 2000);
2892 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2893 ocp_data |= RE_INIT_LL;
2894 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2896 for (i = 0; i < 1000; i++) {
2897 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2898 if (ocp_data & LINK_LIST_READY)
2900 usleep_range(1000, 2000);
2903 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2905 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2906 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2907 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2909 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2910 ocp_data |= TCR0_AUTO_FIFO;
2911 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2913 rtl8152_nic_reset(tp);
2915 /* rx share fifo credit full threshold */
2916 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2917 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2918 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2919 /* TX share fifo free credit full threshold */
2920 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2922 /* rx aggregation */
2923 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2924 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2925 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2928 static void r8153_enter_oob(struct r8152 *tp)
2933 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2934 ocp_data &= ~NOW_IS_OOB;
2935 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2940 for (i = 0; i < 1000; i++) {
2941 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2942 if (ocp_data & LINK_LIST_READY)
2944 usleep_range(1000, 2000);
2947 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2948 ocp_data |= RE_INIT_LL;
2949 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2951 for (i = 0; i < 1000; i++) {
2952 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2953 if (ocp_data & LINK_LIST_READY)
2955 usleep_range(1000, 2000);
2958 ocp_data = tp->netdev->mtu + VLAN_ETH_HLEN + CRC_SIZE;
2959 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
2961 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2962 ocp_data &= ~TEREDO_WAKE_MASK;
2963 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2965 rtl_rx_vlan_en(tp, true);
2967 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2968 ocp_data |= ALDPS_PROXY_MODE;
2969 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2971 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2972 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2973 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2975 rxdy_gated_en(tp, false);
2977 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2978 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2979 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2982 static void rtl8153_disable(struct r8152 *tp)
2984 r8153_aldps_en(tp, false);
2987 r8153_aldps_en(tp, true);
2988 usb_enable_lpm(tp->udev);
2991 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2993 u16 bmcr, anar, gbcr;
2996 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2997 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2998 ADVERTISE_100HALF | ADVERTISE_100FULL);
2999 if (tp->mii.supports_gmii) {
3000 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
3001 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3006 if (autoneg == AUTONEG_DISABLE) {
3007 if (speed == SPEED_10) {
3009 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3010 } else if (speed == SPEED_100) {
3011 bmcr = BMCR_SPEED100;
3012 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3013 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3014 bmcr = BMCR_SPEED1000;
3015 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3021 if (duplex == DUPLEX_FULL)
3022 bmcr |= BMCR_FULLDPLX;
3024 if (speed == SPEED_10) {
3025 if (duplex == DUPLEX_FULL)
3026 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3028 anar |= ADVERTISE_10HALF;
3029 } else if (speed == SPEED_100) {
3030 if (duplex == DUPLEX_FULL) {
3031 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3032 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3034 anar |= ADVERTISE_10HALF;
3035 anar |= ADVERTISE_100HALF;
3037 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3038 if (duplex == DUPLEX_FULL) {
3039 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3040 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3041 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3043 anar |= ADVERTISE_10HALF;
3044 anar |= ADVERTISE_100HALF;
3045 gbcr |= ADVERTISE_1000HALF;
3052 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3055 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3058 if (tp->mii.supports_gmii)
3059 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3061 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3062 r8152_mdio_write(tp, MII_BMCR, bmcr);
3064 if (bmcr & BMCR_RESET) {
3067 for (i = 0; i < 50; i++) {
3069 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3078 static void rtl8152_up(struct r8152 *tp)
3080 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3083 r8152_aldps_en(tp, false);
3084 r8152b_exit_oob(tp);
3085 r8152_aldps_en(tp, true);
3088 static void rtl8152_down(struct r8152 *tp)
3090 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3091 rtl_drop_queued_tx(tp);
3095 r8152_power_cut_en(tp, false);
3096 r8152_aldps_en(tp, false);
3097 r8152b_enter_oob(tp);
3098 r8152_aldps_en(tp, true);
3101 static void rtl8153_up(struct r8152 *tp)
3103 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3106 r8153_u1u2en(tp, false);
3107 r8153_aldps_en(tp, false);
3108 r8153_first_init(tp);
3109 r8153_aldps_en(tp, true);
3110 r8153_u2p3en(tp, true);
3111 r8153_u1u2en(tp, true);
3112 usb_enable_lpm(tp->udev);
3115 static void rtl8153_down(struct r8152 *tp)
3117 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3118 rtl_drop_queued_tx(tp);
3122 r8153_u1u2en(tp, false);
3123 r8153_u2p3en(tp, false);
3124 r8153_power_cut_en(tp, false);
3125 r8153_aldps_en(tp, false);
3126 r8153_enter_oob(tp);
3127 r8153_aldps_en(tp, true);
3130 static bool rtl8152_in_nway(struct r8152 *tp)
3134 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3135 tp->ocp_base = 0x2000;
3136 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3137 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3139 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3140 if (nway_state & 0xc000)
3146 static bool rtl8153_in_nway(struct r8152 *tp)
3148 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3150 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3156 static void set_carrier(struct r8152 *tp)
3158 struct net_device *netdev = tp->netdev;
3161 speed = rtl8152_get_speed(tp);
3163 if (speed & LINK_STATUS) {
3164 if (!netif_carrier_ok(netdev)) {
3165 tp->rtl_ops.enable(tp);
3166 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3167 netif_stop_queue(netdev);
3168 napi_disable(&tp->napi);
3169 netif_carrier_on(netdev);
3171 napi_enable(&tp->napi);
3172 netif_wake_queue(netdev);
3173 netif_info(tp, link, netdev, "carrier on\n");
3174 } else if (netif_queue_stopped(netdev) &&
3175 skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3176 netif_wake_queue(netdev);
3179 if (netif_carrier_ok(netdev)) {
3180 netif_carrier_off(netdev);
3181 napi_disable(&tp->napi);
3182 tp->rtl_ops.disable(tp);
3183 napi_enable(&tp->napi);
3184 netif_info(tp, link, netdev, "carrier off\n");
3189 static void rtl_work_func_t(struct work_struct *work)
3191 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3193 /* If the device is unplugged or !netif_running(), the workqueue
3194 * doesn't need to wake the device, and could return directly.
3196 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3199 if (usb_autopm_get_interface(tp->intf) < 0)
3202 if (!test_bit(WORK_ENABLE, &tp->flags))
3205 if (!mutex_trylock(&tp->control)) {
3206 schedule_delayed_work(&tp->schedule, 0);
3210 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3213 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3214 _rtl8152_set_rx_mode(tp->netdev);
3216 /* don't schedule napi before linking */
3217 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3218 netif_carrier_ok(tp->netdev))
3219 napi_schedule(&tp->napi);
3221 mutex_unlock(&tp->control);
3224 usb_autopm_put_interface(tp->intf);
3227 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3229 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3231 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3234 if (usb_autopm_get_interface(tp->intf) < 0)
3237 mutex_lock(&tp->control);
3239 tp->rtl_ops.hw_phy_cfg(tp);
3241 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3243 mutex_unlock(&tp->control);
3245 usb_autopm_put_interface(tp->intf);
3248 #ifdef CONFIG_PM_SLEEP
3249 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3252 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3255 case PM_HIBERNATION_PREPARE:
3256 case PM_SUSPEND_PREPARE:
3257 usb_autopm_get_interface(tp->intf);
3260 case PM_POST_HIBERNATION:
3261 case PM_POST_SUSPEND:
3262 usb_autopm_put_interface(tp->intf);
3265 case PM_POST_RESTORE:
3266 case PM_RESTORE_PREPARE:
3275 static int rtl8152_open(struct net_device *netdev)
3277 struct r8152 *tp = netdev_priv(netdev);
3280 res = alloc_all_mem(tp);
3284 res = usb_autopm_get_interface(tp->intf);
3288 mutex_lock(&tp->control);
3292 netif_carrier_off(netdev);
3293 netif_start_queue(netdev);
3294 set_bit(WORK_ENABLE, &tp->flags);
3296 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3299 netif_device_detach(tp->netdev);
3300 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3304 napi_enable(&tp->napi);
3306 mutex_unlock(&tp->control);
3308 usb_autopm_put_interface(tp->intf);
3309 #ifdef CONFIG_PM_SLEEP
3310 tp->pm_notifier.notifier_call = rtl_notifier;
3311 register_pm_notifier(&tp->pm_notifier);
3316 mutex_unlock(&tp->control);
3317 usb_autopm_put_interface(tp->intf);
3324 static int rtl8152_close(struct net_device *netdev)
3326 struct r8152 *tp = netdev_priv(netdev);
3329 #ifdef CONFIG_PM_SLEEP
3330 unregister_pm_notifier(&tp->pm_notifier);
3332 napi_disable(&tp->napi);
3333 clear_bit(WORK_ENABLE, &tp->flags);
3334 usb_kill_urb(tp->intr_urb);
3335 cancel_delayed_work_sync(&tp->schedule);
3336 netif_stop_queue(netdev);
3338 res = usb_autopm_get_interface(tp->intf);
3339 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3340 rtl_drop_queued_tx(tp);
3343 mutex_lock(&tp->control);
3345 tp->rtl_ops.down(tp);
3347 mutex_unlock(&tp->control);
3349 usb_autopm_put_interface(tp->intf);
3357 static void rtl_tally_reset(struct r8152 *tp)
3361 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3362 ocp_data |= TALLY_RESET;
3363 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3366 static void r8152b_init(struct r8152 *tp)
3371 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3374 data = r8152_mdio_read(tp, MII_BMCR);
3375 if (data & BMCR_PDOWN) {
3376 data &= ~BMCR_PDOWN;
3377 r8152_mdio_write(tp, MII_BMCR, data);
3380 r8152_aldps_en(tp, false);
3382 if (tp->version == RTL_VER_01) {
3383 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3384 ocp_data &= ~LED_MODE_MASK;
3385 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3388 r8152_power_cut_en(tp, false);
3390 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3391 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3392 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3393 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3394 ocp_data &= ~MCU_CLK_RATIO_MASK;
3395 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3396 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3397 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3398 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3399 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3401 rtl_tally_reset(tp);
3403 /* enable rx aggregation */
3404 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3405 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3406 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3409 static void r8153_init(struct r8152 *tp)
3415 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3418 r8153_u1u2en(tp, false);
3420 for (i = 0; i < 500; i++) {
3421 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3427 for (i = 0; i < 500; i++) {
3428 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3429 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3434 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3435 tp->version == RTL_VER_05)
3436 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3438 data = r8152_mdio_read(tp, MII_BMCR);
3439 if (data & BMCR_PDOWN) {
3440 data &= ~BMCR_PDOWN;
3441 r8152_mdio_write(tp, MII_BMCR, data);
3444 for (i = 0; i < 500; i++) {
3445 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3446 if (ocp_data == PHY_STAT_LAN_ON)
3451 usb_disable_lpm(tp->udev);
3452 r8153_u2p3en(tp, false);
3454 if (tp->version == RTL_VER_04) {
3455 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3456 ocp_data &= ~pwd_dn_scale_mask;
3457 ocp_data |= pwd_dn_scale(96);
3458 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3460 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3461 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3462 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3463 } else if (tp->version == RTL_VER_05) {
3464 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3465 ocp_data &= ~ECM_ALDPS;
3466 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3468 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3469 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3470 ocp_data &= ~DYNAMIC_BURST;
3472 ocp_data |= DYNAMIC_BURST;
3473 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3474 } else if (tp->version == RTL_VER_06) {
3475 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3476 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3477 ocp_data &= ~DYNAMIC_BURST;
3479 ocp_data |= DYNAMIC_BURST;
3480 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3483 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3484 ocp_data |= EP4_FULL_FC;
3485 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3487 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3488 ocp_data &= ~TIMER11_EN;
3489 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3491 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3492 ocp_data &= ~LED_MODE_MASK;
3493 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3495 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3496 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3497 ocp_data |= LPM_TIMER_500MS;
3499 ocp_data |= LPM_TIMER_500US;
3500 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3502 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3503 ocp_data &= ~SEN_VAL_MASK;
3504 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3505 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3507 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3509 r8153_power_cut_en(tp, false);
3510 r8153_u1u2en(tp, true);
3512 /* MAC clock speed down */
3513 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3514 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3515 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3516 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3518 rtl_tally_reset(tp);
3519 r8153_u2p3en(tp, true);
3522 static int rtl8152_pre_reset(struct usb_interface *intf)
3524 struct r8152 *tp = usb_get_intfdata(intf);
3525 struct net_device *netdev;
3530 netdev = tp->netdev;
3531 if (!netif_running(netdev))
3534 netif_stop_queue(netdev);
3535 napi_disable(&tp->napi);
3536 clear_bit(WORK_ENABLE, &tp->flags);
3537 usb_kill_urb(tp->intr_urb);
3538 cancel_delayed_work_sync(&tp->schedule);
3539 if (netif_carrier_ok(netdev)) {
3540 mutex_lock(&tp->control);
3541 tp->rtl_ops.disable(tp);
3542 mutex_unlock(&tp->control);
3548 static int rtl8152_post_reset(struct usb_interface *intf)
3550 struct r8152 *tp = usb_get_intfdata(intf);
3551 struct net_device *netdev;
3556 netdev = tp->netdev;
3557 if (!netif_running(netdev))
3560 set_bit(WORK_ENABLE, &tp->flags);
3561 if (netif_carrier_ok(netdev)) {
3562 mutex_lock(&tp->control);
3563 tp->rtl_ops.enable(tp);
3565 rtl8152_set_rx_mode(netdev);
3566 mutex_unlock(&tp->control);
3569 napi_enable(&tp->napi);
3570 netif_wake_queue(netdev);
3571 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3573 if (!list_empty(&tp->rx_done))
3574 napi_schedule(&tp->napi);
3579 static bool delay_autosuspend(struct r8152 *tp)
3581 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3582 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3584 /* This means a linking change occurs and the driver doesn't detect it,
3585 * yet. If the driver has disabled tx/rx and hw is linking on, the
3586 * device wouldn't wake up by receiving any packet.
3588 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3591 /* If the linking down is occurred by nway, the device may miss the
3592 * linking change event. And it wouldn't wake when linking on.
3594 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3596 else if (!skb_queue_empty(&tp->tx_queue))
3602 static int rtl8152_runtime_suspend(struct r8152 *tp)
3604 struct net_device *netdev = tp->netdev;
3607 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3608 smp_mb__after_atomic();
3610 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3613 if (delay_autosuspend(tp)) {
3614 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3615 smp_mb__after_atomic();
3620 if (netif_carrier_ok(netdev)) {
3623 rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3624 ocp_data = rcr & ~RCR_ACPT_ALL;
3625 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3626 rxdy_gated_en(tp, true);
3627 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3629 if (!(ocp_data & RXFIFO_EMPTY)) {
3630 rxdy_gated_en(tp, false);
3631 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3632 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3633 smp_mb__after_atomic();
3639 clear_bit(WORK_ENABLE, &tp->flags);
3640 usb_kill_urb(tp->intr_urb);
3642 tp->rtl_ops.autosuspend_en(tp, true);
3644 if (netif_carrier_ok(netdev)) {
3645 napi_disable(&tp->napi);
3647 rxdy_gated_en(tp, false);
3648 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3649 napi_enable(&tp->napi);
3657 static int rtl8152_system_suspend(struct r8152 *tp)
3659 struct net_device *netdev = tp->netdev;
3662 netif_device_detach(netdev);
3664 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3665 clear_bit(WORK_ENABLE, &tp->flags);
3666 usb_kill_urb(tp->intr_urb);
3667 napi_disable(&tp->napi);
3668 cancel_delayed_work_sync(&tp->schedule);
3669 tp->rtl_ops.down(tp);
3670 napi_enable(&tp->napi);
3676 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3678 struct r8152 *tp = usb_get_intfdata(intf);
3681 mutex_lock(&tp->control);
3683 if (PMSG_IS_AUTO(message))
3684 ret = rtl8152_runtime_suspend(tp);
3686 ret = rtl8152_system_suspend(tp);
3688 mutex_unlock(&tp->control);
3693 static int rtl8152_resume(struct usb_interface *intf)
3695 struct r8152 *tp = usb_get_intfdata(intf);
3697 mutex_lock(&tp->control);
3699 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3700 tp->rtl_ops.init(tp);
3701 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3702 netif_device_attach(tp->netdev);
3705 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3706 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3707 tp->rtl_ops.autosuspend_en(tp, false);
3708 napi_disable(&tp->napi);
3709 set_bit(WORK_ENABLE, &tp->flags);
3711 if (netif_carrier_ok(tp->netdev)) {
3712 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3715 netif_carrier_off(tp->netdev);
3716 tp->rtl_ops.disable(tp);
3717 netif_info(tp, link, tp->netdev,
3722 napi_enable(&tp->napi);
3723 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3724 smp_mb__after_atomic();
3725 if (!list_empty(&tp->rx_done))
3726 napi_schedule(&tp->napi);
3729 netif_carrier_off(tp->netdev);
3730 set_bit(WORK_ENABLE, &tp->flags);
3732 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3733 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3734 if (tp->netdev->flags & IFF_UP)
3735 tp->rtl_ops.autosuspend_en(tp, false);
3736 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3739 mutex_unlock(&tp->control);
3744 static int rtl8152_reset_resume(struct usb_interface *intf)
3746 struct r8152 *tp = usb_get_intfdata(intf);
3748 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3749 return rtl8152_resume(intf);
3752 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3754 struct r8152 *tp = netdev_priv(dev);
3756 if (usb_autopm_get_interface(tp->intf) < 0)
3759 if (!rtl_can_wakeup(tp)) {
3763 mutex_lock(&tp->control);
3764 wol->supported = WAKE_ANY;
3765 wol->wolopts = __rtl_get_wol(tp);
3766 mutex_unlock(&tp->control);
3769 usb_autopm_put_interface(tp->intf);
3772 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3774 struct r8152 *tp = netdev_priv(dev);
3777 if (!rtl_can_wakeup(tp))
3780 ret = usb_autopm_get_interface(tp->intf);
3784 mutex_lock(&tp->control);
3786 __rtl_set_wol(tp, wol->wolopts);
3787 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3789 mutex_unlock(&tp->control);
3791 usb_autopm_put_interface(tp->intf);
3797 static u32 rtl8152_get_msglevel(struct net_device *dev)
3799 struct r8152 *tp = netdev_priv(dev);
3801 return tp->msg_enable;
3804 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3806 struct r8152 *tp = netdev_priv(dev);
3808 tp->msg_enable = value;
3811 static void rtl8152_get_drvinfo(struct net_device *netdev,
3812 struct ethtool_drvinfo *info)
3814 struct r8152 *tp = netdev_priv(netdev);
3816 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3817 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3818 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3822 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3824 struct r8152 *tp = netdev_priv(netdev);
3827 if (!tp->mii.mdio_read)
3830 ret = usb_autopm_get_interface(tp->intf);
3834 mutex_lock(&tp->control);
3836 ret = mii_ethtool_gset(&tp->mii, cmd);
3838 mutex_unlock(&tp->control);
3840 usb_autopm_put_interface(tp->intf);
3846 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3848 struct r8152 *tp = netdev_priv(dev);
3851 ret = usb_autopm_get_interface(tp->intf);
3855 mutex_lock(&tp->control);
3857 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3859 tp->autoneg = cmd->autoneg;
3860 tp->speed = cmd->speed;
3861 tp->duplex = cmd->duplex;
3864 mutex_unlock(&tp->control);
3866 usb_autopm_put_interface(tp->intf);
3872 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3879 "tx_single_collisions",
3880 "tx_multi_collisions",
3888 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3892 return ARRAY_SIZE(rtl8152_gstrings);
3898 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3899 struct ethtool_stats *stats, u64 *data)
3901 struct r8152 *tp = netdev_priv(dev);
3902 struct tally_counter tally;
3904 if (usb_autopm_get_interface(tp->intf) < 0)
3907 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3909 usb_autopm_put_interface(tp->intf);
3911 data[0] = le64_to_cpu(tally.tx_packets);
3912 data[1] = le64_to_cpu(tally.rx_packets);
3913 data[2] = le64_to_cpu(tally.tx_errors);
3914 data[3] = le32_to_cpu(tally.rx_errors);
3915 data[4] = le16_to_cpu(tally.rx_missed);
3916 data[5] = le16_to_cpu(tally.align_errors);
3917 data[6] = le32_to_cpu(tally.tx_one_collision);
3918 data[7] = le32_to_cpu(tally.tx_multi_collision);
3919 data[8] = le64_to_cpu(tally.rx_unicast);
3920 data[9] = le64_to_cpu(tally.rx_broadcast);
3921 data[10] = le32_to_cpu(tally.rx_multicast);
3922 data[11] = le16_to_cpu(tally.tx_aborted);
3923 data[12] = le16_to_cpu(tally.tx_underrun);
3926 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3928 switch (stringset) {
3930 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3935 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3937 u32 ocp_data, lp, adv, supported = 0;
3940 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3941 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3943 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3944 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3946 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3947 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3949 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3950 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3952 eee->eee_enabled = !!ocp_data;
3953 eee->eee_active = !!(supported & adv & lp);
3954 eee->supported = supported;
3955 eee->advertised = adv;
3956 eee->lp_advertised = lp;
3961 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3963 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3965 r8152_eee_en(tp, eee->eee_enabled);
3967 if (!eee->eee_enabled)
3970 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3975 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3977 u32 ocp_data, lp, adv, supported = 0;
3980 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3981 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3983 val = ocp_reg_read(tp, OCP_EEE_ADV);
3984 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3986 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3987 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3989 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3990 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3992 eee->eee_enabled = !!ocp_data;
3993 eee->eee_active = !!(supported & adv & lp);
3994 eee->supported = supported;
3995 eee->advertised = adv;
3996 eee->lp_advertised = lp;
4001 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
4003 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
4005 r8153_eee_en(tp, eee->eee_enabled);
4007 if (!eee->eee_enabled)
4010 ocp_reg_write(tp, OCP_EEE_ADV, val);
4016 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
4018 struct r8152 *tp = netdev_priv(net);
4021 ret = usb_autopm_get_interface(tp->intf);
4025 mutex_lock(&tp->control);
4027 ret = tp->rtl_ops.eee_get(tp, edata);
4029 mutex_unlock(&tp->control);
4031 usb_autopm_put_interface(tp->intf);
4038 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
4040 struct r8152 *tp = netdev_priv(net);
4043 ret = usb_autopm_get_interface(tp->intf);
4047 mutex_lock(&tp->control);
4049 ret = tp->rtl_ops.eee_set(tp, edata);
4051 ret = mii_nway_restart(&tp->mii);
4053 mutex_unlock(&tp->control);
4055 usb_autopm_put_interface(tp->intf);
4061 static int rtl8152_nway_reset(struct net_device *dev)
4063 struct r8152 *tp = netdev_priv(dev);
4066 ret = usb_autopm_get_interface(tp->intf);
4070 mutex_lock(&tp->control);
4072 ret = mii_nway_restart(&tp->mii);
4074 mutex_unlock(&tp->control);
4076 usb_autopm_put_interface(tp->intf);
4082 static int rtl8152_get_coalesce(struct net_device *netdev,
4083 struct ethtool_coalesce *coalesce)
4085 struct r8152 *tp = netdev_priv(netdev);
4087 switch (tp->version) {
4095 coalesce->rx_coalesce_usecs = tp->coalesce;
4100 static int rtl8152_set_coalesce(struct net_device *netdev,
4101 struct ethtool_coalesce *coalesce)
4103 struct r8152 *tp = netdev_priv(netdev);
4106 switch (tp->version) {
4114 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4117 ret = usb_autopm_get_interface(tp->intf);
4121 mutex_lock(&tp->control);
4123 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4124 tp->coalesce = coalesce->rx_coalesce_usecs;
4126 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4127 r8153_set_rx_early_timeout(tp);
4130 mutex_unlock(&tp->control);
4132 usb_autopm_put_interface(tp->intf);
4137 static const struct ethtool_ops ops = {
4138 .get_drvinfo = rtl8152_get_drvinfo,
4139 .get_settings = rtl8152_get_settings,
4140 .set_settings = rtl8152_set_settings,
4141 .get_link = ethtool_op_get_link,
4142 .nway_reset = rtl8152_nway_reset,
4143 .get_msglevel = rtl8152_get_msglevel,
4144 .set_msglevel = rtl8152_set_msglevel,
4145 .get_wol = rtl8152_get_wol,
4146 .set_wol = rtl8152_set_wol,
4147 .get_strings = rtl8152_get_strings,
4148 .get_sset_count = rtl8152_get_sset_count,
4149 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4150 .get_coalesce = rtl8152_get_coalesce,
4151 .set_coalesce = rtl8152_set_coalesce,
4152 .get_eee = rtl_ethtool_get_eee,
4153 .set_eee = rtl_ethtool_set_eee,
4156 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4158 struct r8152 *tp = netdev_priv(netdev);
4159 struct mii_ioctl_data *data = if_mii(rq);
4162 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4165 res = usb_autopm_get_interface(tp->intf);
4171 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4175 mutex_lock(&tp->control);
4176 data->val_out = r8152_mdio_read(tp, data->reg_num);
4177 mutex_unlock(&tp->control);
4181 if (!capable(CAP_NET_ADMIN)) {
4185 mutex_lock(&tp->control);
4186 r8152_mdio_write(tp, data->reg_num, data->val_in);
4187 mutex_unlock(&tp->control);
4194 usb_autopm_put_interface(tp->intf);
4200 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4202 struct r8152 *tp = netdev_priv(dev);
4205 switch (tp->version) {
4214 ret = usb_autopm_get_interface(tp->intf);
4218 mutex_lock(&tp->control);
4222 if (netif_running(dev)) {
4223 u32 rms = new_mtu + VLAN_ETH_HLEN + CRC_SIZE;
4225 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, rms);
4227 if (netif_carrier_ok(dev))
4228 r8153_set_rx_early_size(tp);
4231 mutex_unlock(&tp->control);
4233 usb_autopm_put_interface(tp->intf);
4238 static const struct net_device_ops rtl8152_netdev_ops = {
4239 .ndo_open = rtl8152_open,
4240 .ndo_stop = rtl8152_close,
4241 .ndo_do_ioctl = rtl8152_ioctl,
4242 .ndo_start_xmit = rtl8152_start_xmit,
4243 .ndo_tx_timeout = rtl8152_tx_timeout,
4244 .ndo_set_features = rtl8152_set_features,
4245 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4246 .ndo_set_mac_address = rtl8152_set_mac_address,
4247 .ndo_change_mtu = rtl8152_change_mtu,
4248 .ndo_validate_addr = eth_validate_addr,
4249 .ndo_features_check = rtl8152_features_check,
4252 static void r8152b_get_version(struct r8152 *tp)
4257 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4258 version = (u16)(ocp_data & VERSION_MASK);
4262 tp->version = RTL_VER_01;
4265 tp->version = RTL_VER_02;
4268 tp->version = RTL_VER_03;
4269 tp->mii.supports_gmii = 1;
4272 tp->version = RTL_VER_04;
4273 tp->mii.supports_gmii = 1;
4276 tp->version = RTL_VER_05;
4277 tp->mii.supports_gmii = 1;
4280 tp->version = RTL_VER_06;
4281 tp->mii.supports_gmii = 1;
4284 netif_info(tp, probe, tp->netdev,
4285 "Unknown version 0x%04x\n", version);
4290 static void rtl8152_unload(struct r8152 *tp)
4292 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4295 if (tp->version != RTL_VER_01)
4296 r8152_power_cut_en(tp, true);
4299 static void rtl8153_unload(struct r8152 *tp)
4301 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4304 r8153_power_cut_en(tp, false);
4307 static int rtl_ops_init(struct r8152 *tp)
4309 struct rtl_ops *ops = &tp->rtl_ops;
4312 switch (tp->version) {
4315 ops->init = r8152b_init;
4316 ops->enable = rtl8152_enable;
4317 ops->disable = rtl8152_disable;
4318 ops->up = rtl8152_up;
4319 ops->down = rtl8152_down;
4320 ops->unload = rtl8152_unload;
4321 ops->eee_get = r8152_get_eee;
4322 ops->eee_set = r8152_set_eee;
4323 ops->in_nway = rtl8152_in_nway;
4324 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4325 ops->autosuspend_en = rtl_runtime_suspend_enable;
4332 ops->init = r8153_init;
4333 ops->enable = rtl8153_enable;
4334 ops->disable = rtl8153_disable;
4335 ops->up = rtl8153_up;
4336 ops->down = rtl8153_down;
4337 ops->unload = rtl8153_unload;
4338 ops->eee_get = r8153_get_eee;
4339 ops->eee_set = r8153_set_eee;
4340 ops->in_nway = rtl8153_in_nway;
4341 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4342 ops->autosuspend_en = rtl8153_runtime_enable;
4347 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4354 static int rtl8152_probe(struct usb_interface *intf,
4355 const struct usb_device_id *id)
4357 struct usb_device *udev = interface_to_usbdev(intf);
4359 struct net_device *netdev;
4362 if (udev->actconfig->desc.bConfigurationValue != 1) {
4363 usb_driver_set_configuration(udev, 1);
4367 usb_reset_device(udev);
4368 netdev = alloc_etherdev(sizeof(struct r8152));
4370 dev_err(&intf->dev, "Out of memory\n");
4374 SET_NETDEV_DEV(netdev, &intf->dev);
4375 tp = netdev_priv(netdev);
4376 tp->msg_enable = 0x7FFF;
4379 tp->netdev = netdev;
4382 r8152b_get_version(tp);
4383 ret = rtl_ops_init(tp);
4387 mutex_init(&tp->control);
4388 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4389 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4391 netdev->netdev_ops = &rtl8152_netdev_ops;
4392 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4394 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4395 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4396 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4397 NETIF_F_HW_VLAN_CTAG_TX;
4398 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4399 NETIF_F_TSO | NETIF_F_FRAGLIST |
4400 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4401 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4402 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4403 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4404 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4406 if (tp->version == RTL_VER_01) {
4407 netdev->features &= ~NETIF_F_RXCSUM;
4408 netdev->hw_features &= ~NETIF_F_RXCSUM;
4411 netdev->ethtool_ops = &ops;
4412 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4414 /* MTU range: 68 - 1500 or 9194 */
4415 netdev->min_mtu = ETH_MIN_MTU;
4416 switch (tp->version) {
4419 netdev->max_mtu = ETH_DATA_LEN;
4422 netdev->max_mtu = RTL8153_MAX_MTU;
4426 tp->mii.dev = netdev;
4427 tp->mii.mdio_read = read_mii_word;
4428 tp->mii.mdio_write = write_mii_word;
4429 tp->mii.phy_id_mask = 0x3f;
4430 tp->mii.reg_num_mask = 0x1f;
4431 tp->mii.phy_id = R8152_PHY_ID;
4433 switch (udev->speed) {
4434 case USB_SPEED_SUPER:
4435 case USB_SPEED_SUPER_PLUS:
4436 tp->coalesce = COALESCE_SUPER;
4438 case USB_SPEED_HIGH:
4439 tp->coalesce = COALESCE_HIGH;
4442 tp->coalesce = COALESCE_SLOW;
4446 tp->autoneg = AUTONEG_ENABLE;
4447 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4448 tp->duplex = DUPLEX_FULL;
4450 intf->needs_remote_wakeup = 1;
4452 tp->rtl_ops.init(tp);
4453 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4454 set_ethernet_addr(tp);
4456 usb_set_intfdata(intf, tp);
4457 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4459 ret = register_netdev(netdev);
4461 netif_err(tp, probe, netdev, "couldn't register the device\n");
4465 if (!rtl_can_wakeup(tp))
4466 __rtl_set_wol(tp, 0);
4468 tp->saved_wolopts = __rtl_get_wol(tp);
4469 if (tp->saved_wolopts)
4470 device_set_wakeup_enable(&udev->dev, true);
4472 device_set_wakeup_enable(&udev->dev, false);
4474 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4479 netif_napi_del(&tp->napi);
4480 usb_set_intfdata(intf, NULL);
4482 free_netdev(netdev);
4486 static void rtl8152_disconnect(struct usb_interface *intf)
4488 struct r8152 *tp = usb_get_intfdata(intf);
4490 usb_set_intfdata(intf, NULL);
4492 struct usb_device *udev = tp->udev;
4494 if (udev->state == USB_STATE_NOTATTACHED)
4495 set_bit(RTL8152_UNPLUG, &tp->flags);
4497 netif_napi_del(&tp->napi);
4498 unregister_netdev(tp->netdev);
4499 cancel_delayed_work_sync(&tp->hw_phy_work);
4500 tp->rtl_ops.unload(tp);
4501 free_netdev(tp->netdev);
4505 #define REALTEK_USB_DEVICE(vend, prod) \
4506 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4507 USB_DEVICE_ID_MATCH_INT_CLASS, \
4508 .idVendor = (vend), \
4509 .idProduct = (prod), \
4510 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4513 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4514 USB_DEVICE_ID_MATCH_DEVICE, \
4515 .idVendor = (vend), \
4516 .idProduct = (prod), \
4517 .bInterfaceClass = USB_CLASS_COMM, \
4518 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4519 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4521 /* table of devices that work with this driver */
4522 static struct usb_device_id rtl8152_table[] = {
4523 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4524 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4525 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07ab)},
4526 {REALTEK_USB_DEVICE(VENDOR_ID_MICROSOFT, 0x07c6)},
4527 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4528 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4529 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3062)},
4530 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x3069)},
4531 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4532 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x720c)},
4533 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7214)},
4534 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4538 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4540 static struct usb_driver rtl8152_driver = {
4542 .id_table = rtl8152_table,
4543 .probe = rtl8152_probe,
4544 .disconnect = rtl8152_disconnect,
4545 .suspend = rtl8152_suspend,
4546 .resume = rtl8152_resume,
4547 .reset_resume = rtl8152_reset_resume,
4548 .pre_reset = rtl8152_pre_reset,
4549 .post_reset = rtl8152_post_reset,
4550 .supports_autosuspend = 1,
4551 .disable_hub_initiated_lpm = 1,
4554 module_usb_driver(rtl8152_driver);
4556 MODULE_AUTHOR(DRIVER_AUTHOR);
4557 MODULE_DESCRIPTION(DRIVER_DESC);
4558 MODULE_LICENSE("GPL");
4559 MODULE_VERSION(DRIVER_VERSION);