1 /***************************************************************************
3 * Copyright (C) 2007-2010 SMSC
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *****************************************************************************/
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/bitrev.h>
30 #include <linux/crc16.h>
31 #include <linux/crc32.h>
32 #include <linux/usb/usbnet.h>
33 #include <linux/slab.h>
36 #define SMSC_CHIPNAME "smsc75xx"
37 #define SMSC_DRIVER_VERSION "1.0.0"
38 #define HS_USB_PKT_SIZE (512)
39 #define FS_USB_PKT_SIZE (64)
40 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
41 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
42 #define DEFAULT_BULK_IN_DELAY (0x00002000)
43 #define MAX_SINGLE_PACKET_SIZE (9000)
44 #define LAN75XX_EEPROM_MAGIC (0x7500)
45 #define EEPROM_MAC_OFFSET (0x01)
46 #define DEFAULT_TX_CSUM_ENABLE (true)
47 #define DEFAULT_RX_CSUM_ENABLE (true)
48 #define DEFAULT_TSO_ENABLE (true)
49 #define SMSC75XX_INTERNAL_PHY_ID (1)
50 #define SMSC75XX_TX_OVERHEAD (8)
51 #define MAX_RX_FIFO_SIZE (20 * 1024)
52 #define MAX_TX_FIFO_SIZE (12 * 1024)
53 #define USB_VENDOR_ID_SMSC (0x0424)
54 #define USB_PRODUCT_ID_LAN7500 (0x7500)
55 #define USB_PRODUCT_ID_LAN7505 (0x7505)
57 #define SUPPORTED_WAKE (WAKE_UCAST | WAKE_BCAST | \
58 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
60 #define check_warn(ret, fmt, args...) \
61 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
63 #define check_warn_return(ret, fmt, args...) \
64 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
66 #define check_warn_goto_done(ret, fmt, args...) \
67 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
69 struct smsc75xx_priv {
73 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
74 struct mutex dataport_mutex;
75 spinlock_t rfe_ctl_lock;
76 struct work_struct set_multicast;
80 struct usb_ctrlrequest req;
84 static bool turbo_mode = true;
85 module_param(turbo_mode, bool, 0644);
86 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
88 static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
96 ret = usbnet_read_cmd(dev, USB_VENDOR_REQUEST_READ_REGISTER,
97 USB_DIR_IN | USB_TYPE_VENDOR |
100 if (unlikely(ret < 0))
101 netdev_warn(dev->net,
102 "Failed to read reg index 0x%08x: %d", index, ret);
110 static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
121 ret = usbnet_write_cmd(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
122 USB_DIR_OUT | USB_TYPE_VENDOR |
125 if (unlikely(ret < 0))
126 netdev_warn(dev->net,
127 "Failed to write reg index 0x%08x: %d", index, ret);
132 static int smsc75xx_set_feature(struct usbnet *dev, u32 feature)
134 if (WARN_ON_ONCE(!dev))
137 cpu_to_le32s(&feature);
139 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
140 USB_REQ_SET_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
141 USB_CTRL_SET_TIMEOUT);
144 static int smsc75xx_clear_feature(struct usbnet *dev, u32 feature)
146 if (WARN_ON_ONCE(!dev))
149 cpu_to_le32s(&feature);
151 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
152 USB_REQ_CLEAR_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
153 USB_CTRL_SET_TIMEOUT);
156 /* Loop until the read is completed with timeout
157 * called with phy_mutex held */
158 static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
160 unsigned long start_time = jiffies;
165 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
166 check_warn_return(ret, "Error reading MII_ACCESS");
168 if (!(val & MII_ACCESS_BUSY))
170 } while (!time_after(jiffies, start_time + HZ));
175 static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
177 struct usbnet *dev = netdev_priv(netdev);
181 mutex_lock(&dev->phy_mutex);
183 /* confirm MII not busy */
184 ret = smsc75xx_phy_wait_not_busy(dev);
185 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
187 /* set the address, index & direction (read from PHY) */
188 phy_id &= dev->mii.phy_id_mask;
189 idx &= dev->mii.reg_num_mask;
190 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
191 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
192 | MII_ACCESS_READ | MII_ACCESS_BUSY;
193 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
194 check_warn_goto_done(ret, "Error writing MII_ACCESS");
196 ret = smsc75xx_phy_wait_not_busy(dev);
197 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
199 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
200 check_warn_goto_done(ret, "Error reading MII_DATA");
202 ret = (u16)(val & 0xFFFF);
205 mutex_unlock(&dev->phy_mutex);
209 static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
212 struct usbnet *dev = netdev_priv(netdev);
216 mutex_lock(&dev->phy_mutex);
218 /* confirm MII not busy */
219 ret = smsc75xx_phy_wait_not_busy(dev);
220 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
223 ret = smsc75xx_write_reg(dev, MII_DATA, val);
224 check_warn_goto_done(ret, "Error writing MII_DATA");
226 /* set the address, index & direction (write to PHY) */
227 phy_id &= dev->mii.phy_id_mask;
228 idx &= dev->mii.reg_num_mask;
229 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
230 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
231 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
232 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
233 check_warn_goto_done(ret, "Error writing MII_ACCESS");
235 ret = smsc75xx_phy_wait_not_busy(dev);
236 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
239 mutex_unlock(&dev->phy_mutex);
242 static int smsc75xx_wait_eeprom(struct usbnet *dev)
244 unsigned long start_time = jiffies;
249 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
250 check_warn_return(ret, "Error reading E2P_CMD");
252 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
255 } while (!time_after(jiffies, start_time + HZ));
257 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
258 netdev_warn(dev->net, "EEPROM read operation timeout");
265 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
267 unsigned long start_time = jiffies;
272 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
273 check_warn_return(ret, "Error reading E2P_CMD");
275 if (!(val & E2P_CMD_BUSY))
279 } while (!time_after(jiffies, start_time + HZ));
281 netdev_warn(dev->net, "EEPROM is busy");
285 static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
294 ret = smsc75xx_eeprom_confirm_not_busy(dev);
298 for (i = 0; i < length; i++) {
299 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
300 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
301 check_warn_return(ret, "Error writing E2P_CMD");
303 ret = smsc75xx_wait_eeprom(dev);
307 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
308 check_warn_return(ret, "Error reading E2P_DATA");
310 data[i] = val & 0xFF;
317 static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
326 ret = smsc75xx_eeprom_confirm_not_busy(dev);
330 /* Issue write/erase enable command */
331 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
332 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
333 check_warn_return(ret, "Error writing E2P_CMD");
335 ret = smsc75xx_wait_eeprom(dev);
339 for (i = 0; i < length; i++) {
341 /* Fill data register */
343 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
344 check_warn_return(ret, "Error writing E2P_DATA");
346 /* Send "write" command */
347 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
348 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
349 check_warn_return(ret, "Error writing E2P_CMD");
351 ret = smsc75xx_wait_eeprom(dev);
361 static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
365 for (i = 0; i < 100; i++) {
367 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
368 check_warn_return(ret, "Error reading DP_SEL");
370 if (dp_sel & DP_SEL_DPRDY)
376 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
381 static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
382 u32 length, u32 *buf)
384 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
388 mutex_lock(&pdata->dataport_mutex);
390 ret = smsc75xx_dataport_wait_not_busy(dev);
391 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
393 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
394 check_warn_goto_done(ret, "Error reading DP_SEL");
396 dp_sel &= ~DP_SEL_RSEL;
397 dp_sel |= ram_select;
398 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
399 check_warn_goto_done(ret, "Error writing DP_SEL");
401 for (i = 0; i < length; i++) {
402 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
403 check_warn_goto_done(ret, "Error writing DP_ADDR");
405 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
406 check_warn_goto_done(ret, "Error writing DP_DATA");
408 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
409 check_warn_goto_done(ret, "Error writing DP_CMD");
411 ret = smsc75xx_dataport_wait_not_busy(dev);
412 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
416 mutex_unlock(&pdata->dataport_mutex);
420 /* returns hash bit number for given MAC address */
421 static u32 smsc75xx_hash(char addr[ETH_ALEN])
423 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
426 static void smsc75xx_deferred_multicast_write(struct work_struct *param)
428 struct smsc75xx_priv *pdata =
429 container_of(param, struct smsc75xx_priv, set_multicast);
430 struct usbnet *dev = pdata->dev;
433 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
436 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
437 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
439 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
440 check_warn(ret, "Error writing RFE_CRL");
443 static void smsc75xx_set_multicast(struct net_device *netdev)
445 struct usbnet *dev = netdev_priv(netdev);
446 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
450 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
453 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
454 pdata->rfe_ctl |= RFE_CTL_AB;
456 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
457 pdata->multicast_hash_table[i] = 0;
459 if (dev->net->flags & IFF_PROMISC) {
460 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
461 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
462 } else if (dev->net->flags & IFF_ALLMULTI) {
463 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
464 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
465 } else if (!netdev_mc_empty(dev->net)) {
466 struct netdev_hw_addr *ha;
468 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
470 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
472 netdev_for_each_mc_addr(ha, netdev) {
473 u32 bitnum = smsc75xx_hash(ha->addr);
474 pdata->multicast_hash_table[bitnum / 32] |=
475 (1 << (bitnum % 32));
478 netif_dbg(dev, drv, dev->net, "receive own packets only");
479 pdata->rfe_ctl |= RFE_CTL_DPF;
482 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
484 /* defer register writes to a sleepable context */
485 schedule_work(&pdata->set_multicast);
488 static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
489 u16 lcladv, u16 rmtadv)
491 u32 flow = 0, fct_flow = 0;
494 if (duplex == DUPLEX_FULL) {
495 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
497 if (cap & FLOW_CTRL_TX) {
498 flow = (FLOW_TX_FCEN | 0xFFFF);
499 /* set fct_flow thresholds to 20% and 80% */
500 fct_flow = (8 << 8) | 32;
503 if (cap & FLOW_CTRL_RX)
504 flow |= FLOW_RX_FCEN;
506 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
507 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
508 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
510 netif_dbg(dev, link, dev->net, "half duplex");
513 ret = smsc75xx_write_reg(dev, FLOW, flow);
514 check_warn_return(ret, "Error writing FLOW");
516 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
517 check_warn_return(ret, "Error writing FCT_FLOW");
522 static int smsc75xx_link_reset(struct usbnet *dev)
524 struct mii_if_info *mii = &dev->mii;
525 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
529 /* write to clear phy interrupt status */
530 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
531 PHY_INT_SRC_CLEAR_ALL);
533 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
534 check_warn_return(ret, "Error writing INT_STS");
536 mii_check_media(mii, 1, 1);
537 mii_ethtool_gset(&dev->mii, &ecmd);
538 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
539 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
541 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
542 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
543 ecmd.duplex, lcladv, rmtadv);
545 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
548 static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
552 if (urb->actual_length != 4) {
553 netdev_warn(dev->net,
554 "unexpected urb length %d", urb->actual_length);
558 memcpy(&intdata, urb->transfer_buffer, 4);
559 le32_to_cpus(&intdata);
561 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
563 if (intdata & INT_ENP_PHY_INT)
564 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
566 netdev_warn(dev->net,
567 "unexpected interrupt, intdata=0x%08X", intdata);
570 static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
572 return MAX_EEPROM_SIZE;
575 static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
576 struct ethtool_eeprom *ee, u8 *data)
578 struct usbnet *dev = netdev_priv(netdev);
580 ee->magic = LAN75XX_EEPROM_MAGIC;
582 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
585 static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
586 struct ethtool_eeprom *ee, u8 *data)
588 struct usbnet *dev = netdev_priv(netdev);
590 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
591 netdev_warn(dev->net,
592 "EEPROM: magic value mismatch: 0x%x", ee->magic);
596 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
599 static void smsc75xx_ethtool_get_wol(struct net_device *net,
600 struct ethtool_wolinfo *wolinfo)
602 struct usbnet *dev = netdev_priv(net);
603 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
605 wolinfo->supported = SUPPORTED_WAKE;
606 wolinfo->wolopts = pdata->wolopts;
609 static int smsc75xx_ethtool_set_wol(struct net_device *net,
610 struct ethtool_wolinfo *wolinfo)
612 struct usbnet *dev = netdev_priv(net);
613 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
615 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
619 static const struct ethtool_ops smsc75xx_ethtool_ops = {
620 .get_link = usbnet_get_link,
621 .nway_reset = usbnet_nway_reset,
622 .get_drvinfo = usbnet_get_drvinfo,
623 .get_msglevel = usbnet_get_msglevel,
624 .set_msglevel = usbnet_set_msglevel,
625 .get_settings = usbnet_get_settings,
626 .set_settings = usbnet_set_settings,
627 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
628 .get_eeprom = smsc75xx_ethtool_get_eeprom,
629 .set_eeprom = smsc75xx_ethtool_set_eeprom,
630 .get_wol = smsc75xx_ethtool_get_wol,
631 .set_wol = smsc75xx_ethtool_set_wol,
634 static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
636 struct usbnet *dev = netdev_priv(netdev);
638 if (!netif_running(netdev))
641 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
644 static void smsc75xx_init_mac_address(struct usbnet *dev)
646 /* try reading mac address from EEPROM */
647 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
648 dev->net->dev_addr) == 0) {
649 if (is_valid_ether_addr(dev->net->dev_addr)) {
650 /* eeprom values are valid so use them */
651 netif_dbg(dev, ifup, dev->net,
652 "MAC address read from EEPROM");
657 /* no eeprom, or eeprom values are invalid. generate random MAC */
658 eth_hw_addr_random(dev->net);
659 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr");
662 static int smsc75xx_set_mac_address(struct usbnet *dev)
664 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
665 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
666 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
668 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
669 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
671 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
672 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
674 addr_hi |= ADDR_FILTX_FB_VALID;
675 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
676 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
678 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
679 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
684 static int smsc75xx_phy_initialize(struct usbnet *dev)
686 int bmcr, ret, timeout = 0;
688 /* Initialize MII structure */
689 dev->mii.dev = dev->net;
690 dev->mii.mdio_read = smsc75xx_mdio_read;
691 dev->mii.mdio_write = smsc75xx_mdio_write;
692 dev->mii.phy_id_mask = 0x1f;
693 dev->mii.reg_num_mask = 0x1f;
694 dev->mii.supports_gmii = 1;
695 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
697 /* reset phy and wait for reset to complete */
698 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
702 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
703 check_warn_return(bmcr, "Error reading MII_BMCR");
705 } while ((bmcr & BMCR_RESET) && (timeout < 100));
707 if (timeout >= 100) {
708 netdev_warn(dev->net, "timeout on PHY Reset");
712 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
713 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
714 ADVERTISE_PAUSE_ASYM);
715 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
718 /* read and write to clear phy interrupt status */
719 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
720 check_warn_return(ret, "Error reading PHY_INT_SRC");
721 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
723 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
724 PHY_INT_MASK_DEFAULT);
725 mii_nway_restart(&dev->mii);
727 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
731 static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
737 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
738 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
740 rxenabled = ((buf & MAC_RX_RXEN) != 0);
744 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
745 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
748 /* add 4 to size for FCS */
749 buf &= ~MAC_RX_MAX_SIZE;
750 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
752 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
753 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
757 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
758 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
764 static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
766 struct usbnet *dev = netdev_priv(netdev);
768 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
769 check_warn_return(ret, "Failed to set mac rx frame length");
771 return usbnet_change_mtu(netdev, new_mtu);
774 /* Enable or disable Rx checksum offload engine */
775 static int smsc75xx_set_features(struct net_device *netdev,
776 netdev_features_t features)
778 struct usbnet *dev = netdev_priv(netdev);
779 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
783 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
785 if (features & NETIF_F_RXCSUM)
786 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
788 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
790 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
791 /* it's racing here! */
793 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
794 check_warn_return(ret, "Error writing RFE_CTL");
799 static int smsc75xx_wait_ready(struct usbnet *dev)
805 int ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
806 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
808 if (buf & PMT_CTL_DEV_RDY)
813 } while (timeout < 100);
815 netdev_warn(dev->net, "timeout waiting for device ready");
819 static int smsc75xx_reset(struct usbnet *dev)
821 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
823 int ret = 0, timeout;
825 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
827 ret = smsc75xx_wait_ready(dev);
828 check_warn_return(ret, "device not ready in smsc75xx_reset");
830 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
831 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
835 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
836 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
841 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
842 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
844 } while ((buf & HW_CFG_LRST) && (timeout < 100));
846 if (timeout >= 100) {
847 netdev_warn(dev->net, "timeout on completion of Lite Reset");
851 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
853 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
854 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
856 buf |= PMT_CTL_PHY_RST;
858 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
859 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
864 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
865 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
867 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
869 if (timeout >= 100) {
870 netdev_warn(dev->net, "timeout waiting for PHY Reset");
874 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
876 smsc75xx_init_mac_address(dev);
878 ret = smsc75xx_set_mac_address(dev);
879 check_warn_return(ret, "Failed to set mac address");
881 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
883 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
884 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
886 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
890 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
891 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
893 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
894 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
896 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
897 "writing HW_CFG_BIR: 0x%08x", buf);
901 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
902 } else if (dev->udev->speed == USB_SPEED_HIGH) {
903 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
904 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
906 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
907 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
910 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
911 (ulong)dev->rx_urb_size);
913 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
914 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
916 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
917 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
919 netif_dbg(dev, ifup, dev->net,
920 "Read Value from BURST_CAP after writing: 0x%08x", buf);
922 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
923 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
925 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
926 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
928 netif_dbg(dev, ifup, dev->net,
929 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
932 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
933 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
935 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
937 buf |= (HW_CFG_MEF | HW_CFG_BCE);
939 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
940 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
942 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
943 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
945 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
949 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
950 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
951 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
953 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
955 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
956 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
957 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
959 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
961 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
962 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
964 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
965 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
967 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
969 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
970 check_warn_return(ret, "Failed to read E2P_CMD: %d", ret);
972 /* only set default GPIO/LED settings if no EEPROM is detected */
973 if (!(buf & E2P_CMD_LOADED)) {
974 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
975 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
977 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
978 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
980 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
981 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
984 ret = smsc75xx_write_reg(dev, FLOW, 0);
985 check_warn_return(ret, "Failed to write FLOW: %d", ret);
987 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
988 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
990 /* Don't need rfe_ctl_lock during initialisation */
991 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
992 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
994 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
996 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
997 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
999 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1000 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
1002 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
1004 /* Enable or disable checksum offload engines */
1005 smsc75xx_set_features(dev->net, dev->net->features);
1007 smsc75xx_set_multicast(dev->net);
1009 ret = smsc75xx_phy_initialize(dev);
1010 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
1012 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1013 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
1015 /* enable PHY interrupts */
1016 buf |= INT_ENP_PHY_INT;
1018 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1019 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
1021 /* allow mac to detect speed and duplex from phy */
1022 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1023 check_warn_return(ret, "Failed to read MAC_CR: %d", ret);
1025 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1026 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1027 check_warn_return(ret, "Failed to write MAC_CR: %d", ret);
1029 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1030 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
1034 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1035 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
1037 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
1039 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1040 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
1042 buf |= FCT_TX_CTL_EN;
1044 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1045 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
1047 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
1049 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
1050 check_warn_return(ret, "Failed to set max rx frame length");
1052 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1053 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
1057 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1058 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
1060 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
1062 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1063 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
1065 buf |= FCT_RX_CTL_EN;
1067 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1068 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
1070 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
1072 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
1076 static const struct net_device_ops smsc75xx_netdev_ops = {
1077 .ndo_open = usbnet_open,
1078 .ndo_stop = usbnet_stop,
1079 .ndo_start_xmit = usbnet_start_xmit,
1080 .ndo_tx_timeout = usbnet_tx_timeout,
1081 .ndo_change_mtu = smsc75xx_change_mtu,
1082 .ndo_set_mac_address = eth_mac_addr,
1083 .ndo_validate_addr = eth_validate_addr,
1084 .ndo_do_ioctl = smsc75xx_ioctl,
1085 .ndo_set_rx_mode = smsc75xx_set_multicast,
1086 .ndo_set_features = smsc75xx_set_features,
1089 static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1091 struct smsc75xx_priv *pdata = NULL;
1094 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1096 ret = usbnet_get_endpoints(dev, intf);
1097 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1099 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1102 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1104 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1110 spin_lock_init(&pdata->rfe_ctl_lock);
1111 mutex_init(&pdata->dataport_mutex);
1113 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1115 if (DEFAULT_TX_CSUM_ENABLE) {
1116 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1117 if (DEFAULT_TSO_ENABLE)
1118 dev->net->features |= NETIF_F_SG |
1119 NETIF_F_TSO | NETIF_F_TSO6;
1121 if (DEFAULT_RX_CSUM_ENABLE)
1122 dev->net->features |= NETIF_F_RXCSUM;
1124 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1125 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1127 /* Init all registers */
1128 ret = smsc75xx_reset(dev);
1130 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1131 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1132 dev->net->flags |= IFF_MULTICAST;
1133 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1134 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1138 static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1140 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1142 netif_dbg(dev, ifdown, dev->net, "free pdata");
1149 static u16 smsc_crc(const u8 *buffer, size_t len)
1151 return bitrev16(crc16(0xFFFF, buffer, len));
1154 static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1157 int cfg_base = WUF_CFGX + filter * 4;
1158 int mask_base = WUF_MASKX + filter * 16;
1161 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
1162 check_warn_return(ret, "Error writing WUF_CFGX");
1164 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
1165 check_warn_return(ret, "Error writing WUF_MASKX");
1167 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
1168 check_warn_return(ret, "Error writing WUF_MASKX");
1170 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
1171 check_warn_return(ret, "Error writing WUF_MASKX");
1173 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
1174 check_warn_return(ret, "Error writing WUF_MASKX");
1179 static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1181 struct usbnet *dev = usb_get_intfdata(intf);
1182 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1186 ret = usbnet_suspend(intf, message);
1187 check_warn_return(ret, "usbnet_suspend error");
1189 /* if no wol options set, enter lowest power SUSPEND2 mode */
1190 if (!(pdata->wolopts & SUPPORTED_WAKE)) {
1191 netdev_info(dev->net, "entering SUSPEND2 mode");
1193 /* disable energy detect (link up) & wake up events */
1194 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1195 check_warn_return(ret, "Error reading WUCSR");
1197 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1199 ret = smsc75xx_write_reg(dev, WUCSR, val);
1200 check_warn_return(ret, "Error writing WUCSR");
1202 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1203 check_warn_return(ret, "Error reading PMT_CTL");
1205 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1207 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1208 check_warn_return(ret, "Error writing PMT_CTL");
1210 /* enter suspend2 mode */
1211 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1212 check_warn_return(ret, "Error reading PMT_CTL");
1214 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1215 val |= PMT_CTL_SUS_MODE_2;
1217 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1218 check_warn_return(ret, "Error writing PMT_CTL");
1223 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1226 /* disable all filters */
1227 for (i = 0; i < WUF_NUM; i++) {
1228 ret = smsc75xx_write_reg(dev, WUF_CFGX + i * 4, 0);
1229 check_warn_return(ret, "Error writing WUF_CFGX");
1232 if (pdata->wolopts & WAKE_MCAST) {
1233 const u8 mcast[] = {0x01, 0x00, 0x5E};
1234 netdev_info(dev->net, "enabling multicast detection");
1236 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1237 | smsc_crc(mcast, 3);
1238 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
1239 check_warn_return(ret, "Error writing wakeup filter");
1242 if (pdata->wolopts & WAKE_ARP) {
1243 const u8 arp[] = {0x08, 0x06};
1244 netdev_info(dev->net, "enabling ARP detection");
1246 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1248 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
1249 check_warn_return(ret, "Error writing wakeup filter");
1252 /* clear any pending pattern match packet status */
1253 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1254 check_warn_return(ret, "Error reading WUCSR");
1258 ret = smsc75xx_write_reg(dev, WUCSR, val);
1259 check_warn_return(ret, "Error writing WUCSR");
1261 netdev_info(dev->net, "enabling packet match detection");
1262 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1263 check_warn_return(ret, "Error reading WUCSR");
1267 ret = smsc75xx_write_reg(dev, WUCSR, val);
1268 check_warn_return(ret, "Error writing WUCSR");
1270 netdev_info(dev->net, "disabling packet match detection");
1271 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1272 check_warn_return(ret, "Error reading WUCSR");
1276 ret = smsc75xx_write_reg(dev, WUCSR, val);
1277 check_warn_return(ret, "Error writing WUCSR");
1280 /* disable magic, bcast & unicast wakeup sources */
1281 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1282 check_warn_return(ret, "Error reading WUCSR");
1284 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1286 ret = smsc75xx_write_reg(dev, WUCSR, val);
1287 check_warn_return(ret, "Error writing WUCSR");
1289 if (pdata->wolopts & WAKE_MAGIC) {
1290 netdev_info(dev->net, "enabling magic packet wakeup");
1291 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1292 check_warn_return(ret, "Error reading WUCSR");
1294 /* clear any pending magic packet status */
1295 val |= WUCSR_MPR | WUCSR_MPEN;
1297 ret = smsc75xx_write_reg(dev, WUCSR, val);
1298 check_warn_return(ret, "Error writing WUCSR");
1301 if (pdata->wolopts & WAKE_BCAST) {
1302 netdev_info(dev->net, "enabling broadcast detection");
1303 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1304 check_warn_return(ret, "Error reading WUCSR");
1306 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
1308 ret = smsc75xx_write_reg(dev, WUCSR, val);
1309 check_warn_return(ret, "Error writing WUCSR");
1312 if (pdata->wolopts & WAKE_UCAST) {
1313 netdev_info(dev->net, "enabling unicast detection");
1314 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1315 check_warn_return(ret, "Error reading WUCSR");
1317 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
1319 ret = smsc75xx_write_reg(dev, WUCSR, val);
1320 check_warn_return(ret, "Error writing WUCSR");
1323 /* enable receiver to enable frame reception */
1324 ret = smsc75xx_read_reg(dev, MAC_RX, &val);
1325 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
1329 ret = smsc75xx_write_reg(dev, MAC_RX, val);
1330 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
1332 /* some wol options are enabled, so enter SUSPEND0 */
1333 netdev_info(dev->net, "entering SUSPEND0 mode");
1335 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1336 check_warn_return(ret, "Error reading PMT_CTL");
1338 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1339 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1341 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1342 check_warn_return(ret, "Error writing PMT_CTL");
1344 smsc75xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1349 static int smsc75xx_resume(struct usb_interface *intf)
1351 struct usbnet *dev = usb_get_intfdata(intf);
1352 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1356 if (pdata->wolopts) {
1357 netdev_info(dev->net, "resuming from SUSPEND0");
1359 smsc75xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1361 /* Disable wakeup sources */
1362 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1363 check_warn_return(ret, "Error reading WUCSR");
1365 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
1368 ret = smsc75xx_write_reg(dev, WUCSR, val);
1369 check_warn_return(ret, "Error writing WUCSR");
1371 /* clear wake-up status */
1372 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1373 check_warn_return(ret, "Error reading PMT_CTL");
1375 val &= ~PMT_CTL_WOL_EN;
1376 val |= PMT_CTL_WUPS;
1378 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1379 check_warn_return(ret, "Error writing PMT_CTL");
1381 netdev_info(dev->net, "resuming from SUSPEND2");
1383 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1384 check_warn_return(ret, "Error reading PMT_CTL");
1386 val |= PMT_CTL_PHY_PWRUP;
1388 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1389 check_warn_return(ret, "Error writing PMT_CTL");
1392 ret = smsc75xx_wait_ready(dev);
1393 check_warn_return(ret, "device not ready in smsc75xx_resume");
1395 return usbnet_resume(intf);
1398 static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1399 u32 rx_cmd_a, u32 rx_cmd_b)
1401 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1402 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1403 skb->ip_summed = CHECKSUM_NONE;
1405 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1406 skb->ip_summed = CHECKSUM_COMPLETE;
1410 static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1412 while (skb->len > 0) {
1413 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1414 struct sk_buff *ax_skb;
1415 unsigned char *packet;
1417 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1418 le32_to_cpus(&rx_cmd_a);
1421 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1422 le32_to_cpus(&rx_cmd_b);
1423 skb_pull(skb, 4 + RXW_PADDING);
1427 /* get the packet length */
1428 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
1429 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
1431 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1432 netif_dbg(dev, rx_err, dev->net,
1433 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1434 dev->net->stats.rx_errors++;
1435 dev->net->stats.rx_dropped++;
1437 if (rx_cmd_a & RX_CMD_A_FCS)
1438 dev->net->stats.rx_crc_errors++;
1439 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1440 dev->net->stats.rx_frame_errors++;
1442 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1443 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1444 netif_dbg(dev, rx_err, dev->net,
1445 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1449 /* last frame in this batch */
1450 if (skb->len == size) {
1451 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1454 skb_trim(skb, skb->len - 4); /* remove fcs */
1455 skb->truesize = size + sizeof(struct sk_buff);
1460 ax_skb = skb_clone(skb, GFP_ATOMIC);
1461 if (unlikely(!ax_skb)) {
1462 netdev_warn(dev->net, "Error allocating skb");
1467 ax_skb->data = packet;
1468 skb_set_tail_pointer(ax_skb, size);
1470 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1473 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1474 ax_skb->truesize = size + sizeof(struct sk_buff);
1476 usbnet_skb_return(dev, ax_skb);
1479 skb_pull(skb, size);
1481 /* padding bytes before the next frame starts */
1483 skb_pull(skb, align_count);
1486 if (unlikely(skb->len < 0)) {
1487 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1494 static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1495 struct sk_buff *skb, gfp_t flags)
1497 u32 tx_cmd_a, tx_cmd_b;
1501 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1502 struct sk_buff *skb2 =
1503 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1504 dev_kfree_skb_any(skb);
1510 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1512 if (skb->ip_summed == CHECKSUM_PARTIAL)
1513 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1515 if (skb_is_gso(skb)) {
1516 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1517 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1519 tx_cmd_a |= TX_CMD_A_LSO;
1525 cpu_to_le32s(&tx_cmd_b);
1526 memcpy(skb->data, &tx_cmd_b, 4);
1529 cpu_to_le32s(&tx_cmd_a);
1530 memcpy(skb->data, &tx_cmd_a, 4);
1535 static const struct driver_info smsc75xx_info = {
1536 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1537 .bind = smsc75xx_bind,
1538 .unbind = smsc75xx_unbind,
1539 .link_reset = smsc75xx_link_reset,
1540 .reset = smsc75xx_reset,
1541 .rx_fixup = smsc75xx_rx_fixup,
1542 .tx_fixup = smsc75xx_tx_fixup,
1543 .status = smsc75xx_status,
1544 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1547 static const struct usb_device_id products[] = {
1549 /* SMSC7500 USB Gigabit Ethernet Device */
1550 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1551 .driver_info = (unsigned long) &smsc75xx_info,
1554 /* SMSC7500 USB Gigabit Ethernet Device */
1555 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1556 .driver_info = (unsigned long) &smsc75xx_info,
1560 MODULE_DEVICE_TABLE(usb, products);
1562 static struct usb_driver smsc75xx_driver = {
1563 .name = SMSC_CHIPNAME,
1564 .id_table = products,
1565 .probe = usbnet_probe,
1566 .suspend = smsc75xx_suspend,
1567 .resume = smsc75xx_resume,
1568 .reset_resume = smsc75xx_resume,
1569 .disconnect = usbnet_disconnect,
1570 .disable_hub_initiated_lpm = 1,
1573 module_usb_driver(smsc75xx_driver);
1575 MODULE_AUTHOR("Nancy Lin");
1576 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
1577 MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1578 MODULE_LICENSE("GPL");