2 * Linux driver for VMware's vmxnet3 ethernet NIC.
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
27 #include <net/ip6_checksum.h>
29 #include "vmxnet3_int.h"
31 char vmxnet3_driver_name[] = "vmxnet3";
32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
36 * Last entry must be all 0s
38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
45 static atomic_t devices_found;
49 * Enable/Disable the given intr
52 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
54 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
59 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
61 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
66 * Enable/Disable all intrs used by the device
69 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
73 for (i = 0; i < adapter->intr.num_intrs; i++)
74 vmxnet3_enable_intr(adapter, i);
79 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
83 for (i = 0; i < adapter->intr.num_intrs; i++)
84 vmxnet3_disable_intr(adapter, i);
89 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
91 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
96 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
98 return netif_queue_stopped(adapter->netdev);
103 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
106 netif_start_queue(adapter->netdev);
111 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
114 netif_wake_queue(adapter->netdev);
119 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
123 netif_stop_queue(adapter->netdev);
128 * Check the link state. This may start or stop the tx queue.
131 vmxnet3_check_link(struct vmxnet3_adapter *adapter)
135 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
136 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
137 adapter->link_speed = ret >> 16;
138 if (ret & 1) { /* Link is up. */
139 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
140 adapter->netdev->name, adapter->link_speed);
141 if (!netif_carrier_ok(adapter->netdev))
142 netif_carrier_on(adapter->netdev);
144 vmxnet3_tq_start(&adapter->tx_queue, adapter);
146 printk(KERN_INFO "%s: NIC Link is Down\n",
147 adapter->netdev->name);
148 if (netif_carrier_ok(adapter->netdev))
149 netif_carrier_off(adapter->netdev);
151 vmxnet3_tq_stop(&adapter->tx_queue, adapter);
156 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
158 u32 events = le32_to_cpu(adapter->shared->ecr);
162 vmxnet3_ack_events(adapter, events);
164 /* Check if link state has changed */
165 if (events & VMXNET3_ECR_LINK)
166 vmxnet3_check_link(adapter);
168 /* Check if there is an error on xmit/recv queues */
169 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
170 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
171 VMXNET3_CMD_GET_QUEUE_STATUS);
173 if (adapter->tqd_start->status.stopped) {
174 printk(KERN_ERR "%s: tq error 0x%x\n",
175 adapter->netdev->name,
176 le32_to_cpu(adapter->tqd_start->status.error));
178 if (adapter->rqd_start->status.stopped) {
179 printk(KERN_ERR "%s: rq error 0x%x\n",
180 adapter->netdev->name,
181 adapter->rqd_start->status.error);
184 schedule_work(&adapter->work);
188 #ifdef __BIG_ENDIAN_BITFIELD
190 * The device expects the bitfields in shared structures to be written in
191 * little endian. When CPU is big endian, the following routines are used to
192 * correctly read and write into ABI.
193 * The general technique used here is : double word bitfields are defined in
194 * opposite order for big endian architecture. Then before reading them in
195 * driver the complete double word is translated using le32_to_cpu. Similarly
196 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
197 * double words into required format.
198 * In order to avoid touching bits in shared structure more than once, temporary
199 * descriptors are used. These are passed as srcDesc to following functions.
201 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
202 struct Vmxnet3_RxDesc *dstDesc)
204 u32 *src = (u32 *)srcDesc + 2;
205 u32 *dst = (u32 *)dstDesc + 2;
206 dstDesc->addr = le64_to_cpu(srcDesc->addr);
207 *dst = le32_to_cpu(*src);
208 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
211 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
212 struct Vmxnet3_TxDesc *dstDesc)
215 u32 *src = (u32 *)(srcDesc + 1);
216 u32 *dst = (u32 *)(dstDesc + 1);
218 /* Working backwards so that the gen bit is set at the end. */
219 for (i = 2; i > 0; i--) {
222 *dst = cpu_to_le32(*src);
227 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
228 struct Vmxnet3_RxCompDesc *dstDesc)
231 u32 *src = (u32 *)srcDesc;
232 u32 *dst = (u32 *)dstDesc;
233 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
234 *dst = le32_to_cpu(*src);
241 /* Used to read bitfield values from double words. */
242 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
244 u32 temp = le32_to_cpu(*bitfield);
245 u32 mask = ((1 << size) - 1) << pos;
253 #endif /* __BIG_ENDIAN_BITFIELD */
255 #ifdef __BIG_ENDIAN_BITFIELD
257 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
258 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
259 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
260 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
261 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
262 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
263 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
264 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
265 VMXNET3_TCD_GEN_SIZE)
266 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
267 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
268 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
270 vmxnet3_RxCompToCPU((rcd), (tmp)); \
272 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
274 vmxnet3_RxDescToCPU((rxd), (tmp)); \
279 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
280 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
281 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
282 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
283 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
284 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
286 #endif /* __BIG_ENDIAN_BITFIELD */
290 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
291 struct pci_dev *pdev)
293 if (tbi->map_type == VMXNET3_MAP_SINGLE)
294 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
296 else if (tbi->map_type == VMXNET3_MAP_PAGE)
297 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
300 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
302 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
307 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
308 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
313 /* no out of order completion */
314 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
315 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
317 skb = tq->buf_info[eop_idx].skb;
319 tq->buf_info[eop_idx].skb = NULL;
321 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
323 while (tq->tx_ring.next2comp != eop_idx) {
324 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
327 /* update next2comp w/o tx_lock. Since we are marking more,
328 * instead of less, tx ring entries avail, the worst case is
329 * that the tx routine incorrectly re-queues a pkt due to
330 * insufficient tx ring entries.
332 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
336 dev_kfree_skb_any(skb);
342 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
343 struct vmxnet3_adapter *adapter)
346 union Vmxnet3_GenericDesc *gdesc;
348 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
349 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
350 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
351 &gdesc->tcd), tq, adapter->pdev,
354 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
355 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
359 spin_lock(&tq->tx_lock);
360 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
361 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
362 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
363 netif_carrier_ok(adapter->netdev))) {
364 vmxnet3_tq_wake(tq, adapter);
366 spin_unlock(&tq->tx_lock);
373 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
374 struct vmxnet3_adapter *adapter)
378 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
379 struct vmxnet3_tx_buf_info *tbi;
380 union Vmxnet3_GenericDesc *gdesc;
382 tbi = tq->buf_info + tq->tx_ring.next2comp;
383 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
385 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
387 dev_kfree_skb_any(tbi->skb);
390 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
393 /* sanity check, verify all buffers are indeed unmapped and freed */
394 for (i = 0; i < tq->tx_ring.size; i++) {
395 BUG_ON(tq->buf_info[i].skb != NULL ||
396 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
399 tq->tx_ring.gen = VMXNET3_INIT_GEN;
400 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
402 tq->comp_ring.gen = VMXNET3_INIT_GEN;
403 tq->comp_ring.next2proc = 0;
408 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
409 struct vmxnet3_adapter *adapter)
411 if (tq->tx_ring.base) {
412 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
413 sizeof(struct Vmxnet3_TxDesc),
414 tq->tx_ring.base, tq->tx_ring.basePA);
415 tq->tx_ring.base = NULL;
417 if (tq->data_ring.base) {
418 pci_free_consistent(adapter->pdev, tq->data_ring.size *
419 sizeof(struct Vmxnet3_TxDataDesc),
420 tq->data_ring.base, tq->data_ring.basePA);
421 tq->data_ring.base = NULL;
423 if (tq->comp_ring.base) {
424 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
425 sizeof(struct Vmxnet3_TxCompDesc),
426 tq->comp_ring.base, tq->comp_ring.basePA);
427 tq->comp_ring.base = NULL;
435 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
436 struct vmxnet3_adapter *adapter)
440 /* reset the tx ring contents to 0 and reset the tx ring states */
441 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
442 sizeof(struct Vmxnet3_TxDesc));
443 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
444 tq->tx_ring.gen = VMXNET3_INIT_GEN;
446 memset(tq->data_ring.base, 0, tq->data_ring.size *
447 sizeof(struct Vmxnet3_TxDataDesc));
449 /* reset the tx comp ring contents to 0 and reset comp ring states */
450 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
451 sizeof(struct Vmxnet3_TxCompDesc));
452 tq->comp_ring.next2proc = 0;
453 tq->comp_ring.gen = VMXNET3_INIT_GEN;
455 /* reset the bookkeeping data */
456 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
457 for (i = 0; i < tq->tx_ring.size; i++)
458 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
460 /* stats are not reset */
465 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
466 struct vmxnet3_adapter *adapter)
468 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
469 tq->comp_ring.base || tq->buf_info);
471 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
472 * sizeof(struct Vmxnet3_TxDesc),
473 &tq->tx_ring.basePA);
474 if (!tq->tx_ring.base) {
475 printk(KERN_ERR "%s: failed to allocate tx ring\n",
476 adapter->netdev->name);
480 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
482 sizeof(struct Vmxnet3_TxDataDesc),
483 &tq->data_ring.basePA);
484 if (!tq->data_ring.base) {
485 printk(KERN_ERR "%s: failed to allocate data ring\n",
486 adapter->netdev->name);
490 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
492 sizeof(struct Vmxnet3_TxCompDesc),
493 &tq->comp_ring.basePA);
494 if (!tq->comp_ring.base) {
495 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
496 adapter->netdev->name);
500 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
503 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
504 adapter->netdev->name);
511 vmxnet3_tq_destroy(tq, adapter);
517 * starting from ring->next2fill, allocate rx buffers for the given ring
518 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
519 * are allocated or allocation fails
523 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
524 int num_to_alloc, struct vmxnet3_adapter *adapter)
526 int num_allocated = 0;
527 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
528 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
531 while (num_allocated < num_to_alloc) {
532 struct vmxnet3_rx_buf_info *rbi;
533 union Vmxnet3_GenericDesc *gd;
535 rbi = rbi_base + ring->next2fill;
536 gd = ring->base + ring->next2fill;
538 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
539 if (rbi->skb == NULL) {
540 rbi->skb = dev_alloc_skb(rbi->len +
542 if (unlikely(rbi->skb == NULL)) {
543 rq->stats.rx_buf_alloc_failure++;
546 rbi->skb->dev = adapter->netdev;
548 skb_reserve(rbi->skb, NET_IP_ALIGN);
549 rbi->dma_addr = pci_map_single(adapter->pdev,
550 rbi->skb->data, rbi->len,
553 /* rx buffer skipped by the device */
555 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
557 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
558 rbi->len != PAGE_SIZE);
560 if (rbi->page == NULL) {
561 rbi->page = alloc_page(GFP_ATOMIC);
562 if (unlikely(rbi->page == NULL)) {
563 rq->stats.rx_buf_alloc_failure++;
566 rbi->dma_addr = pci_map_page(adapter->pdev,
567 rbi->page, 0, PAGE_SIZE,
570 /* rx buffers skipped by the device */
572 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
575 BUG_ON(rbi->dma_addr == 0);
576 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
577 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT)
581 vmxnet3_cmd_ring_adv_next2fill(ring);
583 rq->uncommitted[ring_idx] += num_allocated;
585 dev_dbg(&adapter->netdev->dev,
586 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
587 "%u, uncommited %u\n", num_allocated, ring->next2fill,
588 ring->next2comp, rq->uncommitted[ring_idx]);
590 /* so that the device can distinguish a full ring and an empty ring */
591 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
593 return num_allocated;
598 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
599 struct vmxnet3_rx_buf_info *rbi)
601 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
602 skb_shinfo(skb)->nr_frags;
604 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
606 frag->page = rbi->page;
607 frag->page_offset = 0;
608 frag->size = rcd->len;
609 skb->data_len += frag->size;
610 skb_shinfo(skb)->nr_frags++;
615 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
616 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
617 struct vmxnet3_adapter *adapter)
620 unsigned long buf_offset;
622 union Vmxnet3_GenericDesc *gdesc;
623 struct vmxnet3_tx_buf_info *tbi = NULL;
625 BUG_ON(ctx->copy_size > skb_headlen(skb));
627 /* use the previous gen bit for the SOP desc */
628 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
630 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
631 gdesc = ctx->sop_txd; /* both loops below can be skipped */
633 /* no need to map the buffer if headers are copied */
634 if (ctx->copy_size) {
635 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
636 tq->tx_ring.next2fill *
637 sizeof(struct Vmxnet3_TxDataDesc));
638 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
639 ctx->sop_txd->dword[3] = 0;
641 tbi = tq->buf_info + tq->tx_ring.next2fill;
642 tbi->map_type = VMXNET3_MAP_NONE;
644 dev_dbg(&adapter->netdev->dev,
645 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
646 tq->tx_ring.next2fill,
647 le64_to_cpu(ctx->sop_txd->txd.addr),
648 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
649 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
651 /* use the right gen for non-SOP desc */
652 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
655 /* linear part can use multiple tx desc if it's big */
656 len = skb_headlen(skb) - ctx->copy_size;
657 buf_offset = ctx->copy_size;
661 buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ?
662 VMXNET3_MAX_TX_BUF_SIZE : len;
664 tbi = tq->buf_info + tq->tx_ring.next2fill;
665 tbi->map_type = VMXNET3_MAP_SINGLE;
666 tbi->dma_addr = pci_map_single(adapter->pdev,
667 skb->data + buf_offset, buf_size,
670 tbi->len = buf_size; /* this automatically convert 2^14 to 0 */
672 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
673 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
675 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
676 gdesc->dword[2] = cpu_to_le32(dw2 | buf_size);
679 dev_dbg(&adapter->netdev->dev,
680 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
681 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
682 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
683 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
684 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
687 buf_offset += buf_size;
690 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
691 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
693 tbi = tq->buf_info + tq->tx_ring.next2fill;
694 tbi->map_type = VMXNET3_MAP_PAGE;
695 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
696 frag->page_offset, frag->size,
699 tbi->len = frag->size;
701 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
702 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
704 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
705 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
708 dev_dbg(&adapter->netdev->dev,
709 "txd[%u]: 0x%llu %u %u\n",
710 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
711 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
712 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
713 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
716 ctx->eop_txd = gdesc;
718 /* set the last buf_info for the pkt */
720 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
725 * parse and copy relevant protocol headers:
726 * For a tso pkt, relevant headers are L2/3/4 including options
727 * For a pkt requesting csum offloading, they are L2/3 and may include L4
728 * if it's a TCP/UDP pkt
731 * -1: error happens during parsing
732 * 0: protocol headers parsed, but too big to be copied
733 * 1: protocol headers parsed and copied
736 * 1. related *ctx fields are updated.
737 * 2. ctx->copy_size is # of bytes copied
738 * 3. the portion copied is guaranteed to be in the linear part
742 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
743 struct vmxnet3_tx_ctx *ctx,
744 struct vmxnet3_adapter *adapter)
746 struct Vmxnet3_TxDataDesc *tdd;
749 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
750 ctx->l4_hdr_size = ((struct tcphdr *)
751 skb_transport_header(skb))->doff * 4;
752 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
754 unsigned int pull_size;
756 if (skb->ip_summed == CHECKSUM_PARTIAL) {
757 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
760 struct iphdr *iph = (struct iphdr *)
761 skb_network_header(skb);
762 if (iph->protocol == IPPROTO_TCP) {
763 pull_size = ctx->eth_ip_hdr_size +
764 sizeof(struct tcphdr);
766 if (unlikely(!pskb_may_pull(skb,
770 ctx->l4_hdr_size = ((struct tcphdr *)
771 skb_transport_header(skb))->doff * 4;
772 } else if (iph->protocol == IPPROTO_UDP) {
774 sizeof(struct udphdr);
776 ctx->l4_hdr_size = 0;
779 /* for simplicity, don't copy L4 headers */
780 ctx->l4_hdr_size = 0;
782 ctx->copy_size = ctx->eth_ip_hdr_size +
785 ctx->eth_ip_hdr_size = 0;
786 ctx->l4_hdr_size = 0;
787 /* copy as much as allowed */
788 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
792 /* make sure headers are accessible directly */
793 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
797 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
798 tq->stats.oversized_hdr++;
803 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
805 memcpy(tdd->data, skb->data, ctx->copy_size);
806 dev_dbg(&adapter->netdev->dev,
807 "copy %u bytes to dataRing[%u]\n",
808 ctx->copy_size, tq->tx_ring.next2fill);
817 vmxnet3_prepare_tso(struct sk_buff *skb,
818 struct vmxnet3_tx_ctx *ctx)
820 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
822 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
824 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
827 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
828 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
835 * Transmits a pkt thru a given tq
837 * NETDEV_TX_OK: descriptors are setup successfully
838 * NETDEV_TX_OK: error occured, the pkt is dropped
839 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
842 * 1. tx ring may be changed
843 * 2. tq stats may be updated accordingly
844 * 3. shared->txNumDeferred may be updated
848 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
849 struct vmxnet3_adapter *adapter, struct net_device *netdev)
854 struct vmxnet3_tx_ctx ctx;
855 union Vmxnet3_GenericDesc *gdesc;
856 #ifdef __BIG_ENDIAN_BITFIELD
857 /* Use temporary descriptor to avoid touching bits multiple times */
858 union Vmxnet3_GenericDesc tempTxDesc;
861 /* conservatively estimate # of descriptors to use */
862 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
863 skb_shinfo(skb)->nr_frags + 1;
865 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP));
867 ctx.mss = skb_shinfo(skb)->gso_size;
869 if (skb_header_cloned(skb)) {
870 if (unlikely(pskb_expand_head(skb, 0, 0,
872 tq->stats.drop_tso++;
875 tq->stats.copy_skb_header++;
877 vmxnet3_prepare_tso(skb, &ctx);
879 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
881 /* non-tso pkts must not use more than
882 * VMXNET3_MAX_TXD_PER_PKT entries
884 if (skb_linearize(skb) != 0) {
885 tq->stats.drop_too_many_frags++;
888 tq->stats.linearized++;
890 /* recalculate the # of descriptors to use */
891 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
895 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
897 BUG_ON(ret <= 0 && ctx.copy_size != 0);
898 /* hdrs parsed, check against other limits */
900 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
901 VMXNET3_MAX_TX_BUF_SIZE)) {
905 if (skb->ip_summed == CHECKSUM_PARTIAL) {
906 if (unlikely(ctx.eth_ip_hdr_size +
908 VMXNET3_MAX_CSUM_OFFSET)) {
914 tq->stats.drop_hdr_inspect_err++;
918 spin_lock_irqsave(&tq->tx_lock, flags);
920 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
921 tq->stats.tx_ring_full++;
922 dev_dbg(&adapter->netdev->dev,
923 "tx queue stopped on %s, next2comp %u"
924 " next2fill %u\n", adapter->netdev->name,
925 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
927 vmxnet3_tq_stop(tq, adapter);
928 spin_unlock_irqrestore(&tq->tx_lock, flags);
929 return NETDEV_TX_BUSY;
932 /* fill tx descs related to addr & len */
933 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
935 /* setup the EOP desc */
936 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
938 /* setup the SOP desc */
939 #ifdef __BIG_ENDIAN_BITFIELD
941 gdesc->dword[2] = ctx.sop_txd->dword[2];
942 gdesc->dword[3] = ctx.sop_txd->dword[3];
947 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
948 gdesc->txd.om = VMXNET3_OM_TSO;
949 gdesc->txd.msscof = ctx.mss;
950 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
951 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
953 if (skb->ip_summed == CHECKSUM_PARTIAL) {
954 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
955 gdesc->txd.om = VMXNET3_OM_CSUM;
956 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
960 gdesc->txd.msscof = 0;
962 le32_add_cpu(&tq->shared->txNumDeferred, 1);
965 if (vlan_tx_tag_present(skb)) {
967 gdesc->txd.tci = vlan_tx_tag_get(skb);
970 /* finally flips the GEN bit of the SOP desc. */
971 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
973 #ifdef __BIG_ENDIAN_BITFIELD
974 /* Finished updating in bitfields of Tx Desc, so write them in original
977 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
978 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
981 dev_dbg(&adapter->netdev->dev,
982 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
983 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
984 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
985 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
987 spin_unlock_irqrestore(&tq->tx_lock, flags);
989 if (le32_to_cpu(tq->shared->txNumDeferred) >=
990 le32_to_cpu(tq->shared->txThreshold)) {
991 tq->shared->txNumDeferred = 0;
992 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD,
993 tq->tx_ring.next2fill);
999 tq->stats.drop_oversized_hdr++;
1001 tq->stats.drop_total++;
1003 return NETDEV_TX_OK;
1008 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1010 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1012 return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev);
1017 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1018 struct sk_buff *skb,
1019 union Vmxnet3_GenericDesc *gdesc)
1021 if (!gdesc->rcd.cnc && adapter->rxcsum) {
1022 /* typical case: TCP/UDP over IP and both csums are correct */
1023 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1024 VMXNET3_RCD_CSUM_OK) {
1025 skb->ip_summed = CHECKSUM_UNNECESSARY;
1026 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1027 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1028 BUG_ON(gdesc->rcd.frg);
1030 if (gdesc->rcd.csum) {
1031 skb->csum = htons(gdesc->rcd.csum);
1032 skb->ip_summed = CHECKSUM_PARTIAL;
1034 skb->ip_summed = CHECKSUM_NONE;
1038 skb->ip_summed = CHECKSUM_NONE;
1044 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1045 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1047 rq->stats.drop_err++;
1049 rq->stats.drop_fcs++;
1051 rq->stats.drop_total++;
1054 * We do not unmap and chain the rx buffer to the skb.
1055 * We basically pretend this buffer is not used and will be recycled
1056 * by vmxnet3_rq_alloc_rx_buf()
1060 * ctx->skb may be NULL if this is the first and the only one
1064 dev_kfree_skb_irq(ctx->skb);
1071 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1072 struct vmxnet3_adapter *adapter, int quota)
1074 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
1076 struct Vmxnet3_RxCompDesc *rcd;
1077 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1078 #ifdef __BIG_ENDIAN_BITFIELD
1079 struct Vmxnet3_RxDesc rxCmdDesc;
1080 struct Vmxnet3_RxCompDesc rxComp;
1082 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1084 while (rcd->gen == rq->comp_ring.gen) {
1085 struct vmxnet3_rx_buf_info *rbi;
1086 struct sk_buff *skb;
1088 struct Vmxnet3_RxDesc *rxd;
1091 if (num_rxd >= quota) {
1092 /* we may stop even before we see the EOP desc of
1100 ring_idx = rcd->rqID == rq->qid ? 0 : 1;
1101 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1103 rbi = rq->buf_info[ring_idx] + idx;
1105 BUG_ON(rxd->addr != rbi->dma_addr ||
1106 rxd->len != rbi->len);
1108 if (unlikely(rcd->eop && rcd->err)) {
1109 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1113 if (rcd->sop) { /* first buf of the pkt */
1114 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1115 rcd->rqID != rq->qid);
1117 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1118 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1120 if (unlikely(rcd->len == 0)) {
1121 /* Pretend the rx buffer is skipped. */
1122 BUG_ON(!(rcd->sop && rcd->eop));
1123 dev_dbg(&adapter->netdev->dev,
1124 "rxRing[%u][%u] 0 length\n",
1129 ctx->skb = rbi->skb;
1132 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1133 PCI_DMA_FROMDEVICE);
1135 skb_put(ctx->skb, rcd->len);
1137 BUG_ON(ctx->skb == NULL);
1138 /* non SOP buffer must be type 1 in most cases */
1139 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1140 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1143 pci_unmap_page(adapter->pdev,
1144 rbi->dma_addr, rbi->len,
1145 PCI_DMA_FROMDEVICE);
1147 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1152 * The only time a non-SOP buffer is type 0 is
1153 * when it's EOP and error flag is raised, which
1154 * has already been handled.
1162 skb->len += skb->data_len;
1163 skb->truesize += skb->data_len;
1165 vmxnet3_rx_csum(adapter, skb,
1166 (union Vmxnet3_GenericDesc *)rcd);
1167 skb->protocol = eth_type_trans(skb, adapter->netdev);
1169 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1170 vlan_hwaccel_receive_skb(skb,
1171 adapter->vlan_grp, rcd->tci);
1173 netif_receive_skb(skb);
1180 /* device may skip some rx descs */
1181 rq->rx_ring[ring_idx].next2comp = idx;
1182 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1183 rq->rx_ring[ring_idx].size);
1185 /* refill rx buffers frequently to avoid starving the h/w */
1186 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1188 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1189 ring_idx, adapter))) {
1190 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1193 /* if needed, update the register */
1194 if (unlikely(rq->shared->updateRxProd)) {
1195 VMXNET3_WRITE_BAR0_REG(adapter,
1196 rxprod_reg[ring_idx] + rq->qid * 8,
1197 rq->rx_ring[ring_idx].next2fill);
1198 rq->uncommitted[ring_idx] = 0;
1202 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1203 vmxnet3_getRxComp(rcd,
1204 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1212 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1213 struct vmxnet3_adapter *adapter)
1216 struct Vmxnet3_RxDesc *rxd;
1218 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1219 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1220 #ifdef __BIG_ENDIAN_BITFIELD
1221 struct Vmxnet3_RxDesc rxDesc;
1223 vmxnet3_getRxDesc(rxd,
1224 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1226 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1227 rq->buf_info[ring_idx][i].skb) {
1228 pci_unmap_single(adapter->pdev, rxd->addr,
1229 rxd->len, PCI_DMA_FROMDEVICE);
1230 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1231 rq->buf_info[ring_idx][i].skb = NULL;
1232 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1233 rq->buf_info[ring_idx][i].page) {
1234 pci_unmap_page(adapter->pdev, rxd->addr,
1235 rxd->len, PCI_DMA_FROMDEVICE);
1236 put_page(rq->buf_info[ring_idx][i].page);
1237 rq->buf_info[ring_idx][i].page = NULL;
1241 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1242 rq->rx_ring[ring_idx].next2fill =
1243 rq->rx_ring[ring_idx].next2comp = 0;
1244 rq->uncommitted[ring_idx] = 0;
1247 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1248 rq->comp_ring.next2proc = 0;
1252 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1253 struct vmxnet3_adapter *adapter)
1258 /* all rx buffers must have already been freed */
1259 for (i = 0; i < 2; i++) {
1260 if (rq->buf_info[i]) {
1261 for (j = 0; j < rq->rx_ring[i].size; j++)
1262 BUG_ON(rq->buf_info[i][j].page != NULL);
1267 kfree(rq->buf_info[0]);
1269 for (i = 0; i < 2; i++) {
1270 if (rq->rx_ring[i].base) {
1271 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1272 * sizeof(struct Vmxnet3_RxDesc),
1273 rq->rx_ring[i].base,
1274 rq->rx_ring[i].basePA);
1275 rq->rx_ring[i].base = NULL;
1277 rq->buf_info[i] = NULL;
1280 if (rq->comp_ring.base) {
1281 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1282 sizeof(struct Vmxnet3_RxCompDesc),
1283 rq->comp_ring.base, rq->comp_ring.basePA);
1284 rq->comp_ring.base = NULL;
1290 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1291 struct vmxnet3_adapter *adapter)
1295 /* initialize buf_info */
1296 for (i = 0; i < rq->rx_ring[0].size; i++) {
1298 /* 1st buf for a pkt is skbuff */
1299 if (i % adapter->rx_buf_per_pkt == 0) {
1300 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1301 rq->buf_info[0][i].len = adapter->skb_buf_size;
1302 } else { /* subsequent bufs for a pkt is frag */
1303 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1304 rq->buf_info[0][i].len = PAGE_SIZE;
1307 for (i = 0; i < rq->rx_ring[1].size; i++) {
1308 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1309 rq->buf_info[1][i].len = PAGE_SIZE;
1312 /* reset internal state and allocate buffers for both rings */
1313 for (i = 0; i < 2; i++) {
1314 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1315 rq->uncommitted[i] = 0;
1317 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1318 sizeof(struct Vmxnet3_RxDesc));
1319 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1321 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1323 /* at least has 1 rx buffer for the 1st ring */
1326 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1328 /* reset the comp ring */
1329 rq->comp_ring.next2proc = 0;
1330 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1331 sizeof(struct Vmxnet3_RxCompDesc));
1332 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1335 rq->rx_ctx.skb = NULL;
1337 /* stats are not reset */
1343 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1347 struct vmxnet3_rx_buf_info *bi;
1349 for (i = 0; i < 2; i++) {
1351 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1352 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1353 &rq->rx_ring[i].basePA);
1354 if (!rq->rx_ring[i].base) {
1355 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1356 adapter->netdev->name, i);
1361 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1362 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1363 &rq->comp_ring.basePA);
1364 if (!rq->comp_ring.base) {
1365 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1366 adapter->netdev->name);
1370 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1371 rq->rx_ring[1].size);
1372 bi = kzalloc(sz, GFP_KERNEL);
1374 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1375 adapter->netdev->name);
1378 rq->buf_info[0] = bi;
1379 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1384 vmxnet3_rq_destroy(rq, adapter);
1390 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1392 if (unlikely(adapter->shared->ecr))
1393 vmxnet3_process_events(adapter);
1395 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter);
1396 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget);
1401 vmxnet3_poll(struct napi_struct *napi, int budget)
1403 struct vmxnet3_adapter *adapter = container_of(napi,
1404 struct vmxnet3_adapter, napi);
1407 rxd_done = vmxnet3_do_poll(adapter, budget);
1409 if (rxd_done < budget) {
1410 napi_complete(napi);
1411 vmxnet3_enable_intr(adapter, 0);
1417 /* Interrupt handler for vmxnet3 */
1419 vmxnet3_intr(int irq, void *dev_id)
1421 struct net_device *dev = dev_id;
1422 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1424 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) {
1425 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1426 if (unlikely(icr == 0))
1432 /* disable intr if needed */
1433 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1434 vmxnet3_disable_intr(adapter, 0);
1436 napi_schedule(&adapter->napi);
1441 #ifdef CONFIG_NET_POLL_CONTROLLER
1444 /* netpoll callback. */
1446 vmxnet3_netpoll(struct net_device *netdev)
1448 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1451 #ifdef CONFIG_PCI_MSI
1452 if (adapter->intr.type == VMXNET3_IT_MSIX)
1453 irq = adapter->intr.msix_entries[0].vector;
1456 irq = adapter->pdev->irq;
1459 vmxnet3_intr(irq, netdev);
1465 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1469 #ifdef CONFIG_PCI_MSI
1470 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1471 /* we only use 1 MSI-X vector */
1472 err = request_irq(adapter->intr.msix_entries[0].vector,
1473 vmxnet3_intr, 0, adapter->netdev->name,
1475 } else if (adapter->intr.type == VMXNET3_IT_MSI) {
1476 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1477 adapter->netdev->name, adapter->netdev);
1481 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1482 IRQF_SHARED, adapter->netdev->name,
1487 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1488 ":%d\n", adapter->netdev->name, adapter->intr.type, err);
1493 /* init our intr settings */
1494 for (i = 0; i < adapter->intr.num_intrs; i++)
1495 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;
1497 /* next setup intr index for all intr sources */
1498 adapter->tx_queue.comp_ring.intr_idx = 0;
1499 adapter->rx_queue.comp_ring.intr_idx = 0;
1500 adapter->intr.event_intr_idx = 0;
1502 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1503 "allocated\n", adapter->netdev->name, adapter->intr.type,
1504 adapter->intr.mask_mode, adapter->intr.num_intrs);
1512 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1514 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO ||
1515 adapter->intr.num_intrs <= 0);
1517 switch (adapter->intr.type) {
1518 #ifdef CONFIG_PCI_MSI
1519 case VMXNET3_IT_MSIX:
1523 for (i = 0; i < adapter->intr.num_intrs; i++)
1524 free_irq(adapter->intr.msix_entries[i].vector,
1529 case VMXNET3_IT_MSI:
1530 free_irq(adapter->pdev->irq, adapter->netdev);
1532 case VMXNET3_IT_INTX:
1533 free_irq(adapter->pdev->irq, adapter->netdev);
1541 inline void set_flag_le16(__le16 *data, u16 flag)
1543 *data = cpu_to_le16(le16_to_cpu(*data) | flag);
1546 inline void set_flag_le64(__le64 *data, u64 flag)
1548 *data = cpu_to_le64(le64_to_cpu(*data) | flag);
1551 inline void reset_flag_le64(__le64 *data, u64 flag)
1553 *data = cpu_to_le64(le64_to_cpu(*data) & ~flag);
1558 vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1560 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1561 struct Vmxnet3_DriverShared *shared = adapter->shared;
1562 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1565 /* add vlan rx stripping. */
1566 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1568 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1569 adapter->vlan_grp = grp;
1571 /* update FEATURES to device */
1572 set_flag_le64(&devRead->misc.uptFeatures,
1574 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1575 VMXNET3_CMD_UPDATE_FEATURE);
1577 * Clear entire vfTable; then enable untagged pkts.
1578 * Note: setting one entry in vfTable to non-zero turns
1579 * on VLAN rx filtering.
1581 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1584 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1585 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1586 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1588 printk(KERN_ERR "%s: vlan_rx_register when device has "
1589 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1592 /* remove vlan rx stripping. */
1593 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1594 adapter->vlan_grp = NULL;
1596 if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) {
1599 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1600 /* clear entire vfTable; this also disables
1605 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1606 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1608 /* update FEATURES to device */
1609 reset_flag_le64(&devRead->misc.uptFeatures,
1611 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1612 VMXNET3_CMD_UPDATE_FEATURE);
1619 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1621 if (adapter->vlan_grp) {
1623 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1624 bool activeVlan = false;
1626 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1627 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1628 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1633 /* continue to allow untagged pkts */
1634 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1641 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1643 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1644 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1646 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1647 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1648 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1653 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1655 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1656 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1658 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1659 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1660 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1665 vmxnet3_copy_mc(struct net_device *netdev)
1668 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1670 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1672 /* We may be called with BH disabled */
1673 buf = kmalloc(sz, GFP_ATOMIC);
1675 struct netdev_hw_addr *ha;
1678 netdev_for_each_mc_addr(ha, netdev)
1679 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1688 vmxnet3_set_mc(struct net_device *netdev)
1690 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1691 struct Vmxnet3_RxFilterConf *rxConf =
1692 &adapter->shared->devRead.rxFilterConf;
1693 u8 *new_table = NULL;
1694 u32 new_mode = VMXNET3_RXM_UCAST;
1696 if (netdev->flags & IFF_PROMISC)
1697 new_mode |= VMXNET3_RXM_PROMISC;
1699 if (netdev->flags & IFF_BROADCAST)
1700 new_mode |= VMXNET3_RXM_BCAST;
1702 if (netdev->flags & IFF_ALLMULTI)
1703 new_mode |= VMXNET3_RXM_ALL_MULTI;
1705 if (!netdev_mc_empty(netdev)) {
1706 new_table = vmxnet3_copy_mc(netdev);
1708 new_mode |= VMXNET3_RXM_MCAST;
1709 rxConf->mfTableLen = cpu_to_le16(
1710 netdev_mc_count(netdev) * ETH_ALEN);
1711 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
1714 printk(KERN_INFO "%s: failed to copy mcast list"
1715 ", setting ALL_MULTI\n", netdev->name);
1716 new_mode |= VMXNET3_RXM_ALL_MULTI;
1721 if (!(new_mode & VMXNET3_RXM_MCAST)) {
1722 rxConf->mfTableLen = 0;
1723 rxConf->mfTablePA = 0;
1726 if (new_mode != rxConf->rxMode) {
1727 rxConf->rxMode = cpu_to_le32(new_mode);
1728 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1729 VMXNET3_CMD_UPDATE_RX_MODE);
1732 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1733 VMXNET3_CMD_UPDATE_MAC_FILTERS);
1740 * Set up driver_shared based on settings in adapter.
1744 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
1746 struct Vmxnet3_DriverShared *shared = adapter->shared;
1747 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1748 struct Vmxnet3_TxQueueConf *tqc;
1749 struct Vmxnet3_RxQueueConf *rqc;
1752 memset(shared, 0, sizeof(*shared));
1754 /* driver settings */
1755 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
1756 devRead->misc.driverInfo.version = cpu_to_le32(
1757 VMXNET3_DRIVER_VERSION_NUM);
1758 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
1759 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
1760 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
1761 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
1762 *((u32 *)&devRead->misc.driverInfo.gos));
1763 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
1764 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
1766 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
1767 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
1769 /* set up feature flags */
1770 if (adapter->rxcsum)
1771 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM);
1774 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO);
1775 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
1777 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
1778 adapter->vlan_grp) {
1779 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN);
1782 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
1783 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
1784 devRead->misc.queueDescLen = cpu_to_le32(
1785 sizeof(struct Vmxnet3_TxQueueDesc) +
1786 sizeof(struct Vmxnet3_RxQueueDesc));
1788 /* tx queue settings */
1789 BUG_ON(adapter->tx_queue.tx_ring.base == NULL);
1791 devRead->misc.numTxQueues = 1;
1792 tqc = &adapter->tqd_start->conf;
1793 tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA);
1794 tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA);
1795 tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA);
1796 tqc->ddPA = cpu_to_le64(virt_to_phys(
1797 adapter->tx_queue.buf_info));
1798 tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size);
1799 tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size);
1800 tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size);
1801 tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) *
1803 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx;
1805 /* rx queue settings */
1806 devRead->misc.numRxQueues = 1;
1807 rqc = &adapter->rqd_start->conf;
1808 rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA);
1809 rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA);
1810 rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA);
1811 rqc->ddPA = cpu_to_le64(virt_to_phys(
1812 adapter->rx_queue.buf_info));
1813 rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size);
1814 rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size);
1815 rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size);
1816 rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) *
1817 (rqc->rxRingSize[0] + rqc->rxRingSize[1]));
1818 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx;
1821 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
1823 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
1824 for (i = 0; i < adapter->intr.num_intrs; i++)
1825 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
1827 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
1829 /* rx filter settings */
1830 devRead->rxFilterConf.rxMode = 0;
1831 vmxnet3_restore_vlan(adapter);
1832 /* the rest are already zeroed */
1837 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
1842 dev_dbg(&adapter->netdev->dev,
1843 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes"
1844 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size,
1845 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size,
1846 adapter->rx_queue.rx_ring[0].size,
1847 adapter->rx_queue.rx_ring[1].size);
1849 vmxnet3_tq_init(&adapter->tx_queue, adapter);
1850 err = vmxnet3_rq_init(&adapter->rx_queue, adapter);
1852 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
1853 adapter->netdev->name, err);
1857 err = vmxnet3_request_irqs(adapter);
1859 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
1860 adapter->netdev->name, err);
1864 vmxnet3_setup_driver_shared(adapter);
1866 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
1867 adapter->shared_pa));
1868 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
1869 adapter->shared_pa));
1870 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1871 VMXNET3_CMD_ACTIVATE_DEV);
1872 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1875 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
1876 adapter->netdev->name, ret);
1880 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD,
1881 adapter->rx_queue.rx_ring[0].next2fill);
1882 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2,
1883 adapter->rx_queue.rx_ring[1].next2fill);
1885 /* Apply the rx filter settins last. */
1886 vmxnet3_set_mc(adapter->netdev);
1889 * Check link state when first activating device. It will start the
1890 * tx queue if the link is up.
1892 vmxnet3_check_link(adapter);
1894 napi_enable(&adapter->napi);
1895 vmxnet3_enable_all_intrs(adapter);
1896 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
1900 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
1901 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
1902 vmxnet3_free_irqs(adapter);
1905 /* free up buffers we allocated */
1906 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1912 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
1914 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
1919 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
1921 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
1925 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1926 VMXNET3_CMD_QUIESCE_DEV);
1927 vmxnet3_disable_all_intrs(adapter);
1929 napi_disable(&adapter->napi);
1930 netif_tx_disable(adapter->netdev);
1931 adapter->link_speed = 0;
1932 netif_carrier_off(adapter->netdev);
1934 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter);
1935 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1936 vmxnet3_free_irqs(adapter);
1942 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
1947 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
1949 tmp = (mac[5] << 8) | mac[4];
1950 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
1955 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
1957 struct sockaddr *addr = p;
1958 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1960 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1961 vmxnet3_write_mac_addr(adapter, addr->sa_data);
1967 /* ==================== initialization and cleanup routines ============ */
1970 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
1973 unsigned long mmio_start, mmio_len;
1974 struct pci_dev *pdev = adapter->pdev;
1976 err = pci_enable_device(pdev);
1978 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
1979 pci_name(pdev), err);
1983 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
1984 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
1985 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
1986 "for adapter %s\n", pci_name(pdev));
1992 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
1993 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
1994 "%s\n", pci_name(pdev));
2001 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2002 vmxnet3_driver_name);
2004 printk(KERN_ERR "Failed to request region for adapter %s: "
2005 "error %d\n", pci_name(pdev), err);
2009 pci_set_master(pdev);
2011 mmio_start = pci_resource_start(pdev, 0);
2012 mmio_len = pci_resource_len(pdev, 0);
2013 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2014 if (!adapter->hw_addr0) {
2015 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2021 mmio_start = pci_resource_start(pdev, 1);
2022 mmio_len = pci_resource_len(pdev, 1);
2023 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2024 if (!adapter->hw_addr1) {
2025 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2033 iounmap(adapter->hw_addr0);
2035 pci_release_selected_regions(pdev, (1 << 2) - 1);
2037 pci_disable_device(pdev);
2043 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2045 BUG_ON(!adapter->pdev);
2047 iounmap(adapter->hw_addr0);
2048 iounmap(adapter->hw_addr1);
2049 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2050 pci_disable_device(adapter->pdev);
2055 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2059 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2060 VMXNET3_MAX_ETH_HDR_SIZE) {
2061 adapter->skb_buf_size = adapter->netdev->mtu +
2062 VMXNET3_MAX_ETH_HDR_SIZE;
2063 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2064 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2066 adapter->rx_buf_per_pkt = 1;
2068 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2069 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2070 VMXNET3_MAX_ETH_HDR_SIZE;
2071 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2075 * for simplicity, force the ring0 size to be a multiple of
2076 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2078 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2079 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size +
2081 adapter->rx_queue.rx_ring[0].size = min_t(u32,
2082 adapter->rx_queue.rx_ring[0].size,
2083 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
2088 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2089 u32 rx_ring_size, u32 rx_ring2_size)
2093 adapter->tx_queue.tx_ring.size = tx_ring_size;
2094 adapter->tx_queue.data_ring.size = tx_ring_size;
2095 adapter->tx_queue.comp_ring.size = tx_ring_size;
2096 adapter->tx_queue.shared = &adapter->tqd_start->ctrl;
2097 adapter->tx_queue.stopped = true;
2098 err = vmxnet3_tq_create(&adapter->tx_queue, adapter);
2102 adapter->rx_queue.rx_ring[0].size = rx_ring_size;
2103 adapter->rx_queue.rx_ring[1].size = rx_ring2_size;
2104 vmxnet3_adjust_rx_ring_size(adapter);
2105 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size +
2106 adapter->rx_queue.rx_ring[1].size;
2107 adapter->rx_queue.qid = 0;
2108 adapter->rx_queue.qid2 = 1;
2109 adapter->rx_queue.shared = &adapter->rqd_start->ctrl;
2110 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2112 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2118 vmxnet3_open(struct net_device *netdev)
2120 struct vmxnet3_adapter *adapter;
2123 adapter = netdev_priv(netdev);
2125 spin_lock_init(&adapter->tx_queue.tx_lock);
2127 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2128 VMXNET3_DEF_RX_RING_SIZE,
2129 VMXNET3_DEF_RX_RING_SIZE);
2133 err = vmxnet3_activate_dev(adapter);
2140 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2141 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2148 vmxnet3_close(struct net_device *netdev)
2150 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2153 * Reset_work may be in the middle of resetting the device, wait for its
2156 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2159 vmxnet3_quiesce_dev(adapter);
2161 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2162 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2164 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2172 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2175 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2176 * vmxnet3_close() will deadlock.
2178 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2180 /* we need to enable NAPI, otherwise dev_close will deadlock */
2181 napi_enable(&adapter->napi);
2182 dev_close(adapter->netdev);
2187 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2189 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2192 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2195 if (new_mtu > 1500 && !adapter->jumbo_frame)
2198 netdev->mtu = new_mtu;
2201 * Reset_work may be in the middle of resetting the device, wait for its
2204 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2207 if (netif_running(netdev)) {
2208 vmxnet3_quiesce_dev(adapter);
2209 vmxnet3_reset_dev(adapter);
2211 /* we need to re-create the rx queue based on the new mtu */
2212 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2213 vmxnet3_adjust_rx_ring_size(adapter);
2214 adapter->rx_queue.comp_ring.size =
2215 adapter->rx_queue.rx_ring[0].size +
2216 adapter->rx_queue.rx_ring[1].size;
2217 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2219 printk(KERN_ERR "%s: failed to re-create rx queue,"
2220 " error %d. Closing it.\n", netdev->name, err);
2224 err = vmxnet3_activate_dev(adapter);
2226 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2227 "Closing it\n", netdev->name, err);
2233 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2235 vmxnet3_force_close(adapter);
2242 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2244 struct net_device *netdev = adapter->netdev;
2246 netdev->features = NETIF_F_SG |
2248 NETIF_F_HW_VLAN_TX |
2249 NETIF_F_HW_VLAN_RX |
2250 NETIF_F_HW_VLAN_FILTER |
2255 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2257 adapter->rxcsum = true;
2258 adapter->jumbo_frame = true;
2259 adapter->lro = true;
2262 netdev->features |= NETIF_F_HIGHDMA;
2266 netdev->vlan_features = netdev->features;
2272 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2276 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2279 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2280 mac[4] = tmp & 0xff;
2281 mac[5] = (tmp >> 8) & 0xff;
2286 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2291 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2292 VMXNET3_CMD_GET_CONF_INTR);
2293 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2294 adapter->intr.type = cfg & 0x3;
2295 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2297 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2300 #ifdef CONFIG_PCI_MSI
2301 adapter->intr.msix_entries[0].entry = 0;
2302 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2303 VMXNET3_LINUX_MAX_MSIX_VECT);
2305 adapter->intr.num_intrs = 1;
2306 adapter->intr.type = VMXNET3_IT_MSIX;
2311 err = pci_enable_msi(adapter->pdev);
2313 adapter->intr.num_intrs = 1;
2314 adapter->intr.type = VMXNET3_IT_MSI;
2319 adapter->intr.type = VMXNET3_IT_INTX;
2321 /* INT-X related setting */
2322 adapter->intr.num_intrs = 1;
2327 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2329 if (adapter->intr.type == VMXNET3_IT_MSIX)
2330 pci_disable_msix(adapter->pdev);
2331 else if (adapter->intr.type == VMXNET3_IT_MSI)
2332 pci_disable_msi(adapter->pdev);
2334 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2339 vmxnet3_tx_timeout(struct net_device *netdev)
2341 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2342 adapter->tx_timeout_count++;
2344 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2345 schedule_work(&adapter->work);
2350 vmxnet3_reset_work(struct work_struct *data)
2352 struct vmxnet3_adapter *adapter;
2354 adapter = container_of(data, struct vmxnet3_adapter, work);
2356 /* if another thread is resetting the device, no need to proceed */
2357 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2360 /* if the device is closed, we must leave it alone */
2361 if (netif_running(adapter->netdev)) {
2362 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2363 vmxnet3_quiesce_dev(adapter);
2364 vmxnet3_reset_dev(adapter);
2365 vmxnet3_activate_dev(adapter);
2367 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2370 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2374 static int __devinit
2375 vmxnet3_probe_device(struct pci_dev *pdev,
2376 const struct pci_device_id *id)
2378 static const struct net_device_ops vmxnet3_netdev_ops = {
2379 .ndo_open = vmxnet3_open,
2380 .ndo_stop = vmxnet3_close,
2381 .ndo_start_xmit = vmxnet3_xmit_frame,
2382 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2383 .ndo_change_mtu = vmxnet3_change_mtu,
2384 .ndo_get_stats = vmxnet3_get_stats,
2385 .ndo_tx_timeout = vmxnet3_tx_timeout,
2386 .ndo_set_multicast_list = vmxnet3_set_mc,
2387 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2388 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2389 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2390 #ifdef CONFIG_NET_POLL_CONTROLLER
2391 .ndo_poll_controller = vmxnet3_netpoll,
2395 bool dma64 = false; /* stupid gcc */
2397 struct net_device *netdev;
2398 struct vmxnet3_adapter *adapter;
2401 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter));
2403 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2404 "%s\n", pci_name(pdev));
2408 pci_set_drvdata(pdev, netdev);
2409 adapter = netdev_priv(netdev);
2410 adapter->netdev = netdev;
2411 adapter->pdev = pdev;
2413 adapter->shared = pci_alloc_consistent(adapter->pdev,
2414 sizeof(struct Vmxnet3_DriverShared),
2415 &adapter->shared_pa);
2416 if (!adapter->shared) {
2417 printk(KERN_ERR "Failed to allocate memory for %s\n",
2420 goto err_alloc_shared;
2423 adapter->tqd_start = pci_alloc_consistent(adapter->pdev,
2424 sizeof(struct Vmxnet3_TxQueueDesc) +
2425 sizeof(struct Vmxnet3_RxQueueDesc),
2426 &adapter->queue_desc_pa);
2428 if (!adapter->tqd_start) {
2429 printk(KERN_ERR "Failed to allocate memory for %s\n",
2432 goto err_alloc_queue_desc;
2434 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start
2437 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2438 if (adapter->pm_conf == NULL) {
2439 printk(KERN_ERR "Failed to allocate memory for %s\n",
2445 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2449 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2451 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2453 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2454 " %s\n", ver, pci_name(pdev));
2459 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2461 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2463 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2464 "adapter %s\n", ver, pci_name(pdev));
2469 vmxnet3_declare_features(adapter, dma64);
2471 adapter->dev_number = atomic_read(&devices_found);
2472 vmxnet3_alloc_intr_resources(adapter);
2474 vmxnet3_read_mac_addr(adapter, mac);
2475 memcpy(netdev->dev_addr, mac, netdev->addr_len);
2477 netdev->netdev_ops = &vmxnet3_netdev_ops;
2478 netdev->watchdog_timeo = 5 * HZ;
2479 vmxnet3_set_ethtool_ops(netdev);
2481 INIT_WORK(&adapter->work, vmxnet3_reset_work);
2483 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64);
2484 SET_NETDEV_DEV(netdev, &pdev->dev);
2485 err = register_netdev(netdev);
2488 printk(KERN_ERR "Failed to register adapter %s\n",
2493 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2494 atomic_inc(&devices_found);
2498 vmxnet3_free_intr_resources(adapter);
2500 vmxnet3_free_pci_resources(adapter);
2502 kfree(adapter->pm_conf);
2504 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2505 sizeof(struct Vmxnet3_RxQueueDesc),
2506 adapter->tqd_start, adapter->queue_desc_pa);
2507 err_alloc_queue_desc:
2508 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2509 adapter->shared, adapter->shared_pa);
2511 pci_set_drvdata(pdev, NULL);
2512 free_netdev(netdev);
2517 static void __devexit
2518 vmxnet3_remove_device(struct pci_dev *pdev)
2520 struct net_device *netdev = pci_get_drvdata(pdev);
2521 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2523 flush_scheduled_work();
2525 unregister_netdev(netdev);
2527 vmxnet3_free_intr_resources(adapter);
2528 vmxnet3_free_pci_resources(adapter);
2529 kfree(adapter->pm_conf);
2530 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2531 sizeof(struct Vmxnet3_RxQueueDesc),
2532 adapter->tqd_start, adapter->queue_desc_pa);
2533 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2534 adapter->shared, adapter->shared_pa);
2535 free_netdev(netdev);
2542 vmxnet3_suspend(struct device *device)
2544 struct pci_dev *pdev = to_pci_dev(device);
2545 struct net_device *netdev = pci_get_drvdata(pdev);
2546 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2547 struct Vmxnet3_PMConf *pmConf;
2548 struct ethhdr *ehdr;
2549 struct arphdr *ahdr;
2551 struct in_device *in_dev;
2552 struct in_ifaddr *ifa;
2555 if (!netif_running(netdev))
2558 vmxnet3_disable_all_intrs(adapter);
2559 vmxnet3_free_irqs(adapter);
2560 vmxnet3_free_intr_resources(adapter);
2562 netif_device_detach(netdev);
2563 netif_stop_queue(netdev);
2565 /* Create wake-up filters. */
2566 pmConf = adapter->pm_conf;
2567 memset(pmConf, 0, sizeof(*pmConf));
2569 if (adapter->wol & WAKE_UCAST) {
2570 pmConf->filters[i].patternSize = ETH_ALEN;
2571 pmConf->filters[i].maskSize = 1;
2572 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
2573 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
2575 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2579 if (adapter->wol & WAKE_ARP) {
2580 in_dev = in_dev_get(netdev);
2584 ifa = (struct in_ifaddr *)in_dev->ifa_list;
2588 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
2589 sizeof(struct arphdr) + /* ARP header */
2590 2 * ETH_ALEN + /* 2 Ethernet addresses*/
2591 2 * sizeof(u32); /*2 IPv4 addresses */
2592 pmConf->filters[i].maskSize =
2593 (pmConf->filters[i].patternSize - 1) / 8 + 1;
2595 /* ETH_P_ARP in Ethernet header. */
2596 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
2597 ehdr->h_proto = htons(ETH_P_ARP);
2599 /* ARPOP_REQUEST in ARP header. */
2600 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
2601 ahdr->ar_op = htons(ARPOP_REQUEST);
2602 arpreq = (u8 *)(ahdr + 1);
2604 /* The Unicast IPv4 address in 'tip' field. */
2605 arpreq += 2 * ETH_ALEN + sizeof(u32);
2606 *(u32 *)arpreq = ifa->ifa_address;
2608 /* The mask for the relevant bits. */
2609 pmConf->filters[i].mask[0] = 0x00;
2610 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
2611 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
2612 pmConf->filters[i].mask[3] = 0x00;
2613 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
2614 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
2617 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2622 if (adapter->wol & WAKE_MAGIC)
2623 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC);
2625 pmConf->numFilters = i;
2627 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2628 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2630 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
2633 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2634 VMXNET3_CMD_UPDATE_PMCFG);
2636 pci_save_state(pdev);
2637 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
2639 pci_disable_device(pdev);
2640 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
2647 vmxnet3_resume(struct device *device)
2650 struct pci_dev *pdev = to_pci_dev(device);
2651 struct net_device *netdev = pci_get_drvdata(pdev);
2652 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2653 struct Vmxnet3_PMConf *pmConf;
2655 if (!netif_running(netdev))
2658 /* Destroy wake-up filters. */
2659 pmConf = adapter->pm_conf;
2660 memset(pmConf, 0, sizeof(*pmConf));
2662 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2663 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2665 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys(
2668 netif_device_attach(netdev);
2669 pci_set_power_state(pdev, PCI_D0);
2670 pci_restore_state(pdev);
2671 err = pci_enable_device_mem(pdev);
2675 pci_enable_wake(pdev, PCI_D0, 0);
2677 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2678 VMXNET3_CMD_UPDATE_PMCFG);
2679 vmxnet3_alloc_intr_resources(adapter);
2680 vmxnet3_request_irqs(adapter);
2681 vmxnet3_enable_all_intrs(adapter);
2686 static const struct dev_pm_ops vmxnet3_pm_ops = {
2687 .suspend = vmxnet3_suspend,
2688 .resume = vmxnet3_resume,
2692 static struct pci_driver vmxnet3_driver = {
2693 .name = vmxnet3_driver_name,
2694 .id_table = vmxnet3_pciid_table,
2695 .probe = vmxnet3_probe_device,
2696 .remove = __devexit_p(vmxnet3_remove_device),
2698 .driver.pm = &vmxnet3_pm_ops,
2704 vmxnet3_init_module(void)
2706 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
2707 VMXNET3_DRIVER_VERSION_REPORT);
2708 return pci_register_driver(&vmxnet3_driver);
2711 module_init(vmxnet3_init_module);
2715 vmxnet3_exit_module(void)
2717 pci_unregister_driver(&vmxnet3_driver);
2720 module_exit(vmxnet3_exit_module);
2722 MODULE_AUTHOR("VMware, Inc.");
2723 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
2724 MODULE_LICENSE("GPL v2");
2725 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);