2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/skbuff.h>
21 #include <linux/if_ether.h>
22 #include <linux/spinlock.h>
23 #include <net/mac80211.h>
26 * The key cache is used for h/w cipher state and also for
27 * tracking station state such as the current tx antenna.
28 * We also setup a mapping table between key cache slot indices
29 * and station state to short-circuit node lookups on rx.
30 * Different parts have different size key caches. We handle
31 * up to ATH_KEYMAX entries (could dynamically allocate state).
33 #define ATH_KEYMAX 128 /* max key cache size we handle */
35 static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
39 unsigned int longcal_timer;
40 unsigned int shortcal_timer;
41 unsigned int resetcal_timer;
42 unsigned int checkani_timer;
43 struct timer_list timer;
46 struct ath_cycle_counters {
53 enum ath_device_state {
64 struct reg_dmn_pair_mapping {
70 struct ath_regulatory {
78 struct reg_dmn_pair_mapping *regpair;
82 ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0),
83 ATH_CRYPT_CAP_MIC_COMBINED = BIT(1),
90 u8 kv_val[16]; /* TK */
91 u8 kv_mic[8]; /* Michael MIC key */
92 u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
93 * supports both MIC keys in the same key cache entry;
94 * in that case, kv_mic is the RX key) */
99 ATH_CIPHER_AES_OCB = 1,
100 ATH_CIPHER_AES_CCM = 2,
108 AR7010_DEVICE = BIT(0),
109 AR9287_DEVICE = BIT(1),
113 * struct ath_ops - Register read/write operations
115 * @read: Register read
116 * @write: Register write
117 * @enable_write_buffer: Enable multiple register writes
118 * @write_flush: flush buffered register writes and disable buffering
121 unsigned int (*read)(void *, u32 reg_offset);
122 void (*write)(void *, u32 val, u32 reg_offset);
123 void (*enable_write_buffer)(void *);
124 void (*write_flush) (void *);
130 enum ath_bus_type ath_bus_type;
131 void (*read_cachesize)(struct ath_common *common, int *csz);
132 bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
133 void (*bt_coex_prep)(struct ath_common *common);
139 struct ieee80211_hw *hw;
141 enum ath_device_state state;
147 u8 macaddr[ETH_ALEN];
148 u8 curbssid[ETH_ALEN];
149 u8 bssidmask[ETH_ALEN];
158 DECLARE_BITMAP(keymap, ATH_KEYMAX);
159 DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX);
160 enum ath_crypt_caps crypt_caps;
162 unsigned int clockrate;
165 struct ath_cycle_counters cc_ani;
166 struct ath_cycle_counters cc_survey;
168 struct ath_regulatory regulatory;
169 const struct ath_ops *ops;
170 const struct ath_bus_ops *bus_ops;
175 struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
179 void ath_hw_setbssidmask(struct ath_common *common);
180 void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key);
181 int ath_key_config(struct ath_common *common,
182 struct ieee80211_vif *vif,
183 struct ieee80211_sta *sta,
184 struct ieee80211_key_conf *key);
185 bool ath_hw_keyreset(struct ath_common *common, u16 entry);
186 void ath_hw_cycle_counters_update(struct ath_common *common);
187 int32_t ath_hw_get_listen_time(struct ath_common *common);