2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #include <linux/completion.h>
22 #include <linux/if_ether.h>
23 #include <linux/types.h>
24 #include <linux/pci.h>
25 #include <linux/uuid.h>
26 #include <linux/time.h>
31 #include "targaddrs.h"
35 #include "../dfs_pattern_detector.h"
41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
43 #define WO(_f) ((_f##_OFFSET) >> 2)
45 #define ATH10K_SCAN_ID 0
46 #define WMI_READY_TIMEOUT (5 * HZ)
47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ)
49 #define ATH10K_NUM_CHANS 39
51 /* Antenna noise floor */
52 #define ATH10K_DEFAULT_NOISE_FLOOR -95
54 #define ATH10K_MAX_NUM_MGMT_PENDING 128
56 /* number of failed packets (20 packets with 16 sw reties each) */
57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
60 * Use insanely high numbers to make sure that the firmware implementation
61 * won't start, we have the same functionality already in hostapd. Unit
64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
74 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
84 struct ath10k_skb_cb {
88 enum ath10k_hw_txrx_mode txmode;
96 struct ath10k_htt_txbuf *txbuf;
106 struct ath10k_skb_rxcb {
108 struct hlist_node hlist;
111 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
113 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
114 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
115 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
118 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
120 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
121 return (struct ath10k_skb_rxcb *)skb->cb;
124 #define ATH10K_RXCB_SKB(rxcb) \
125 container_of((void *)rxcb, struct sk_buff, cb)
127 static inline u32 host_interest_item_address(u32 item_offset)
129 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
136 struct ath10k_mem_chunk {
144 enum ath10k_fw_wmi_op_version op_version;
145 enum ath10k_htc_ep_id eid;
146 struct completion service_ready;
147 struct completion unified_ready;
148 wait_queue_head_t tx_credits_wq;
149 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
150 struct wmi_cmd_map *cmd;
151 struct wmi_vdev_param_map *vdev_param;
152 struct wmi_pdev_param_map *pdev_param;
153 const struct wmi_ops *ops;
154 const struct wmi_peer_flags_map *peer_flags;
158 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
161 struct ath10k_fw_stats_peer {
162 struct list_head list;
164 u8 peer_macaddr[ETH_ALEN];
167 u32 peer_rx_rate; /* 10x only */
170 struct ath10k_fw_stats_vdev {
171 struct list_head list;
176 u32 num_tx_frames[4];
178 u32 num_tx_frames_retries[4];
179 u32 num_tx_frames_failures[4];
184 u32 num_tx_not_acked;
185 u32 tx_rate_history[10];
186 u32 beacon_rssi_history[10];
189 struct ath10k_fw_stats_pdev {
190 struct list_head list;
224 u32 sw_retry_failure;
225 u32 illgl_rate_phy_err;
226 u32 pdev_cont_xretry;
232 u32 seq_failed_queueing;
239 u32 mpdus_ack_failed;
243 s32 mid_ppdu_route_change;
260 struct ath10k_fw_stats {
261 struct list_head pdevs;
262 struct list_head vdevs;
263 struct list_head peers;
266 #define ATH10K_TPC_TABLE_TYPE_FLAG 1
267 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
269 struct ath10k_tpc_table {
270 u32 pream_idx[WMI_TPC_RATE_MAX];
271 u8 rate_code[WMI_TPC_RATE_MAX];
272 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
275 struct ath10k_tpc_stats {
279 u32 twice_antenna_reduction;
280 u32 twice_max_rd_power;
281 s32 twice_antenna_gain;
286 u8 flag[WMI_TPC_FLAG];
287 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
290 struct ath10k_dfs_stats {
294 u32 pulses_discarded;
298 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
301 struct list_head list;
304 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
306 /* protected by ar->data_lock */
307 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
311 struct ath10k_vif *arvif;
313 /* the following are protected by ar->data_lock */
314 u32 changed; /* IEEE80211_RC_* */
319 struct work_struct update_wk;
321 #ifdef CONFIG_MAC80211_DEBUGFS
322 /* protected by conf_mutex */
327 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
329 enum ath10k_beacon_state {
330 ATH10K_BEACON_SCHEDULED = 0,
331 ATH10K_BEACON_SENDING,
336 struct list_head list;
339 enum wmi_vdev_type vdev_type;
340 enum wmi_vdev_subtype vdev_subtype;
343 struct sk_buff *beacon;
344 /* protected by data_lock */
345 enum ath10k_beacon_state beacon_state;
347 dma_addr_t beacon_paddr;
348 unsigned long tx_paused; /* arbitrary values defined by target */
351 struct ieee80211_vif *vif;
355 bool spectral_enabled;
360 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
374 u8 ssid[IEEE80211_MAX_SSID_LEN];
376 /* P2P_IE with NoA attribute for P2P_GO case */
384 int num_legacy_stations;
386 struct wmi_wmm_params_all_arg wmm_params;
387 struct work_struct ap_csa_work;
388 struct delayed_work connection_loss_work;
389 struct cfg80211_bitrate_mask bitrate_mask;
392 struct ath10k_vif_iter {
394 struct ath10k_vif *arvif;
397 /* used for crash-dump storage, protected by data-lock */
398 struct ath10k_fw_crash_data {
399 bool crashed_since_read;
402 struct timespec timestamp;
403 __le32 registers[REG_DUMP_COUNT_QCA988X];
406 struct ath10k_debug {
407 struct dentry *debugfs_phy;
409 struct ath10k_fw_stats fw_stats;
410 struct completion fw_stats_complete;
413 unsigned long htt_stats_mask;
414 struct delayed_work htt_stats_dwork;
415 struct ath10k_dfs_stats dfs_stats;
416 struct ath_dfs_pool_stats dfs_pool_stats;
418 /* used for tpc-dump storage, protected by data-lock */
419 struct ath10k_tpc_stats *tpc_stats;
421 struct completion tpc_complete;
423 /* protected by conf_mutex */
430 struct ath10k_fw_crash_data *fw_crash_data;
434 ATH10K_STATE_OFF = 0,
437 /* When doing firmware recovery the device is first powered down.
438 * mac80211 is supposed to call in to start() hook later on. It is
439 * however possible that driver unloading and firmware crash overlap.
440 * mac80211 can wait on conf_mutex in stop() while the device is
441 * stopped in ath10k_core_restart() work holding conf_mutex. The state
442 * RESTARTED means that the device is up and mac80211 has started hw
443 * reconfiguration. Once mac80211 is done with the reconfiguration we
444 * set the state to STATE_ON in reconfig_complete(). */
445 ATH10K_STATE_RESTARTING,
446 ATH10K_STATE_RESTARTED,
448 /* The device has crashed while restarting hw. This state is like ON
449 * but commands are blocked in HTC and -ECOMM response is given. This
450 * prevents completion timeouts and makes the driver more responsive to
451 * userspace commands. This is also prevents recursive recovery. */
458 enum ath10k_firmware_mode {
459 /* the default mode, standard 802.11 functionality */
460 ATH10K_FIRMWARE_MODE_NORMAL,
462 /* factory tests etc */
463 ATH10K_FIRMWARE_MODE_UTF,
466 enum ath10k_fw_features {
467 /* wmi_mgmt_rx_hdr contains extra RSSI information */
468 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
470 /* Firmware from 10X branch. Deprecated, don't use in new code. */
471 ATH10K_FW_FEATURE_WMI_10X = 1,
473 /* firmware support tx frame management over WMI, otherwise it's HTT */
474 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
476 /* Firmware does not support P2P */
477 ATH10K_FW_FEATURE_NO_P2P = 3,
479 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
480 * bit is required to be set as well. Deprecated, don't use in new
483 ATH10K_FW_FEATURE_WMI_10_2 = 4,
485 /* Some firmware revisions lack proper multi-interface client powersave
486 * implementation. Enabling PS could result in connection drops,
487 * traffic stalls, etc.
489 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
491 /* Some firmware revisions have an incomplete WoWLAN implementation
492 * despite WMI service bit being advertised. This feature flag is used
493 * to distinguish whether WoWLAN is really supported or not.
495 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
497 /* Don't trust error code from otp.bin */
498 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
500 /* Some firmware revisions pad 4th hw address to 4 byte boundary making
501 * it 8 bytes long in Native Wifi Rx decap.
503 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
505 /* Firmware supports bypassing PLL setting on init. */
506 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
508 /* Raw mode support. If supported, FW supports receiving and trasmitting
509 * frames in raw mode.
511 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
513 /* Firmware Supports Adaptive CCA*/
514 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
516 /* Firmware supports management frame protection */
517 ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
520 ATH10K_FW_FEATURE_COUNT,
523 enum ath10k_dev_flags {
524 /* Indicates that ath10k device is during CAC phase of DFS */
526 ATH10K_FLAG_CORE_REGISTERED,
528 /* Device has crashed and needs to restart. This indicates any pending
529 * waiters should immediately cancel instead of waiting for a time out.
531 ATH10K_FLAG_CRASH_FLUSH,
533 /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
534 * Raw mode supports both hardware and software crypto. Native WiFi only
535 * supports hardware crypto.
537 ATH10K_FLAG_RAW_MODE,
539 /* Disable HW crypto engine */
540 ATH10K_FLAG_HW_CRYPTO_DISABLED,
542 /* Bluetooth coexistance enabled */
546 enum ath10k_cal_mode {
547 ATH10K_CAL_MODE_FILE,
552 enum ath10k_crypt_mode {
553 /* Only use hardware crypto engine */
554 ATH10K_CRYPT_MODE_HW,
555 /* Only use software crypto engine */
556 ATH10K_CRYPT_MODE_SW,
559 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
562 case ATH10K_CAL_MODE_FILE:
564 case ATH10K_CAL_MODE_OTP:
566 case ATH10K_CAL_MODE_DT:
573 enum ath10k_scan_state {
575 ATH10K_SCAN_STARTING,
577 ATH10K_SCAN_ABORTING,
580 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
583 case ATH10K_SCAN_IDLE:
585 case ATH10K_SCAN_STARTING:
587 case ATH10K_SCAN_RUNNING:
589 case ATH10K_SCAN_ABORTING:
596 enum ath10k_tx_pause_reason {
597 ATH10K_TX_PAUSE_Q_FULL,
602 struct ath_common ath_common;
603 struct ieee80211_hw *hw;
605 u8 mac_addr[ETH_ALEN];
607 enum ath10k_hw_rev hw_rev;
612 u32 fw_version_minor;
613 u16 fw_version_release;
614 u16 fw_version_build;
615 u32 fw_stats_req_mask;
622 u32 max_spatial_stream;
623 /* protected by conf_mutex */
626 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
632 const struct ath10k_hif_ops *ops;
635 struct completion target_suspend;
637 const struct ath10k_hw_regs *regs;
638 const struct ath10k_hw_values *hw_values;
639 struct ath10k_bmi bmi;
640 struct ath10k_wmi wmi;
641 struct ath10k_htc htc;
642 struct ath10k_htt htt;
644 struct ath10k_hw_params {
651 /* This is true if given HW chip has a quirky Cycle Counter
652 * wraparound which resets to 0x7fffffff instead of 0. All
653 * other CC related counters (e.g. Rx Clear Count) are divided
654 * by 2 so they never wraparound themselves.
656 bool has_shifted_cc_wraparound;
658 /* Some of chip expects fragment descriptor to be continuous
659 * memory for any TX operation. Set continuous_frag_desc flag
660 * for the hardware which have such requirement.
662 bool continuous_frag_desc;
664 u32 channel_counters_freq_hz;
666 /* Mgmt tx descriptors threshold for limiting probe response
669 u32 max_probe_resp_desc_thres;
671 struct ath10k_hw_params_fw {
677 size_t board_ext_size;
681 const struct firmware *board;
682 const void *board_data;
685 const struct firmware *otp;
686 const void *otp_data;
689 const struct firmware *firmware;
690 const void *firmware_data;
693 const struct firmware *cal_file;
696 const void *firmware_codeswap_data;
697 size_t firmware_codeswap_len;
698 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
704 u32 subsystem_vendor;
705 u32 subsystem_device;
714 enum ath10k_cal_mode cal_mode;
717 struct completion started;
718 struct completion completed;
719 struct completion on_channel;
720 struct delayed_work timeout;
721 enum ath10k_scan_state state;
729 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
732 /* should never be NULL; needed for regular htt rx */
733 struct ieee80211_channel *rx_channel;
735 /* valid during scan; needed for mgmt rx during scan */
736 struct ieee80211_channel *scan_channel;
738 /* current operating channel definition */
739 struct cfg80211_chan_def chandef;
741 unsigned long long free_vdev_map;
742 struct ath10k_vif *monitor_arvif;
745 bool monitor_started;
746 unsigned int filter_flags;
747 unsigned long dev_flags;
748 u32 dfs_block_radar_events;
750 /* protected by conf_mutex */
752 int num_started_vdevs;
754 /* Protected by conf-mutex */
758 struct completion install_key_done;
760 struct completion vdev_setup_done;
762 struct workqueue_struct *workqueue;
763 /* Auxiliary workqueue */
764 struct workqueue_struct *workqueue_aux;
766 /* prevents concurrent FW reconfiguration */
767 struct mutex conf_mutex;
769 /* protects shared structure data */
770 spinlock_t data_lock;
772 struct list_head arvifs;
773 struct list_head peers;
774 wait_queue_head_t peer_mapping_wq;
776 /* protected by conf_mutex */
781 int max_num_stations;
783 int max_num_tdls_vdevs;
784 int num_active_peers;
787 struct work_struct svc_rdy_work;
788 struct sk_buff *svc_rdy_skb;
790 struct work_struct offchan_tx_work;
791 struct sk_buff_head offchan_tx_queue;
792 struct completion offchan_tx_completed;
793 struct sk_buff *offchan_tx_skb;
795 struct work_struct wmi_mgmt_tx_work;
796 struct sk_buff_head wmi_mgmt_tx_queue;
798 enum ath10k_state state;
800 struct work_struct register_work;
801 struct work_struct restart_work;
803 /* cycle count is reported twice for each visited channel during scan.
804 * access protected by data_lock */
805 u32 survey_last_rx_clear_count;
806 u32 survey_last_cycle_count;
807 struct survey_info survey[ATH10K_NUM_CHANS];
809 /* Channel info events are expected to come in pairs without and with
810 * COMPLETE flag set respectively for each channel visit during scan.
812 * However there are deviations from this rule. This flag is used to
813 * avoid reporting garbage data.
815 bool ch_info_can_report_survey;
817 struct dfs_pattern_detector *dfs_detector;
819 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
821 #ifdef CONFIG_ATH10K_DEBUGFS
822 struct ath10k_debug debug;
826 /* relay(fs) channel for spectral scan */
827 struct rchan *rfs_chan_spec_scan;
829 /* spectral_mode and spec_config are protected by conf_mutex */
830 enum ath10k_spectral_mode mode;
831 struct ath10k_spec_scan config;
835 /* protected by conf_mutex */
836 const struct firmware *utf;
837 char utf_version[32];
838 const void *utf_firmware_data;
839 size_t utf_firmware_len;
840 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
841 enum ath10k_fw_wmi_op_version orig_wmi_op_version;
842 enum ath10k_fw_wmi_op_version op_version;
843 /* protected by data_lock */
848 /* protected by data_lock */
849 u32 fw_crash_counter;
850 u32 fw_warm_reset_counter;
851 u32 fw_cold_reset_counter;
854 struct ath10k_thermal thermal;
855 struct ath10k_wow wow;
858 u8 drv_priv[0] __aligned(sizeof(void *));
861 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
863 enum ath10k_hw_rev hw_rev,
864 const struct ath10k_hif_ops *hif_ops);
865 void ath10k_core_destroy(struct ath10k *ar);
866 void ath10k_core_get_fw_features_str(struct ath10k *ar,
870 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
871 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
872 void ath10k_core_stop(struct ath10k *ar);
873 int ath10k_core_register(struct ath10k *ar, u32 chip_id);
874 void ath10k_core_unregister(struct ath10k *ar);
876 #endif /* _CORE_H_ */