2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 /*************************************\
20 * Attach/Detach Functions and helpers *
21 \*************************************/
23 #include <linux/pci.h>
30 * ath5k_hw_post - Power On Self Test helper function
32 * @ah: The &struct ath5k_hw
34 static int ath5k_hw_post(struct ath5k_hw *ah)
37 static const u32 static_pattern[4] = {
38 0x55555555, 0xaaaaaaaa,
39 0x66666666, 0x99999999
41 static const u16 regs[2] = { AR5K_STA_ID0, AR5K_PHY(8) };
48 for (c = 0; c < 2; c++) {
52 /* Save previous value */
53 init_val = ath5k_hw_reg_read(ah, cur_reg);
55 for (i = 0; i < 256; i++) {
56 var_pattern = i << 16 | i;
57 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
58 cur_val = ath5k_hw_reg_read(ah, cur_reg);
60 if (cur_val != var_pattern) {
61 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
65 /* Found on ndiswrapper dumps */
66 var_pattern = 0x0039080f;
67 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
70 for (i = 0; i < 4; i++) {
71 var_pattern = static_pattern[i];
72 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
73 cur_val = ath5k_hw_reg_read(ah, cur_reg);
75 if (cur_val != var_pattern) {
76 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
80 /* Found on ndiswrapper dumps */
81 var_pattern = 0x003b080f;
82 ath5k_hw_reg_write(ah, var_pattern, cur_reg);
85 /* Restore previous value */
86 ath5k_hw_reg_write(ah, init_val, cur_reg);
95 * ath5k_hw_attach - Check if hw is supported and init the needed structs
97 * @sc: The &struct ath5k_softc we got from the driver's attach function
99 * Check if the device is supported, perform a POST and initialize the needed
100 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
101 * -ENODEV if the device is not supported or prints an error msg if something
104 int ath5k_hw_attach(struct ath5k_softc *sc)
106 struct ath5k_hw *ah = sc->ah;
107 struct ath_common *common = ath5k_hw_common(ah);
108 struct pci_dev *pdev = sc->pdev;
109 struct ath5k_eeprom_info *ee;
116 ah->ah_op_mode = NL80211_IFTYPE_STATION;
117 ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
118 ah->ah_turbo = false;
119 ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
121 ah->ah_atim_window = 0;
122 ah->ah_aifs = AR5K_TUNE_AIFS;
123 ah->ah_cw_min = AR5K_TUNE_CWMIN;
124 ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
125 ah->ah_software_retry = false;
128 * Find the mac version
130 srev = ath5k_hw_reg_read(ah, AR5K_SREV);
131 if (srev < AR5K_SREV_AR5311)
132 ah->ah_version = AR5K_AR5210;
133 else if (srev < AR5K_SREV_AR5212)
134 ah->ah_version = AR5K_AR5211;
136 ah->ah_version = AR5K_AR5212;
138 /*Fill the ath5k_hw struct with the needed functions*/
139 ret = ath5k_hw_init_desc_functions(ah);
143 /* Bring device out of sleep and reset it's units */
144 ret = ath5k_hw_nic_wakeup(ah, 0, true);
148 /* Get MAC, PHY and RADIO revisions */
149 ah->ah_mac_srev = srev;
150 ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER);
151 ah->ah_mac_revision = AR5K_REG_MS(srev, AR5K_SREV_REV);
152 ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
154 ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
156 ah->ah_phy = AR5K_PHY(0);
158 /* Try to identify radio chip based on it's srev */
159 switch (ah->ah_radio_5ghz_revision & 0xf0) {
160 case AR5K_SREV_RAD_5111:
161 ah->ah_radio = AR5K_RF5111;
162 ah->ah_single_chip = false;
163 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
166 case AR5K_SREV_RAD_5112:
167 case AR5K_SREV_RAD_2112:
168 ah->ah_radio = AR5K_RF5112;
169 ah->ah_single_chip = false;
170 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
173 case AR5K_SREV_RAD_2413:
174 ah->ah_radio = AR5K_RF2413;
175 ah->ah_single_chip = true;
177 case AR5K_SREV_RAD_5413:
178 ah->ah_radio = AR5K_RF5413;
179 ah->ah_single_chip = true;
181 case AR5K_SREV_RAD_2316:
182 ah->ah_radio = AR5K_RF2316;
183 ah->ah_single_chip = true;
185 case AR5K_SREV_RAD_2317:
186 ah->ah_radio = AR5K_RF2317;
187 ah->ah_single_chip = true;
189 case AR5K_SREV_RAD_5424:
190 if (ah->ah_mac_version == AR5K_SREV_AR2425 ||
191 ah->ah_mac_version == AR5K_SREV_AR2417){
192 ah->ah_radio = AR5K_RF2425;
193 ah->ah_single_chip = true;
195 ah->ah_radio = AR5K_RF5413;
196 ah->ah_single_chip = true;
200 /* Identify radio based on mac/phy srev */
201 if (ah->ah_version == AR5K_AR5210) {
202 ah->ah_radio = AR5K_RF5110;
203 ah->ah_single_chip = false;
204 } else if (ah->ah_version == AR5K_AR5211) {
205 ah->ah_radio = AR5K_RF5111;
206 ah->ah_single_chip = false;
207 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
209 } else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
210 ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
211 ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
212 ah->ah_radio = AR5K_RF2425;
213 ah->ah_single_chip = true;
214 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2425;
215 } else if (srev == AR5K_SREV_AR5213A &&
216 ah->ah_phy_revision == AR5K_SREV_PHY_5212B) {
217 ah->ah_radio = AR5K_RF5112;
218 ah->ah_single_chip = false;
219 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5112B;
220 } else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4)) {
221 ah->ah_radio = AR5K_RF2316;
222 ah->ah_single_chip = true;
223 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2316;
224 } else if (ah->ah_mac_version == (AR5K_SREV_AR5414 >> 4) ||
225 ah->ah_phy_revision == AR5K_SREV_PHY_5413) {
226 ah->ah_radio = AR5K_RF5413;
227 ah->ah_single_chip = true;
228 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5413;
229 } else if (ah->ah_mac_version == (AR5K_SREV_AR2414 >> 4) ||
230 ah->ah_phy_revision == AR5K_SREV_PHY_2413) {
231 ah->ah_radio = AR5K_RF2413;
232 ah->ah_single_chip = true;
233 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
235 ATH5K_ERR(sc, "Couldn't identify radio revision.\n");
242 /* Return on unsuported chips (unsupported eeprom etc) */
243 if ((srev >= AR5K_SREV_AR5416) &&
244 (srev < AR5K_SREV_AR2425)) {
245 ATH5K_ERR(sc, "Device not yet supported.\n");
253 ret = ath5k_hw_post(ah);
257 /* Enable pci core retry fix on Hainan (5213A) and later chips */
258 if (srev >= AR5K_SREV_AR5213A)
259 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_RETRY_FIX);
262 * Get card capabilities, calibration values etc
265 ret = ath5k_eeprom_init(ah);
267 ATH5K_ERR(sc, "unable to init EEPROM\n");
271 ee = &ah->ah_capabilities.cap_eeprom;
274 * Write PCI-E power save settings
276 if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) {
277 ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES);
278 ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES);
280 /* Shut off RX when elecidle is asserted */
281 ath5k_hw_reg_write(ah, 0x28000039, AR5K_PCIE_SERDES);
282 ath5k_hw_reg_write(ah, 0x53160824, AR5K_PCIE_SERDES);
284 /* If serdes programing is enabled, increase PCI-E
285 * tx power for systems with long trace from host
286 * to minicard connector. */
288 ath5k_hw_reg_write(ah, 0xe5980579, AR5K_PCIE_SERDES);
290 ath5k_hw_reg_write(ah, 0xf6800579, AR5K_PCIE_SERDES);
292 /* Shut off PLL and CLKREQ active in L1 */
293 ath5k_hw_reg_write(ah, 0x001defff, AR5K_PCIE_SERDES);
295 /* Preserve other settings */
296 ath5k_hw_reg_write(ah, 0x1aaabe40, AR5K_PCIE_SERDES);
297 ath5k_hw_reg_write(ah, 0xbe105554, AR5K_PCIE_SERDES);
298 ath5k_hw_reg_write(ah, 0x000e3007, AR5K_PCIE_SERDES);
300 /* Reset SERDES to load new settings */
301 ath5k_hw_reg_write(ah, 0x00000000, AR5K_PCIE_SERDES_RESET);
305 /* Get misc capabilities */
306 ret = ath5k_hw_set_capabilities(ah);
308 ATH5K_ERR(sc, "unable to get device capabilities: 0x%04x\n",
313 /* Crypto settings */
314 ah->ah_aes_support = srev >= AR5K_SREV_AR5212_V4 &&
315 (ee->ee_version >= AR5K_EEPROM_VERSION_5_0 &&
316 !AR5K_EEPROM_AES_DIS(ee->ee_misc5));
318 if (srev >= AR5K_SREV_AR2414) {
319 ah->ah_combined_mic = true;
320 AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
321 AR5K_MISC_MODE_COMBINED_MIC);
324 /* MAC address is cleared until add_interface */
325 ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){});
327 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
328 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
329 ath5k_hw_set_associd(ah);
330 ath5k_hw_set_opmode(ah);
332 ath5k_hw_rfgain_opt_init(ah);
334 ath5k_hw_init_nfcal_hist(ah);
336 /* turn on HW LEDs */
337 ath5k_hw_set_ledstate(ah, AR5K_LED_INIT);
346 * ath5k_hw_detach - Free the ath5k_hw struct
348 * @ah: The &struct ath5k_hw
350 void ath5k_hw_detach(struct ath5k_hw *ah)
352 ATH5K_TRACE(ah->ah_sc);
354 __set_bit(ATH_STAT_INVALID, ah->ah_sc->status);
356 if (ah->ah_rf_banks != NULL)
357 kfree(ah->ah_rf_banks);
359 ath5k_eeprom_detach(ah);
361 /* assume interrupts are down */