2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
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14 * similar Disclaimer requirement for further binary redistribution.
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16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
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39 * Definitions for the Atheros Wireless LAN controller driver.
41 #ifndef _DEV_ATH_ATHVAR_H
42 #define _DEV_ATH_ATHVAR_H
44 #include <linux/interrupt.h>
45 #include <linux/list.h>
46 #include <linux/wireless.h>
47 #include <linux/if_ether.h>
48 #include <linux/leds.h>
49 #include <linux/rfkill.h>
50 #include <linux/workqueue.h>
59 #define ATH_RXBUF 40 /* number of RX buffers */
60 #define ATH_TXBUF 200 /* number of TX buffers */
61 #define ATH_BCBUF 1 /* number of beacon buffers */
63 #define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
64 #define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
67 struct list_head list;
68 struct ath5k_desc *desc; /* virtual addr of desc */
69 dma_addr_t daddr; /* physical addr of desc */
70 struct sk_buff *skb; /* skbuff for buf */
71 dma_addr_t skbaddr;/* physical addr of skb data */
75 * Data transmit queue state. One of these exists for each
76 * hardware transmit queue. Packets sent to us from above
77 * are assigned to queues based on their priority. Not all
78 * devices support a complete set of hardware transmit queues.
79 * For those devices the array sc_ac2q will map multiple
80 * priorities to fewer hardware queues (typically all to one
84 unsigned int qnum; /* hardware q number */
85 u32 *link; /* link ptr in last TX desc */
86 struct list_head q; /* transmit queue */
87 spinlock_t lock; /* lock on q and link */
89 int txq_len; /* number of queued buffers */
91 unsigned int txq_stuck; /* informational counter */
94 #define ATH5K_LED_MAX_NAME_LEN 31
97 * State for LED triggers
101 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
102 struct ath5k_softc *sc; /* driver state */
103 struct led_classdev led_dev; /* led classdev */
107 struct ath5k_rfkill {
108 /* GPIO PIN for rfkill */
110 /* polarity of rfkill GPIO PIN */
112 /* RFKILL toggle tasklet */
113 struct tasklet_struct toggleq;
117 struct ath5k_statistics {
119 unsigned int antenna_rx[5]; /* frames count per antenna RX */
120 unsigned int antenna_tx[5]; /* frames count per antenna TX */
123 unsigned int rx_all_count; /* all RX frames, including errors */
124 unsigned int tx_all_count; /* all TX frames, including errors */
125 unsigned int rxerr_crc;
126 unsigned int rxerr_phy;
127 unsigned int rxerr_phy_code[32];
128 unsigned int rxerr_fifo;
129 unsigned int rxerr_decrypt;
130 unsigned int rxerr_mic;
131 unsigned int rxerr_proc;
132 unsigned int rxerr_jumbo;
133 unsigned int txerr_retry;
134 unsigned int txerr_fifo;
135 unsigned int txerr_filt;
138 unsigned int ack_fail;
139 unsigned int rts_fail;
141 unsigned int fcs_error;
142 unsigned int beacons;
144 unsigned int mib_intr;
145 unsigned int rxorn_intr;
146 unsigned int rxeol_intr;
150 #define ATH_CHAN_MAX (26+26+26+200+200)
152 #define ATH_CHAN_MAX (14+14+14+252+20)
155 /* Software Carrier, keeps track of the driver state
156 * associated with an instance of a device */
158 struct pci_dev *pdev; /* for dma mapping */
159 void __iomem *iobase; /* address of the device */
160 struct mutex lock; /* dev-level lock */
161 struct ieee80211_hw *hw; /* IEEE 802.11 common */
162 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
163 struct ieee80211_channel channels[ATH_CHAN_MAX];
164 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
165 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
166 enum nl80211_iftype opmode;
167 struct ath5k_hw *ah; /* Atheros HW */
169 struct ieee80211_supported_band *curband;
171 #ifdef CONFIG_ATH5K_DEBUG
172 struct ath5k_dbg_info debug; /* debug info */
173 #endif /* CONFIG_ATH5K_DEBUG */
175 struct ath5k_buf *bufptr; /* allocated buffer ptr */
176 struct ath5k_desc *desc; /* TX/RX descriptors */
177 dma_addr_t desc_daddr; /* DMA (physical) address */
178 size_t desc_len; /* size of TX/RX descriptors */
180 DECLARE_BITMAP(status, 5);
181 #define ATH_STAT_INVALID 0 /* disable hardware accesses */
182 #define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
183 #define ATH_STAT_PROMISC 2
184 #define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
185 #define ATH_STAT_STARTED 4 /* opened & irqs enabled */
187 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
188 unsigned int curmode; /* current phy mode */
189 struct ieee80211_channel *curchan; /* current h/w channel */
191 struct ieee80211_vif *vif;
193 enum ath5k_int imask; /* interrupt mask copy */
195 u8 bssidmask[ETH_ALEN];
197 unsigned int led_pin, /* GPIO pin for driving LED */
198 led_on; /* pin setting for LED on */
200 struct work_struct reset_work; /* deferred chip reset */
202 unsigned int rxbufsize; /* rx size based on mtu */
203 struct list_head rxbuf; /* receive buffer */
204 spinlock_t rxbuflock;
205 u32 *rxlink; /* link ptr in last RX desc */
206 struct tasklet_struct rxtq; /* rx intr tasklet */
207 struct ath5k_led rx_led; /* rx led */
209 struct list_head txbuf; /* transmit buffer */
210 spinlock_t txbuflock;
211 unsigned int txbuf_len; /* buf count in txbuf list */
212 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
213 struct tasklet_struct txtq; /* tx intr tasklet */
214 struct ath5k_led tx_led; /* tx led */
216 struct ath5k_rfkill rf_kill;
218 struct tasklet_struct calib; /* calibration tasklet */
220 spinlock_t block; /* protects beacon */
221 struct tasklet_struct beacontq; /* beacon intr tasklet */
222 struct ath5k_buf *bbuf; /* beacon buffer */
223 unsigned int bhalq, /* SW q for outgoing beacons */
224 bmisscount, /* missed beacon transmits */
225 bintval, /* beacon interval in TU */
227 unsigned int nexttbtt; /* next beacon time in TU */
228 struct ath5k_txq *cabq; /* content after beacon */
230 int power_level; /* Requested tx power in dbm */
231 bool assoc; /* associate state */
232 bool enable_beacon; /* true if beacons are on */
234 struct ath5k_statistics stats;
236 struct ath5k_ani_state ani_state;
237 struct tasklet_struct ani_tasklet; /* ANI calibration */
239 struct delayed_work tx_complete_work;
242 #define ath5k_hw_hasbssidmask(_ah) \
243 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
244 #define ath5k_hw_hasveol(_ah) \
245 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)