3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
35 static const struct ath6kl_hw hw_list[] = {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
70 .testscript_addr = 0x57ef74,
71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
96 .flags = ATH6KL_HW_64BIT_RATES |
97 ATH6KL_HW_AP_INACTIVITY_MINS,
100 .dir = AR6004_HW_1_0_FW_DIR,
101 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
104 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
105 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
108 .id = AR6004_HW_1_1_VERSION,
109 .name = "ar6004 hw 1.1",
110 .dataset_patch_addr = 0x57e884,
111 .app_load_addr = 0x1234,
112 .board_ext_data_addr = 0x437000,
113 .reserved_ram_size = 11264,
114 .board_addr = 0x43d400,
115 .refclk_hz = 40000000,
117 .flags = ATH6KL_HW_64BIT_RATES |
118 ATH6KL_HW_AP_INACTIVITY_MINS,
120 .dir = AR6004_HW_1_1_FW_DIR,
121 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
124 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
125 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
128 .id = AR6004_HW_1_2_VERSION,
129 .name = "ar6004 hw 1.2",
130 .dataset_patch_addr = 0x436ecc,
131 .app_load_addr = 0x1234,
132 .board_ext_data_addr = 0x437000,
133 .reserved_ram_size = 9216,
134 .board_addr = 0x435c00,
135 .refclk_hz = 40000000,
137 .flags = ATH6KL_HW_64BIT_RATES |
138 ATH6KL_HW_AP_INACTIVITY_MINS,
141 .dir = AR6004_HW_1_2_FW_DIR,
142 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
144 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
145 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
148 .id = AR6004_HW_1_3_VERSION,
149 .name = "ar6004 hw 1.3",
150 .dataset_patch_addr = 0x437860,
151 .app_load_addr = 0x1234,
152 .board_ext_data_addr = 0x437000,
153 .reserved_ram_size = 7168,
154 .board_addr = 0x436400,
155 .refclk_hz = 40000000,
157 .flags = ATH6KL_HW_64BIT_RATES |
158 ATH6KL_HW_AP_INACTIVITY_MINS |
159 ATH6KL_HW_MAP_LP_ENDPOINT,
162 .dir = AR6004_HW_1_3_FW_DIR,
163 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
166 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
167 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
172 * Include definitions here that can be used to tune the WLAN module
173 * behavior. Different customers can tune the behavior as per their needs,
178 * This configuration item enable/disable keepalive support.
179 * Keepalive support: In the absence of any data traffic to AP, null
180 * frames will be sent to the AP at periodic interval, to keep the association
181 * active. This configuration item defines the periodic interval.
182 * Use value of zero to disable keepalive support
183 * Default: 60 seconds
185 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
188 * This configuration item sets the value of disconnect timeout
189 * Firmware delays sending the disconnec event to the host for this
190 * timeout after is gets disconnected from the current AP.
191 * If the firmware successly roams within the disconnect timeout
192 * it sends a new connect event
194 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
197 #define ATH6KL_DATA_OFFSET 64
198 struct sk_buff *ath6kl_buf_alloc(int size)
203 /* Add chacheline space at front and back of buffer */
204 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
205 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
206 skb = dev_alloc_skb(size + reserved);
209 skb_reserve(skb, reserved - L1_CACHE_BYTES);
213 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
216 memset(vif->ssid, 0, sizeof(vif->ssid));
218 vif->dot11_auth_mode = OPEN_AUTH;
219 vif->auth_mode = NONE_AUTH;
220 vif->prwise_crypto = NONE_CRYPT;
221 vif->prwise_crypto_len = 0;
222 vif->grp_crypto = NONE_CRYPT;
223 vif->grp_crypto_len = 0;
224 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
225 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
226 memset(vif->bssid, 0, sizeof(vif->bssid));
230 static int ath6kl_set_host_app_area(struct ath6kl *ar)
233 struct host_app_area host_app_area;
235 /* Fetch the address of the host_app_area_s
236 * instance in the host interest area */
237 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
238 address = TARG_VTOP(ar->target_type, address);
240 if (ath6kl_diag_read32(ar, address, &data))
243 address = TARG_VTOP(ar->target_type, data);
244 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
245 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
246 sizeof(struct host_app_area)))
252 static inline void set_ac2_ep_map(struct ath6kl *ar,
254 enum htc_endpoint_id ep)
256 ar->ac2ep_map[ac] = ep;
257 ar->ep2ac_map[ep] = ac;
260 /* connect to a service */
261 static int ath6kl_connectservice(struct ath6kl *ar,
262 struct htc_service_connect_req *con_req,
266 struct htc_service_connect_resp response;
268 memset(&response, 0, sizeof(response));
270 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
272 ath6kl_err("failed to connect to %s service status:%d\n",
277 switch (con_req->svc_id) {
278 case WMI_CONTROL_SVC:
279 if (test_bit(WMI_ENABLED, &ar->flag))
280 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
281 ar->ctrl_ep = response.endpoint;
283 case WMI_DATA_BE_SVC:
284 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
286 case WMI_DATA_BK_SVC:
287 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
289 case WMI_DATA_VI_SVC:
290 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
292 case WMI_DATA_VO_SVC:
293 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
296 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
303 static int ath6kl_init_service_ep(struct ath6kl *ar)
305 struct htc_service_connect_req connect;
307 memset(&connect, 0, sizeof(connect));
309 /* these fields are the same for all service endpoints */
310 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
311 connect.ep_cb.rx = ath6kl_rx;
312 connect.ep_cb.rx_refill = ath6kl_rx_refill;
313 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
316 * Set the max queue depth so that our ath6kl_tx_queue_full handler
319 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
320 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
321 if (!connect.ep_cb.rx_refill_thresh)
322 connect.ep_cb.rx_refill_thresh++;
324 /* connect to control service */
325 connect.svc_id = WMI_CONTROL_SVC;
326 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
329 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
332 * Limit the HTC message size on the send path, although e can
333 * receive A-MSDU frames of 4K, we will only send ethernet-sized
334 * (802.3) frames on the send path.
336 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
339 * To reduce the amount of committed memory for larger A_MSDU
340 * frames, use the recv-alloc threshold mechanism for larger
343 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
344 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
347 * For the remaining data services set the connection flag to
348 * reduce dribbling, if configured to do so.
350 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
351 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
352 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
354 connect.svc_id = WMI_DATA_BE_SVC;
356 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
359 /* connect to back-ground map this to WMI LOW_PRI */
360 connect.svc_id = WMI_DATA_BK_SVC;
361 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
364 /* connect to Video service, map this to HI PRI */
365 connect.svc_id = WMI_DATA_VI_SVC;
366 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
370 * Connect to VO service, this is currently not mapped to a WMI
371 * priority stream due to historical reasons. WMI originally
372 * defined 3 priorities over 3 mailboxes We can change this when
373 * WMI is reworked so that priorities are not dependent on
376 connect.svc_id = WMI_DATA_VO_SVC;
377 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
383 void ath6kl_init_control_info(struct ath6kl_vif *vif)
385 ath6kl_init_profile_info(vif);
386 vif->def_txkey_index = 0;
387 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
392 * Set HTC/Mbox operational parameters, this can only be called when the
393 * target is in the BMI phase.
395 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
401 blk_size = ar->mbox_info.block_size;
404 blk_size |= ((u32)htc_ctrl_buf) << 16;
406 /* set the host interest area for the block size */
407 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
409 ath6kl_err("bmi_write_memory for IO block size failed\n");
413 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
415 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
417 if (mbox_isr_yield_val) {
418 /* set the host interest area for the mbox ISR yield limit */
419 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
422 ath6kl_err("bmi_write_memory for yield limit failed\n");
431 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
436 * Configure the device for rx dot11 header rules. "0,0" are the
437 * default values. Required if checksum offload is needed. Set
438 * RxMetaVersion to 2.
440 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
441 ar->rx_meta_ver, 0, 0);
443 ath6kl_err("unable to set the rx frame format: %d\n", ret);
447 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
448 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
449 IGNORE_PS_FAIL_DURING_SCAN);
451 ath6kl_err("unable to set power save fail event policy: %d\n",
457 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
458 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
459 WMI_FOLLOW_BARKER_IN_ERP);
461 ath6kl_err("unable to set barker preamble policy: %d\n",
467 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
468 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
470 ath6kl_err("unable to set keep alive interval: %d\n", ret);
474 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
475 WLAN_CONFIG_DISCONNECT_TIMEOUT);
477 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
481 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
482 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
484 ath6kl_err("unable to set txop bursting: %d\n", ret);
489 if (ar->p2p && (ar->vif_max == 1 || idx)) {
490 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
491 P2P_FLAG_CAPABILITIES_REQ |
492 P2P_FLAG_MACADDR_REQ |
493 P2P_FLAG_HMODEL_REQ);
495 ath6kl_dbg(ATH6KL_DBG_TRC,
496 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
502 if (ar->p2p && (ar->vif_max == 1 || idx)) {
503 /* Enable Probe Request reporting for P2P */
504 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
506 ath6kl_dbg(ATH6KL_DBG_TRC,
507 "failed to enable Probe Request reporting (%d)\n",
515 int ath6kl_configure_target(struct ath6kl *ar)
517 u32 param, ram_reserved_size;
518 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
521 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
522 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
523 ath6kl_err("bmi_write_memory for uart debug failed\n");
528 * Note: Even though the firmware interface type is
529 * chosen as BSS_STA for all three interfaces, can
530 * be configured to IBSS/AP as long as the fw submode
531 * remains normal mode (0 - AP, STA and IBSS). But
532 * due to an target assert in firmware only one interface is
533 * configured for now.
535 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
537 for (i = 0; i < ar->vif_max; i++)
538 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
541 * Submodes when fw does not support dynamic interface
543 * vif[0] - AP/STA/IBSS
544 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
545 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
546 * Otherwise, All the interface are initialized to p2p dev.
549 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
550 ar->fw_capabilities)) {
551 for (i = 0; i < ar->vif_max; i++)
552 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
553 (i * HI_OPTION_FW_SUBMODE_BITS);
555 for (i = 0; i < ar->max_norm_iface; i++)
556 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
557 (i * HI_OPTION_FW_SUBMODE_BITS);
559 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
560 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
561 (i * HI_OPTION_FW_SUBMODE_BITS);
563 if (ar->p2p && ar->vif_max == 1)
564 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
567 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
568 HTC_PROTOCOL_VERSION) != 0) {
569 ath6kl_err("bmi_write_memory for htc version failed\n");
573 /* set the firmware mode to STA/IBSS/AP */
576 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) {
577 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
581 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
582 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
583 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
585 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
586 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
588 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
589 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
593 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
596 * Hardcode the address use for the extended board data
597 * Ideally this should be pre-allocate by the OS at boot time
598 * But since it is a new feature and board data is loaded
599 * at init time, we have to workaround this from host.
600 * It is difficult to patch the firmware boot code,
601 * but possible in theory.
604 if (ar->target_type == TARGET_TYPE_AR6003) {
605 param = ar->hw.board_ext_data_addr;
606 ram_reserved_size = ar->hw.reserved_ram_size;
608 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
609 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
613 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
614 ram_reserved_size) != 0) {
615 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
620 /* set the block size for the target */
621 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
622 /* use default number of control buffers */
625 /* Configure GPIO AR600x UART */
626 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
631 /* Configure target refclk_hz */
632 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
639 /* firmware upload */
640 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
641 u8 **fw, size_t *fw_len)
643 const struct firmware *fw_entry;
646 ret = request_firmware(&fw_entry, filename, ar->dev);
650 *fw_len = fw_entry->size;
651 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
656 release_firmware(fw_entry);
663 * Check the device tree for a board-id and use it to construct
664 * the pathname to the firmware file. Used (for now) to find a
665 * fallback to the "bdata.bin" file--typically a symlink to the
666 * appropriate board-specific file.
668 static bool check_device_tree(struct ath6kl *ar)
670 static const char *board_id_prop = "atheros,board-id";
671 struct device_node *node;
672 char board_filename[64];
673 const char *board_id;
676 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
677 board_id = of_get_property(node, board_id_prop, NULL);
678 if (board_id == NULL) {
679 ath6kl_warn("No \"%s\" property on %s node.\n",
680 board_id_prop, node->name);
683 snprintf(board_filename, sizeof(board_filename),
684 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
686 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
689 ath6kl_err("Failed to get DT board file %s: %d\n",
690 board_filename, ret);
698 static bool check_device_tree(struct ath6kl *ar)
702 #endif /* CONFIG_OF */
704 static int ath6kl_fetch_board_file(struct ath6kl *ar)
706 const char *filename;
709 if (ar->fw_board != NULL)
712 if (WARN_ON(ar->hw.fw_board == NULL))
715 filename = ar->hw.fw_board;
717 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
720 /* managed to get proper board file */
724 if (check_device_tree(ar)) {
725 /* got board file from device tree */
729 /* there was no proper board file, try to use default instead */
730 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
733 filename = ar->hw.fw_default_board;
735 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
738 ath6kl_err("Failed to get default board file %s: %d\n",
743 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
744 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
749 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
754 if (ar->fw_otp != NULL)
757 if (ar->hw.fw.otp == NULL) {
758 ath6kl_dbg(ATH6KL_DBG_BOOT,
759 "no OTP file configured for this hw\n");
763 snprintf(filename, sizeof(filename), "%s/%s",
764 ar->hw.fw.dir, ar->hw.fw.otp);
766 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
769 ath6kl_err("Failed to get OTP file %s: %d\n",
777 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
782 if (ar->testmode == 0)
785 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
787 if (ar->testmode == 2) {
788 if (ar->hw.fw.utf == NULL) {
789 ath6kl_warn("testmode 2 not supported\n");
793 snprintf(filename, sizeof(filename), "%s/%s",
794 ar->hw.fw.dir, ar->hw.fw.utf);
796 if (ar->hw.fw.tcmd == NULL) {
797 ath6kl_warn("testmode 1 not supported\n");
801 snprintf(filename, sizeof(filename), "%s/%s",
802 ar->hw.fw.dir, ar->hw.fw.tcmd);
805 set_bit(TESTMODE, &ar->flag);
807 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
809 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
810 ar->testmode, filename, ret);
817 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
825 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
826 if (WARN_ON(ar->hw.fw.fw == NULL))
829 snprintf(filename, sizeof(filename), "%s/%s",
830 ar->hw.fw.dir, ar->hw.fw.fw);
832 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
834 ath6kl_err("Failed to get firmware file %s: %d\n",
842 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
847 if (ar->fw_patch != NULL)
850 if (ar->hw.fw.patch == NULL)
853 snprintf(filename, sizeof(filename), "%s/%s",
854 ar->hw.fw.dir, ar->hw.fw.patch);
856 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
859 ath6kl_err("Failed to get patch file %s: %d\n",
867 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
872 if (ar->testmode != 2)
875 if (ar->fw_testscript != NULL)
878 if (ar->hw.fw.testscript == NULL)
881 snprintf(filename, sizeof(filename), "%s/%s",
882 ar->hw.fw.dir, ar->hw.fw.testscript);
884 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
885 &ar->fw_testscript_len);
887 ath6kl_err("Failed to get testscript file %s: %d\n",
895 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
899 ret = ath6kl_fetch_otp_file(ar);
903 ret = ath6kl_fetch_fw_file(ar);
907 ret = ath6kl_fetch_patch_file(ar);
911 ret = ath6kl_fetch_testscript_file(ar);
918 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
920 size_t magic_len, len, ie_len;
921 const struct firmware *fw;
922 struct ath6kl_fw_ie *hdr;
925 int ret, ie_id, i, index, bit;
928 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
930 ret = request_firmware(&fw, filename, ar->dev);
937 /* magic also includes the null byte, check that as well */
938 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
940 if (len < magic_len) {
945 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
954 while (len > sizeof(struct ath6kl_fw_ie)) {
955 /* hdr is unaligned! */
956 hdr = (struct ath6kl_fw_ie *) data;
958 ie_id = le32_to_cpup(&hdr->id);
959 ie_len = le32_to_cpup(&hdr->len);
962 data += sizeof(*hdr);
970 case ATH6KL_FW_IE_FW_VERSION:
971 strlcpy(ar->wiphy->fw_version, data,
972 sizeof(ar->wiphy->fw_version));
974 ath6kl_dbg(ATH6KL_DBG_BOOT,
975 "found fw version %s\n",
976 ar->wiphy->fw_version);
978 case ATH6KL_FW_IE_OTP_IMAGE:
979 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
982 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
984 if (ar->fw_otp == NULL) {
989 ar->fw_otp_len = ie_len;
991 case ATH6KL_FW_IE_FW_IMAGE:
992 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
995 /* in testmode we already might have a fw file */
999 ar->fw = vmalloc(ie_len);
1001 if (ar->fw == NULL) {
1006 memcpy(ar->fw, data, ie_len);
1007 ar->fw_len = ie_len;
1009 case ATH6KL_FW_IE_PATCH_IMAGE:
1010 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1013 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1015 if (ar->fw_patch == NULL) {
1020 ar->fw_patch_len = ie_len;
1022 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1023 val = (__le32 *) data;
1024 ar->hw.reserved_ram_size = le32_to_cpup(val);
1026 ath6kl_dbg(ATH6KL_DBG_BOOT,
1027 "found reserved ram size ie 0x%d\n",
1028 ar->hw.reserved_ram_size);
1030 case ATH6KL_FW_IE_CAPABILITIES:
1031 ath6kl_dbg(ATH6KL_DBG_BOOT,
1032 "found firmware capabilities ie (%zd B)\n",
1035 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1039 if (index == ie_len)
1042 if (data[index] & (1 << bit))
1043 __set_bit(i, ar->fw_capabilities);
1046 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1047 ar->fw_capabilities,
1048 sizeof(ar->fw_capabilities));
1050 case ATH6KL_FW_IE_PATCH_ADDR:
1051 if (ie_len != sizeof(*val))
1054 val = (__le32 *) data;
1055 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1057 ath6kl_dbg(ATH6KL_DBG_BOOT,
1058 "found patch address ie 0x%x\n",
1059 ar->hw.dataset_patch_addr);
1061 case ATH6KL_FW_IE_BOARD_ADDR:
1062 if (ie_len != sizeof(*val))
1065 val = (__le32 *) data;
1066 ar->hw.board_addr = le32_to_cpup(val);
1068 ath6kl_dbg(ATH6KL_DBG_BOOT,
1069 "found board address ie 0x%x\n",
1072 case ATH6KL_FW_IE_VIF_MAX:
1073 if (ie_len != sizeof(*val))
1076 val = (__le32 *) data;
1077 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1080 if (ar->vif_max > 1 && !ar->p2p)
1081 ar->max_norm_iface = 2;
1083 ath6kl_dbg(ATH6KL_DBG_BOOT,
1084 "found vif max ie %d\n", ar->vif_max);
1087 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1088 le32_to_cpup(&hdr->id));
1098 release_firmware(fw);
1103 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1107 ret = ath6kl_fetch_board_file(ar);
1111 ret = ath6kl_fetch_testmode_file(ar);
1115 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1121 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1127 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1133 ret = ath6kl_fetch_fw_api1(ar);
1140 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1145 static int ath6kl_upload_board_file(struct ath6kl *ar)
1147 u32 board_address, board_ext_address, param;
1148 u32 board_data_size, board_ext_data_size;
1151 if (WARN_ON(ar->fw_board == NULL))
1155 * Determine where in Target RAM to write Board Data.
1156 * For AR6004, host determine Target RAM address for
1157 * writing board data.
1159 if (ar->hw.board_addr != 0) {
1160 board_address = ar->hw.board_addr;
1161 ath6kl_bmi_write_hi32(ar, hi_board_data,
1164 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1167 /* determine where in target ram to write extended board data */
1168 ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1170 if (ar->target_type == TARGET_TYPE_AR6003 &&
1171 board_ext_address == 0) {
1172 ath6kl_err("Failed to get board file target address.\n");
1176 switch (ar->target_type) {
1177 case TARGET_TYPE_AR6003:
1178 board_data_size = AR6003_BOARD_DATA_SZ;
1179 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1180 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1181 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1183 case TARGET_TYPE_AR6004:
1184 board_data_size = AR6004_BOARD_DATA_SZ;
1185 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1193 if (board_ext_address &&
1194 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1196 /* write extended board data */
1197 ath6kl_dbg(ATH6KL_DBG_BOOT,
1198 "writing extended board data to 0x%x (%d B)\n",
1199 board_ext_address, board_ext_data_size);
1201 ret = ath6kl_bmi_write(ar, board_ext_address,
1202 ar->fw_board + board_data_size,
1203 board_ext_data_size);
1205 ath6kl_err("Failed to write extended board data: %d\n",
1210 /* record that extended board data is initialized */
1211 param = (board_ext_data_size << 16) | 1;
1213 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1216 if (ar->fw_board_len < board_data_size) {
1217 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1222 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1223 board_address, board_data_size);
1225 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1229 ath6kl_err("Board file bmi write failed: %d\n", ret);
1233 /* record the fact that Board Data IS initialized */
1234 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1239 static int ath6kl_upload_otp(struct ath6kl *ar)
1242 bool from_hw = false;
1245 if (ar->fw_otp == NULL)
1248 address = ar->hw.app_load_addr;
1250 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1253 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1256 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1260 /* read firmware start address */
1261 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1264 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1268 if (ar->hw.app_start_override_addr == 0) {
1269 ar->hw.app_start_override_addr = address;
1273 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1274 from_hw ? " (from hw)" : "",
1275 ar->hw.app_start_override_addr);
1277 /* execute the OTP code */
1278 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1279 ar->hw.app_start_override_addr);
1281 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m);
1286 static int ath6kl_upload_firmware(struct ath6kl *ar)
1291 if (WARN_ON(ar->fw == NULL))
1294 address = ar->hw.app_load_addr;
1296 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1297 address, ar->fw_len);
1299 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1302 ath6kl_err("Failed to write firmware: %d\n", ret);
1307 * Set starting address for firmware
1308 * Don't need to setup app_start override addr on AR6004
1310 if (ar->target_type != TARGET_TYPE_AR6004) {
1311 address = ar->hw.app_start_override_addr;
1312 ath6kl_bmi_set_app_start(ar, address);
1317 static int ath6kl_upload_patch(struct ath6kl *ar)
1322 if (ar->fw_patch == NULL)
1325 address = ar->hw.dataset_patch_addr;
1327 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1328 address, ar->fw_patch_len);
1330 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1332 ath6kl_err("Failed to write patch file: %d\n", ret);
1336 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1341 static int ath6kl_upload_testscript(struct ath6kl *ar)
1346 if (ar->testmode != 2)
1349 if (ar->fw_testscript == NULL)
1352 address = ar->hw.testscript_addr;
1354 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1355 address, ar->fw_testscript_len);
1357 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1358 ar->fw_testscript_len);
1360 ath6kl_err("Failed to write testscript file: %d\n", ret);
1364 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1365 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1366 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1371 static int ath6kl_init_upload(struct ath6kl *ar)
1373 u32 param, options, sleep, address;
1376 if (ar->target_type != TARGET_TYPE_AR6003 &&
1377 ar->target_type != TARGET_TYPE_AR6004)
1380 /* temporarily disable system sleep */
1381 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1382 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1388 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1389 status = ath6kl_bmi_reg_write(ar, address, param);
1393 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1394 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1400 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1401 status = ath6kl_bmi_reg_write(ar, address, param);
1405 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1408 /* program analog PLL register */
1409 /* no need to control 40/44MHz clock on AR6004 */
1410 if (ar->target_type != TARGET_TYPE_AR6004) {
1411 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1417 /* Run at 80/88MHz by default */
1418 param = SM(CPU_CLOCK_STANDARD, 1);
1420 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1421 status = ath6kl_bmi_reg_write(ar, address, param);
1427 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1428 param = SM(LPO_CAL_ENABLE, 1);
1429 status = ath6kl_bmi_reg_write(ar, address, param);
1433 /* WAR to avoid SDIO CRC err */
1434 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1435 ath6kl_err("temporary war to avoid sdio crc error\n");
1438 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1439 status = ath6kl_bmi_reg_write(ar, address, param);
1445 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1446 status = ath6kl_bmi_reg_write(ar, address, param);
1450 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1451 status = ath6kl_bmi_reg_write(ar, address, param);
1455 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1456 status = ath6kl_bmi_reg_write(ar, address, param);
1460 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1461 status = ath6kl_bmi_reg_write(ar, address, param);
1466 /* write EEPROM data to Target RAM */
1467 status = ath6kl_upload_board_file(ar);
1471 /* transfer One time Programmable data */
1472 status = ath6kl_upload_otp(ar);
1476 /* Download Target firmware */
1477 status = ath6kl_upload_firmware(ar);
1481 status = ath6kl_upload_patch(ar);
1485 /* Download the test script */
1486 status = ath6kl_upload_testscript(ar);
1490 /* Restore system sleep */
1491 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1492 status = ath6kl_bmi_reg_write(ar, address, sleep);
1496 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1497 param = options | 0x20;
1498 status = ath6kl_bmi_reg_write(ar, address, param);
1505 int ath6kl_init_hw_params(struct ath6kl *ar)
1507 const struct ath6kl_hw *uninitialized_var(hw);
1510 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1513 if (hw->id == ar->version.target_ver)
1517 if (i == ARRAY_SIZE(hw_list)) {
1518 ath6kl_err("Unsupported hardware version: 0x%x\n",
1519 ar->version.target_ver);
1525 ath6kl_dbg(ATH6KL_DBG_BOOT,
1526 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1527 ar->version.target_ver, ar->target_type,
1528 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1529 ath6kl_dbg(ATH6KL_DBG_BOOT,
1530 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1531 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1532 ar->hw.reserved_ram_size);
1533 ath6kl_dbg(ATH6KL_DBG_BOOT,
1534 "refclk_hz %d uarttx_pin %d",
1535 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1540 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1543 case ATH6KL_HIF_TYPE_SDIO:
1545 case ATH6KL_HIF_TYPE_USB:
1552 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1557 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1559 ret = ath6kl_hif_power_on(ar);
1563 ret = ath6kl_configure_target(ar);
1567 ret = ath6kl_init_upload(ar);
1571 /* Do we need to finish the BMI phase */
1572 /* FIXME: return error from ath6kl_bmi_done() */
1573 if (ath6kl_bmi_done(ar)) {
1579 * The reason we have to wait for the target here is that the
1580 * driver layer has to init BMI in order to set the host block
1583 if (ath6kl_htc_wait_target(ar->htc_target)) {
1588 if (ath6kl_init_service_ep(ar)) {
1590 goto err_cleanup_scatter;
1593 /* setup credit distribution */
1594 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1597 ret = ath6kl_htc_start(ar->htc_target);
1599 /* FIXME: call this */
1600 ath6kl_cookie_cleanup(ar);
1601 goto err_cleanup_scatter;
1604 /* Wait for Wmi event to be ready */
1605 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1610 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1613 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1614 ath6kl_info("%s %s fw %s api %d%s\n",
1616 ath6kl_init_get_hif_name(ar->hif_type),
1617 ar->wiphy->fw_version,
1619 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1622 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1623 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1624 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1629 if (!timeleft || signal_pending(current)) {
1630 ath6kl_err("wmi is not ready or wait was interrupted\n");
1635 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1637 /* communicate the wmi protocol verision to the target */
1638 /* FIXME: return error */
1639 if ((ath6kl_set_host_app_area(ar)) != 0)
1640 ath6kl_err("unable to set the host app area\n");
1642 for (i = 0; i < ar->vif_max; i++) {
1643 ret = ath6kl_target_config_wlan_params(ar, i);
1651 ath6kl_htc_stop(ar->htc_target);
1652 err_cleanup_scatter:
1653 ath6kl_hif_cleanup_scatter(ar);
1655 ath6kl_hif_power_off(ar);
1660 int ath6kl_init_hw_start(struct ath6kl *ar)
1664 err = __ath6kl_init_hw_start(ar);
1667 ar->state = ATH6KL_STATE_ON;
1671 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1675 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1677 ath6kl_htc_stop(ar->htc_target);
1679 ath6kl_hif_stop(ar);
1681 ath6kl_bmi_reset(ar);
1683 ret = ath6kl_hif_power_off(ar);
1685 ath6kl_warn("failed to power off hif: %d\n", ret);
1690 int ath6kl_init_hw_stop(struct ath6kl *ar)
1694 err = __ath6kl_init_hw_stop(ar);
1697 ar->state = ATH6KL_STATE_OFF;
1701 void ath6kl_init_hw_restart(struct ath6kl *ar)
1703 clear_bit(WMI_READY, &ar->flag);
1705 ath6kl_cfg80211_stop_all(ar);
1707 if (__ath6kl_init_hw_stop(ar)) {
1708 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1712 if (__ath6kl_init_hw_start(ar)) {
1713 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1718 void ath6kl_stop_txrx(struct ath6kl *ar)
1720 struct ath6kl_vif *vif, *tmp_vif;
1723 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1725 if (down_interruptible(&ar->sem)) {
1726 ath6kl_err("down_interruptible failed\n");
1730 for (i = 0; i < AP_MAX_NUM_STA; i++)
1731 aggr_reset_state(ar->sta_list[i].aggr_conn);
1733 spin_lock_bh(&ar->list_lock);
1734 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1735 list_del(&vif->list);
1736 spin_unlock_bh(&ar->list_lock);
1737 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1739 ath6kl_cfg80211_vif_cleanup(vif);
1741 spin_lock_bh(&ar->list_lock);
1743 spin_unlock_bh(&ar->list_lock);
1745 clear_bit(WMI_READY, &ar->flag);
1748 * After wmi_shudown all WMI events will be dropped. We
1749 * need to cleanup the buffers allocated in AP mode and
1750 * give disconnect notification to stack, which usually
1751 * happens in the disconnect_event. Simulate the disconnect
1752 * event by calling the function directly. Sometimes
1753 * disconnect_event will be received when the debug logs
1756 ath6kl_wmi_shutdown(ar->wmi);
1758 clear_bit(WMI_ENABLED, &ar->flag);
1759 if (ar->htc_target) {
1760 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1761 ath6kl_htc_stop(ar->htc_target);
1765 * Try to reset the device if we can. The driver may have been
1766 * configure NOT to reset the target during a debug session.
1768 ath6kl_dbg(ATH6KL_DBG_TRC,
1769 "attempting to reset target on instance destroy\n");
1770 ath6kl_reset_device(ar, ar->target_type, true, true);
1774 EXPORT_SYMBOL(ath6kl_stop_txrx);