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ath6kl: Add support for AR6004 hardware version 1.3
[karo-tx-linux.git] / drivers / net / wireless / ath / ath6kl / init.c
1
2 /*
3  * Copyright (c) 2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5  *
6  * Permission to use, copy, modify, and/or distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
24 #include <linux/of.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
27
28 #include "core.h"
29 #include "cfg80211.h"
30 #include "target.h"
31 #include "debug.h"
32 #include "hif-ops.h"
33 #include "htc-ops.h"
34
35 static const struct ath6kl_hw hw_list[] = {
36         {
37                 .id                             = AR6003_HW_2_0_VERSION,
38                 .name                           = "ar6003 hw 2.0",
39                 .dataset_patch_addr             = 0x57e884,
40                 .app_load_addr                  = 0x543180,
41                 .board_ext_data_addr            = 0x57e500,
42                 .reserved_ram_size              = 6912,
43                 .refclk_hz                      = 26000000,
44                 .uarttx_pin                     = 8,
45                 .flags                          = 0,
46
47                 /* hw2.0 needs override address hardcoded */
48                 .app_start_override_addr        = 0x944C00,
49
50                 .fw = {
51                         .dir            = AR6003_HW_2_0_FW_DIR,
52                         .otp            = AR6003_HW_2_0_OTP_FILE,
53                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
54                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55                         .patch          = AR6003_HW_2_0_PATCH_FILE,
56                 },
57
58                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
59                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
60         },
61         {
62                 .id                             = AR6003_HW_2_1_1_VERSION,
63                 .name                           = "ar6003 hw 2.1.1",
64                 .dataset_patch_addr             = 0x57ff74,
65                 .app_load_addr                  = 0x1234,
66                 .board_ext_data_addr            = 0x542330,
67                 .reserved_ram_size              = 512,
68                 .refclk_hz                      = 26000000,
69                 .uarttx_pin                     = 8,
70                 .testscript_addr                = 0x57ef74,
71                 .flags                          = 0,
72
73                 .fw = {
74                         .dir            = AR6003_HW_2_1_1_FW_DIR,
75                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
76                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
77                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
79                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
81                 },
82
83                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
85         },
86         {
87                 .id                             = AR6004_HW_1_0_VERSION,
88                 .name                           = "ar6004 hw 1.0",
89                 .dataset_patch_addr             = 0x57e884,
90                 .app_load_addr                  = 0x1234,
91                 .board_ext_data_addr            = 0x437000,
92                 .reserved_ram_size              = 19456,
93                 .board_addr                     = 0x433900,
94                 .refclk_hz                      = 26000000,
95                 .uarttx_pin                     = 11,
96                 .flags                          = ATH6KL_HW_FLAG_64BIT_RATES,
97
98                 .fw = {
99                         .dir            = AR6004_HW_1_0_FW_DIR,
100                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
101                 },
102
103                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
104                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
105         },
106         {
107                 .id                             = AR6004_HW_1_1_VERSION,
108                 .name                           = "ar6004 hw 1.1",
109                 .dataset_patch_addr             = 0x57e884,
110                 .app_load_addr                  = 0x1234,
111                 .board_ext_data_addr            = 0x437000,
112                 .reserved_ram_size              = 11264,
113                 .board_addr                     = 0x43d400,
114                 .refclk_hz                      = 40000000,
115                 .uarttx_pin                     = 11,
116                 .flags                          = ATH6KL_HW_FLAG_64BIT_RATES,
117
118                 .fw = {
119                         .dir            = AR6004_HW_1_1_FW_DIR,
120                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
121                 },
122
123                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
124                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
125         },
126         {
127                 .id                             = AR6004_HW_1_2_VERSION,
128                 .name                           = "ar6004 hw 1.2",
129                 .dataset_patch_addr             = 0x436ecc,
130                 .app_load_addr                  = 0x1234,
131                 .board_ext_data_addr            = 0x437000,
132                 .reserved_ram_size              = 9216,
133                 .board_addr                     = 0x435c00,
134                 .refclk_hz                      = 40000000,
135                 .uarttx_pin                     = 11,
136                 .flags                          = ATH6KL_HW_FLAG_64BIT_RATES,
137
138                 .fw = {
139                         .dir            = AR6004_HW_1_2_FW_DIR,
140                         .fw             = AR6004_HW_1_2_FIRMWARE_FILE,
141                 },
142                 .fw_board               = AR6004_HW_1_2_BOARD_DATA_FILE,
143                 .fw_default_board       = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
144         },
145         {
146                 .id                             = AR6004_HW_1_3_VERSION,
147                 .name                           = "ar6004 hw 1.3",
148                 .dataset_patch_addr             = 0x437860,
149                 .app_load_addr                  = 0x1234,
150                 .board_ext_data_addr            = 0x437000,
151                 .reserved_ram_size              = 7168,
152                 .board_addr                     = 0x436400,
153                 .refclk_hz                      = 40000000,
154                 .uarttx_pin                     = 11,
155                 .flags                          = ATH6KL_HW_FLAG_64BIT_RATES,
156
157                 .fw = {
158                         .dir            = AR6004_HW_1_3_FW_DIR,
159                         .fw             = AR6004_HW_1_3_FIRMWARE_FILE,
160                 },
161
162                 .fw_board               = AR6004_HW_1_3_BOARD_DATA_FILE,
163                 .fw_default_board       = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
164         },
165 };
166
167 /*
168  * Include definitions here that can be used to tune the WLAN module
169  * behavior. Different customers can tune the behavior as per their needs,
170  * here.
171  */
172
173 /*
174  * This configuration item enable/disable keepalive support.
175  * Keepalive support: In the absence of any data traffic to AP, null
176  * frames will be sent to the AP at periodic interval, to keep the association
177  * active. This configuration item defines the periodic interval.
178  * Use value of zero to disable keepalive support
179  * Default: 60 seconds
180  */
181 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
182
183 /*
184  * This configuration item sets the value of disconnect timeout
185  * Firmware delays sending the disconnec event to the host for this
186  * timeout after is gets disconnected from the current AP.
187  * If the firmware successly roams within the disconnect timeout
188  * it sends a new connect event
189  */
190 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
191
192
193 #define ATH6KL_DATA_OFFSET    64
194 struct sk_buff *ath6kl_buf_alloc(int size)
195 {
196         struct sk_buff *skb;
197         u16 reserved;
198
199         /* Add chacheline space at front and back of buffer */
200         reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
201                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
202         skb = dev_alloc_skb(size + reserved);
203
204         if (skb)
205                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
206         return skb;
207 }
208
209 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
210 {
211         vif->ssid_len = 0;
212         memset(vif->ssid, 0, sizeof(vif->ssid));
213
214         vif->dot11_auth_mode = OPEN_AUTH;
215         vif->auth_mode = NONE_AUTH;
216         vif->prwise_crypto = NONE_CRYPT;
217         vif->prwise_crypto_len = 0;
218         vif->grp_crypto = NONE_CRYPT;
219         vif->grp_crypto_len = 0;
220         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
221         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
222         memset(vif->bssid, 0, sizeof(vif->bssid));
223         vif->bss_ch = 0;
224 }
225
226 static int ath6kl_set_host_app_area(struct ath6kl *ar)
227 {
228         u32 address, data;
229         struct host_app_area host_app_area;
230
231         /* Fetch the address of the host_app_area_s
232          * instance in the host interest area */
233         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
234         address = TARG_VTOP(ar->target_type, address);
235
236         if (ath6kl_diag_read32(ar, address, &data))
237                 return -EIO;
238
239         address = TARG_VTOP(ar->target_type, data);
240         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
241         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
242                               sizeof(struct host_app_area)))
243                 return -EIO;
244
245         return 0;
246 }
247
248 static inline void set_ac2_ep_map(struct ath6kl *ar,
249                                   u8 ac,
250                                   enum htc_endpoint_id ep)
251 {
252         ar->ac2ep_map[ac] = ep;
253         ar->ep2ac_map[ep] = ac;
254 }
255
256 /* connect to a service */
257 static int ath6kl_connectservice(struct ath6kl *ar,
258                                  struct htc_service_connect_req  *con_req,
259                                  char *desc)
260 {
261         int status;
262         struct htc_service_connect_resp response;
263
264         memset(&response, 0, sizeof(response));
265
266         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
267         if (status) {
268                 ath6kl_err("failed to connect to %s service status:%d\n",
269                            desc, status);
270                 return status;
271         }
272
273         switch (con_req->svc_id) {
274         case WMI_CONTROL_SVC:
275                 if (test_bit(WMI_ENABLED, &ar->flag))
276                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
277                 ar->ctrl_ep = response.endpoint;
278                 break;
279         case WMI_DATA_BE_SVC:
280                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
281                 break;
282         case WMI_DATA_BK_SVC:
283                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
284                 break;
285         case WMI_DATA_VI_SVC:
286                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
287                 break;
288         case WMI_DATA_VO_SVC:
289                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
290                 break;
291         default:
292                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
293                 return -EINVAL;
294         }
295
296         return 0;
297 }
298
299 static int ath6kl_init_service_ep(struct ath6kl *ar)
300 {
301         struct htc_service_connect_req connect;
302
303         memset(&connect, 0, sizeof(connect));
304
305         /* these fields are the same for all service endpoints */
306         connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
307         connect.ep_cb.rx = ath6kl_rx;
308         connect.ep_cb.rx_refill = ath6kl_rx_refill;
309         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
310
311         /*
312          * Set the max queue depth so that our ath6kl_tx_queue_full handler
313          * gets called.
314         */
315         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
316         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
317         if (!connect.ep_cb.rx_refill_thresh)
318                 connect.ep_cb.rx_refill_thresh++;
319
320         /* connect to control service */
321         connect.svc_id = WMI_CONTROL_SVC;
322         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
323                 return -EIO;
324
325         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
326
327         /*
328          * Limit the HTC message size on the send path, although e can
329          * receive A-MSDU frames of 4K, we will only send ethernet-sized
330          * (802.3) frames on the send path.
331          */
332         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
333
334         /*
335          * To reduce the amount of committed memory for larger A_MSDU
336          * frames, use the recv-alloc threshold mechanism for larger
337          * packets.
338          */
339         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
340         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
341
342         /*
343          * For the remaining data services set the connection flag to
344          * reduce dribbling, if configured to do so.
345          */
346         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
347         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
348         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
349
350         connect.svc_id = WMI_DATA_BE_SVC;
351
352         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
353                 return -EIO;
354
355         /* connect to back-ground map this to WMI LOW_PRI */
356         connect.svc_id = WMI_DATA_BK_SVC;
357         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
358                 return -EIO;
359
360         /* connect to Video service, map this to to HI PRI */
361         connect.svc_id = WMI_DATA_VI_SVC;
362         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
363                 return -EIO;
364
365         /*
366          * Connect to VO service, this is currently not mapped to a WMI
367          * priority stream due to historical reasons. WMI originally
368          * defined 3 priorities over 3 mailboxes We can change this when
369          * WMI is reworked so that priorities are not dependent on
370          * mailboxes.
371          */
372         connect.svc_id = WMI_DATA_VO_SVC;
373         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
374                 return -EIO;
375
376         return 0;
377 }
378
379 void ath6kl_init_control_info(struct ath6kl_vif *vif)
380 {
381         ath6kl_init_profile_info(vif);
382         vif->def_txkey_index = 0;
383         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
384         vif->ch_hint = 0;
385 }
386
387 /*
388  * Set HTC/Mbox operational parameters, this can only be called when the
389  * target is in the BMI phase.
390  */
391 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
392                                  u8 htc_ctrl_buf)
393 {
394         int status;
395         u32 blk_size;
396
397         blk_size = ar->mbox_info.block_size;
398
399         if (htc_ctrl_buf)
400                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
401
402         /* set the host interest area for the block size */
403         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
404         if (status) {
405                 ath6kl_err("bmi_write_memory for IO block size failed\n");
406                 goto out;
407         }
408
409         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
410                    blk_size,
411                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
412
413         if (mbox_isr_yield_val) {
414                 /* set the host interest area for the mbox ISR yield limit */
415                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
416                                                mbox_isr_yield_val);
417                 if (status) {
418                         ath6kl_err("bmi_write_memory for yield limit failed\n");
419                         goto out;
420                 }
421         }
422
423 out:
424         return status;
425 }
426
427 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
428 {
429         int ret;
430
431         /*
432          * Configure the device for rx dot11 header rules. "0,0" are the
433          * default values. Required if checksum offload is needed. Set
434          * RxMetaVersion to 2.
435          */
436         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
437                                                  ar->rx_meta_ver, 0, 0);
438         if (ret) {
439                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
440                 return ret;
441         }
442
443         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
444                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
445                                               IGNORE_PS_FAIL_DURING_SCAN);
446                 if (ret) {
447                         ath6kl_err("unable to set power save fail event policy: %d\n",
448                                    ret);
449                         return ret;
450                 }
451         }
452
453         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
454                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
455                                                    WMI_FOLLOW_BARKER_IN_ERP);
456                 if (ret) {
457                         ath6kl_err("unable to set barker preamble policy: %d\n",
458                                    ret);
459                         return ret;
460                 }
461         }
462
463         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
464                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
465         if (ret) {
466                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
467                 return ret;
468         }
469
470         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
471                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
472         if (ret) {
473                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
474                 return ret;
475         }
476
477         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
478                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
479                 if (ret) {
480                         ath6kl_err("unable to set txop bursting: %d\n", ret);
481                         return ret;
482                 }
483         }
484
485         if (ar->p2p && (ar->vif_max == 1 || idx)) {
486                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
487                                               P2P_FLAG_CAPABILITIES_REQ |
488                                               P2P_FLAG_MACADDR_REQ |
489                                               P2P_FLAG_HMODEL_REQ);
490                 if (ret) {
491                         ath6kl_dbg(ATH6KL_DBG_TRC,
492                                    "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
493                                    ret);
494                         ar->p2p = false;
495                 }
496         }
497
498         if (ar->p2p && (ar->vif_max == 1 || idx)) {
499                 /* Enable Probe Request reporting for P2P */
500                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
501                 if (ret) {
502                         ath6kl_dbg(ATH6KL_DBG_TRC,
503                                    "failed to enable Probe Request reporting (%d)\n",
504                                    ret);
505                 }
506         }
507
508         return ret;
509 }
510
511 int ath6kl_configure_target(struct ath6kl *ar)
512 {
513         u32 param, ram_reserved_size;
514         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
515         int i, status;
516
517         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
518         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
519                 ath6kl_err("bmi_write_memory for uart debug failed\n");
520                 return -EIO;
521         }
522
523         /*
524          * Note: Even though the firmware interface type is
525          * chosen as BSS_STA for all three interfaces, can
526          * be configured to IBSS/AP as long as the fw submode
527          * remains normal mode (0 - AP, STA and IBSS). But
528          * due to an target assert in firmware only one interface is
529          * configured for now.
530          */
531         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
532
533         for (i = 0; i < ar->vif_max; i++)
534                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
535
536         /*
537          * Submodes when fw does not support dynamic interface
538          * switching:
539          *              vif[0] - AP/STA/IBSS
540          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
541          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
542          * Otherwise, All the interface are initialized to p2p dev.
543          */
544
545         if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
546                      ar->fw_capabilities)) {
547                 for (i = 0; i < ar->vif_max; i++)
548                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
549                                 (i * HI_OPTION_FW_SUBMODE_BITS);
550         } else {
551                 for (i = 0; i < ar->max_norm_iface; i++)
552                         fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
553                                 (i * HI_OPTION_FW_SUBMODE_BITS);
554
555                 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
556                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
557                                 (i * HI_OPTION_FW_SUBMODE_BITS);
558
559                 if (ar->p2p && ar->vif_max == 1)
560                         fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
561         }
562
563         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
564                                   HTC_PROTOCOL_VERSION) != 0) {
565                 ath6kl_err("bmi_write_memory for htc version failed\n");
566                 return -EIO;
567         }
568
569         /* set the firmware mode to STA/IBSS/AP */
570         param = 0;
571
572         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
573                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
574                 return -EIO;
575         }
576
577         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
578         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
579         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
580
581         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
582         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
583
584         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
585                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
586                 return -EIO;
587         }
588
589         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
590
591         /*
592          * Hardcode the address use for the extended board data
593          * Ideally this should be pre-allocate by the OS at boot time
594          * But since it is a new feature and board data is loaded
595          * at init time, we have to workaround this from host.
596          * It is difficult to patch the firmware boot code,
597          * but possible in theory.
598          */
599
600         if (ar->target_type == TARGET_TYPE_AR6003) {
601                 param = ar->hw.board_ext_data_addr;
602                 ram_reserved_size = ar->hw.reserved_ram_size;
603
604                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
605                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
606                         return -EIO;
607                 }
608
609                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
610                                           ram_reserved_size) != 0) {
611                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
612                         return -EIO;
613                 }
614         }
615
616         /* set the block size for the target */
617         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
618                 /* use default number of control buffers */
619                 return -EIO;
620
621         /* Configure GPIO AR600x UART */
622         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
623                                        ar->hw.uarttx_pin);
624         if (status)
625                 return status;
626
627         /* Configure target refclk_hz */
628         status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
629         if (status)
630                 return status;
631
632         return 0;
633 }
634
635 /* firmware upload */
636 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
637                          u8 **fw, size_t *fw_len)
638 {
639         const struct firmware *fw_entry;
640         int ret;
641
642         ret = request_firmware(&fw_entry, filename, ar->dev);
643         if (ret)
644                 return ret;
645
646         *fw_len = fw_entry->size;
647         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
648
649         if (*fw == NULL)
650                 ret = -ENOMEM;
651
652         release_firmware(fw_entry);
653
654         return ret;
655 }
656
657 #ifdef CONFIG_OF
658 /*
659  * Check the device tree for a board-id and use it to construct
660  * the pathname to the firmware file.  Used (for now) to find a
661  * fallback to the "bdata.bin" file--typically a symlink to the
662  * appropriate board-specific file.
663  */
664 static bool check_device_tree(struct ath6kl *ar)
665 {
666         static const char *board_id_prop = "atheros,board-id";
667         struct device_node *node;
668         char board_filename[64];
669         const char *board_id;
670         int ret;
671
672         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
673                 board_id = of_get_property(node, board_id_prop, NULL);
674                 if (board_id == NULL) {
675                         ath6kl_warn("No \"%s\" property on %s node.\n",
676                                     board_id_prop, node->name);
677                         continue;
678                 }
679                 snprintf(board_filename, sizeof(board_filename),
680                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
681
682                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
683                                     &ar->fw_board_len);
684                 if (ret) {
685                         ath6kl_err("Failed to get DT board file %s: %d\n",
686                                    board_filename, ret);
687                         continue;
688                 }
689                 return true;
690         }
691         return false;
692 }
693 #else
694 static bool check_device_tree(struct ath6kl *ar)
695 {
696         return false;
697 }
698 #endif /* CONFIG_OF */
699
700 static int ath6kl_fetch_board_file(struct ath6kl *ar)
701 {
702         const char *filename;
703         int ret;
704
705         if (ar->fw_board != NULL)
706                 return 0;
707
708         if (WARN_ON(ar->hw.fw_board == NULL))
709                 return -EINVAL;
710
711         filename = ar->hw.fw_board;
712
713         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
714                             &ar->fw_board_len);
715         if (ret == 0) {
716                 /* managed to get proper board file */
717                 return 0;
718         }
719
720         if (check_device_tree(ar)) {
721                 /* got board file from device tree */
722                 return 0;
723         }
724
725         /* there was no proper board file, try to use default instead */
726         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
727                     filename, ret);
728
729         filename = ar->hw.fw_default_board;
730
731         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
732                             &ar->fw_board_len);
733         if (ret) {
734                 ath6kl_err("Failed to get default board file %s: %d\n",
735                            filename, ret);
736                 return ret;
737         }
738
739         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
740         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
741
742         return 0;
743 }
744
745 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
746 {
747         char filename[100];
748         int ret;
749
750         if (ar->fw_otp != NULL)
751                 return 0;
752
753         if (ar->hw.fw.otp == NULL) {
754                 ath6kl_dbg(ATH6KL_DBG_BOOT,
755                            "no OTP file configured for this hw\n");
756                 return 0;
757         }
758
759         snprintf(filename, sizeof(filename), "%s/%s",
760                  ar->hw.fw.dir, ar->hw.fw.otp);
761
762         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
763                             &ar->fw_otp_len);
764         if (ret) {
765                 ath6kl_err("Failed to get OTP file %s: %d\n",
766                            filename, ret);
767                 return ret;
768         }
769
770         return 0;
771 }
772
773 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
774 {
775         char filename[100];
776         int ret;
777
778         if (ar->testmode == 0)
779                 return 0;
780
781         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
782
783         if (ar->testmode == 2) {
784                 if (ar->hw.fw.utf == NULL) {
785                         ath6kl_warn("testmode 2 not supported\n");
786                         return -EOPNOTSUPP;
787                 }
788
789                 snprintf(filename, sizeof(filename), "%s/%s",
790                          ar->hw.fw.dir, ar->hw.fw.utf);
791         } else {
792                 if (ar->hw.fw.tcmd == NULL) {
793                         ath6kl_warn("testmode 1 not supported\n");
794                         return -EOPNOTSUPP;
795                 }
796
797                 snprintf(filename, sizeof(filename), "%s/%s",
798                          ar->hw.fw.dir, ar->hw.fw.tcmd);
799         }
800
801         set_bit(TESTMODE, &ar->flag);
802
803         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
804         if (ret) {
805                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
806                            ar->testmode, filename, ret);
807                 return ret;
808         }
809
810         return 0;
811 }
812
813 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
814 {
815         char filename[100];
816         int ret;
817
818         if (ar->fw != NULL)
819                 return 0;
820
821         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
822         if (WARN_ON(ar->hw.fw.fw == NULL))
823                 return -EINVAL;
824
825         snprintf(filename, sizeof(filename), "%s/%s",
826                  ar->hw.fw.dir, ar->hw.fw.fw);
827
828         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
829         if (ret) {
830                 ath6kl_err("Failed to get firmware file %s: %d\n",
831                            filename, ret);
832                 return ret;
833         }
834
835         return 0;
836 }
837
838 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
839 {
840         char filename[100];
841         int ret;
842
843         if (ar->fw_patch != NULL)
844                 return 0;
845
846         if (ar->hw.fw.patch == NULL)
847                 return 0;
848
849         snprintf(filename, sizeof(filename), "%s/%s",
850                  ar->hw.fw.dir, ar->hw.fw.patch);
851
852         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
853                             &ar->fw_patch_len);
854         if (ret) {
855                 ath6kl_err("Failed to get patch file %s: %d\n",
856                            filename, ret);
857                 return ret;
858         }
859
860         return 0;
861 }
862
863 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
864 {
865         char filename[100];
866         int ret;
867
868         if (ar->testmode != 2)
869                 return 0;
870
871         if (ar->fw_testscript != NULL)
872                 return 0;
873
874         if (ar->hw.fw.testscript == NULL)
875                 return 0;
876
877         snprintf(filename, sizeof(filename), "%s/%s",
878                  ar->hw.fw.dir, ar->hw.fw.testscript);
879
880         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
881                                 &ar->fw_testscript_len);
882         if (ret) {
883                 ath6kl_err("Failed to get testscript file %s: %d\n",
884                            filename, ret);
885                 return ret;
886         }
887
888         return 0;
889 }
890
891 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
892 {
893         int ret;
894
895         ret = ath6kl_fetch_otp_file(ar);
896         if (ret)
897                 return ret;
898
899         ret = ath6kl_fetch_fw_file(ar);
900         if (ret)
901                 return ret;
902
903         ret = ath6kl_fetch_patch_file(ar);
904         if (ret)
905                 return ret;
906
907         ret = ath6kl_fetch_testscript_file(ar);
908         if (ret)
909                 return ret;
910
911         return 0;
912 }
913
914 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
915 {
916         size_t magic_len, len, ie_len;
917         const struct firmware *fw;
918         struct ath6kl_fw_ie *hdr;
919         char filename[100];
920         const u8 *data;
921         int ret, ie_id, i, index, bit;
922         __le32 *val;
923
924         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
925
926         ret = request_firmware(&fw, filename, ar->dev);
927         if (ret)
928                 return ret;
929
930         data = fw->data;
931         len = fw->size;
932
933         /* magic also includes the null byte, check that as well */
934         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
935
936         if (len < magic_len) {
937                 ret = -EINVAL;
938                 goto out;
939         }
940
941         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
942                 ret = -EINVAL;
943                 goto out;
944         }
945
946         len -= magic_len;
947         data += magic_len;
948
949         /* loop elements */
950         while (len > sizeof(struct ath6kl_fw_ie)) {
951                 /* hdr is unaligned! */
952                 hdr = (struct ath6kl_fw_ie *) data;
953
954                 ie_id = le32_to_cpup(&hdr->id);
955                 ie_len = le32_to_cpup(&hdr->len);
956
957                 len -= sizeof(*hdr);
958                 data += sizeof(*hdr);
959
960                 if (len < ie_len) {
961                         ret = -EINVAL;
962                         goto out;
963                 }
964
965                 switch (ie_id) {
966                 case ATH6KL_FW_IE_FW_VERSION:
967                         strlcpy(ar->wiphy->fw_version, data,
968                                 sizeof(ar->wiphy->fw_version));
969
970                         ath6kl_dbg(ATH6KL_DBG_BOOT,
971                                    "found fw version %s\n",
972                                     ar->wiphy->fw_version);
973                         break;
974                 case ATH6KL_FW_IE_OTP_IMAGE:
975                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
976                                    ie_len);
977
978                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
979
980                         if (ar->fw_otp == NULL) {
981                                 ret = -ENOMEM;
982                                 goto out;
983                         }
984
985                         ar->fw_otp_len = ie_len;
986                         break;
987                 case ATH6KL_FW_IE_FW_IMAGE:
988                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
989                                    ie_len);
990
991                         /* in testmode we already might have a fw file */
992                         if (ar->fw != NULL)
993                                 break;
994
995                         ar->fw = vmalloc(ie_len);
996
997                         if (ar->fw == NULL) {
998                                 ret = -ENOMEM;
999                                 goto out;
1000                         }
1001
1002                         memcpy(ar->fw, data, ie_len);
1003                         ar->fw_len = ie_len;
1004                         break;
1005                 case ATH6KL_FW_IE_PATCH_IMAGE:
1006                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1007                                    ie_len);
1008
1009                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1010
1011                         if (ar->fw_patch == NULL) {
1012                                 ret = -ENOMEM;
1013                                 goto out;
1014                         }
1015
1016                         ar->fw_patch_len = ie_len;
1017                         break;
1018                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1019                         val = (__le32 *) data;
1020                         ar->hw.reserved_ram_size = le32_to_cpup(val);
1021
1022                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1023                                    "found reserved ram size ie 0x%d\n",
1024                                    ar->hw.reserved_ram_size);
1025                         break;
1026                 case ATH6KL_FW_IE_CAPABILITIES:
1027                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1028                                    "found firmware capabilities ie (%zd B)\n",
1029                                    ie_len);
1030
1031                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1032                                 index = i / 8;
1033                                 bit = i % 8;
1034
1035                                 if (index == ie_len)
1036                                         break;
1037
1038                                 if (data[index] & (1 << bit))
1039                                         __set_bit(i, ar->fw_capabilities);
1040                         }
1041
1042                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1043                                         ar->fw_capabilities,
1044                                         sizeof(ar->fw_capabilities));
1045                         break;
1046                 case ATH6KL_FW_IE_PATCH_ADDR:
1047                         if (ie_len != sizeof(*val))
1048                                 break;
1049
1050                         val = (__le32 *) data;
1051                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
1052
1053                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1054                                    "found patch address ie 0x%x\n",
1055                                    ar->hw.dataset_patch_addr);
1056                         break;
1057                 case ATH6KL_FW_IE_BOARD_ADDR:
1058                         if (ie_len != sizeof(*val))
1059                                 break;
1060
1061                         val = (__le32 *) data;
1062                         ar->hw.board_addr = le32_to_cpup(val);
1063
1064                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1065                                    "found board address ie 0x%x\n",
1066                                    ar->hw.board_addr);
1067                         break;
1068                 case ATH6KL_FW_IE_VIF_MAX:
1069                         if (ie_len != sizeof(*val))
1070                                 break;
1071
1072                         val = (__le32 *) data;
1073                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1074                                             ATH6KL_VIF_MAX);
1075
1076                         if (ar->vif_max > 1 && !ar->p2p)
1077                                 ar->max_norm_iface = 2;
1078
1079                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1080                                    "found vif max ie %d\n", ar->vif_max);
1081                         break;
1082                 default:
1083                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1084                                    le32_to_cpup(&hdr->id));
1085                         break;
1086                 }
1087
1088                 len -= ie_len;
1089                 data += ie_len;
1090         };
1091
1092         ret = 0;
1093 out:
1094         release_firmware(fw);
1095
1096         return ret;
1097 }
1098
1099 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1100 {
1101         int ret;
1102
1103         ret = ath6kl_fetch_board_file(ar);
1104         if (ret)
1105                 return ret;
1106
1107         ret = ath6kl_fetch_testmode_file(ar);
1108         if (ret)
1109                 return ret;
1110
1111         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1112         if (ret == 0) {
1113                 ar->fw_api = 3;
1114                 goto out;
1115         }
1116
1117         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1118         if (ret == 0) {
1119                 ar->fw_api = 2;
1120                 goto out;
1121         }
1122
1123         ret = ath6kl_fetch_fw_api1(ar);
1124         if (ret)
1125                 return ret;
1126
1127         ar->fw_api = 1;
1128
1129 out:
1130         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1131
1132         return 0;
1133 }
1134
1135 static int ath6kl_upload_board_file(struct ath6kl *ar)
1136 {
1137         u32 board_address, board_ext_address, param;
1138         u32 board_data_size, board_ext_data_size;
1139         int ret;
1140
1141         if (WARN_ON(ar->fw_board == NULL))
1142                 return -ENOENT;
1143
1144         /*
1145          * Determine where in Target RAM to write Board Data.
1146          * For AR6004, host determine Target RAM address for
1147          * writing board data.
1148          */
1149         if (ar->hw.board_addr != 0) {
1150                 board_address = ar->hw.board_addr;
1151                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1152                                       board_address);
1153         } else {
1154                 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1155         }
1156
1157         /* determine where in target ram to write extended board data */
1158         ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1159
1160         if (ar->target_type == TARGET_TYPE_AR6003 &&
1161             board_ext_address == 0) {
1162                 ath6kl_err("Failed to get board file target address.\n");
1163                 return -EINVAL;
1164         }
1165
1166         switch (ar->target_type) {
1167         case TARGET_TYPE_AR6003:
1168                 board_data_size = AR6003_BOARD_DATA_SZ;
1169                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1170                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1171                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1172                 break;
1173         case TARGET_TYPE_AR6004:
1174                 board_data_size = AR6004_BOARD_DATA_SZ;
1175                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1176                 break;
1177         default:
1178                 WARN_ON(1);
1179                 return -EINVAL;
1180                 break;
1181         }
1182
1183         if (board_ext_address &&
1184             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1185
1186                 /* write extended board data */
1187                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1188                            "writing extended board data to 0x%x (%d B)\n",
1189                            board_ext_address, board_ext_data_size);
1190
1191                 ret = ath6kl_bmi_write(ar, board_ext_address,
1192                                        ar->fw_board + board_data_size,
1193                                        board_ext_data_size);
1194                 if (ret) {
1195                         ath6kl_err("Failed to write extended board data: %d\n",
1196                                    ret);
1197                         return ret;
1198                 }
1199
1200                 /* record that extended board data is initialized */
1201                 param = (board_ext_data_size << 16) | 1;
1202
1203                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1204         }
1205
1206         if (ar->fw_board_len < board_data_size) {
1207                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1208                 ret = -EINVAL;
1209                 return ret;
1210         }
1211
1212         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1213                    board_address, board_data_size);
1214
1215         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1216                                board_data_size);
1217
1218         if (ret) {
1219                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1220                 return ret;
1221         }
1222
1223         /* record the fact that Board Data IS initialized */
1224         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1225
1226         return ret;
1227 }
1228
1229 static int ath6kl_upload_otp(struct ath6kl *ar)
1230 {
1231         u32 address, param;
1232         bool from_hw = false;
1233         int ret;
1234
1235         if (ar->fw_otp == NULL)
1236                 return 0;
1237
1238         address = ar->hw.app_load_addr;
1239
1240         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1241                    ar->fw_otp_len);
1242
1243         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1244                                        ar->fw_otp_len);
1245         if (ret) {
1246                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1247                 return ret;
1248         }
1249
1250         /* read firmware start address */
1251         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1252
1253         if (ret) {
1254                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1255                 return ret;
1256         }
1257
1258         if (ar->hw.app_start_override_addr == 0) {
1259                 ar->hw.app_start_override_addr = address;
1260                 from_hw = true;
1261         }
1262
1263         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1264                    from_hw ? " (from hw)" : "",
1265                    ar->hw.app_start_override_addr);
1266
1267         /* execute the OTP code */
1268         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1269                    ar->hw.app_start_override_addr);
1270         param = 0;
1271         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1272
1273         return ret;
1274 }
1275
1276 static int ath6kl_upload_firmware(struct ath6kl *ar)
1277 {
1278         u32 address;
1279         int ret;
1280
1281         if (WARN_ON(ar->fw == NULL))
1282                 return 0;
1283
1284         address = ar->hw.app_load_addr;
1285
1286         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1287                    address, ar->fw_len);
1288
1289         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1290
1291         if (ret) {
1292                 ath6kl_err("Failed to write firmware: %d\n", ret);
1293                 return ret;
1294         }
1295
1296         /*
1297          * Set starting address for firmware
1298          * Don't need to setup app_start override addr on AR6004
1299          */
1300         if (ar->target_type != TARGET_TYPE_AR6004) {
1301                 address = ar->hw.app_start_override_addr;
1302                 ath6kl_bmi_set_app_start(ar, address);
1303         }
1304         return ret;
1305 }
1306
1307 static int ath6kl_upload_patch(struct ath6kl *ar)
1308 {
1309         u32 address;
1310         int ret;
1311
1312         if (ar->fw_patch == NULL)
1313                 return 0;
1314
1315         address = ar->hw.dataset_patch_addr;
1316
1317         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1318                    address, ar->fw_patch_len);
1319
1320         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1321         if (ret) {
1322                 ath6kl_err("Failed to write patch file: %d\n", ret);
1323                 return ret;
1324         }
1325
1326         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1327
1328         return 0;
1329 }
1330
1331 static int ath6kl_upload_testscript(struct ath6kl *ar)
1332 {
1333         u32 address;
1334         int ret;
1335
1336         if (ar->testmode != 2)
1337                 return 0;
1338
1339         if (ar->fw_testscript == NULL)
1340                 return 0;
1341
1342         address = ar->hw.testscript_addr;
1343
1344         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1345                    address, ar->fw_testscript_len);
1346
1347         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1348                 ar->fw_testscript_len);
1349         if (ret) {
1350                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1351                 return ret;
1352         }
1353
1354         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1355         ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1356         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1357
1358         return 0;
1359 }
1360
1361 static int ath6kl_init_upload(struct ath6kl *ar)
1362 {
1363         u32 param, options, sleep, address;
1364         int status = 0;
1365
1366         if (ar->target_type != TARGET_TYPE_AR6003 &&
1367             ar->target_type != TARGET_TYPE_AR6004)
1368                 return -EINVAL;
1369
1370         /* temporarily disable system sleep */
1371         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1372         status = ath6kl_bmi_reg_read(ar, address, &param);
1373         if (status)
1374                 return status;
1375
1376         options = param;
1377
1378         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1379         status = ath6kl_bmi_reg_write(ar, address, param);
1380         if (status)
1381                 return status;
1382
1383         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1384         status = ath6kl_bmi_reg_read(ar, address, &param);
1385         if (status)
1386                 return status;
1387
1388         sleep = param;
1389
1390         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1391         status = ath6kl_bmi_reg_write(ar, address, param);
1392         if (status)
1393                 return status;
1394
1395         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1396                    options, sleep);
1397
1398         /* program analog PLL register */
1399         /* no need to control 40/44MHz clock on AR6004 */
1400         if (ar->target_type != TARGET_TYPE_AR6004) {
1401                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1402                                               0xF9104001);
1403
1404                 if (status)
1405                         return status;
1406
1407                 /* Run at 80/88MHz by default */
1408                 param = SM(CPU_CLOCK_STANDARD, 1);
1409
1410                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1411                 status = ath6kl_bmi_reg_write(ar, address, param);
1412                 if (status)
1413                         return status;
1414         }
1415
1416         param = 0;
1417         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1418         param = SM(LPO_CAL_ENABLE, 1);
1419         status = ath6kl_bmi_reg_write(ar, address, param);
1420         if (status)
1421                 return status;
1422
1423         /* WAR to avoid SDIO CRC err */
1424         if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1425             ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1426                 ath6kl_err("temporary war to avoid sdio crc error\n");
1427
1428                 param = 0x28;
1429                 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1430                 status = ath6kl_bmi_reg_write(ar, address, param);
1431                 if (status)
1432                         return status;
1433
1434                 param = 0x20;
1435
1436                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1437                 status = ath6kl_bmi_reg_write(ar, address, param);
1438                 if (status)
1439                         return status;
1440
1441                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1442                 status = ath6kl_bmi_reg_write(ar, address, param);
1443                 if (status)
1444                         return status;
1445
1446                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1447                 status = ath6kl_bmi_reg_write(ar, address, param);
1448                 if (status)
1449                         return status;
1450
1451                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1452                 status = ath6kl_bmi_reg_write(ar, address, param);
1453                 if (status)
1454                         return status;
1455         }
1456
1457         /* write EEPROM data to Target RAM */
1458         status = ath6kl_upload_board_file(ar);
1459         if (status)
1460                 return status;
1461
1462         /* transfer One time Programmable data */
1463         status = ath6kl_upload_otp(ar);
1464         if (status)
1465                 return status;
1466
1467         /* Download Target firmware */
1468         status = ath6kl_upload_firmware(ar);
1469         if (status)
1470                 return status;
1471
1472         status = ath6kl_upload_patch(ar);
1473         if (status)
1474                 return status;
1475
1476         /* Download the test script */
1477         status = ath6kl_upload_testscript(ar);
1478         if (status)
1479                 return status;
1480
1481         /* Restore system sleep */
1482         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1483         status = ath6kl_bmi_reg_write(ar, address, sleep);
1484         if (status)
1485                 return status;
1486
1487         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1488         param = options | 0x20;
1489         status = ath6kl_bmi_reg_write(ar, address, param);
1490         if (status)
1491                 return status;
1492
1493         return status;
1494 }
1495
1496 int ath6kl_init_hw_params(struct ath6kl *ar)
1497 {
1498         const struct ath6kl_hw *uninitialized_var(hw);
1499         int i;
1500
1501         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1502                 hw = &hw_list[i];
1503
1504                 if (hw->id == ar->version.target_ver)
1505                         break;
1506         }
1507
1508         if (i == ARRAY_SIZE(hw_list)) {
1509                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1510                            ar->version.target_ver);
1511                 return -EINVAL;
1512         }
1513
1514         ar->hw = *hw;
1515
1516         ath6kl_dbg(ATH6KL_DBG_BOOT,
1517                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1518                    ar->version.target_ver, ar->target_type,
1519                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1520         ath6kl_dbg(ATH6KL_DBG_BOOT,
1521                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1522                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1523                    ar->hw.reserved_ram_size);
1524         ath6kl_dbg(ATH6KL_DBG_BOOT,
1525                    "refclk_hz %d uarttx_pin %d",
1526                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1527
1528         return 0;
1529 }
1530
1531 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1532 {
1533         switch (type) {
1534         case ATH6KL_HIF_TYPE_SDIO:
1535                 return "sdio";
1536         case ATH6KL_HIF_TYPE_USB:
1537                 return "usb";
1538         }
1539
1540         return NULL;
1541 }
1542
1543 int ath6kl_init_hw_start(struct ath6kl *ar)
1544 {
1545         long timeleft;
1546         int ret, i;
1547
1548         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1549
1550         ret = ath6kl_hif_power_on(ar);
1551         if (ret)
1552                 return ret;
1553
1554         ret = ath6kl_configure_target(ar);
1555         if (ret)
1556                 goto err_power_off;
1557
1558         ret = ath6kl_init_upload(ar);
1559         if (ret)
1560                 goto err_power_off;
1561
1562         /* Do we need to finish the BMI phase */
1563         /* FIXME: return error from ath6kl_bmi_done() */
1564         if (ath6kl_bmi_done(ar)) {
1565                 ret = -EIO;
1566                 goto err_power_off;
1567         }
1568
1569         /*
1570          * The reason we have to wait for the target here is that the
1571          * driver layer has to init BMI in order to set the host block
1572          * size.
1573          */
1574         if (ath6kl_htc_wait_target(ar->htc_target)) {
1575                 ret = -EIO;
1576                 goto err_power_off;
1577         }
1578
1579         if (ath6kl_init_service_ep(ar)) {
1580                 ret = -EIO;
1581                 goto err_cleanup_scatter;
1582         }
1583
1584         /* setup credit distribution */
1585         ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1586
1587         /* start HTC */
1588         ret = ath6kl_htc_start(ar->htc_target);
1589         if (ret) {
1590                 /* FIXME: call this */
1591                 ath6kl_cookie_cleanup(ar);
1592                 goto err_cleanup_scatter;
1593         }
1594
1595         /* Wait for Wmi event to be ready */
1596         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1597                                                     test_bit(WMI_READY,
1598                                                              &ar->flag),
1599                                                     WMI_TIMEOUT);
1600
1601         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1602
1603
1604         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1605                 ath6kl_info("%s %s fw %s api %d%s\n",
1606                             ar->hw.name,
1607                             ath6kl_init_get_hif_name(ar->hif_type),
1608                             ar->wiphy->fw_version,
1609                             ar->fw_api,
1610                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1611         }
1612
1613         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1614                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1615                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1616                 ret = -EIO;
1617                 goto err_htc_stop;
1618         }
1619
1620         if (!timeleft || signal_pending(current)) {
1621                 ath6kl_err("wmi is not ready or wait was interrupted\n");
1622                 ret = -EIO;
1623                 goto err_htc_stop;
1624         }
1625
1626         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1627
1628         /* communicate the wmi protocol verision to the target */
1629         /* FIXME: return error */
1630         if ((ath6kl_set_host_app_area(ar)) != 0)
1631                 ath6kl_err("unable to set the host app area\n");
1632
1633         for (i = 0; i < ar->vif_max; i++) {
1634                 ret = ath6kl_target_config_wlan_params(ar, i);
1635                 if (ret)
1636                         goto err_htc_stop;
1637         }
1638
1639         ar->state = ATH6KL_STATE_ON;
1640
1641         return 0;
1642
1643 err_htc_stop:
1644         ath6kl_htc_stop(ar->htc_target);
1645 err_cleanup_scatter:
1646         ath6kl_hif_cleanup_scatter(ar);
1647 err_power_off:
1648         ath6kl_hif_power_off(ar);
1649
1650         return ret;
1651 }
1652
1653 int ath6kl_init_hw_stop(struct ath6kl *ar)
1654 {
1655         int ret;
1656
1657         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1658
1659         ath6kl_htc_stop(ar->htc_target);
1660
1661         ath6kl_hif_stop(ar);
1662
1663         ath6kl_bmi_reset(ar);
1664
1665         ret = ath6kl_hif_power_off(ar);
1666         if (ret)
1667                 ath6kl_warn("failed to power off hif: %d\n", ret);
1668
1669         ar->state = ATH6KL_STATE_OFF;
1670
1671         return 0;
1672 }
1673
1674 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1675 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1676 {
1677         static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1678         bool discon_issued;
1679
1680         netif_stop_queue(vif->ndev);
1681
1682         clear_bit(WLAN_ENABLED, &vif->flags);
1683
1684         if (wmi_ready) {
1685                 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1686                                 test_bit(CONNECT_PEND, &vif->flags);
1687                 ath6kl_disconnect(vif);
1688                 del_timer(&vif->disconnect_timer);
1689
1690                 if (discon_issued)
1691                         ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1692                                                 (vif->nw_type & AP_NETWORK) ?
1693                                                 bcast_mac : vif->bssid,
1694                                                 0, NULL, 0);
1695         }
1696
1697         if (vif->scan_req) {
1698                 cfg80211_scan_done(vif->scan_req, true);
1699                 vif->scan_req = NULL;
1700         }
1701
1702         /* need to clean up enhanced bmiss detection fw state */
1703         ath6kl_cfg80211_sta_bmiss_enhance(vif, false);
1704 }
1705
1706 void ath6kl_stop_txrx(struct ath6kl *ar)
1707 {
1708         struct ath6kl_vif *vif, *tmp_vif;
1709         int i;
1710
1711         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1712
1713         if (down_interruptible(&ar->sem)) {
1714                 ath6kl_err("down_interruptible failed\n");
1715                 return;
1716         }
1717
1718         for (i = 0; i < AP_MAX_NUM_STA; i++)
1719                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1720
1721         spin_lock_bh(&ar->list_lock);
1722         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1723                 list_del(&vif->list);
1724                 spin_unlock_bh(&ar->list_lock);
1725                 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1726                 rtnl_lock();
1727                 ath6kl_cfg80211_vif_cleanup(vif);
1728                 rtnl_unlock();
1729                 spin_lock_bh(&ar->list_lock);
1730         }
1731         spin_unlock_bh(&ar->list_lock);
1732
1733         clear_bit(WMI_READY, &ar->flag);
1734
1735         /*
1736          * After wmi_shudown all WMI events will be dropped. We
1737          * need to cleanup the buffers allocated in AP mode and
1738          * give disconnect notification to stack, which usually
1739          * happens in the disconnect_event. Simulate the disconnect
1740          * event by calling the function directly. Sometimes
1741          * disconnect_event will be received when the debug logs
1742          * are collected.
1743          */
1744         ath6kl_wmi_shutdown(ar->wmi);
1745
1746         clear_bit(WMI_ENABLED, &ar->flag);
1747         if (ar->htc_target) {
1748                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1749                 ath6kl_htc_stop(ar->htc_target);
1750         }
1751
1752         /*
1753          * Try to reset the device if we can. The driver may have been
1754          * configure NOT to reset the target during a debug session.
1755          */
1756         ath6kl_dbg(ATH6KL_DBG_TRC,
1757                    "attempting to reset target on instance destroy\n");
1758         ath6kl_reset_device(ar, ar->target_type, true, true);
1759
1760         clear_bit(WLAN_ENABLED, &ar->flag);
1761
1762         up(&ar->sem);
1763 }
1764 EXPORT_SYMBOL(ath6kl_stop_txrx);