2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
35 /* Macro to expand scalars to 64-bit objects */
37 #define ito64(x) (sizeof(x) == 1) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
40 (((unsigned long long int)(x)) & 0xffff) : \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
48 (_l) &= ((_sz) - 1); \
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
54 (_l) &= ((_sz) - 1); \
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
90 * @BUF_AGGR: Indicates whether the buffer can be aggregated
91 * (used in aggregation scheduling)
92 * @BUF_XRETRY: To denote excessive retries of the buffer
100 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
101 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
102 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
104 #define ATH_TXSTATUS_RING_SIZE 64
108 dma_addr_t dd_desc_paddr;
110 struct ath_buf *dd_bufptr;
113 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
114 struct list_head *head, const char *name,
115 int nbuf, int ndesc, bool is_tx);
116 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
117 struct list_head *head);
123 #define ATH_RXBUF 512
124 #define ATH_TXBUF 512
125 #define ATH_TXBUF_RESERVE 5
126 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
127 #define ATH_TXMAXTRY 13
129 #define TID_TO_WME_AC(_tid) \
130 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
131 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
132 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
135 #define ATH_AGGR_DELIM_SZ 4
136 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
137 /* number of delimiters for encryption padding */
138 #define ATH_AGGR_ENCRYPTDELIM 10
139 /* minimum h/w qdepth to be sustained to maximize aggregation */
140 #define ATH_AGGR_MIN_QDEPTH 2
141 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
143 #define IEEE80211_SEQ_SEQ_SHIFT 4
144 #define IEEE80211_SEQ_MAX 4096
145 #define IEEE80211_WEP_IVLEN 3
146 #define IEEE80211_WEP_KIDLEN 1
147 #define IEEE80211_WEP_CRCLEN 4
148 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
149 (IEEE80211_WEP_IVLEN + \
150 IEEE80211_WEP_KIDLEN + \
151 IEEE80211_WEP_CRCLEN))
153 /* return whether a bit at index _n in bitmap _bm is set
154 * _sz is the size of the bitmap */
155 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
156 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
158 /* return block-ack bitmap index given sequence and starting sequence */
159 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
161 /* returns delimiter padding required given the packet length */
162 #define ATH_AGGR_GET_NDELIM(_len) \
163 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
164 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
166 #define BAW_WITHIN(_start, _bawsz, _seqno) \
167 ((((_seqno) - (_start)) & 4095) < (_bawsz))
169 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
171 #define ATH_TX_COMPLETE_POLL_INT 1000
173 enum ATH_AGGR_STATUS {
179 #define ATH_TXFIFO_DEPTH 8
181 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
182 u32 axq_qnum; /* ath9k hardware queue number */
184 struct list_head axq_q;
189 bool axq_tx_inprogress;
190 struct list_head axq_acq;
191 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
192 struct list_head txq_fifo_pending;
201 struct list_head list;
202 struct list_head tid_q;
205 struct ath_frame_info {
208 enum ath9k_key_type keytype;
213 struct ath_buf_state {
216 unsigned long bfs_paprd_timestamp;
217 enum ath9k_internal_frame_type bfs_ftype;
221 struct list_head list;
222 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
224 struct ath_buf *bf_next; /* next subframe in the aggregate */
225 struct sk_buff *bf_mpdu; /* enclosing frame structure */
226 void *bf_desc; /* virtual addr of desc */
227 dma_addr_t bf_daddr; /* physical addr of desc */
228 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
231 struct ath_buf_state bf_state;
235 struct list_head list;
236 struct list_head buf_q;
238 struct ath_atx_ac *ac;
239 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
244 int baw_head; /* first un-acked tx buffer */
245 int baw_tail; /* next unused tx buffer slot */
252 #ifdef CONFIG_ATH9K_DEBUGFS
253 struct list_head list; /* for sc->nodes */
254 struct ieee80211_sta *sta; /* station struct we're part of */
256 struct ath_atx_tid tid[WME_NUM_TID];
257 struct ath_atx_ac ac[WME_NUM_AC];
262 #define AGGR_CLEANUP BIT(1)
263 #define AGGR_ADDBA_COMPLETE BIT(2)
264 #define AGGR_ADDBA_PROGRESS BIT(3)
266 struct ath_tx_control {
270 enum ath9k_internal_frame_type frame_type;
274 #define ATH_TX_ERROR 0x01
275 #define ATH_TX_XRETRY 0x02
276 #define ATH_TX_BAR 0x04
279 * @txq_map: Index is mac80211 queue number. This is
280 * not necessarily the same as the hardware queue number
286 spinlock_t txbuflock;
287 struct list_head txbuf;
288 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
289 struct ath_descdma txdma;
290 struct ath_txq *txq_map[WME_NUM_AC];
294 struct sk_buff_head rx_fifo;
295 struct sk_buff_head rx_buffers;
303 unsigned int rxfilter;
304 spinlock_t rxbuflock;
305 struct list_head rxbuf;
306 struct ath_descdma rxdma;
307 struct ath_buf *rx_bufptr;
308 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
310 struct sk_buff *frag;
313 int ath_startrecv(struct ath_softc *sc);
314 bool ath_stoprecv(struct ath_softc *sc);
315 void ath_flushrecv(struct ath_softc *sc);
316 u32 ath_calcrxfilter(struct ath_softc *sc);
317 int ath_rx_init(struct ath_softc *sc, int nbufs);
318 void ath_rx_cleanup(struct ath_softc *sc);
319 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
320 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
321 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
322 bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
323 void ath_draintxq(struct ath_softc *sc,
324 struct ath_txq *txq, bool retry_tx);
325 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
326 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
327 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
328 int ath_tx_init(struct ath_softc *sc, int nbufs);
329 void ath_tx_cleanup(struct ath_softc *sc);
330 int ath_txq_update(struct ath_softc *sc, int qnum,
331 struct ath9k_tx_queue_info *q);
332 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
333 struct ath_tx_control *txctl);
334 void ath_tx_tasklet(struct ath_softc *sc);
335 void ath_tx_edma_tasklet(struct ath_softc *sc);
336 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
338 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
339 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
347 bool is_bslot_active, primary_sta_vif;
348 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
349 struct ath_buf *av_bcbuf;
352 /*******************/
353 /* Beacon Handling */
354 /*******************/
357 * Regardless of the number of beacons we stagger, (i.e. regardless of the
358 * number of BSSIDs) if a given beacon does not go out even after waiting this
359 * number of beacon intervals, the game's up.
361 #define BSTUCK_THRESH 9
363 #define ATH_DEFAULT_BINTVAL 100 /* TU */
364 #define ATH_DEFAULT_BMISS_LIMIT 10
365 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
367 struct ath_beacon_config {
377 OK, /* no change needed */
378 UPDATE, /* update pending */
379 COMMIT /* beacon sent, commit change */
380 } updateslot; /* slot time update fsm */
386 struct ieee80211_vif *bslot[ATH_BCBUF];
389 struct ath9k_tx_queue_info beacon_qi;
390 struct ath_descdma bdma;
391 struct ath_txq *cabq;
392 struct list_head bbuf;
395 void ath_beacon_tasklet(unsigned long data);
396 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
397 int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
398 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
399 int ath_beaconq_config(struct ath_softc *sc);
400 void ath_set_beacon(struct ath_softc *sc);
401 void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
407 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
408 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
409 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
410 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
411 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
412 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
413 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
415 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
417 void ath_hw_check(struct work_struct *work);
418 void ath_paprd_calibrate(struct work_struct *work);
419 void ath_ani_calibrate(unsigned long data);
426 bool hw_timer_enabled;
427 spinlock_t btcoex_lock;
428 struct timer_list period_timer; /* Timer for BT period */
430 unsigned long bt_priority_time;
431 int bt_stomp_type; /* Types of BT stomping */
432 u32 btcoex_no_stomp; /* in usec */
433 u32 btcoex_period; /* in usec */
434 u32 btscan_no_stomp; /* in usec */
435 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
438 int ath_init_btcoex_timer(struct ath_softc *sc);
439 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
440 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
442 /********************/
444 /********************/
446 #define ATH_LED_PIN_DEF 1
447 #define ATH_LED_PIN_9287 8
448 #define ATH_LED_PIN_9485 6
450 #ifdef CONFIG_MAC80211_LEDS
451 void ath_init_leds(struct ath_softc *sc);
452 void ath_deinit_leds(struct ath_softc *sc);
454 static inline void ath_init_leds(struct ath_softc *sc)
458 static inline void ath_deinit_leds(struct ath_softc *sc)
464 /* Antenna diversity/combining */
465 #define ATH_ANT_RX_CURRENT_SHIFT 4
466 #define ATH_ANT_RX_MAIN_SHIFT 2
467 #define ATH_ANT_RX_MASK 0x3
469 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
470 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
471 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
472 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
473 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
474 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
475 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
477 #define ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA -3
478 #define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
479 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
480 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
481 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
483 enum ath9k_ant_div_comb_lna_conf {
484 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
485 ATH_ANT_DIV_COMB_LNA2,
486 ATH_ANT_DIV_COMB_LNA1,
487 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
490 struct ath_ant_comb {
509 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
510 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
515 unsigned long scan_start_time;
518 /********************/
519 /* Main driver core */
520 /********************/
523 * Default cache line size, in bytes.
524 * Used when PCI device not fully initialized by bootrom/BIOS
526 #define DEFAULT_CACHELINE 32
527 #define ATH_REGCLASSIDS_MAX 10
528 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
529 #define ATH_MAX_SW_RETRIES 10
530 #define ATH_CHAN_MAX 255
532 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
533 #define ATH_RATE_DUMMY_MARKER 0
535 #define SC_OP_INVALID BIT(0)
536 #define SC_OP_BEACONS BIT(1)
537 #define SC_OP_RXAGGR BIT(2)
538 #define SC_OP_TXAGGR BIT(3)
539 #define SC_OP_OFFCHANNEL BIT(4)
540 #define SC_OP_PREAMBLE_SHORT BIT(5)
541 #define SC_OP_PROTECT_ENABLE BIT(6)
542 #define SC_OP_RXFLUSH BIT(7)
543 #define SC_OP_LED_ASSOCIATED BIT(8)
544 #define SC_OP_LED_ON BIT(9)
545 #define SC_OP_TSF_RESET BIT(11)
546 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
547 #define SC_OP_BT_SCAN BIT(13)
548 #define SC_OP_ANI_RUN BIT(14)
549 #define SC_OP_ENABLE_APM BIT(15)
550 #define SC_OP_PRIM_STA_VIF BIT(16)
552 /* Powersave flags */
553 #define PS_WAIT_FOR_BEACON BIT(0)
554 #define PS_WAIT_FOR_CAB BIT(1)
555 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
556 #define PS_WAIT_FOR_TX_ACK BIT(3)
557 #define PS_BEACON_SYNC BIT(4)
559 struct ath_rate_table;
561 struct ath9k_vif_iter_data {
562 const u8 *hw_macaddr; /* phy's hardware address, set
563 * before starting iteration for
566 u8 mask[ETH_ALEN]; /* bssid mask */
567 int naps; /* number of AP vifs */
568 int nmeshes; /* number of mesh vifs */
569 int nstations; /* number of station vifs */
570 int nwds; /* number of nwd vifs */
571 int nadhocs; /* number of adhoc vifs */
572 int nothers; /* number of vifs not specified above. */
576 struct ieee80211_hw *hw;
581 struct survey_info *cur_survey;
582 struct survey_info survey[ATH9K_NUM_CHANNELS];
584 struct tasklet_struct intr_tq;
585 struct tasklet_struct bcon_tasklet;
586 struct ath_hw *sc_ah;
589 spinlock_t sc_serial_rw;
590 spinlock_t sc_pm_lock;
591 spinlock_t sc_pcu_lock;
593 struct work_struct paprd_work;
594 struct work_struct hw_check_work;
595 struct completion paprd_complete;
597 unsigned int hw_busy_count;
600 u32 sc_flags; /* SC_OP_* */
601 u16 ps_flags; /* PS_* */
607 unsigned long ps_usecount;
609 struct ath_config config;
612 struct ath_beacon beacon;
613 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
615 #ifdef CONFIG_MAC80211_LEDS
618 struct led_classdev led_cdev;
621 struct ath9k_hw_cal_data caldata;
624 #ifdef CONFIG_ATH9K_DEBUGFS
625 struct ath9k_debug debug;
626 spinlock_t nodes_lock;
627 struct list_head nodes; /* basically, stations */
628 unsigned int tx_complete_poll_work_seen;
630 struct ath_beacon_config cur_beacon_conf;
631 struct delayed_work tx_complete_work;
632 struct delayed_work hw_pll_work;
633 struct ath_btcoex btcoex;
635 struct ath_descdma txsdma;
637 struct ath_ant_comb ant_comb;
640 void ath9k_tasklet(unsigned long data);
641 int ath_reset(struct ath_softc *sc, bool retry_tx);
642 int ath_cabq_update(struct ath_softc *);
644 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
646 common->bus_ops->read_cachesize(common, csz);
649 extern struct ieee80211_ops ath9k_ops;
650 extern int ath9k_modparam_nohwcrypt;
651 extern int led_blink;
652 extern bool is_ath9k_unloaded;
654 irqreturn_t ath_isr(int irq, void *dev);
655 void ath9k_init_crypto(struct ath_softc *sc);
656 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
657 const struct ath_bus_ops *bus_ops);
658 void ath9k_deinit_device(struct ath_softc *sc);
659 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
660 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
661 struct ath9k_channel *hchan);
663 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
664 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
665 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
666 bool ath9k_uses_beacons(int type);
669 int ath_pci_init(void);
670 void ath_pci_exit(void);
672 static inline int ath_pci_init(void) { return 0; };
673 static inline void ath_pci_exit(void) {};
676 #ifdef CONFIG_ATHEROS_AR71XX
677 int ath_ahb_init(void);
678 void ath_ahb_exit(void);
680 static inline int ath_ahb_init(void) { return 0; };
681 static inline void ath_ahb_exit(void) {};
684 void ath9k_ps_wakeup(struct ath_softc *sc);
685 void ath9k_ps_restore(struct ath_softc *sc);
687 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
689 void ath_start_rfkill_poll(struct ath_softc *sc);
690 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
691 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
692 struct ieee80211_vif *vif,
693 struct ath9k_vif_iter_data *iter_data);