2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <net/mac80211.h>
23 #include <linux/leds.h>
31 /* Macro to expand scalars to 64-bit objects */
33 #define ito64(x) (sizeof(x) == 8) ? \
34 (((unsigned long long int)(x)) & (0xff)) : \
36 (((unsigned long long int)(x)) & 0xffff) : \
37 ((sizeof(x) == 32) ? \
38 (((unsigned long long int)(x)) & 0xffffffff) : \
39 (unsigned long long int)(x))
41 /* increment with wrap-around */
42 #define INCR(_l, _sz) do { \
44 (_l) &= ((_sz) - 1); \
47 /* decrement with wrap-around */
48 #define DECR(_l, _sz) do { \
50 (_l) &= ((_sz) - 1); \
53 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
55 #define ASSERT(exp) BUG_ON(!(exp))
57 #define TSF_TO_TU(_h,_l) \
58 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
60 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
62 static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
87 * enum buffer_type - Buffer type flags
89 * @BUF_HT: Send this buffer using HT capabilities
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_RETRY: Indicates whether the buffer is retried
94 * @BUF_XRETRY: To denote excessive retries of the buffer
104 struct ath_buf_state {
113 enum ath9k_key_type bfs_keytype;
116 #define bf_nframes bf_state.bfs_nframes
117 #define bf_al bf_state.bfs_al
118 #define bf_frmlen bf_state.bfs_frmlen
119 #define bf_retries bf_state.bfs_retries
120 #define bf_seqno bf_state.bfs_seqno
121 #define bf_tidno bf_state.bfs_tidno
122 #define bf_keyix bf_state.bfs_keyix
123 #define bf_keytype bf_state.bfs_keytype
124 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
125 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
126 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
127 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
128 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
131 struct list_head list;
132 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
134 struct ath_buf *bf_next; /* next subframe in the aggregate */
135 struct sk_buff *bf_mpdu; /* enclosing frame structure */
136 struct ath_desc *bf_desc; /* virtual addr of desc */
137 dma_addr_t bf_daddr; /* physical addr of desc */
138 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
141 struct ath_buf_state bf_state;
142 dma_addr_t bf_dmacontext;
146 struct ath_desc *dd_desc;
147 dma_addr_t dd_desc_paddr;
149 struct ath_buf *dd_bufptr;
152 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
153 struct list_head *head, const char *name,
154 int nbuf, int ndesc);
155 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
156 struct list_head *head);
162 #define ATH_MAX_ANTENNA 3
163 #define ATH_RXBUF 512
164 #define WME_NUM_TID 16
165 #define ATH_TXBUF 512
166 #define ATH_TXMAXTRY 13
167 #define ATH_11N_TXMAXTRY 10
168 #define ATH_MGT_TXMAXTRY 4
169 #define WME_BA_BMP_SIZE 64
170 #define WME_MAX_BA WME_BA_BMP_SIZE
171 #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
173 #define TID_TO_WME_AC(_tid) \
174 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
175 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
176 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
185 #define ADDBA_EXCHANGE_ATTEMPTS 10
186 #define ATH_AGGR_DELIM_SZ 4
187 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
188 /* number of delimiters for encryption padding */
189 #define ATH_AGGR_ENCRYPTDELIM 10
190 /* minimum h/w qdepth to be sustained to maximize aggregation */
191 #define ATH_AGGR_MIN_QDEPTH 2
192 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
193 #define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
194 #define ATH_AMPDU_LIMIT_DEFAULT ATH_AMPDU_LIMIT_MAX
196 #define IEEE80211_SEQ_SEQ_SHIFT 4
197 #define IEEE80211_SEQ_MAX 4096
198 #define IEEE80211_MIN_AMPDU_BUF 0x8
199 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
200 #define IEEE80211_WEP_IVLEN 3
201 #define IEEE80211_WEP_KIDLEN 1
202 #define IEEE80211_WEP_CRCLEN 4
203 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
204 (IEEE80211_WEP_IVLEN + \
205 IEEE80211_WEP_KIDLEN + \
206 IEEE80211_WEP_CRCLEN))
208 /* return whether a bit at index _n in bitmap _bm is set
209 * _sz is the size of the bitmap */
210 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
211 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
213 /* return block-ack bitmap index given sequence and starting sequence */
214 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
216 /* returns delimiter padding required given the packet length */
217 #define ATH_AGGR_GET_NDELIM(_len) \
218 (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
219 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
221 #define BAW_WITHIN(_start, _bawsz, _seqno) \
222 ((((_seqno) - (_start)) & 4095) < (_bawsz))
224 #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
225 #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
226 #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
227 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
229 enum ATH_AGGR_STATUS {
238 struct list_head axq_q;
244 struct ath_buf *axq_linkbuf;
246 /* first desc of the last descriptor that contains CTS */
247 struct ath_desc *axq_lastdsWithCTS;
249 /* final desc of the gating desc that determines whether
250 lastdsWithCTS has been DMA'ed or not */
251 struct ath_desc *axq_gatingds;
253 struct list_head axq_acq;
256 #define AGGR_CLEANUP BIT(1)
257 #define AGGR_ADDBA_COMPLETE BIT(2)
258 #define AGGR_ADDBA_PROGRESS BIT(3)
261 struct list_head list;
262 struct list_head buf_q;
264 struct ath_atx_ac *ac;
265 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
270 int baw_head; /* first un-acked tx buffer */
271 int baw_tail; /* next unused tx buffer slot */
275 int addba_exchangeattempts;
281 struct list_head list;
282 struct list_head tid_q;
285 struct ath_tx_control {
288 enum ath9k_internal_frame_type frame_type;
291 #define ATH_TX_ERROR 0x01
292 #define ATH_TX_XRETRY 0x02
293 #define ATH_TX_BAR 0x04
296 struct ath_softc *an_sc;
297 struct ath_atx_tid tid[WME_NUM_TID];
298 struct ath_atx_ac ac[WME_NUM_AC];
306 int hwq_map[ATH9K_WME_AC_VO+1];
307 spinlock_t txbuflock;
308 struct list_head txbuf;
309 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
310 struct ath_descdma txdma;
318 unsigned int rxfilter;
319 spinlock_t rxflushlock;
320 spinlock_t rxbuflock;
321 struct list_head rxbuf;
322 struct ath_descdma rxdma;
325 int ath_startrecv(struct ath_softc *sc);
326 bool ath_stoprecv(struct ath_softc *sc);
327 void ath_flushrecv(struct ath_softc *sc);
328 u32 ath_calcrxfilter(struct ath_softc *sc);
329 int ath_rx_init(struct ath_softc *sc, int nbufs);
330 void ath_rx_cleanup(struct ath_softc *sc);
331 int ath_rx_tasklet(struct ath_softc *sc, int flush);
332 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
333 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
334 int ath_tx_setup(struct ath_softc *sc, int haltype);
335 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
336 void ath_draintxq(struct ath_softc *sc,
337 struct ath_txq *txq, bool retry_tx);
338 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
339 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
340 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
341 int ath_tx_init(struct ath_softc *sc, int nbufs);
342 void ath_tx_cleanup(struct ath_softc *sc);
343 struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
344 int ath_txq_update(struct ath_softc *sc, int qnum,
345 struct ath9k_tx_queue_info *q);
346 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
347 struct ath_tx_control *txctl);
348 void ath_tx_tasklet(struct ath_softc *sc);
349 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
350 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
351 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
353 int ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
354 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
362 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
363 enum nl80211_iftype av_opmode;
364 struct ath_buf *av_bcbuf;
365 struct ath_tx_control av_btxctl;
366 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
369 /*******************/
370 /* Beacon Handling */
371 /*******************/
374 * Regardless of the number of beacons we stagger, (i.e. regardless of the
375 * number of BSSIDs) if a given beacon does not go out even after waiting this
376 * number of beacon intervals, the game's up.
378 #define BSTUCK_THRESH (9 * ATH_BCBUF)
380 #define ATH_DEFAULT_BINTVAL 100 /* TU */
381 #define ATH_DEFAULT_BMISS_LIMIT 10
382 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
384 struct ath_beacon_config {
394 OK, /* no change needed */
395 UPDATE, /* update pending */
396 COMMIT /* beacon sent, commit change */
397 } updateslot; /* slot time update fsm */
403 struct ieee80211_vif *bslot[ATH_BCBUF];
404 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
407 struct ath9k_tx_queue_info beacon_qi;
408 struct ath_descdma bdma;
409 struct ath_txq *cabq;
410 struct list_head bbuf;
413 void ath_beacon_tasklet(unsigned long data);
414 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
415 int ath_beaconq_setup(struct ath_hw *ah);
416 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
417 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
423 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
424 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
425 #define ATH_ANI_POLLINTERVAL 100 /* 100 ms */
426 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
427 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
432 unsigned int longcal_timer;
433 unsigned int shortcal_timer;
434 unsigned int resetcal_timer;
435 unsigned int checkani_timer;
436 struct timer_list timer;
439 /********************/
441 /********************/
443 #define ATH_LED_PIN 1
444 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
445 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
455 struct ath_softc *sc;
456 struct led_classdev led_cdev;
457 enum ath_led_type led_type;
462 /********************/
463 /* Main driver core */
464 /********************/
467 * Default cache line size, in bytes.
468 * Used when PCI device not fully initialized by bootrom/BIOS
470 #define DEFAULT_CACHELINE 32
471 #define ATH_DEFAULT_NOISE_FLOOR -95
472 #define ATH_REGCLASSIDS_MAX 10
473 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
474 #define ATH_MAX_SW_RETRIES 10
475 #define ATH_CHAN_MAX 255
476 #define IEEE80211_WEP_NKID 4 /* number of key ids */
479 * The key cache is used for h/w cipher state and also for
480 * tracking station state such as the current tx antenna.
481 * We also setup a mapping table between key cache slot indices
482 * and station state to short-circuit node lookups on rx.
483 * Different parts have different size key caches. We handle
484 * up to ATH_KEYMAX entries (could dynamically allocate state).
486 #define ATH_KEYMAX 128 /* max key cache size we handle */
488 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
489 #define ATH_RSSI_DUMMY_MARKER 0x127
490 #define ATH_RATE_DUMMY_MARKER 0
492 #define SC_OP_INVALID BIT(0)
493 #define SC_OP_BEACONS BIT(1)
494 #define SC_OP_RXAGGR BIT(2)
495 #define SC_OP_TXAGGR BIT(3)
496 #define SC_OP_FULL_RESET BIT(4)
497 #define SC_OP_PREAMBLE_SHORT BIT(5)
498 #define SC_OP_PROTECT_ENABLE BIT(6)
499 #define SC_OP_RXFLUSH BIT(7)
500 #define SC_OP_LED_ASSOCIATED BIT(8)
501 #define SC_OP_WAIT_FOR_BEACON BIT(12)
502 #define SC_OP_LED_ON BIT(13)
503 #define SC_OP_SCANNING BIT(14)
504 #define SC_OP_TSF_RESET BIT(15)
505 #define SC_OP_WAIT_FOR_CAB BIT(16)
506 #define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17)
507 #define SC_OP_WAIT_FOR_TX_ACK BIT(18)
508 #define SC_OP_BEACON_SYNC BIT(19)
511 void (*read_cachesize)(struct ath_softc *sc, int *csz);
512 void (*cleanup)(struct ath_softc *sc);
513 bool (*eeprom_read)(struct ath_hw *ah, u32 off, u16 *data);
519 struct ieee80211_hw *hw;
522 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
523 struct ath_wiphy *pri_wiphy;
524 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
525 * have NULL entries */
526 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
529 struct ath_wiphy *next_wiphy;
530 struct work_struct chan_work;
531 int wiphy_select_failures;
532 unsigned long wiphy_select_first_fail;
533 struct delayed_work wiphy_work;
534 unsigned long wiphy_scheduler_int;
535 int wiphy_scheduler_index;
537 struct tasklet_struct intr_tq;
538 struct tasklet_struct bcon_tasklet;
539 struct ath_hw *sc_ah;
542 spinlock_t sc_resetlock;
543 spinlock_t sc_serial_rw;
546 u8 curbssid[ETH_ALEN];
547 u8 bssidmask[ETH_ALEN];
549 u32 sc_flags; /* SC_OP_* */
558 DECLARE_BITMAP(keymap, ATH_KEYMAX);
560 atomic_t ps_usecount;
561 enum ath9k_int imask;
562 enum ath9k_ht_extprotspacing ht_extprotspacing;
563 enum ath9k_ht_macmode tx_chan_width;
565 struct ath_config config;
568 struct ath_beacon beacon;
569 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
570 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
571 const struct ath_rate_table *cur_rate_table;
572 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
574 struct ath_led radio_led;
575 struct ath_led assoc_led;
576 struct ath_led tx_led;
577 struct ath_led rx_led;
578 struct delayed_work ath_led_blink_work;
580 int led_off_duration;
587 struct ath9k_node_stats nodestats;
588 #ifdef CONFIG_ATH9K_DEBUG
589 struct ath9k_debug debug;
591 struct ath_bus_ops *bus_ops;
592 struct ath_beacon_config cur_beacon_conf;
596 struct ath_softc *sc; /* shared for all virtual wiphys */
597 struct ieee80211_hw *hw;
598 enum ath_wiphy_state {
609 int ath_reset(struct ath_softc *sc, bool retry_tx);
610 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
611 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
612 int ath_cabq_update(struct ath_softc *);
614 static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
616 sc->bus_ops->read_cachesize(sc, csz);
619 static inline void ath_bus_cleanup(struct ath_softc *sc)
621 sc->bus_ops->cleanup(sc);
624 extern struct ieee80211_ops ath9k_ops;
626 irqreturn_t ath_isr(int irq, void *dev);
627 void ath_cleanup(struct ath_softc *sc);
628 int ath_attach(u16 devid, struct ath_softc *sc);
629 void ath_detach(struct ath_softc *sc);
630 const char *ath_mac_bb_name(u32 mac_bb_version);
631 const char *ath_rf_name(u16 rf_version);
632 void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
633 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
634 struct ath9k_channel *ichan);
635 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
636 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
637 struct ath9k_channel *hchan);
638 void ath_radio_enable(struct ath_softc *sc);
639 void ath_radio_disable(struct ath_softc *sc);
642 int ath_pci_init(void);
643 void ath_pci_exit(void);
645 static inline int ath_pci_init(void) { return 0; };
646 static inline void ath_pci_exit(void) {};
649 #ifdef CONFIG_ATHEROS_AR71XX
650 int ath_ahb_init(void);
651 void ath_ahb_exit(void);
653 static inline int ath_ahb_init(void) { return 0; };
654 static inline void ath_ahb_exit(void) {};
657 static inline void ath9k_ps_wakeup(struct ath_softc *sc)
659 if (atomic_inc_return(&sc->ps_usecount) == 1)
660 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) {
661 sc->sc_ah->restore_mode = sc->sc_ah->power_mode;
662 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
666 static inline void ath9k_ps_restore(struct ath_softc *sc)
668 if (atomic_dec_and_test(&sc->ps_usecount))
669 if ((sc->hw->conf.flags & IEEE80211_CONF_PS) &&
670 !(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
672 SC_OP_WAIT_FOR_PSPOLL_DATA |
673 SC_OP_WAIT_FOR_TX_ACK)))
674 ath9k_hw_setpower(sc->sc_ah,
675 sc->sc_ah->restore_mode);
679 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
680 int ath9k_wiphy_add(struct ath_softc *sc);
681 int ath9k_wiphy_del(struct ath_wiphy *aphy);
682 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
683 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
684 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
685 int ath9k_wiphy_select(struct ath_wiphy *aphy);
686 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
687 void ath9k_wiphy_chan_work(struct work_struct *work);
688 bool ath9k_wiphy_started(struct ath_softc *sc);
689 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
690 struct ath_wiphy *selected);
691 bool ath9k_wiphy_scanning(struct ath_softc *sc);
692 void ath9k_wiphy_work(struct work_struct *work);
694 void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val);
695 unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset);