drivers/net/wireless/ath/ath9k/btcoex.c

   1 /*
   2  * Copyright (c) 2009-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "hw.h"
  18
  19 enum ath_bt_mode {
  20         ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
  21         ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
  22         ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
  23         ATH_BT_COEX_MODE_DISALBED,      /* coexistence disabled */
  24 };
  25
  26 struct ath_btcoex_config {
  27         u8 bt_time_extend;
  28         bool bt_txstate_extend;
  29         bool bt_txframe_extend;
  30         enum ath_bt_mode bt_mode; /* coexistence mode */
  31         bool bt_quiet_collision;
  32         bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
  33         u8 bt_priority_time;
  34         u8 bt_first_slot_time;
  35         bool bt_hold_rx_clear;
  36 };
  37
  38 static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  39                                     [AR9300_NUM_WLAN_WEIGHTS] = {
  40         { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
  41         { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
  42         { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
  43 };
  44
  45 static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  46                                     [AR9300_NUM_WLAN_WEIGHTS] = {
  47         { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
  48         { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
  49         { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
  50         { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
  51 };
  52
  53 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
  54 {
  55         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  56         const struct ath_btcoex_config ath_bt_config = {
  57                 .bt_time_extend = 0,
  58                 .bt_txstate_extend = true,
  59                 .bt_txframe_extend = true,
  60                 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
  61                 .bt_quiet_collision = true,
  62                 .bt_rxclear_polarity = true,
  63                 .bt_priority_time = 2,
  64                 .bt_first_slot_time = 5,
  65                 .bt_hold_rx_clear = true,
  66         };
  67         u32 i, idx;
  68         bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
  69
  70         if (AR_SREV_9300_20_OR_LATER(ah))
  71                 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
  72
  73         btcoex_hw->bt_coex_mode =
  74                 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
  75                 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
  76                 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
  77                 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
  78                 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
  79                 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
  80                 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
  81                 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
  82                 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
  83                 SM(qnum, AR_BT_QCU_THRESH);
  84
  85         btcoex_hw->bt_coex_mode2 =
  86                 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
  87                 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
  88                 AR_BT_DISABLE_BT_ANT;
  89
  90         for (i = 0; i < 32; i++) {
  91                 idx = (debruijn32 << i) >> 27;
  92                 ah->hw_gen_timers.gen_timer_index[idx] = i;
  93         }
  94 }
  95 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
  96
  97 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
  98 {
  99         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 100
 101         /* connect bt_active to baseband */
 102         REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 103                     (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
 104                      AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
 105
 106         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 107                     AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
 108
 109         /* Set input mux for bt_active to gpio pin */
 110         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 111                       AR_GPIO_INPUT_MUX1_BT_ACTIVE,
 112                       btcoex_hw->btactive_gpio);
 113
 114         /* Configure the desired gpio port for input */
 115         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
 116 }
 117 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
 118
 119 void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
 120 {
 121         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 122
 123         /* btcoex 3-wire */
 124         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
 125                         (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
 126                          AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
 127
 128         /* Set input mux for bt_prority_async and
 129          *                  bt_active_async to GPIO pins */
 130         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 131                         AR_GPIO_INPUT_MUX1_BT_ACTIVE,
 132                         btcoex_hw->btactive_gpio);
 133
 134         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
 135                         AR_GPIO_INPUT_MUX1_BT_PRIORITY,
 136                         btcoex_hw->btpriority_gpio);
 137
 138         /* Configure the desired GPIO ports for input */
 139
 140         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
 141         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
 142 }
 143 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
 144
 145 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
 146 {
 147         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 148
 149         /* Configure the desired GPIO port for TX_FRAME output */
 150         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
 151                             AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
 152 }
 153
 154 void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
 155                                 u32 bt_weight,
 156                                 u32 wlan_weight)
 157 {
 158         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 159
 160         btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
 161                                      SM(wlan_weight, AR_BTCOEX_WL_WGHT);
 162 }
 163 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
 164
 165
 166 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
 167 {
 168         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 169         u32  val;
 170         int i;
 171
 172         /*
 173          * Program coex mode and weight registers to
 174          * enable coex 3-wire
 175          */
 176         REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
 177         REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
 178
 179
 180         if (AR_SREV_9300_20_OR_LATER(ah)) {
 181                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
 182                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
 183                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 184                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
 185                                   btcoex->bt_weight[i]);
 186         } else
 187                 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
 188
 189
 190
 191         if (AR_SREV_9271(ah)) {
 192                 val = REG_READ(ah, 0x50040);
 193                 val &= 0xFFFFFEFF;
 194                 REG_WRITE(ah, 0x50040, val);
 195         }
 196
 197         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
 198         REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
 199
 200         ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
 201                             AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
 202 }
 203
 204 static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
 205 {
 206         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 207         int i;
 208
 209         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 210                 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
 211                           btcoex->wlan_weight[i]);
 212
 213         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
 214         btcoex->enabled = true;
 215 }
 216
 217 void ath9k_hw_btcoex_enable(struct ath_hw *ah)
 218 {
 219         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 220
 221         switch (btcoex_hw->scheme) {
 222         case ATH_BTCOEX_CFG_NONE:
 223                 break;
 224         case ATH_BTCOEX_CFG_2WIRE:
 225                 ath9k_hw_btcoex_enable_2wire(ah);
 226                 break;
 227         case ATH_BTCOEX_CFG_3WIRE:
 228                 ath9k_hw_btcoex_enable_3wire(ah);
 229                 break;
 230         case ATH_BTCOEX_CFG_MCI:
 231                 ath9k_hw_btcoex_enable_mci(ah);
 232                 return;
 233         }
 234
 235         REG_RMW(ah, AR_GPIO_PDPU,
 236                 (0x2 << (btcoex_hw->btactive_gpio * 2)),
 237                 (0x3 << (btcoex_hw->btactive_gpio * 2)));
 238
 239         ah->btcoex_hw.enabled = true;
 240 }
 241 EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
 242
 243 void ath9k_hw_btcoex_disable(struct ath_hw *ah)
 244 {
 245         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
 246         int i;
 247
 248         btcoex_hw->enabled = false;
 249         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
 250                 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
 251                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 252                         REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
 253                                   btcoex_hw->wlan_weight[i]);
 254         }
 255         ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
 256
 257         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
 258                         AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 259
 260         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
 261                 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
 262                 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
 263
 264                 if (AR_SREV_9300_20_OR_LATER(ah)) {
 265                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
 266                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
 267                         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
 268                                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
 269                 } else
 270                         REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
 271
 272         }
 273 }
 274 EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
 275
 276 static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
 277                          enum ath_stomp_type stomp_type)
 278 {
 279         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
 280         const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] :
 281                                                ar9462_wlan_weights[stomp_type];
 282         int i;
 283
 284         for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
 285                 btcoex->bt_weight[i] = AR9300_BT_WGHT;
 286                 btcoex->wlan_weight[i] = weight[i];
 287         }
 288 }
 289
 290 /*
 291  * Configures appropriate weight based on stomp type.
 292  */
 293 void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
 294                               enum ath_stomp_type stomp_type)
 295 {
 296         if (AR_SREV_9300_20_OR_LATER(ah)) {
 297                 ar9003_btcoex_bt_stomp(ah, stomp_type);
 298                 return;
 299         }
 300
 301         switch (stomp_type) {
 302         case ATH_BTCOEX_STOMP_ALL:
 303                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 304                                 AR_STOMP_ALL_WLAN_WGHT);
 305                 break;
 306         case ATH_BTCOEX_STOMP_LOW:
 307                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 308                                 AR_STOMP_LOW_WLAN_WGHT);
 309                 break;
 310         case ATH_BTCOEX_STOMP_NONE:
 311                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
 312                                 AR_STOMP_NONE_WLAN_WGHT);
 313                 break;
 314         default:
 315                 ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
 316                                 "Invalid Stomptype\n");
 317                 break;
 318         }
 319 }
 320 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);