2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)
21 REG_WRITE(ah, reg, val);
23 if (ah->config.analog_shiftreg)
27 void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
32 regVal = REG_READ(ah, reg) & ~mask;
33 regVal |= (val << shift) & mask;
35 REG_WRITE(ah, reg, regVal);
37 if (ah->config.analog_shiftreg)
41 int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
42 int16_t targetLeft, int16_t targetRight)
46 if (srcRight == srcLeft) {
49 rv = (int16_t) (((target - srcLeft) * targetRight +
50 (srcRight - target) * targetLeft) /
51 (srcRight - srcLeft));
56 bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
57 u16 *indexL, u16 *indexR)
61 if (target <= pList[0]) {
62 *indexL = *indexR = 0;
65 if (target >= pList[listSize - 1]) {
66 *indexL = *indexR = (u16) (listSize - 1);
70 for (i = 0; i < listSize - 1; i++) {
71 if (pList[i] == target) {
72 *indexL = *indexR = i;
75 if (target < pList[i + 1]) {
77 *indexR = (u16) (i + 1);
84 void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
85 int eep_start_loc, int size)
91 for (addr = 0; addr < size; addr++) {
92 addrdata[i] = AR5416_EEPROM_OFFSET +
93 ((addr + eep_start_loc) << AR5416_EEPROM_S);
96 REG_READ_MULTI(ah, addrdata, data, i);
98 for (j = 0; j < i; j++) {
107 REG_READ_MULTI(ah, addrdata, data, i);
109 for (j = 0; j < i; j++) {
116 static bool ath9k_hw_nvram_read_blob(struct ath_hw *ah, u32 off,
121 if (off * sizeof(u16) > ah->eeprom_blob->size)
124 blob_data = (u16 *)ah->eeprom_blob->data;
125 *data = blob_data[off];
129 bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data)
131 struct ath_common *common = ath9k_hw_common(ah);
135 ret = ath9k_hw_nvram_read_blob(ah, off, data);
137 ret = common->bus_ops->eeprom_read(common, off, data);
140 ath_dbg(common, EEPROM,
141 "unable to read eeprom region at offset %u\n", off);
146 void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
147 u8 *pVpdList, u16 numIntercepts,
152 u16 idxL = 0, idxR = 0;
154 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
155 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
156 numIntercepts, &(idxL),
160 if (idxL == numIntercepts - 1)
161 idxL = (u16) (numIntercepts - 2);
162 if (pPwrList[idxL] == pPwrList[idxR])
165 k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
166 (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
167 (pPwrList[idxR] - pPwrList[idxL]));
168 pRetVpdList[i] = (u8) k;
173 void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
174 struct ath9k_channel *chan,
175 struct cal_target_power_leg *powInfo,
177 struct cal_target_power_leg *pNewPower,
178 u16 numRates, bool isExtTarget)
180 struct chan_centers centers;
183 int matchIndex = -1, lowIndex = -1;
186 ath9k_hw_get_channel_centers(ah, chan, ¢ers);
187 freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
189 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
190 IS_CHAN_2GHZ(chan))) {
193 for (i = 0; (i < numChannels) &&
194 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
195 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
196 IS_CHAN_2GHZ(chan))) {
199 } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
200 IS_CHAN_2GHZ(chan)) && i > 0 &&
201 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
202 IS_CHAN_2GHZ(chan))) {
207 if ((matchIndex == -1) && (lowIndex == -1))
211 if (matchIndex != -1) {
212 *pNewPower = powInfo[matchIndex];
214 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
216 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
219 for (i = 0; i < numRates; i++) {
220 pNewPower->tPow2x[i] =
221 (u8)ath9k_hw_interpolate(freq, clo, chi,
222 powInfo[lowIndex].tPow2x[i],
223 powInfo[lowIndex + 1].tPow2x[i]);
228 void ath9k_hw_get_target_powers(struct ath_hw *ah,
229 struct ath9k_channel *chan,
230 struct cal_target_power_ht *powInfo,
232 struct cal_target_power_ht *pNewPower,
233 u16 numRates, bool isHt40Target)
235 struct chan_centers centers;
238 int matchIndex = -1, lowIndex = -1;
241 ath9k_hw_get_channel_centers(ah, chan, ¢ers);
242 freq = isHt40Target ? centers.synth_center : centers.ctl_center;
244 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
247 for (i = 0; (i < numChannels) &&
248 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
249 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
250 IS_CHAN_2GHZ(chan))) {
254 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
255 IS_CHAN_2GHZ(chan)) && i > 0 &&
256 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
257 IS_CHAN_2GHZ(chan))) {
262 if ((matchIndex == -1) && (lowIndex == -1))
266 if (matchIndex != -1) {
267 *pNewPower = powInfo[matchIndex];
269 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
271 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
274 for (i = 0; i < numRates; i++) {
275 pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
277 powInfo[lowIndex].tPow2x[i],
278 powInfo[lowIndex + 1].tPow2x[i]);
283 u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
284 bool is2GHz, int num_band_edges)
286 u16 twiceMaxEdgePower = MAX_RATE_POWER;
289 for (i = 0; (i < num_band_edges) &&
290 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
291 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
292 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
294 } else if ((i > 0) &&
295 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
297 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
299 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
301 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
307 return twiceMaxEdgePower;
310 u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,
311 u8 antenna_reduction)
313 u16 reduction = antenna_reduction;
316 * Reduce scaled Power by number of chains active
317 * to get the per chain tx power level.
319 switch (ar5416_get_ntxchains(ah->txchainmask)) {
323 reduction += POWER_CORRECTION_FOR_TWO_CHAIN;
326 reduction += POWER_CORRECTION_FOR_THREE_CHAIN;
330 if (power_limit > reduction)
331 power_limit -= reduction;
338 void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
340 struct ath_common *common = ath9k_hw_common(ah);
341 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
343 switch (ar5416_get_ntxchains(ah->txchainmask)) {
347 regulatory->max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN;
350 regulatory->max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN;
353 ath_dbg(common, EEPROM, "Invalid chainmask configuration\n");
358 void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
359 struct ath9k_channel *chan,
361 u8 *bChans, u16 availPiers,
363 u16 *pPdGainBoundaries, u8 *pPDADCValues,
368 u16 idxL = 0, idxR = 0, numPiers;
369 static u8 vpdTableL[AR5416_NUM_PD_GAINS]
370 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
371 static u8 vpdTableR[AR5416_NUM_PD_GAINS]
372 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
373 static u8 vpdTableI[AR5416_NUM_PD_GAINS]
374 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
376 u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
377 u8 minPwrT4[AR5416_NUM_PD_GAINS];
378 u8 maxPwrT4[AR5416_NUM_PD_GAINS];
381 u16 sizeCurrVpdTable, maxIndex, tgtIndex;
383 int16_t minDelta = 0;
384 struct chan_centers centers;
385 int pdgain_boundary_default;
386 struct cal_data_per_freq *data_def = pRawDataSet;
387 struct cal_data_per_freq_4k *data_4k = pRawDataSet;
388 struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
389 bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
392 if (AR_SREV_9287(ah))
393 intercepts = AR9287_PD_GAIN_ICEPTS;
395 intercepts = AR5416_PD_GAIN_ICEPTS;
397 memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
398 ath9k_hw_get_channel_centers(ah, chan, ¢ers);
400 for (numPiers = 0; numPiers < availPiers; numPiers++) {
401 if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
405 match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
407 bChans, numPiers, &idxL, &idxR);
410 if (AR_SREV_9287(ah)) {
411 /* FIXME: array overrun? */
412 for (i = 0; i < numXpdGains; i++) {
413 minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
414 maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4];
415 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
416 data_9287[idxL].pwrPdg[i],
417 data_9287[idxL].vpdPdg[i],
421 } else if (eeprom_4k) {
422 for (i = 0; i < numXpdGains; i++) {
423 minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
424 maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4];
425 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
426 data_4k[idxL].pwrPdg[i],
427 data_4k[idxL].vpdPdg[i],
432 for (i = 0; i < numXpdGains; i++) {
433 minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
434 maxPwrT4[i] = data_def[idxL].pwrPdg[i][4];
435 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
436 data_def[idxL].pwrPdg[i],
437 data_def[idxL].vpdPdg[i],
443 for (i = 0; i < numXpdGains; i++) {
444 if (AR_SREV_9287(ah)) {
445 pVpdL = data_9287[idxL].vpdPdg[i];
446 pPwrL = data_9287[idxL].pwrPdg[i];
447 pVpdR = data_9287[idxR].vpdPdg[i];
448 pPwrR = data_9287[idxR].pwrPdg[i];
449 } else if (eeprom_4k) {
450 pVpdL = data_4k[idxL].vpdPdg[i];
451 pPwrL = data_4k[idxL].pwrPdg[i];
452 pVpdR = data_4k[idxR].vpdPdg[i];
453 pPwrR = data_4k[idxR].pwrPdg[i];
455 pVpdL = data_def[idxL].vpdPdg[i];
456 pPwrL = data_def[idxL].pwrPdg[i];
457 pVpdR = data_def[idxR].vpdPdg[i];
458 pPwrR = data_def[idxR].pwrPdg[i];
461 minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
464 min(pPwrL[intercepts - 1],
465 pPwrR[intercepts - 1]);
468 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
472 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
477 for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
479 (u8)(ath9k_hw_interpolate((u16)
484 bChans[idxL], bChans[idxR],
485 vpdTableL[i][j], vpdTableR[i][j]));
492 for (i = 0; i < numXpdGains; i++) {
493 if (i == (numXpdGains - 1))
494 pPdGainBoundaries[i] =
495 (u16)(maxPwrT4[i] / 2);
497 pPdGainBoundaries[i] =
498 (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
500 pPdGainBoundaries[i] =
501 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
506 if (AR_SREV_9280_20_OR_LATER(ah))
507 ss = (int16_t)(0 - (minPwrT4[i] / 2));
511 ss = (int16_t)((pPdGainBoundaries[i - 1] -
513 tPdGainOverlap + 1 + minDelta);
515 vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
516 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
518 while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
519 tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
520 pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
524 sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
525 tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
527 maxIndex = (tgtIndex < sizeCurrVpdTable) ?
528 tgtIndex : sizeCurrVpdTable;
530 while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
531 pPDADCValues[k++] = vpdTableI[i][ss++];
534 vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
535 vpdTableI[i][sizeCurrVpdTable - 2]);
536 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
538 if (tgtIndex >= maxIndex) {
539 while ((ss <= tgtIndex) &&
540 (k < (AR5416_NUM_PDADC_VALUES - 1))) {
541 tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
542 (ss - maxIndex + 1) * vpdStep));
543 pPDADCValues[k++] = (u8)((tmpVal > 255) ?
551 pdgain_boundary_default = 58;
553 pdgain_boundary_default = pPdGainBoundaries[i - 1];
555 while (i < AR5416_PD_GAINS_IN_MASK) {
556 pPdGainBoundaries[i] = pdgain_boundary_default;
560 while (k < AR5416_NUM_PDADC_VALUES) {
561 pPDADCValues[k] = pPDADCValues[k - 1];
566 int ath9k_hw_eeprom_init(struct ath_hw *ah)
570 if (AR_SREV_9300_20_OR_LATER(ah))
571 ah->eep_ops = &eep_ar9300_ops;
572 else if (AR_SREV_9287(ah)) {
573 ah->eep_ops = &eep_ar9287_ops;
574 } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
575 ah->eep_ops = &eep_4k_ops;
577 ah->eep_ops = &eep_def_ops;
580 if (!ah->eep_ops->fill_eeprom(ah))
583 status = ah->eep_ops->check_eeprom(ah);