drivers/net/wireless/ath/ath9k/htc_drv_init.c

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "htc.h"
  18
  19 MODULE_AUTHOR("Atheros Communications");
  20 MODULE_LICENSE("Dual BSD/GPL");
  21 MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  22
  23 static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  24 module_param_named(debug, ath9k_debug, uint, 0);
  25 MODULE_PARM_DESC(debug, "Debugging mask");
  26
  27 int htc_modparam_nohwcrypt;
  28 module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  29 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  30
  31 #define CHAN2G(_freq, _idx)  { \
  32         .center_freq = (_freq), \
  33         .hw_value = (_idx), \
  34         .max_power = 20, \
  35 }
  36
  37 #define CHAN5G(_freq, _idx) { \
  38         .band = IEEE80211_BAND_5GHZ, \
  39         .center_freq = (_freq), \
  40         .hw_value = (_idx), \
  41         .max_power = 20, \
  42 }
  43
  44 static struct ieee80211_channel ath9k_2ghz_channels[] = {
  45         CHAN2G(2412, 0), /* Channel 1 */
  46         CHAN2G(2417, 1), /* Channel 2 */
  47         CHAN2G(2422, 2), /* Channel 3 */
  48         CHAN2G(2427, 3), /* Channel 4 */
  49         CHAN2G(2432, 4), /* Channel 5 */
  50         CHAN2G(2437, 5), /* Channel 6 */
  51         CHAN2G(2442, 6), /* Channel 7 */
  52         CHAN2G(2447, 7), /* Channel 8 */
  53         CHAN2G(2452, 8), /* Channel 9 */
  54         CHAN2G(2457, 9), /* Channel 10 */
  55         CHAN2G(2462, 10), /* Channel 11 */
  56         CHAN2G(2467, 11), /* Channel 12 */
  57         CHAN2G(2472, 12), /* Channel 13 */
  58         CHAN2G(2484, 13), /* Channel 14 */
  59 };
  60
  61 static struct ieee80211_channel ath9k_5ghz_channels[] = {
  62         /* _We_ call this UNII 1 */
  63         CHAN5G(5180, 14), /* Channel 36 */
  64         CHAN5G(5200, 15), /* Channel 40 */
  65         CHAN5G(5220, 16), /* Channel 44 */
  66         CHAN5G(5240, 17), /* Channel 48 */
  67         /* _We_ call this UNII 2 */
  68         CHAN5G(5260, 18), /* Channel 52 */
  69         CHAN5G(5280, 19), /* Channel 56 */
  70         CHAN5G(5300, 20), /* Channel 60 */
  71         CHAN5G(5320, 21), /* Channel 64 */
  72         /* _We_ call this "Middle band" */
  73         CHAN5G(5500, 22), /* Channel 100 */
  74         CHAN5G(5520, 23), /* Channel 104 */
  75         CHAN5G(5540, 24), /* Channel 108 */
  76         CHAN5G(5560, 25), /* Channel 112 */
  77         CHAN5G(5580, 26), /* Channel 116 */
  78         CHAN5G(5600, 27), /* Channel 120 */
  79         CHAN5G(5620, 28), /* Channel 124 */
  80         CHAN5G(5640, 29), /* Channel 128 */
  81         CHAN5G(5660, 30), /* Channel 132 */
  82         CHAN5G(5680, 31), /* Channel 136 */
  83         CHAN5G(5700, 32), /* Channel 140 */
  84         /* _We_ call this UNII 3 */
  85         CHAN5G(5745, 33), /* Channel 149 */
  86         CHAN5G(5765, 34), /* Channel 153 */
  87         CHAN5G(5785, 35), /* Channel 157 */
  88         CHAN5G(5805, 36), /* Channel 161 */
  89         CHAN5G(5825, 37), /* Channel 165 */
  90 };
  91
  92 /* Atheros hardware rate code addition for short premble */
  93 #define SHPCHECK(__hw_rate, __flags) \
  94         ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
  95
  96 #define RATE(_bitrate, _hw_rate, _flags) {              \
  97         .bitrate        = (_bitrate),                   \
  98         .flags          = (_flags),                     \
  99         .hw_value       = (_hw_rate),                   \
 100         .hw_value_short = (SHPCHECK(_hw_rate, _flags))  \
 101 }
 102
 103 static struct ieee80211_rate ath9k_legacy_rates[] = {
 104         RATE(10, 0x1b, 0),
 105         RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
 106         RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
 107         RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
 108         RATE(60, 0x0b, 0),
 109         RATE(90, 0x0f, 0),
 110         RATE(120, 0x0a, 0),
 111         RATE(180, 0x0e, 0),
 112         RATE(240, 0x09, 0),
 113         RATE(360, 0x0d, 0),
 114         RATE(480, 0x08, 0),
 115         RATE(540, 0x0c, 0),
 116 };
 117
 118 static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
 119 {
 120         int time_left;
 121
 122         if (atomic_read(&priv->htc->tgt_ready) > 0) {
 123                 atomic_dec(&priv->htc->tgt_ready);
 124                 return 0;
 125         }
 126
 127         /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
 128         time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
 129         if (!time_left) {
 130                 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
 131                 return -ETIMEDOUT;
 132         }
 133
 134         atomic_dec(&priv->htc->tgt_ready);
 135
 136         return 0;
 137 }
 138
 139 static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
 140 {
 141         ath9k_htc_exit_debug(priv->ah);
 142         ath9k_hw_deinit(priv->ah);
 143         tasklet_kill(&priv->wmi_tasklet);
 144         tasklet_kill(&priv->rx_tasklet);
 145         tasklet_kill(&priv->tx_tasklet);
 146         kfree(priv->ah);
 147         priv->ah = NULL;
 148 }
 149
 150 static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
 151 {
 152         struct ieee80211_hw *hw = priv->hw;
 153
 154         wiphy_rfkill_stop_polling(hw->wiphy);
 155         ath9k_deinit_leds(priv);
 156         ieee80211_unregister_hw(hw);
 157         ath9k_rx_cleanup(priv);
 158         ath9k_tx_cleanup(priv);
 159         ath9k_deinit_priv(priv);
 160 }
 161
 162 static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
 163                                         u16 service_id,
 164                                         void (*tx) (void *,
 165                                                     struct sk_buff *,
 166                                                     enum htc_endpoint_id,
 167                                                     bool txok),
 168                                         enum htc_endpoint_id *ep_id)
 169 {
 170         struct htc_service_connreq req;
 171
 172         memset(&req, 0, sizeof(struct htc_service_connreq));
 173
 174         req.service_id = service_id;
 175         req.ep_callbacks.priv = priv;
 176         req.ep_callbacks.rx = ath9k_htc_rxep;
 177         req.ep_callbacks.tx = tx;
 178
 179         return htc_connect_service(priv->htc, &req, ep_id);
 180 }
 181
 182 static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
 183 {
 184         int ret;
 185
 186         /* WMI CMD*/
 187         ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
 188         if (ret)
 189                 goto err;
 190
 191         /* Beacon */
 192         ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
 193                                     &priv->beacon_ep);
 194         if (ret)
 195                 goto err;
 196
 197         /* CAB */
 198         ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
 199                                     &priv->cab_ep);
 200         if (ret)
 201                 goto err;
 202
 203
 204         /* UAPSD */
 205         ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
 206                                     &priv->uapsd_ep);
 207         if (ret)
 208                 goto err;
 209
 210         /* MGMT */
 211         ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
 212                                     &priv->mgmt_ep);
 213         if (ret)
 214                 goto err;
 215
 216         /* DATA BE */
 217         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
 218                                     &priv->data_be_ep);
 219         if (ret)
 220                 goto err;
 221
 222         /* DATA BK */
 223         ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
 224                                     &priv->data_bk_ep);
 225         if (ret)
 226                 goto err;
 227
 228         /* DATA VI */
 229         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
 230                                     &priv->data_vi_ep);
 231         if (ret)
 232                 goto err;
 233
 234         /* DATA VO */
 235         ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
 236                                     &priv->data_vo_ep);
 237         if (ret)
 238                 goto err;
 239
 240         /*
 241          * Setup required credits before initializing HTC.
 242          * This is a bit hacky, but, since queuing is done in
 243          * the HIF layer, shouldn't matter much.
 244          */
 245
 246         switch(devid) {
 247         case 0x9271:
 248         case 0x1006:
 249                 priv->htc->credits = 33;
 250                 break;
 251         case 0x7010:
 252                 priv->htc->credits = 45;
 253                 break;
 254         default:
 255                 dev_err(priv->dev, "ath9k_htc: Unsupported device id: 0x%x\n",
 256                         devid);
 257                 goto err;
 258         }
 259
 260         ret = htc_init(priv->htc);
 261         if (ret)
 262                 goto err;
 263
 264         dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
 265                  priv->htc->credits);
 266
 267         return 0;
 268
 269 err:
 270         dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
 271         return ret;
 272 }
 273
 274 static int ath9k_reg_notifier(struct wiphy *wiphy,
 275                               struct regulatory_request *request)
 276 {
 277         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
 278         struct ath9k_htc_priv *priv = hw->priv;
 279
 280         return ath_reg_notifier_apply(wiphy, request,
 281                                       ath9k_hw_regulatory(priv->ah));
 282 }
 283
 284 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
 285 {
 286         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 287         struct ath_common *common = ath9k_hw_common(ah);
 288         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 289         __be32 val, reg = cpu_to_be32(reg_offset);
 290         int r;
 291
 292         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
 293                           (u8 *) &reg, sizeof(reg),
 294                           (u8 *) &val, sizeof(val),
 295                           100);
 296         if (unlikely(r)) {
 297                 ath_print(common, ATH_DBG_WMI,
 298                           "REGISTER READ FAILED: (0x%04x, %d)\n",
 299                            reg_offset, r);
 300                 return -EIO;
 301         }
 302
 303         return be32_to_cpu(val);
 304 }
 305
 306 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
 307 {
 308         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 309         struct ath_common *common = ath9k_hw_common(ah);
 310         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 311         __be32 buf[2] = {
 312                 cpu_to_be32(reg_offset),
 313                 cpu_to_be32(val),
 314         };
 315         int r;
 316
 317         r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 318                           (u8 *) &buf, sizeof(buf),
 319                           (u8 *) &val, sizeof(val),
 320                           100);
 321         if (unlikely(r)) {
 322                 ath_print(common, ATH_DBG_WMI,
 323                           "REGISTER WRITE FAILED:(0x%04x, %d)\n",
 324                           reg_offset, r);
 325         }
 326 }
 327
 328 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
 329 {
 330         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 331         struct ath_common *common = ath9k_hw_common(ah);
 332         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 333         u32 rsp_status;
 334         int r;
 335
 336         mutex_lock(&priv->wmi->multi_write_mutex);
 337
 338         /* Store the register/value */
 339         priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
 340                 cpu_to_be32(reg_offset);
 341         priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
 342                 cpu_to_be32(val);
 343
 344         priv->wmi->multi_write_idx++;
 345
 346         /* If the buffer is full, send it out. */
 347         if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
 348                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 349                           (u8 *) &priv->wmi->multi_write,
 350                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 351                           (u8 *) &rsp_status, sizeof(rsp_status),
 352                           100);
 353                 if (unlikely(r)) {
 354                         ath_print(common, ATH_DBG_WMI,
 355                                   "REGISTER WRITE FAILED, multi len: %d\n",
 356                                   priv->wmi->multi_write_idx);
 357                 }
 358                 priv->wmi->multi_write_idx = 0;
 359         }
 360
 361         mutex_unlock(&priv->wmi->multi_write_mutex);
 362 }
 363
 364 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
 365 {
 366         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 367         struct ath_common *common = ath9k_hw_common(ah);
 368         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 369
 370         if (atomic_read(&priv->wmi->mwrite_cnt))
 371                 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
 372         else
 373                 ath9k_regwrite_single(hw_priv, val, reg_offset);
 374 }
 375
 376 static void ath9k_enable_regwrite_buffer(void *hw_priv)
 377 {
 378         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 379         struct ath_common *common = ath9k_hw_common(ah);
 380         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 381
 382         atomic_inc(&priv->wmi->mwrite_cnt);
 383 }
 384
 385 static void ath9k_disable_regwrite_buffer(void *hw_priv)
 386 {
 387         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 388         struct ath_common *common = ath9k_hw_common(ah);
 389         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 390
 391         atomic_dec(&priv->wmi->mwrite_cnt);
 392 }
 393
 394 static void ath9k_regwrite_flush(void *hw_priv)
 395 {
 396         struct ath_hw *ah = (struct ath_hw *) hw_priv;
 397         struct ath_common *common = ath9k_hw_common(ah);
 398         struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
 399         u32 rsp_status;
 400         int r;
 401
 402         mutex_lock(&priv->wmi->multi_write_mutex);
 403
 404         if (priv->wmi->multi_write_idx) {
 405                 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
 406                           (u8 *) &priv->wmi->multi_write,
 407                           sizeof(struct register_write) * priv->wmi->multi_write_idx,
 408                           (u8 *) &rsp_status, sizeof(rsp_status),
 409                           100);
 410                 if (unlikely(r)) {
 411                         ath_print(common, ATH_DBG_WMI,
 412                                   "REGISTER WRITE FAILED, multi len: %d\n",
 413                                   priv->wmi->multi_write_idx);
 414                 }
 415                 priv->wmi->multi_write_idx = 0;
 416         }
 417
 418         mutex_unlock(&priv->wmi->multi_write_mutex);
 419 }
 420
 421 static const struct ath_ops ath9k_common_ops = {
 422         .read = ath9k_regread,
 423         .write = ath9k_regwrite,
 424         .enable_write_buffer = ath9k_enable_regwrite_buffer,
 425         .disable_write_buffer = ath9k_disable_regwrite_buffer,
 426         .write_flush = ath9k_regwrite_flush,
 427 };
 428
 429 static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
 430 {
 431         *csz = L1_CACHE_BYTES >> 2;
 432 }
 433
 434 static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
 435 {
 436         struct ath_hw *ah = (struct ath_hw *) common->ah;
 437
 438         (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
 439
 440         if (!ath9k_hw_wait(ah,
 441                            AR_EEPROM_STATUS_DATA,
 442                            AR_EEPROM_STATUS_DATA_BUSY |
 443                            AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
 444                            AH_WAIT_TIMEOUT))
 445                 return false;
 446
 447         *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
 448                    AR_EEPROM_STATUS_DATA_VAL);
 449
 450         return true;
 451 }
 452
 453 static const struct ath_bus_ops ath9k_usb_bus_ops = {
 454         .ath_bus_type = ATH_USB,
 455         .read_cachesize = ath_usb_read_cachesize,
 456         .eeprom_read = ath_usb_eeprom_read,
 457 };
 458
 459 static void setup_ht_cap(struct ath9k_htc_priv *priv,
 460                          struct ieee80211_sta_ht_cap *ht_info)
 461 {
 462         struct ath_common *common = ath9k_hw_common(priv->ah);
 463         u8 tx_streams, rx_streams;
 464         int i;
 465
 466         ht_info->ht_supported = true;
 467         ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
 468                        IEEE80211_HT_CAP_SM_PS |
 469                        IEEE80211_HT_CAP_SGI_40 |
 470                        IEEE80211_HT_CAP_DSSSCCK40;
 471
 472         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
 473                 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
 474
 475         ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
 476
 477         ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
 478         ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
 479
 480         memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
 481
 482         /* ath9k_htc supports only 1 or 2 stream devices */
 483         tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
 484         rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
 485
 486         ath_print(common, ATH_DBG_CONFIG,
 487                   "TX streams %d, RX streams: %d\n",
 488                   tx_streams, rx_streams);
 489
 490         if (tx_streams != rx_streams) {
 491                 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
 492                 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
 493                                            IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
 494         }
 495
 496         for (i = 0; i < rx_streams; i++)
 497                 ht_info->mcs.rx_mask[i] = 0xff;
 498
 499         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
 500 }
 501
 502 static int ath9k_init_queues(struct ath9k_htc_priv *priv)
 503 {
 504         struct ath_common *common = ath9k_hw_common(priv->ah);
 505         int i;
 506
 507         for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
 508                 priv->hwq_map[i] = -1;
 509
 510         priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
 511         if (priv->beaconq == -1) {
 512                 ath_print(common, ATH_DBG_FATAL,
 513                           "Unable to setup BEACON xmit queue\n");
 514                 goto err;
 515         }
 516
 517         priv->cabq = ath9k_htc_cabq_setup(priv);
 518         if (priv->cabq == -1) {
 519                 ath_print(common, ATH_DBG_FATAL,
 520                           "Unable to setup CAB xmit queue\n");
 521                 goto err;
 522         }
 523
 524         if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BE)) {
 525                 ath_print(common, ATH_DBG_FATAL,
 526                           "Unable to setup xmit queue for BE traffic\n");
 527                 goto err;
 528         }
 529
 530         if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_BK)) {
 531                 ath_print(common, ATH_DBG_FATAL,
 532                           "Unable to setup xmit queue for BK traffic\n");
 533                 goto err;
 534         }
 535         if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VI)) {
 536                 ath_print(common, ATH_DBG_FATAL,
 537                           "Unable to setup xmit queue for VI traffic\n");
 538                 goto err;
 539         }
 540         if (!ath9k_htc_txq_setup(priv, ATH9K_WME_AC_VO)) {
 541                 ath_print(common, ATH_DBG_FATAL,
 542                           "Unable to setup xmit queue for VO traffic\n");
 543                 goto err;
 544         }
 545
 546         return 0;
 547
 548 err:
 549         return -EINVAL;
 550 }
 551
 552 static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
 553 {
 554         struct ath_common *common = ath9k_hw_common(priv->ah);
 555         int i = 0;
 556
 557         /* Get the hardware key cache size. */
 558         common->keymax = priv->ah->caps.keycache_size;
 559         if (common->keymax > ATH_KEYMAX) {
 560                 ath_print(common, ATH_DBG_ANY,
 561                           "Warning, using only %u entries in %u key cache\n",
 562                           ATH_KEYMAX, common->keymax);
 563                 common->keymax = ATH_KEYMAX;
 564         }
 565
 566         /*
 567          * Reset the key cache since some parts do not
 568          * reset the contents on initial power up.
 569          */
 570         for (i = 0; i < common->keymax; i++)
 571                 ath9k_hw_keyreset(priv->ah, (u16) i);
 572
 573         if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
 574                                    ATH9K_CIPHER_TKIP, NULL)) {
 575                 /*
 576                  * Whether we should enable h/w TKIP MIC.
 577                  * XXX: if we don't support WME TKIP MIC, then we wouldn't
 578                  * report WMM capable, so it's always safe to turn on
 579                  * TKIP MIC in this case.
 580                  */
 581                 ath9k_hw_setcapability(priv->ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL);
 582         }
 583
 584         /*
 585          * Check whether the separate key cache entries
 586          * are required to handle both tx+rx MIC keys.
 587          * With split mic keys the number of stations is limited
 588          * to 27 otherwise 59.
 589          */
 590         if (ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
 591                                    ATH9K_CIPHER_TKIP, NULL)
 592             && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_CIPHER,
 593                                       ATH9K_CIPHER_MIC, NULL)
 594             && ath9k_hw_getcapability(priv->ah, ATH9K_CAP_TKIP_SPLIT,
 595                                       0, NULL))
 596                 common->splitmic = 1;
 597
 598         /* turn on mcast key search if possible */
 599         if (!ath9k_hw_getcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
 600                 (void)ath9k_hw_setcapability(priv->ah, ATH9K_CAP_MCAST_KEYSRCH,
 601                                              1, 1, NULL);
 602 }
 603
 604 static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
 605 {
 606         if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
 607                 priv->sbands[IEEE80211_BAND_2GHZ].channels =
 608                         ath9k_2ghz_channels;
 609                 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
 610                 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
 611                         ARRAY_SIZE(ath9k_2ghz_channels);
 612                 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
 613                 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
 614                         ARRAY_SIZE(ath9k_legacy_rates);
 615         }
 616
 617         if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
 618                 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
 619                 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
 620                 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
 621                         ARRAY_SIZE(ath9k_5ghz_channels);
 622                 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
 623                         ath9k_legacy_rates + 4;
 624                 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
 625                         ARRAY_SIZE(ath9k_legacy_rates) - 4;
 626         }
 627 }
 628
 629 static void ath9k_init_misc(struct ath9k_htc_priv *priv)
 630 {
 631         struct ath_common *common = ath9k_hw_common(priv->ah);
 632
 633         common->tx_chainmask = priv->ah->caps.tx_chainmask;
 634         common->rx_chainmask = priv->ah->caps.rx_chainmask;
 635
 636         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
 637                 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
 638
 639         priv->op_flags |= OP_TXAGGR;
 640         priv->ah->opmode = NL80211_IFTYPE_STATION;
 641 }
 642
 643 static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
 644 {
 645         struct ath_hw *ah = NULL;
 646         struct ath_common *common;
 647         int ret = 0, csz = 0;
 648
 649         priv->op_flags |= OP_INVALID;
 650
 651         ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
 652         if (!ah)
 653                 return -ENOMEM;
 654
 655         ah->hw_version.devid = devid;
 656         ah->hw_version.subsysid = 0; /* FIXME */
 657         priv->ah = ah;
 658
 659         common = ath9k_hw_common(ah);
 660         common->ops = &ath9k_common_ops;
 661         common->bus_ops = &ath9k_usb_bus_ops;
 662         common->ah = ah;
 663         common->hw = priv->hw;
 664         common->priv = priv;
 665         common->debug_mask = ath9k_debug;
 666
 667         spin_lock_init(&priv->wmi->wmi_lock);
 668         spin_lock_init(&priv->beacon_lock);
 669         spin_lock_init(&priv->tx_lock);
 670         mutex_init(&priv->mutex);
 671         mutex_init(&priv->aggr_work.mutex);
 672         mutex_init(&priv->htc_pm_lock);
 673         tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
 674                      (unsigned long)priv);
 675         tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
 676                      (unsigned long)priv);
 677         tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
 678         INIT_DELAYED_WORK(&priv->ath9k_aggr_work, ath9k_htc_aggr_work);
 679         INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
 680         INIT_WORK(&priv->ps_work, ath9k_ps_work);
 681
 682         /*
 683          * Cache line size is used to size and align various
 684          * structures used to communicate with the hardware.
 685          */
 686         ath_read_cachesize(common, &csz);
 687         common->cachelsz = csz << 2; /* convert to bytes */
 688
 689         ret = ath9k_hw_init(ah);
 690         if (ret) {
 691                 ath_print(common, ATH_DBG_FATAL,
 692                           "Unable to initialize hardware; "
 693                           "initialization status: %d\n", ret);
 694                 goto err_hw;
 695         }
 696
 697         ret = ath9k_htc_init_debug(ah);
 698         if (ret) {
 699                 ath_print(common, ATH_DBG_FATAL,
 700                           "Unable to create debugfs files\n");
 701                 goto err_debug;
 702         }
 703
 704         ret = ath9k_init_queues(priv);
 705         if (ret)
 706                 goto err_queues;
 707
 708         ath9k_init_crypto(priv);
 709         ath9k_init_channels_rates(priv);
 710         ath9k_init_misc(priv);
 711
 712         return 0;
 713
 714 err_queues:
 715         ath9k_htc_exit_debug(ah);
 716 err_debug:
 717         ath9k_hw_deinit(ah);
 718 err_hw:
 719
 720         kfree(ah);
 721         priv->ah = NULL;
 722
 723         return ret;
 724 }
 725
 726 static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
 727                                struct ieee80211_hw *hw)
 728 {
 729         struct ath_common *common = ath9k_hw_common(priv->ah);
 730
 731         hw->flags = IEEE80211_HW_SIGNAL_DBM |
 732                 IEEE80211_HW_AMPDU_AGGREGATION |
 733                 IEEE80211_HW_SPECTRUM_MGMT |
 734                 IEEE80211_HW_HAS_RATE_CONTROL |
 735                 IEEE80211_HW_RX_INCLUDES_FCS |
 736                 IEEE80211_HW_SUPPORTS_PS |
 737                 IEEE80211_HW_PS_NULLFUNC_STACK;
 738
 739         hw->wiphy->interface_modes =
 740                 BIT(NL80211_IFTYPE_STATION) |
 741                 BIT(NL80211_IFTYPE_ADHOC);
 742
 743         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
 744
 745         hw->queues = 4;
 746         hw->channel_change_time = 5000;
 747         hw->max_listen_interval = 10;
 748         hw->vif_data_size = sizeof(struct ath9k_htc_vif);
 749         hw->sta_data_size = sizeof(struct ath9k_htc_sta);
 750
 751         /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
 752         hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
 753                 sizeof(struct htc_frame_hdr) + 4;
 754
 755         if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
 756                 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
 757                         &priv->sbands[IEEE80211_BAND_2GHZ];
 758         if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
 759                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
 760                         &priv->sbands[IEEE80211_BAND_5GHZ];
 761
 762         if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
 763                 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
 764                         setup_ht_cap(priv,
 765                                      &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
 766                 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
 767                         setup_ht_cap(priv,
 768                                      &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
 769         }
 770
 771         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
 772 }
 773
 774 static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
 775 {
 776         struct ieee80211_hw *hw = priv->hw;
 777         struct ath_common *common;
 778         struct ath_hw *ah;
 779         int error = 0;
 780         struct ath_regulatory *reg;
 781
 782         /* Bring up device */
 783         error = ath9k_init_priv(priv, devid);
 784         if (error != 0)
 785                 goto err_init;
 786
 787         ah = priv->ah;
 788         common = ath9k_hw_common(ah);
 789         ath9k_set_hw_capab(priv, hw);
 790
 791         /* Initialize regulatory */
 792         error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
 793                               ath9k_reg_notifier);
 794         if (error)
 795                 goto err_regd;
 796
 797         reg = &common->regulatory;
 798
 799         /* Setup TX */
 800         error = ath9k_tx_init(priv);
 801         if (error != 0)
 802                 goto err_tx;
 803
 804         /* Setup RX */
 805         error = ath9k_rx_init(priv);
 806         if (error != 0)
 807                 goto err_rx;
 808
 809         /* Register with mac80211 */
 810         error = ieee80211_register_hw(hw);
 811         if (error)
 812                 goto err_register;
 813
 814         /* Handle world regulatory */
 815         if (!ath_is_world_regd(reg)) {
 816                 error = regulatory_hint(hw->wiphy, reg->alpha2);
 817                 if (error)
 818                         goto err_world;
 819         }
 820
 821         ath9k_init_leds(priv);
 822         ath9k_start_rfkill_poll(priv);
 823
 824         return 0;
 825
 826 err_world:
 827         ieee80211_unregister_hw(hw);
 828 err_register:
 829         ath9k_rx_cleanup(priv);
 830 err_rx:
 831         ath9k_tx_cleanup(priv);
 832 err_tx:
 833         /* Nothing */
 834 err_regd:
 835         ath9k_deinit_priv(priv);
 836 err_init:
 837         return error;
 838 }
 839
 840 int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
 841                            u16 devid)
 842 {
 843         struct ieee80211_hw *hw;
 844         struct ath9k_htc_priv *priv;
 845         int ret;
 846
 847         hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
 848         if (!hw)
 849                 return -ENOMEM;
 850
 851         priv = hw->priv;
 852         priv->hw = hw;
 853         priv->htc = htc_handle;
 854         priv->dev = dev;
 855         htc_handle->drv_priv = priv;
 856         SET_IEEE80211_DEV(hw, priv->dev);
 857
 858         ret = ath9k_htc_wait_for_target(priv);
 859         if (ret)
 860                 goto err_free;
 861
 862         priv->wmi = ath9k_init_wmi(priv);
 863         if (!priv->wmi) {
 864                 ret = -EINVAL;
 865                 goto err_free;
 866         }
 867
 868         ret = ath9k_init_htc_services(priv, devid);
 869         if (ret)
 870                 goto err_init;
 871
 872         /* The device may have been unplugged earlier. */
 873         priv->op_flags &= ~OP_UNPLUGGED;
 874
 875         ret = ath9k_init_device(priv, devid);
 876         if (ret)
 877                 goto err_init;
 878
 879         return 0;
 880
 881 err_init:
 882         ath9k_deinit_wmi(priv);
 883 err_free:
 884         ieee80211_free_hw(hw);
 885         return ret;
 886 }
 887
 888 void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
 889 {
 890         if (htc_handle->drv_priv) {
 891
 892                 /* Check if the device has been yanked out. */
 893                 if (hotunplug)
 894                         htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
 895
 896                 ath9k_deinit_device(htc_handle->drv_priv);
 897                 ath9k_deinit_wmi(htc_handle->drv_priv);
 898                 ieee80211_free_hw(htc_handle->drv_priv->hw);
 899         }
 900 }
 901
 902 #ifdef CONFIG_PM
 903 int ath9k_htc_resume(struct htc_target *htc_handle)
 904 {
 905         int ret;
 906
 907         ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
 908         if (ret)
 909                 return ret;
 910
 911         ret = ath9k_init_htc_services(htc_handle->drv_priv,
 912                               htc_handle->drv_priv->ah->hw_version.devid);
 913         return ret;
 914 }
 915 #endif
 916
 917 static int __init ath9k_htc_init(void)
 918 {
 919         int error;
 920
 921         error = ath9k_htc_debug_create_root();
 922         if (error < 0) {
 923                 printk(KERN_ERR
 924                         "ath9k_htc: Unable to create debugfs root: %d\n",
 925                         error);
 926                 goto err_dbg;
 927         }
 928
 929         error = ath9k_hif_usb_init();
 930         if (error < 0) {
 931                 printk(KERN_ERR
 932                         "ath9k_htc: No USB devices found,"
 933                         " driver not installed.\n");
 934                 error = -ENODEV;
 935                 goto err_usb;
 936         }
 937
 938         return 0;
 939
 940 err_usb:
 941         ath9k_htc_debug_remove_root();
 942 err_dbg:
 943         return error;
 944 }
 945 module_init(ath9k_htc_init);
 946
 947 static void __exit ath9k_htc_exit(void)
 948 {
 949         ath9k_hif_usb_exit();
 950         ath9k_htc_debug_remove_root();
 951         printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
 952 }
 953 module_exit(ath9k_htc_exit);