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ath9k: mark few functions as static
[karo-tx-linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24         /*
25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26          *   0 for no restriction
27          *   1 for 1/4 us
28          *   2 for 1/2 us
29          *   3 for 1 us
30          *   4 for 2 us
31          *   5 for 4 us
32          *   6 for 8 us
33          *   7 for 16 us
34          */
35         switch (mpdudensity) {
36         case 0:
37                 return 0;
38         case 1:
39         case 2:
40         case 3:
41                 /* Our lower layer calculations limit our precision to
42                    1 microsecond */
43                 return 1;
44         case 4:
45                 return 2;
46         case 5:
47                 return 4;
48         case 6:
49                 return 8;
50         case 7:
51                 return 16;
52         default:
53                 return 0;
54         }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59         bool pending = false;
60
61         spin_lock_bh(&txq->axq_lock);
62
63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
64                 pending = true;
65
66         spin_unlock_bh(&txq->axq_lock);
67         return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72         unsigned long flags;
73         bool ret;
74
75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79         return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85         unsigned long flags;
86         enum ath9k_power_mode power_mode;
87
88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
89         if (++sc->ps_usecount != 1)
90                 goto unlock;
91
92         power_mode = sc->sc_ah->power_mode;
93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95         /*
96          * While the hardware is asleep, the cycle counters contain no
97          * useful data. Better clear them now so that they don't mess up
98          * survey data results.
99          */
100         if (power_mode != ATH9K_PM_AWAKE) {
101                 spin_lock(&common->cc_lock);
102                 ath_hw_cycle_counters_update(common);
103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104                 spin_unlock(&common->cc_lock);
105         }
106
107  unlock:
108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114         unsigned long flags;
115
116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
117         if (--sc->ps_usecount != 0)
118                 goto unlock;
119
120         spin_lock(&common->cc_lock);
121         ath_hw_cycle_counters_update(common);
122         spin_unlock(&common->cc_lock);
123
124         if (sc->ps_idle)
125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
126         else if (sc->ps_enabled &&
127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128                               PS_WAIT_FOR_CAB |
129                               PS_WAIT_FOR_PSPOLL_DATA |
130                               PS_WAIT_FOR_TX_ACK)))
131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
132
133  unlock:
134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
135 }
136
137 static void ath_start_ani(struct ath_common *common)
138 {
139         struct ath_hw *ah = common->ah;
140         unsigned long timestamp = jiffies_to_msecs(jiffies);
141         struct ath_softc *sc = (struct ath_softc *) common->priv;
142
143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
144                 return;
145
146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
147                 return;
148
149         common->ani.longcal_timer = timestamp;
150         common->ani.shortcal_timer = timestamp;
151         common->ani.checkani_timer = timestamp;
152
153         mod_timer(&common->ani.timer,
154                   jiffies +
155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
156 }
157
158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
159 {
160         struct ath_hw *ah = sc->sc_ah;
161         struct ath9k_channel *chan = &ah->channels[channel];
162         struct survey_info *survey = &sc->survey[channel];
163
164         if (chan->noisefloor) {
165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
166                 survey->noise = chan->noisefloor;
167         }
168 }
169
170 /*
171  * Updates the survey statistics and returns the busy time since last
172  * update in %, if the measurement duration was long enough for the
173  * result to be useful, -1 otherwise.
174  */
175 static int ath_update_survey_stats(struct ath_softc *sc)
176 {
177         struct ath_hw *ah = sc->sc_ah;
178         struct ath_common *common = ath9k_hw_common(ah);
179         int pos = ah->curchan - &ah->channels[0];
180         struct survey_info *survey = &sc->survey[pos];
181         struct ath_cycle_counters *cc = &common->cc_survey;
182         unsigned int div = common->clockrate * 1000;
183         int ret = 0;
184
185         if (!ah->curchan)
186                 return -1;
187
188         if (ah->power_mode == ATH9K_PM_AWAKE)
189                 ath_hw_cycle_counters_update(common);
190
191         if (cc->cycles > 0) {
192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
194                         SURVEY_INFO_CHANNEL_TIME_RX |
195                         SURVEY_INFO_CHANNEL_TIME_TX;
196                 survey->channel_time += cc->cycles / div;
197                 survey->channel_time_busy += cc->rx_busy / div;
198                 survey->channel_time_rx += cc->rx_frame / div;
199                 survey->channel_time_tx += cc->tx_frame / div;
200         }
201
202         if (cc->cycles < div)
203                 return -1;
204
205         if (cc->cycles > 0)
206                 ret = cc->rx_busy * 100 / cc->cycles;
207
208         memset(cc, 0, sizeof(*cc));
209
210         ath_update_survey_nf(sc, pos);
211
212         return ret;
213 }
214
215 /*
216  * Set/change channels.  If the channel is really being changed, it's done
217  * by reseting the chip.  To accomplish this we must first cleanup any pending
218  * DMA, then restart stuff.
219 */
220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
221                     struct ath9k_channel *hchan)
222 {
223         struct ath_hw *ah = sc->sc_ah;
224         struct ath_common *common = ath9k_hw_common(ah);
225         struct ieee80211_conf *conf = &common->hw->conf;
226         bool fastcc = true, stopped;
227         struct ieee80211_channel *channel = hw->conf.channel;
228         struct ath9k_hw_cal_data *caldata = NULL;
229         int r;
230
231         if (sc->sc_flags & SC_OP_INVALID)
232                 return -EIO;
233
234         sc->hw_busy_count = 0;
235
236         del_timer_sync(&common->ani.timer);
237         cancel_work_sync(&sc->paprd_work);
238         cancel_work_sync(&sc->hw_check_work);
239         cancel_delayed_work_sync(&sc->tx_complete_work);
240         cancel_delayed_work_sync(&sc->hw_pll_work);
241
242         ath9k_ps_wakeup(sc);
243
244         spin_lock_bh(&sc->sc_pcu_lock);
245
246         /*
247          * This is only performed if the channel settings have
248          * actually changed.
249          *
250          * To switch channels clear any pending DMA operations;
251          * wait long enough for the RX fifo to drain, reset the
252          * hardware at the new frequency, and then re-enable
253          * the relevant bits of the h/w.
254          */
255         ath9k_hw_disable_interrupts(ah);
256         stopped = ath_drain_all_txq(sc, false);
257
258         if (!ath_stoprecv(sc))
259                 stopped = false;
260
261         if (!ath9k_hw_check_alive(ah))
262                 stopped = false;
263
264         /* XXX: do not flush receive queue here. We don't want
265          * to flush data frames already in queue because of
266          * changing channel. */
267
268         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
269                 fastcc = false;
270
271         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
272                 caldata = &sc->caldata;
273
274         ath_dbg(common, ATH_DBG_CONFIG,
275                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
276                 sc->sc_ah->curchan->channel,
277                 channel->center_freq, conf_is_ht40(conf),
278                 fastcc);
279
280         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
281         if (r) {
282                 ath_err(common,
283                         "Unable to reset channel (%u MHz), reset status %d\n",
284                         channel->center_freq, r);
285                 goto ps_restore;
286         }
287
288         if (ath_startrecv(sc) != 0) {
289                 ath_err(common, "Unable to restart recv logic\n");
290                 r = -EIO;
291                 goto ps_restore;
292         }
293
294         ath9k_cmn_update_txpow(ah, sc->curtxpow,
295                                sc->config.txpowlimit, &sc->curtxpow);
296         ath9k_hw_set_interrupts(ah, ah->imask);
297
298         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
299                 if (sc->sc_flags & SC_OP_BEACONS)
300                         ath_set_beacon(sc);
301                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
302                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
303                 ath_start_ani(common);
304         }
305
306  ps_restore:
307         ieee80211_wake_queues(hw);
308
309         spin_unlock_bh(&sc->sc_pcu_lock);
310
311         ath9k_ps_restore(sc);
312         return r;
313 }
314
315 static void ath_paprd_activate(struct ath_softc *sc)
316 {
317         struct ath_hw *ah = sc->sc_ah;
318         struct ath9k_hw_cal_data *caldata = ah->caldata;
319         struct ath_common *common = ath9k_hw_common(ah);
320         int chain;
321
322         if (!caldata || !caldata->paprd_done)
323                 return;
324
325         ath9k_ps_wakeup(sc);
326         ar9003_paprd_enable(ah, false);
327         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
328                 if (!(common->tx_chainmask & BIT(chain)))
329                         continue;
330
331                 ar9003_paprd_populate_single_table(ah, caldata, chain);
332         }
333
334         ar9003_paprd_enable(ah, true);
335         ath9k_ps_restore(sc);
336 }
337
338 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
339 {
340         struct ieee80211_hw *hw = sc->hw;
341         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
342         struct ath_hw *ah = sc->sc_ah;
343         struct ath_common *common = ath9k_hw_common(ah);
344         struct ath_tx_control txctl;
345         int time_left;
346
347         memset(&txctl, 0, sizeof(txctl));
348         txctl.txq = sc->tx.txq_map[WME_AC_BE];
349
350         memset(tx_info, 0, sizeof(*tx_info));
351         tx_info->band = hw->conf.channel->band;
352         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
353         tx_info->control.rates[0].idx = 0;
354         tx_info->control.rates[0].count = 1;
355         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
356         tx_info->control.rates[1].idx = -1;
357
358         init_completion(&sc->paprd_complete);
359         txctl.paprd = BIT(chain);
360
361         if (ath_tx_start(hw, skb, &txctl) != 0) {
362                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
363                 dev_kfree_skb_any(skb);
364                 return false;
365         }
366
367         time_left = wait_for_completion_timeout(&sc->paprd_complete,
368                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
369
370         if (!time_left)
371                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
372                         "Timeout waiting for paprd training on TX chain %d\n",
373                         chain);
374
375         return !!time_left;
376 }
377
378 void ath_paprd_calibrate(struct work_struct *work)
379 {
380         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
381         struct ieee80211_hw *hw = sc->hw;
382         struct ath_hw *ah = sc->sc_ah;
383         struct ieee80211_hdr *hdr;
384         struct sk_buff *skb = NULL;
385         struct ath9k_hw_cal_data *caldata = ah->caldata;
386         struct ath_common *common = ath9k_hw_common(ah);
387         int ftype;
388         int chain_ok = 0;
389         int chain;
390         int len = 1800;
391
392         if (!caldata)
393                 return;
394
395         if (ar9003_paprd_init_table(ah) < 0)
396                 return;
397
398         skb = alloc_skb(len, GFP_KERNEL);
399         if (!skb)
400                 return;
401
402         skb_put(skb, len);
403         memset(skb->data, 0, len);
404         hdr = (struct ieee80211_hdr *)skb->data;
405         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
406         hdr->frame_control = cpu_to_le16(ftype);
407         hdr->duration_id = cpu_to_le16(10);
408         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
409         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
410         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
411
412         ath9k_ps_wakeup(sc);
413         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
414                 if (!(common->tx_chainmask & BIT(chain)))
415                         continue;
416
417                 chain_ok = 0;
418
419                 ath_dbg(common, ATH_DBG_CALIBRATE,
420                         "Sending PAPRD frame for thermal measurement "
421                         "on chain %d\n", chain);
422                 if (!ath_paprd_send_frame(sc, skb, chain))
423                         goto fail_paprd;
424
425                 ar9003_paprd_setup_gain_table(ah, chain);
426
427                 ath_dbg(common, ATH_DBG_CALIBRATE,
428                         "Sending PAPRD training frame on chain %d\n", chain);
429                 if (!ath_paprd_send_frame(sc, skb, chain))
430                         goto fail_paprd;
431
432                 if (!ar9003_paprd_is_done(ah))
433                         break;
434
435                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
436                         break;
437
438                 chain_ok = 1;
439         }
440         kfree_skb(skb);
441
442         if (chain_ok) {
443                 caldata->paprd_done = true;
444                 ath_paprd_activate(sc);
445         }
446
447 fail_paprd:
448         ath9k_ps_restore(sc);
449 }
450
451 /*
452  *  This routine performs the periodic noise floor calibration function
453  *  that is used to adjust and optimize the chip performance.  This
454  *  takes environmental changes (location, temperature) into account.
455  *  When the task is complete, it reschedules itself depending on the
456  *  appropriate interval that was calculated.
457  */
458 void ath_ani_calibrate(unsigned long data)
459 {
460         struct ath_softc *sc = (struct ath_softc *)data;
461         struct ath_hw *ah = sc->sc_ah;
462         struct ath_common *common = ath9k_hw_common(ah);
463         bool longcal = false;
464         bool shortcal = false;
465         bool aniflag = false;
466         unsigned int timestamp = jiffies_to_msecs(jiffies);
467         u32 cal_interval, short_cal_interval, long_cal_interval;
468         unsigned long flags;
469
470         if (ah->caldata && ah->caldata->nfcal_interference)
471                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
472         else
473                 long_cal_interval = ATH_LONG_CALINTERVAL;
474
475         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
476                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
477
478         /* Only calibrate if awake */
479         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
480                 goto set_timer;
481
482         ath9k_ps_wakeup(sc);
483
484         /* Long calibration runs independently of short calibration. */
485         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
486                 longcal = true;
487                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
488                 common->ani.longcal_timer = timestamp;
489         }
490
491         /* Short calibration applies only while caldone is false */
492         if (!common->ani.caldone) {
493                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
494                         shortcal = true;
495                         ath_dbg(common, ATH_DBG_ANI,
496                                 "shortcal @%lu\n", jiffies);
497                         common->ani.shortcal_timer = timestamp;
498                         common->ani.resetcal_timer = timestamp;
499                 }
500         } else {
501                 if ((timestamp - common->ani.resetcal_timer) >=
502                     ATH_RESTART_CALINTERVAL) {
503                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
504                         if (common->ani.caldone)
505                                 common->ani.resetcal_timer = timestamp;
506                 }
507         }
508
509         /* Verify whether we must check ANI */
510         if ((timestamp - common->ani.checkani_timer) >=
511              ah->config.ani_poll_interval) {
512                 aniflag = true;
513                 common->ani.checkani_timer = timestamp;
514         }
515
516         /* Call ANI routine if necessary */
517         if (aniflag) {
518                 spin_lock_irqsave(&common->cc_lock, flags);
519                 ath9k_hw_ani_monitor(ah, ah->curchan);
520                 ath_update_survey_stats(sc);
521                 spin_unlock_irqrestore(&common->cc_lock, flags);
522         }
523
524         /* Perform calibration if necessary */
525         if (longcal || shortcal) {
526                 common->ani.caldone =
527                         ath9k_hw_calibrate(ah, ah->curchan,
528                                                 common->rx_chainmask, longcal);
529         }
530
531         ath9k_ps_restore(sc);
532
533 set_timer:
534         /*
535         * Set timer interval based on previous results.
536         * The interval must be the shortest necessary to satisfy ANI,
537         * short calibration and long calibration.
538         */
539         cal_interval = ATH_LONG_CALINTERVAL;
540         if (sc->sc_ah->config.enable_ani)
541                 cal_interval = min(cal_interval,
542                                    (u32)ah->config.ani_poll_interval);
543         if (!common->ani.caldone)
544                 cal_interval = min(cal_interval, (u32)short_cal_interval);
545
546         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
547         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
548                 if (!ah->caldata->paprd_done)
549                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
550                 else if (!ah->paprd_table_write_done)
551                         ath_paprd_activate(sc);
552         }
553 }
554
555 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
556 {
557         struct ath_node *an;
558         struct ath_hw *ah = sc->sc_ah;
559         an = (struct ath_node *)sta->drv_priv;
560
561 #ifdef CONFIG_ATH9K_DEBUGFS
562         spin_lock(&sc->nodes_lock);
563         list_add(&an->list, &sc->nodes);
564         spin_unlock(&sc->nodes_lock);
565         an->sta = sta;
566 #endif
567         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
568                 sc->sc_flags |= SC_OP_ENABLE_APM;
569
570         if (sc->sc_flags & SC_OP_TXAGGR) {
571                 ath_tx_node_init(sc, an);
572                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
573                                      sta->ht_cap.ampdu_factor);
574                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
575         }
576 }
577
578 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
579 {
580         struct ath_node *an = (struct ath_node *)sta->drv_priv;
581
582 #ifdef CONFIG_ATH9K_DEBUGFS
583         spin_lock(&sc->nodes_lock);
584         list_del(&an->list);
585         spin_unlock(&sc->nodes_lock);
586         an->sta = NULL;
587 #endif
588
589         if (sc->sc_flags & SC_OP_TXAGGR)
590                 ath_tx_node_cleanup(sc, an);
591 }
592
593 void ath_hw_check(struct work_struct *work)
594 {
595         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
596         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
597         unsigned long flags;
598         int busy;
599
600         ath9k_ps_wakeup(sc);
601         if (ath9k_hw_check_alive(sc->sc_ah))
602                 goto out;
603
604         spin_lock_irqsave(&common->cc_lock, flags);
605         busy = ath_update_survey_stats(sc);
606         spin_unlock_irqrestore(&common->cc_lock, flags);
607
608         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
609                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
610         if (busy >= 99) {
611                 if (++sc->hw_busy_count >= 3)
612                         ath_reset(sc, true);
613         } else if (busy >= 0)
614                 sc->hw_busy_count = 0;
615
616 out:
617         ath9k_ps_restore(sc);
618 }
619
620 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
621 {
622         static int count;
623         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
624
625         if (pll_sqsum >= 0x40000) {
626                 count++;
627                 if (count == 3) {
628                         /* Rx is hung for more than 500ms. Reset it */
629                         ath_dbg(common, ATH_DBG_RESET,
630                                 "Possible RX hang, resetting");
631                         ath_reset(sc, true);
632                         count = 0;
633                 }
634         } else
635                 count = 0;
636 }
637
638 void ath_hw_pll_work(struct work_struct *work)
639 {
640         struct ath_softc *sc = container_of(work, struct ath_softc,
641                                             hw_pll_work.work);
642         u32 pll_sqsum;
643
644         if (AR_SREV_9485(sc->sc_ah)) {
645
646                 ath9k_ps_wakeup(sc);
647                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
648                 ath9k_ps_restore(sc);
649
650                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
651
652                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
653         }
654 }
655
656
657 void ath9k_tasklet(unsigned long data)
658 {
659         struct ath_softc *sc = (struct ath_softc *)data;
660         struct ath_hw *ah = sc->sc_ah;
661         struct ath_common *common = ath9k_hw_common(ah);
662
663         u32 status = sc->intrstatus;
664         u32 rxmask;
665
666         if ((status & ATH9K_INT_FATAL) ||
667             (status & ATH9K_INT_BB_WATCHDOG)) {
668                 ath_reset(sc, true);
669                 return;
670         }
671
672         ath9k_ps_wakeup(sc);
673         spin_lock(&sc->sc_pcu_lock);
674
675         /*
676          * Only run the baseband hang check if beacons stop working in AP or
677          * IBSS mode, because it has a high false positive rate. For station
678          * mode it should not be necessary, since the upper layers will detect
679          * this through a beacon miss automatically and the following channel
680          * change will trigger a hardware reset anyway
681          */
682         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
683             !ath9k_hw_check_alive(ah))
684                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
685
686         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
687                 /*
688                  * TSF sync does not look correct; remain awake to sync with
689                  * the next Beacon.
690                  */
691                 ath_dbg(common, ATH_DBG_PS,
692                         "TSFOOR - Sync with next Beacon\n");
693                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
694                                 PS_TSFOOR_SYNC;
695         }
696
697         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
698                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
699                           ATH9K_INT_RXORN);
700         else
701                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
702
703         if (status & rxmask) {
704                 /* Check for high priority Rx first */
705                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
706                     (status & ATH9K_INT_RXHP))
707                         ath_rx_tasklet(sc, 0, true);
708
709                 ath_rx_tasklet(sc, 0, false);
710         }
711
712         if (status & ATH9K_INT_TX) {
713                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
714                         ath_tx_edma_tasklet(sc);
715                 else
716                         ath_tx_tasklet(sc);
717         }
718
719         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
720                 if (status & ATH9K_INT_GENTIMER)
721                         ath_gen_timer_isr(sc->sc_ah);
722
723         /* re-enable hardware interrupt */
724         ath9k_hw_enable_interrupts(ah);
725
726         spin_unlock(&sc->sc_pcu_lock);
727         ath9k_ps_restore(sc);
728 }
729
730 irqreturn_t ath_isr(int irq, void *dev)
731 {
732 #define SCHED_INTR (                            \
733                 ATH9K_INT_FATAL |               \
734                 ATH9K_INT_BB_WATCHDOG |         \
735                 ATH9K_INT_RXORN |               \
736                 ATH9K_INT_RXEOL |               \
737                 ATH9K_INT_RX |                  \
738                 ATH9K_INT_RXLP |                \
739                 ATH9K_INT_RXHP |                \
740                 ATH9K_INT_TX |                  \
741                 ATH9K_INT_BMISS |               \
742                 ATH9K_INT_CST |                 \
743                 ATH9K_INT_TSFOOR |              \
744                 ATH9K_INT_GENTIMER)
745
746         struct ath_softc *sc = dev;
747         struct ath_hw *ah = sc->sc_ah;
748         struct ath_common *common = ath9k_hw_common(ah);
749         enum ath9k_int status;
750         bool sched = false;
751
752         /*
753          * The hardware is not ready/present, don't
754          * touch anything. Note this can happen early
755          * on if the IRQ is shared.
756          */
757         if (sc->sc_flags & SC_OP_INVALID)
758                 return IRQ_NONE;
759
760
761         /* shared irq, not for us */
762
763         if (!ath9k_hw_intrpend(ah))
764                 return IRQ_NONE;
765
766         /*
767          * Figure out the reason(s) for the interrupt.  Note
768          * that the hal returns a pseudo-ISR that may include
769          * bits we haven't explicitly enabled so we mask the
770          * value to insure we only process bits we requested.
771          */
772         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
773         status &= ah->imask;    /* discard unasked-for bits */
774
775         /*
776          * If there are no status bits set, then this interrupt was not
777          * for me (should have been caught above).
778          */
779         if (!status)
780                 return IRQ_NONE;
781
782         /* Cache the status */
783         sc->intrstatus = status;
784
785         if (status & SCHED_INTR)
786                 sched = true;
787
788         /*
789          * If a FATAL or RXORN interrupt is received, we have to reset the
790          * chip immediately.
791          */
792         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
793             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
794                 goto chip_reset;
795
796         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
797             (status & ATH9K_INT_BB_WATCHDOG)) {
798
799                 spin_lock(&common->cc_lock);
800                 ath_hw_cycle_counters_update(common);
801                 ar9003_hw_bb_watchdog_dbg_info(ah);
802                 spin_unlock(&common->cc_lock);
803
804                 goto chip_reset;
805         }
806
807         if (status & ATH9K_INT_SWBA)
808                 tasklet_schedule(&sc->bcon_tasklet);
809
810         if (status & ATH9K_INT_TXURN)
811                 ath9k_hw_updatetxtriglevel(ah, true);
812
813         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
814                 if (status & ATH9K_INT_RXEOL) {
815                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
816                         ath9k_hw_set_interrupts(ah, ah->imask);
817                 }
818         }
819
820         if (status & ATH9K_INT_MIB) {
821                 /*
822                  * Disable interrupts until we service the MIB
823                  * interrupt; otherwise it will continue to
824                  * fire.
825                  */
826                 ath9k_hw_disable_interrupts(ah);
827                 /*
828                  * Let the hal handle the event. We assume
829                  * it will clear whatever condition caused
830                  * the interrupt.
831                  */
832                 spin_lock(&common->cc_lock);
833                 ath9k_hw_proc_mib_event(ah);
834                 spin_unlock(&common->cc_lock);
835                 ath9k_hw_enable_interrupts(ah);
836         }
837
838         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
839                 if (status & ATH9K_INT_TIM_TIMER) {
840                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
841                                 goto chip_reset;
842                         /* Clear RxAbort bit so that we can
843                          * receive frames */
844                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
845                         ath9k_hw_setrxabort(sc->sc_ah, 0);
846                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
847                 }
848
849 chip_reset:
850
851         ath_debug_stat_interrupt(sc, status);
852
853         if (sched) {
854                 /* turn off every interrupt */
855                 ath9k_hw_disable_interrupts(ah);
856                 tasklet_schedule(&sc->intr_tq);
857         }
858
859         return IRQ_HANDLED;
860
861 #undef SCHED_INTR
862 }
863
864 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
865 {
866         struct ath_hw *ah = sc->sc_ah;
867         struct ath_common *common = ath9k_hw_common(ah);
868         struct ieee80211_channel *channel = hw->conf.channel;
869         int r;
870
871         ath9k_ps_wakeup(sc);
872         spin_lock_bh(&sc->sc_pcu_lock);
873
874         ath9k_hw_configpcipowersave(ah, 0, 0);
875
876         if (!ah->curchan)
877                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
878
879         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
880         if (r) {
881                 ath_err(common,
882                         "Unable to reset channel (%u MHz), reset status %d\n",
883                         channel->center_freq, r);
884         }
885
886         ath9k_cmn_update_txpow(ah, sc->curtxpow,
887                                sc->config.txpowlimit, &sc->curtxpow);
888         if (ath_startrecv(sc) != 0) {
889                 ath_err(common, "Unable to restart recv logic\n");
890                 goto out;
891         }
892         if (sc->sc_flags & SC_OP_BEACONS)
893                 ath_set_beacon(sc);     /* restart beacons */
894
895         /* Re-Enable  interrupts */
896         ath9k_hw_set_interrupts(ah, ah->imask);
897
898         /* Enable LED */
899         ath9k_hw_cfg_output(ah, ah->led_pin,
900                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
901         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
902
903         ieee80211_wake_queues(hw);
904         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
905
906 out:
907         spin_unlock_bh(&sc->sc_pcu_lock);
908
909         ath9k_ps_restore(sc);
910 }
911
912 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
913 {
914         struct ath_hw *ah = sc->sc_ah;
915         struct ieee80211_channel *channel = hw->conf.channel;
916         int r;
917
918         ath9k_ps_wakeup(sc);
919         cancel_delayed_work_sync(&sc->hw_pll_work);
920
921         spin_lock_bh(&sc->sc_pcu_lock);
922
923         ieee80211_stop_queues(hw);
924
925         /*
926          * Keep the LED on when the radio is disabled
927          * during idle unassociated state.
928          */
929         if (!sc->ps_idle) {
930                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
931                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
932         }
933
934         /* Disable interrupts */
935         ath9k_hw_disable_interrupts(ah);
936
937         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
938
939         ath_stoprecv(sc);               /* turn off frame recv */
940         ath_flushrecv(sc);              /* flush recv queue */
941
942         if (!ah->curchan)
943                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
944
945         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
946         if (r) {
947                 ath_err(ath9k_hw_common(sc->sc_ah),
948                         "Unable to reset channel (%u MHz), reset status %d\n",
949                         channel->center_freq, r);
950         }
951
952         ath9k_hw_phy_disable(ah);
953
954         ath9k_hw_configpcipowersave(ah, 1, 1);
955
956         spin_unlock_bh(&sc->sc_pcu_lock);
957         ath9k_ps_restore(sc);
958 }
959
960 int ath_reset(struct ath_softc *sc, bool retry_tx)
961 {
962         struct ath_hw *ah = sc->sc_ah;
963         struct ath_common *common = ath9k_hw_common(ah);
964         struct ieee80211_hw *hw = sc->hw;
965         int r;
966
967         sc->hw_busy_count = 0;
968
969         /* Stop ANI */
970         del_timer_sync(&common->ani.timer);
971
972         ath9k_ps_wakeup(sc);
973         spin_lock_bh(&sc->sc_pcu_lock);
974
975         ieee80211_stop_queues(hw);
976
977         ath9k_hw_disable_interrupts(ah);
978         ath_drain_all_txq(sc, retry_tx);
979
980         ath_stoprecv(sc);
981         ath_flushrecv(sc);
982
983         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
984         if (r)
985                 ath_err(common,
986                         "Unable to reset hardware; reset status %d\n", r);
987
988         if (ath_startrecv(sc) != 0)
989                 ath_err(common, "Unable to start recv logic\n");
990
991         /*
992          * We may be doing a reset in response to a request
993          * that changes the channel so update any state that
994          * might change as a result.
995          */
996         ath9k_cmn_update_txpow(ah, sc->curtxpow,
997                                sc->config.txpowlimit, &sc->curtxpow);
998
999         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1000                 ath_set_beacon(sc);     /* restart beacons */
1001
1002         ath9k_hw_set_interrupts(ah, ah->imask);
1003
1004         if (retry_tx) {
1005                 int i;
1006                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1007                         if (ATH_TXQ_SETUP(sc, i)) {
1008                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1009                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1010                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1011                         }
1012                 }
1013         }
1014
1015         ieee80211_wake_queues(hw);
1016         spin_unlock_bh(&sc->sc_pcu_lock);
1017
1018         /* Start ANI */
1019         ath_start_ani(common);
1020         ath9k_ps_restore(sc);
1021
1022         return r;
1023 }
1024
1025 /**********************/
1026 /* mac80211 callbacks */
1027 /**********************/
1028
1029 static int ath9k_start(struct ieee80211_hw *hw)
1030 {
1031         struct ath_softc *sc = hw->priv;
1032         struct ath_hw *ah = sc->sc_ah;
1033         struct ath_common *common = ath9k_hw_common(ah);
1034         struct ieee80211_channel *curchan = hw->conf.channel;
1035         struct ath9k_channel *init_channel;
1036         int r;
1037
1038         ath_dbg(common, ATH_DBG_CONFIG,
1039                 "Starting driver with initial channel: %d MHz\n",
1040                 curchan->center_freq);
1041
1042         ath9k_ps_wakeup(sc);
1043
1044         mutex_lock(&sc->mutex);
1045
1046         /* setup initial channel */
1047         sc->chan_idx = curchan->hw_value;
1048
1049         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1050
1051         /* Reset SERDES registers */
1052         ath9k_hw_configpcipowersave(ah, 0, 0);
1053
1054         /*
1055          * The basic interface to setting the hardware in a good
1056          * state is ``reset''.  On return the hardware is known to
1057          * be powered up and with interrupts disabled.  This must
1058          * be followed by initialization of the appropriate bits
1059          * and then setup of the interrupt mask.
1060          */
1061         spin_lock_bh(&sc->sc_pcu_lock);
1062         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1063         if (r) {
1064                 ath_err(common,
1065                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1066                         r, curchan->center_freq);
1067                 spin_unlock_bh(&sc->sc_pcu_lock);
1068                 goto mutex_unlock;
1069         }
1070
1071         /*
1072          * This is needed only to setup initial state
1073          * but it's best done after a reset.
1074          */
1075         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1076                         sc->config.txpowlimit, &sc->curtxpow);
1077
1078         /*
1079          * Setup the hardware after reset:
1080          * The receive engine is set going.
1081          * Frame transmit is handled entirely
1082          * in the frame output path; there's nothing to do
1083          * here except setup the interrupt mask.
1084          */
1085         if (ath_startrecv(sc) != 0) {
1086                 ath_err(common, "Unable to start recv logic\n");
1087                 r = -EIO;
1088                 spin_unlock_bh(&sc->sc_pcu_lock);
1089                 goto mutex_unlock;
1090         }
1091         spin_unlock_bh(&sc->sc_pcu_lock);
1092
1093         /* Setup our intr mask. */
1094         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1095                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1096                     ATH9K_INT_GLOBAL;
1097
1098         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1099                 ah->imask |= ATH9K_INT_RXHP |
1100                              ATH9K_INT_RXLP |
1101                              ATH9K_INT_BB_WATCHDOG;
1102         else
1103                 ah->imask |= ATH9K_INT_RX;
1104
1105         ah->imask |= ATH9K_INT_GTT;
1106
1107         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1108                 ah->imask |= ATH9K_INT_CST;
1109
1110         sc->sc_flags &= ~SC_OP_INVALID;
1111         sc->sc_ah->is_monitoring = false;
1112
1113         /* Disable BMISS interrupt when we're not associated */
1114         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1115         ath9k_hw_set_interrupts(ah, ah->imask);
1116
1117         ieee80211_wake_queues(hw);
1118
1119         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1120
1121         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1122             !ah->btcoex_hw.enabled) {
1123                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1124                                            AR_STOMP_LOW_WLAN_WGHT);
1125                 ath9k_hw_btcoex_enable(ah);
1126
1127                 if (common->bus_ops->bt_coex_prep)
1128                         common->bus_ops->bt_coex_prep(common);
1129                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1130                         ath9k_btcoex_timer_resume(sc);
1131         }
1132
1133         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1134                 common->bus_ops->extn_synch_en(common);
1135
1136 mutex_unlock:
1137         mutex_unlock(&sc->mutex);
1138
1139         ath9k_ps_restore(sc);
1140
1141         return r;
1142 }
1143
1144 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1145 {
1146         struct ath_softc *sc = hw->priv;
1147         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1148         struct ath_tx_control txctl;
1149         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1150
1151         if (sc->ps_enabled) {
1152                 /*
1153                  * mac80211 does not set PM field for normal data frames, so we
1154                  * need to update that based on the current PS mode.
1155                  */
1156                 if (ieee80211_is_data(hdr->frame_control) &&
1157                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1158                     !ieee80211_has_pm(hdr->frame_control)) {
1159                         ath_dbg(common, ATH_DBG_PS,
1160                                 "Add PM=1 for a TX frame while in PS mode\n");
1161                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1162                 }
1163         }
1164
1165         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1166                 /*
1167                  * We are using PS-Poll and mac80211 can request TX while in
1168                  * power save mode. Need to wake up hardware for the TX to be
1169                  * completed and if needed, also for RX of buffered frames.
1170                  */
1171                 ath9k_ps_wakeup(sc);
1172                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1173                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1174                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1175                         ath_dbg(common, ATH_DBG_PS,
1176                                 "Sending PS-Poll to pick a buffered frame\n");
1177                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1178                 } else {
1179                         ath_dbg(common, ATH_DBG_PS,
1180                                 "Wake up to complete TX\n");
1181                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1182                 }
1183                 /*
1184                  * The actual restore operation will happen only after
1185                  * the sc_flags bit is cleared. We are just dropping
1186                  * the ps_usecount here.
1187                  */
1188                 ath9k_ps_restore(sc);
1189         }
1190
1191         memset(&txctl, 0, sizeof(struct ath_tx_control));
1192         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1193
1194         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1195
1196         if (ath_tx_start(hw, skb, &txctl) != 0) {
1197                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1198                 goto exit;
1199         }
1200
1201         return;
1202 exit:
1203         dev_kfree_skb_any(skb);
1204 }
1205
1206 static void ath9k_stop(struct ieee80211_hw *hw)
1207 {
1208         struct ath_softc *sc = hw->priv;
1209         struct ath_hw *ah = sc->sc_ah;
1210         struct ath_common *common = ath9k_hw_common(ah);
1211
1212         mutex_lock(&sc->mutex);
1213
1214         cancel_delayed_work_sync(&sc->tx_complete_work);
1215         cancel_delayed_work_sync(&sc->hw_pll_work);
1216         cancel_work_sync(&sc->paprd_work);
1217         cancel_work_sync(&sc->hw_check_work);
1218
1219         if (sc->sc_flags & SC_OP_INVALID) {
1220                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1221                 mutex_unlock(&sc->mutex);
1222                 return;
1223         }
1224
1225         /* Ensure HW is awake when we try to shut it down. */
1226         ath9k_ps_wakeup(sc);
1227
1228         if (ah->btcoex_hw.enabled) {
1229                 ath9k_hw_btcoex_disable(ah);
1230                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1231                         ath9k_btcoex_timer_pause(sc);
1232         }
1233
1234         spin_lock_bh(&sc->sc_pcu_lock);
1235
1236         /* prevent tasklets to enable interrupts once we disable them */
1237         ah->imask &= ~ATH9K_INT_GLOBAL;
1238
1239         /* make sure h/w will not generate any interrupt
1240          * before setting the invalid flag. */
1241         ath9k_hw_disable_interrupts(ah);
1242
1243         if (!(sc->sc_flags & SC_OP_INVALID)) {
1244                 ath_drain_all_txq(sc, false);
1245                 ath_stoprecv(sc);
1246                 ath9k_hw_phy_disable(ah);
1247         } else
1248                 sc->rx.rxlink = NULL;
1249
1250         if (sc->rx.frag) {
1251                 dev_kfree_skb_any(sc->rx.frag);
1252                 sc->rx.frag = NULL;
1253         }
1254
1255         /* disable HAL and put h/w to sleep */
1256         ath9k_hw_disable(ah);
1257         ath9k_hw_configpcipowersave(ah, 1, 1);
1258
1259         spin_unlock_bh(&sc->sc_pcu_lock);
1260
1261         /* we can now sync irq and kill any running tasklets, since we already
1262          * disabled interrupts and not holding a spin lock */
1263         synchronize_irq(sc->irq);
1264         tasklet_kill(&sc->intr_tq);
1265         tasklet_kill(&sc->bcon_tasklet);
1266
1267         ath9k_ps_restore(sc);
1268
1269         sc->ps_idle = true;
1270         ath_radio_disable(sc, hw);
1271
1272         sc->sc_flags |= SC_OP_INVALID;
1273
1274         mutex_unlock(&sc->mutex);
1275
1276         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1277 }
1278
1279 bool ath9k_uses_beacons(int type)
1280 {
1281         switch (type) {
1282         case NL80211_IFTYPE_AP:
1283         case NL80211_IFTYPE_ADHOC:
1284         case NL80211_IFTYPE_MESH_POINT:
1285                 return true;
1286         default:
1287                 return false;
1288         }
1289 }
1290
1291 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1292                                  struct ieee80211_vif *vif)
1293 {
1294         struct ath_vif *avp = (void *)vif->drv_priv;
1295
1296         ath9k_set_beaconing_status(sc, false);
1297         ath_beacon_return(sc, avp);
1298         ath9k_set_beaconing_status(sc, true);
1299         sc->sc_flags &= ~SC_OP_BEACONS;
1300 }
1301
1302 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1303 {
1304         struct ath9k_vif_iter_data *iter_data = data;
1305         int i;
1306
1307         if (iter_data->hw_macaddr)
1308                 for (i = 0; i < ETH_ALEN; i++)
1309                         iter_data->mask[i] &=
1310                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1311
1312         switch (vif->type) {
1313         case NL80211_IFTYPE_AP:
1314                 iter_data->naps++;
1315                 break;
1316         case NL80211_IFTYPE_STATION:
1317                 iter_data->nstations++;
1318                 break;
1319         case NL80211_IFTYPE_ADHOC:
1320                 iter_data->nadhocs++;
1321                 break;
1322         case NL80211_IFTYPE_MESH_POINT:
1323                 iter_data->nmeshes++;
1324                 break;
1325         case NL80211_IFTYPE_WDS:
1326                 iter_data->nwds++;
1327                 break;
1328         default:
1329                 iter_data->nothers++;
1330                 break;
1331         }
1332 }
1333
1334 /* Called with sc->mutex held. */
1335 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1336                                struct ieee80211_vif *vif,
1337                                struct ath9k_vif_iter_data *iter_data)
1338 {
1339         struct ath_softc *sc = hw->priv;
1340         struct ath_hw *ah = sc->sc_ah;
1341         struct ath_common *common = ath9k_hw_common(ah);
1342
1343         /*
1344          * Use the hardware MAC address as reference, the hardware uses it
1345          * together with the BSSID mask when matching addresses.
1346          */
1347         memset(iter_data, 0, sizeof(*iter_data));
1348         iter_data->hw_macaddr = common->macaddr;
1349         memset(&iter_data->mask, 0xff, ETH_ALEN);
1350
1351         if (vif)
1352                 ath9k_vif_iter(iter_data, vif->addr, vif);
1353
1354         /* Get list of all active MAC addresses */
1355         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1356                                                    iter_data);
1357 }
1358
1359 /* Called with sc->mutex held. */
1360 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1361                                           struct ieee80211_vif *vif)
1362 {
1363         struct ath_softc *sc = hw->priv;
1364         struct ath_hw *ah = sc->sc_ah;
1365         struct ath_common *common = ath9k_hw_common(ah);
1366         struct ath9k_vif_iter_data iter_data;
1367
1368         ath9k_calculate_iter_data(hw, vif, &iter_data);
1369
1370         /* Set BSSID mask. */
1371         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1372         ath_hw_setbssidmask(common);
1373
1374         /* Set op-mode & TSF */
1375         if (iter_data.naps > 0) {
1376                 ath9k_hw_set_tsfadjust(ah, 1);
1377                 sc->sc_flags |= SC_OP_TSF_RESET;
1378                 ah->opmode = NL80211_IFTYPE_AP;
1379         } else {
1380                 ath9k_hw_set_tsfadjust(ah, 0);
1381                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1382
1383                 if (iter_data.nmeshes)
1384                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1385                 else if (iter_data.nwds)
1386                         ah->opmode = NL80211_IFTYPE_AP;
1387                 else if (iter_data.nadhocs)
1388                         ah->opmode = NL80211_IFTYPE_ADHOC;
1389                 else
1390                         ah->opmode = NL80211_IFTYPE_STATION;
1391         }
1392
1393         /*
1394          * Enable MIB interrupts when there are hardware phy counters.
1395          */
1396         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1397                 if (ah->config.enable_ani)
1398                         ah->imask |= ATH9K_INT_MIB;
1399                 ah->imask |= ATH9K_INT_TSFOOR;
1400         } else {
1401                 ah->imask &= ~ATH9K_INT_MIB;
1402                 ah->imask &= ~ATH9K_INT_TSFOOR;
1403         }
1404
1405         ath9k_hw_set_interrupts(ah, ah->imask);
1406
1407         /* Set up ANI */
1408         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1409                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1410                 sc->sc_flags |= SC_OP_ANI_RUN;
1411                 ath_start_ani(common);
1412         } else {
1413                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1414                 del_timer_sync(&common->ani.timer);
1415         }
1416 }
1417
1418 /* Called with sc->mutex held, vif counts set up properly. */
1419 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1420                                    struct ieee80211_vif *vif)
1421 {
1422         struct ath_softc *sc = hw->priv;
1423
1424         ath9k_calculate_summary_state(hw, vif);
1425
1426         if (ath9k_uses_beacons(vif->type)) {
1427                 int error;
1428                 /* This may fail because upper levels do not have beacons
1429                  * properly configured yet.  That's OK, we assume it
1430                  * will be properly configured and then we will be notified
1431                  * in the info_changed method and set up beacons properly
1432                  * there.
1433                  */
1434                 ath9k_set_beaconing_status(sc, false);
1435                 error = ath_beacon_alloc(sc, vif);
1436                 if (!error)
1437                         ath_beacon_config(sc, vif);
1438                 ath9k_set_beaconing_status(sc, true);
1439         }
1440 }
1441
1442
1443 static int ath9k_add_interface(struct ieee80211_hw *hw,
1444                                struct ieee80211_vif *vif)
1445 {
1446         struct ath_softc *sc = hw->priv;
1447         struct ath_hw *ah = sc->sc_ah;
1448         struct ath_common *common = ath9k_hw_common(ah);
1449         int ret = 0;
1450
1451         ath9k_ps_wakeup(sc);
1452         mutex_lock(&sc->mutex);
1453
1454         switch (vif->type) {
1455         case NL80211_IFTYPE_STATION:
1456         case NL80211_IFTYPE_WDS:
1457         case NL80211_IFTYPE_ADHOC:
1458         case NL80211_IFTYPE_AP:
1459         case NL80211_IFTYPE_MESH_POINT:
1460                 break;
1461         default:
1462                 ath_err(common, "Interface type %d not yet supported\n",
1463                         vif->type);
1464                 ret = -EOPNOTSUPP;
1465                 goto out;
1466         }
1467
1468         if (ath9k_uses_beacons(vif->type)) {
1469                 if (sc->nbcnvifs >= ATH_BCBUF) {
1470                         ath_err(common, "Not enough beacon buffers when adding"
1471                                 " new interface of type: %i\n",
1472                                 vif->type);
1473                         ret = -ENOBUFS;
1474                         goto out;
1475                 }
1476         }
1477
1478         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1479             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1480              sc->nvifs > 0)) {
1481                 ath_err(common, "Cannot create ADHOC interface when other"
1482                         " interfaces already exist.\n");
1483                 ret = -EINVAL;
1484                 goto out;
1485         }
1486
1487         ath_dbg(common, ATH_DBG_CONFIG,
1488                 "Attach a VIF of type: %d\n", vif->type);
1489
1490         sc->nvifs++;
1491
1492         ath9k_do_vif_add_setup(hw, vif);
1493 out:
1494         mutex_unlock(&sc->mutex);
1495         ath9k_ps_restore(sc);
1496         return ret;
1497 }
1498
1499 static int ath9k_change_interface(struct ieee80211_hw *hw,
1500                                   struct ieee80211_vif *vif,
1501                                   enum nl80211_iftype new_type,
1502                                   bool p2p)
1503 {
1504         struct ath_softc *sc = hw->priv;
1505         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1506         int ret = 0;
1507
1508         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1509         mutex_lock(&sc->mutex);
1510         ath9k_ps_wakeup(sc);
1511
1512         /* See if new interface type is valid. */
1513         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1514             (sc->nvifs > 1)) {
1515                 ath_err(common, "When using ADHOC, it must be the only"
1516                         " interface.\n");
1517                 ret = -EINVAL;
1518                 goto out;
1519         }
1520
1521         if (ath9k_uses_beacons(new_type) &&
1522             !ath9k_uses_beacons(vif->type)) {
1523                 if (sc->nbcnvifs >= ATH_BCBUF) {
1524                         ath_err(common, "No beacon slot available\n");
1525                         ret = -ENOBUFS;
1526                         goto out;
1527                 }
1528         }
1529
1530         /* Clean up old vif stuff */
1531         if (ath9k_uses_beacons(vif->type))
1532                 ath9k_reclaim_beacon(sc, vif);
1533
1534         /* Add new settings */
1535         vif->type = new_type;
1536         vif->p2p = p2p;
1537
1538         ath9k_do_vif_add_setup(hw, vif);
1539 out:
1540         ath9k_ps_restore(sc);
1541         mutex_unlock(&sc->mutex);
1542         return ret;
1543 }
1544
1545 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1546                                    struct ieee80211_vif *vif)
1547 {
1548         struct ath_softc *sc = hw->priv;
1549         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1550
1551         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1552
1553         ath9k_ps_wakeup(sc);
1554         mutex_lock(&sc->mutex);
1555
1556         sc->nvifs--;
1557
1558         /* Reclaim beacon resources */
1559         if (ath9k_uses_beacons(vif->type))
1560                 ath9k_reclaim_beacon(sc, vif);
1561
1562         ath9k_calculate_summary_state(hw, NULL);
1563
1564         mutex_unlock(&sc->mutex);
1565         ath9k_ps_restore(sc);
1566 }
1567
1568 static void ath9k_enable_ps(struct ath_softc *sc)
1569 {
1570         struct ath_hw *ah = sc->sc_ah;
1571
1572         sc->ps_enabled = true;
1573         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1574                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1575                         ah->imask |= ATH9K_INT_TIM_TIMER;
1576                         ath9k_hw_set_interrupts(ah, ah->imask);
1577                 }
1578                 ath9k_hw_setrxabort(ah, 1);
1579         }
1580 }
1581
1582 static void ath9k_disable_ps(struct ath_softc *sc)
1583 {
1584         struct ath_hw *ah = sc->sc_ah;
1585
1586         sc->ps_enabled = false;
1587         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1588         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1589                 ath9k_hw_setrxabort(ah, 0);
1590                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1591                                   PS_WAIT_FOR_CAB |
1592                                   PS_WAIT_FOR_PSPOLL_DATA |
1593                                   PS_WAIT_FOR_TX_ACK);
1594                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1595                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1596                         ath9k_hw_set_interrupts(ah, ah->imask);
1597                 }
1598         }
1599
1600 }
1601
1602 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1603 {
1604         struct ath_softc *sc = hw->priv;
1605         struct ath_hw *ah = sc->sc_ah;
1606         struct ath_common *common = ath9k_hw_common(ah);
1607         struct ieee80211_conf *conf = &hw->conf;
1608         bool disable_radio = false;
1609
1610         mutex_lock(&sc->mutex);
1611
1612         /*
1613          * Leave this as the first check because we need to turn on the
1614          * radio if it was disabled before prior to processing the rest
1615          * of the changes. Likewise we must only disable the radio towards
1616          * the end.
1617          */
1618         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1619                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1620                 if (!sc->ps_idle) {
1621                         ath_radio_enable(sc, hw);
1622                         ath_dbg(common, ATH_DBG_CONFIG,
1623                                 "not-idle: enabling radio\n");
1624                 } else {
1625                         disable_radio = true;
1626                 }
1627         }
1628
1629         /*
1630          * We just prepare to enable PS. We have to wait until our AP has
1631          * ACK'd our null data frame to disable RX otherwise we'll ignore
1632          * those ACKs and end up retransmitting the same null data frames.
1633          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1634          */
1635         if (changed & IEEE80211_CONF_CHANGE_PS) {
1636                 unsigned long flags;
1637                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1638                 if (conf->flags & IEEE80211_CONF_PS)
1639                         ath9k_enable_ps(sc);
1640                 else
1641                         ath9k_disable_ps(sc);
1642                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1643         }
1644
1645         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1646                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1647                         ath_dbg(common, ATH_DBG_CONFIG,
1648                                 "Monitor mode is enabled\n");
1649                         sc->sc_ah->is_monitoring = true;
1650                 } else {
1651                         ath_dbg(common, ATH_DBG_CONFIG,
1652                                 "Monitor mode is disabled\n");
1653                         sc->sc_ah->is_monitoring = false;
1654                 }
1655         }
1656
1657         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1658                 struct ieee80211_channel *curchan = hw->conf.channel;
1659                 int pos = curchan->hw_value;
1660                 int old_pos = -1;
1661                 unsigned long flags;
1662
1663                 if (ah->curchan)
1664                         old_pos = ah->curchan - &ah->channels[0];
1665
1666                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1667                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1668                 else
1669                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1670
1671                 ath_dbg(common, ATH_DBG_CONFIG,
1672                         "Set channel: %d MHz type: %d\n",
1673                         curchan->center_freq, conf->channel_type);
1674
1675                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1676                                           curchan, conf->channel_type);
1677
1678                 /* update survey stats for the old channel before switching */
1679                 spin_lock_irqsave(&common->cc_lock, flags);
1680                 ath_update_survey_stats(sc);
1681                 spin_unlock_irqrestore(&common->cc_lock, flags);
1682
1683                 /*
1684                  * If the operating channel changes, change the survey in-use flags
1685                  * along with it.
1686                  * Reset the survey data for the new channel, unless we're switching
1687                  * back to the operating channel from an off-channel operation.
1688                  */
1689                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1690                     sc->cur_survey != &sc->survey[pos]) {
1691
1692                         if (sc->cur_survey)
1693                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1694
1695                         sc->cur_survey = &sc->survey[pos];
1696
1697                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1698                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1699                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1700                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1701                 }
1702
1703                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1704                         ath_err(common, "Unable to set channel\n");
1705                         mutex_unlock(&sc->mutex);
1706                         return -EINVAL;
1707                 }
1708
1709                 /*
1710                  * The most recent snapshot of channel->noisefloor for the old
1711                  * channel is only available after the hardware reset. Copy it to
1712                  * the survey stats now.
1713                  */
1714                 if (old_pos >= 0)
1715                         ath_update_survey_nf(sc, old_pos);
1716         }
1717
1718         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1719                 ath_dbg(common, ATH_DBG_CONFIG,
1720                         "Set power: %d\n", conf->power_level);
1721                 sc->config.txpowlimit = 2 * conf->power_level;
1722                 ath9k_ps_wakeup(sc);
1723                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1724                                        sc->config.txpowlimit, &sc->curtxpow);
1725                 ath9k_ps_restore(sc);
1726         }
1727
1728         if (disable_radio) {
1729                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1730                 ath_radio_disable(sc, hw);
1731         }
1732
1733         mutex_unlock(&sc->mutex);
1734
1735         return 0;
1736 }
1737
1738 #define SUPPORTED_FILTERS                       \
1739         (FIF_PROMISC_IN_BSS |                   \
1740         FIF_ALLMULTI |                          \
1741         FIF_CONTROL |                           \
1742         FIF_PSPOLL |                            \
1743         FIF_OTHER_BSS |                         \
1744         FIF_BCN_PRBRESP_PROMISC |               \
1745         FIF_PROBE_REQ |                         \
1746         FIF_FCSFAIL)
1747
1748 /* FIXME: sc->sc_full_reset ? */
1749 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1750                                    unsigned int changed_flags,
1751                                    unsigned int *total_flags,
1752                                    u64 multicast)
1753 {
1754         struct ath_softc *sc = hw->priv;
1755         u32 rfilt;
1756
1757         changed_flags &= SUPPORTED_FILTERS;
1758         *total_flags &= SUPPORTED_FILTERS;
1759
1760         sc->rx.rxfilter = *total_flags;
1761         ath9k_ps_wakeup(sc);
1762         rfilt = ath_calcrxfilter(sc);
1763         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1764         ath9k_ps_restore(sc);
1765
1766         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1767                 "Set HW RX filter: 0x%x\n", rfilt);
1768 }
1769
1770 static int ath9k_sta_add(struct ieee80211_hw *hw,
1771                          struct ieee80211_vif *vif,
1772                          struct ieee80211_sta *sta)
1773 {
1774         struct ath_softc *sc = hw->priv;
1775         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1776         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1777         struct ieee80211_key_conf ps_key = { };
1778
1779         ath_node_attach(sc, sta);
1780
1781         if (vif->type != NL80211_IFTYPE_AP &&
1782             vif->type != NL80211_IFTYPE_AP_VLAN)
1783                 return 0;
1784
1785         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1786
1787         return 0;
1788 }
1789
1790 static void ath9k_del_ps_key(struct ath_softc *sc,
1791                              struct ieee80211_vif *vif,
1792                              struct ieee80211_sta *sta)
1793 {
1794         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1795         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1796         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1797
1798         if (!an->ps_key)
1799             return;
1800
1801         ath_key_delete(common, &ps_key);
1802 }
1803
1804 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1805                             struct ieee80211_vif *vif,
1806                             struct ieee80211_sta *sta)
1807 {
1808         struct ath_softc *sc = hw->priv;
1809
1810         ath9k_del_ps_key(sc, vif, sta);
1811         ath_node_detach(sc, sta);
1812
1813         return 0;
1814 }
1815
1816 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1817                          struct ieee80211_vif *vif,
1818                          enum sta_notify_cmd cmd,
1819                          struct ieee80211_sta *sta)
1820 {
1821         struct ath_softc *sc = hw->priv;
1822         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1823
1824         switch (cmd) {
1825         case STA_NOTIFY_SLEEP:
1826                 an->sleeping = true;
1827                 if (ath_tx_aggr_sleep(sc, an))
1828                         ieee80211_sta_set_tim(sta);
1829                 break;
1830         case STA_NOTIFY_AWAKE:
1831                 an->sleeping = false;
1832                 ath_tx_aggr_wakeup(sc, an);
1833                 break;
1834         }
1835 }
1836
1837 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1838                          const struct ieee80211_tx_queue_params *params)
1839 {
1840         struct ath_softc *sc = hw->priv;
1841         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1842         struct ath_txq *txq;
1843         struct ath9k_tx_queue_info qi;
1844         int ret = 0;
1845
1846         if (queue >= WME_NUM_AC)
1847                 return 0;
1848
1849         txq = sc->tx.txq_map[queue];
1850
1851         ath9k_ps_wakeup(sc);
1852         mutex_lock(&sc->mutex);
1853
1854         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1855
1856         qi.tqi_aifs = params->aifs;
1857         qi.tqi_cwmin = params->cw_min;
1858         qi.tqi_cwmax = params->cw_max;
1859         qi.tqi_burstTime = params->txop;
1860
1861         ath_dbg(common, ATH_DBG_CONFIG,
1862                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1863                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1864                 params->cw_max, params->txop);
1865
1866         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1867         if (ret)
1868                 ath_err(common, "TXQ Update failed\n");
1869
1870         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1871                 if (queue == WME_AC_BE && !ret)
1872                         ath_beaconq_config(sc);
1873
1874         mutex_unlock(&sc->mutex);
1875         ath9k_ps_restore(sc);
1876
1877         return ret;
1878 }
1879
1880 static int ath9k_set_key(struct ieee80211_hw *hw,
1881                          enum set_key_cmd cmd,
1882                          struct ieee80211_vif *vif,
1883                          struct ieee80211_sta *sta,
1884                          struct ieee80211_key_conf *key)
1885 {
1886         struct ath_softc *sc = hw->priv;
1887         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1888         int ret = 0;
1889
1890         if (ath9k_modparam_nohwcrypt)
1891                 return -ENOSPC;
1892
1893         if (vif->type == NL80211_IFTYPE_ADHOC &&
1894             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1895              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1896             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1897                 /*
1898                  * For now, disable hw crypto for the RSN IBSS group keys. This
1899                  * could be optimized in the future to use a modified key cache
1900                  * design to support per-STA RX GTK, but until that gets
1901                  * implemented, use of software crypto for group addressed
1902                  * frames is a acceptable to allow RSN IBSS to be used.
1903                  */
1904                 return -EOPNOTSUPP;
1905         }
1906
1907         mutex_lock(&sc->mutex);
1908         ath9k_ps_wakeup(sc);
1909         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1910
1911         switch (cmd) {
1912         case SET_KEY:
1913                 if (sta)
1914                         ath9k_del_ps_key(sc, vif, sta);
1915
1916                 ret = ath_key_config(common, vif, sta, key);
1917                 if (ret >= 0) {
1918                         key->hw_key_idx = ret;
1919                         /* push IV and Michael MIC generation to stack */
1920                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1921                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1922                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1923                         if (sc->sc_ah->sw_mgmt_crypto &&
1924                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1925                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1926                         ret = 0;
1927                 }
1928                 break;
1929         case DISABLE_KEY:
1930                 ath_key_delete(common, key);
1931                 break;
1932         default:
1933                 ret = -EINVAL;
1934         }
1935
1936         ath9k_ps_restore(sc);
1937         mutex_unlock(&sc->mutex);
1938
1939         return ret;
1940 }
1941 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1942 {
1943         struct ath_softc *sc = data;
1944         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1945         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1946         struct ath_vif *avp = (void *)vif->drv_priv;
1947
1948         switch (sc->sc_ah->opmode) {
1949         case NL80211_IFTYPE_ADHOC:
1950                 /* There can be only one vif available */
1951                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1952                 common->curaid = bss_conf->aid;
1953                 ath9k_hw_write_associd(sc->sc_ah);
1954                 /* configure beacon */
1955                 if (bss_conf->enable_beacon)
1956                         ath_beacon_config(sc, vif);
1957                 break;
1958         case NL80211_IFTYPE_STATION:
1959                 /*
1960                  * Skip iteration if primary station vif's bss info
1961                  * was not changed
1962                  */
1963                 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1964                         break;
1965
1966                 if (bss_conf->assoc) {
1967                         sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1968                         avp->primary_sta_vif = true;
1969                         memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1970                         common->curaid = bss_conf->aid;
1971                         ath9k_hw_write_associd(sc->sc_ah);
1972                         ath_dbg(common, ATH_DBG_CONFIG,
1973                                 "Bss Info ASSOC %d, bssid: %pM\n",
1974                                 bss_conf->aid, common->curbssid);
1975                         ath_beacon_config(sc, vif);
1976                         /*
1977                          * Request a re-configuration of Beacon related timers
1978                          * on the receipt of the first Beacon frame (i.e.,
1979                          * after time sync with the AP).
1980                          */
1981                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1982                         /* Reset rssi stats */
1983                         sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1984                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1985
1986                         sc->sc_flags |= SC_OP_ANI_RUN;
1987                         ath_start_ani(common);
1988                 }
1989                 break;
1990         default:
1991                 break;
1992         }
1993 }
1994
1995 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1996 {
1997         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1998         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1999         struct ath_vif *avp = (void *)vif->drv_priv;
2000
2001         /* Reconfigure bss info */
2002         if (avp->primary_sta_vif && !bss_conf->assoc) {
2003                 ath_dbg(common, ATH_DBG_CONFIG,
2004                         "Bss Info DISASSOC %d, bssid %pM\n",
2005                         common->curaid, common->curbssid);
2006                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2007                 avp->primary_sta_vif = false;
2008                 memset(common->curbssid, 0, ETH_ALEN);
2009                 common->curaid = 0;
2010         }
2011
2012         ieee80211_iterate_active_interfaces_atomic(
2013                         sc->hw, ath9k_bss_iter, sc);
2014
2015         /*
2016          * None of station vifs are associated.
2017          * Clear bssid & aid
2018          */
2019         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
2020             !(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2021                 ath9k_hw_write_associd(sc->sc_ah);
2022                 /* Stop ANI */
2023                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2024                 del_timer_sync(&common->ani.timer);
2025         }
2026 }
2027
2028 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2029                                    struct ieee80211_vif *vif,
2030                                    struct ieee80211_bss_conf *bss_conf,
2031                                    u32 changed)
2032 {
2033         struct ath_softc *sc = hw->priv;
2034         struct ath_hw *ah = sc->sc_ah;
2035         struct ath_common *common = ath9k_hw_common(ah);
2036         struct ath_vif *avp = (void *)vif->drv_priv;
2037         int slottime;
2038         int error;
2039
2040         ath9k_ps_wakeup(sc);
2041         mutex_lock(&sc->mutex);
2042
2043         if (changed & BSS_CHANGED_BSSID) {
2044                 ath9k_config_bss(sc, vif);
2045
2046                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2047                         common->curbssid, common->curaid);
2048         }
2049
2050         /* Enable transmission of beacons (AP, IBSS, MESH) */
2051         if ((changed & BSS_CHANGED_BEACON) ||
2052             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2053                 ath9k_set_beaconing_status(sc, false);
2054                 error = ath_beacon_alloc(sc, vif);
2055                 if (!error)
2056                         ath_beacon_config(sc, vif);
2057                 ath9k_set_beaconing_status(sc, true);
2058         }
2059
2060         if (changed & BSS_CHANGED_ERP_SLOT) {
2061                 if (bss_conf->use_short_slot)
2062                         slottime = 9;
2063                 else
2064                         slottime = 20;
2065                 if (vif->type == NL80211_IFTYPE_AP) {
2066                         /*
2067                          * Defer update, so that connected stations can adjust
2068                          * their settings at the same time.
2069                          * See beacon.c for more details
2070                          */
2071                         sc->beacon.slottime = slottime;
2072                         sc->beacon.updateslot = UPDATE;
2073                 } else {
2074                         ah->slottime = slottime;
2075                         ath9k_hw_init_global_settings(ah);
2076                 }
2077         }
2078
2079         /* Disable transmission of beacons */
2080         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2081             !bss_conf->enable_beacon) {
2082                 ath9k_set_beaconing_status(sc, false);
2083                 avp->is_bslot_active = false;
2084                 ath9k_set_beaconing_status(sc, true);
2085         }
2086
2087         if (changed & BSS_CHANGED_BEACON_INT) {
2088                 /*
2089                  * In case of AP mode, the HW TSF has to be reset
2090                  * when the beacon interval changes.
2091                  */
2092                 if (vif->type == NL80211_IFTYPE_AP) {
2093                         sc->sc_flags |= SC_OP_TSF_RESET;
2094                         ath9k_set_beaconing_status(sc, false);
2095                         error = ath_beacon_alloc(sc, vif);
2096                         if (!error)
2097                                 ath_beacon_config(sc, vif);
2098                         ath9k_set_beaconing_status(sc, true);
2099                 } else
2100                         ath_beacon_config(sc, vif);
2101         }
2102
2103         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2104                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2105                         bss_conf->use_short_preamble);
2106                 if (bss_conf->use_short_preamble)
2107                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2108                 else
2109                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2110         }
2111
2112         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2113                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2114                         bss_conf->use_cts_prot);
2115                 if (bss_conf->use_cts_prot &&
2116                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2117                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2118                 else
2119                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2120         }
2121
2122         mutex_unlock(&sc->mutex);
2123         ath9k_ps_restore(sc);
2124 }
2125
2126 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2127 {
2128         struct ath_softc *sc = hw->priv;
2129         u64 tsf;
2130
2131         mutex_lock(&sc->mutex);
2132         ath9k_ps_wakeup(sc);
2133         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2134         ath9k_ps_restore(sc);
2135         mutex_unlock(&sc->mutex);
2136
2137         return tsf;
2138 }
2139
2140 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2141 {
2142         struct ath_softc *sc = hw->priv;
2143
2144         mutex_lock(&sc->mutex);
2145         ath9k_ps_wakeup(sc);
2146         ath9k_hw_settsf64(sc->sc_ah, tsf);
2147         ath9k_ps_restore(sc);
2148         mutex_unlock(&sc->mutex);
2149 }
2150
2151 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2152 {
2153         struct ath_softc *sc = hw->priv;
2154
2155         mutex_lock(&sc->mutex);
2156
2157         ath9k_ps_wakeup(sc);
2158         ath9k_hw_reset_tsf(sc->sc_ah);
2159         ath9k_ps_restore(sc);
2160
2161         mutex_unlock(&sc->mutex);
2162 }
2163
2164 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2165                               struct ieee80211_vif *vif,
2166                               enum ieee80211_ampdu_mlme_action action,
2167                               struct ieee80211_sta *sta,
2168                               u16 tid, u16 *ssn, u8 buf_size)
2169 {
2170         struct ath_softc *sc = hw->priv;
2171         int ret = 0;
2172
2173         local_bh_disable();
2174
2175         switch (action) {
2176         case IEEE80211_AMPDU_RX_START:
2177                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2178                         ret = -ENOTSUPP;
2179                 break;
2180         case IEEE80211_AMPDU_RX_STOP:
2181                 break;
2182         case IEEE80211_AMPDU_TX_START:
2183                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2184                         return -EOPNOTSUPP;
2185
2186                 ath9k_ps_wakeup(sc);
2187                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2188                 if (!ret)
2189                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2190                 ath9k_ps_restore(sc);
2191                 break;
2192         case IEEE80211_AMPDU_TX_STOP:
2193                 ath9k_ps_wakeup(sc);
2194                 ath_tx_aggr_stop(sc, sta, tid);
2195                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2196                 ath9k_ps_restore(sc);
2197                 break;
2198         case IEEE80211_AMPDU_TX_OPERATIONAL:
2199                 ath9k_ps_wakeup(sc);
2200                 ath_tx_aggr_resume(sc, sta, tid);
2201                 ath9k_ps_restore(sc);
2202                 break;
2203         default:
2204                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2205         }
2206
2207         local_bh_enable();
2208
2209         return ret;
2210 }
2211
2212 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2213                              struct survey_info *survey)
2214 {
2215         struct ath_softc *sc = hw->priv;
2216         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2217         struct ieee80211_supported_band *sband;
2218         struct ieee80211_channel *chan;
2219         unsigned long flags;
2220         int pos;
2221
2222         spin_lock_irqsave(&common->cc_lock, flags);
2223         if (idx == 0)
2224                 ath_update_survey_stats(sc);
2225
2226         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2227         if (sband && idx >= sband->n_channels) {
2228                 idx -= sband->n_channels;
2229                 sband = NULL;
2230         }
2231
2232         if (!sband)
2233                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2234
2235         if (!sband || idx >= sband->n_channels) {
2236                 spin_unlock_irqrestore(&common->cc_lock, flags);
2237                 return -ENOENT;
2238         }
2239
2240         chan = &sband->channels[idx];
2241         pos = chan->hw_value;
2242         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2243         survey->channel = chan;
2244         spin_unlock_irqrestore(&common->cc_lock, flags);
2245
2246         return 0;
2247 }
2248
2249 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2250 {
2251         struct ath_softc *sc = hw->priv;
2252         struct ath_hw *ah = sc->sc_ah;
2253
2254         mutex_lock(&sc->mutex);
2255         ah->coverage_class = coverage_class;
2256         ath9k_hw_init_global_settings(ah);
2257         mutex_unlock(&sc->mutex);
2258 }
2259
2260 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2261 {
2262         struct ath_softc *sc = hw->priv;
2263         struct ath_hw *ah = sc->sc_ah;
2264         struct ath_common *common = ath9k_hw_common(ah);
2265         int timeout = 200; /* ms */
2266         int i, j;
2267         bool drain_txq;
2268
2269         mutex_lock(&sc->mutex);
2270         cancel_delayed_work_sync(&sc->tx_complete_work);
2271
2272         if (sc->sc_flags & SC_OP_INVALID) {
2273                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2274                 mutex_unlock(&sc->mutex);
2275                 return;
2276         }
2277
2278         if (drop)
2279                 timeout = 1;
2280
2281         for (j = 0; j < timeout; j++) {
2282                 bool npend = false;
2283
2284                 if (j)
2285                         usleep_range(1000, 2000);
2286
2287                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2288                         if (!ATH_TXQ_SETUP(sc, i))
2289                                 continue;
2290
2291                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2292
2293                         if (npend)
2294                                 break;
2295                 }
2296
2297                 if (!npend)
2298                     goto out;
2299         }
2300
2301         ath9k_ps_wakeup(sc);
2302         spin_lock_bh(&sc->sc_pcu_lock);
2303         drain_txq = ath_drain_all_txq(sc, false);
2304         spin_unlock_bh(&sc->sc_pcu_lock);
2305         if (!drain_txq)
2306                 ath_reset(sc, false);
2307         ath9k_ps_restore(sc);
2308         ieee80211_wake_queues(hw);
2309
2310 out:
2311         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2312         mutex_unlock(&sc->mutex);
2313 }
2314
2315 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2316 {
2317         struct ath_softc *sc = hw->priv;
2318         int i;
2319
2320         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2321                 if (!ATH_TXQ_SETUP(sc, i))
2322                         continue;
2323
2324                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2325                         return true;
2326         }
2327         return false;
2328 }
2329
2330 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2331 {
2332         struct ath_softc *sc = hw->priv;
2333         struct ath_hw *ah = sc->sc_ah;
2334         struct ieee80211_vif *vif;
2335         struct ath_vif *avp;
2336         struct ath_buf *bf;
2337         struct ath_tx_status ts;
2338         int status;
2339
2340         vif = sc->beacon.bslot[0];
2341         if (!vif)
2342                 return 0;
2343
2344         avp = (void *)vif->drv_priv;
2345         if (!avp->is_bslot_active)
2346                 return 0;
2347
2348         if (!sc->beacon.tx_processed) {
2349                 tasklet_disable(&sc->bcon_tasklet);
2350
2351                 bf = avp->av_bcbuf;
2352                 if (!bf || !bf->bf_mpdu)
2353                         goto skip;
2354
2355                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2356                 if (status == -EINPROGRESS)
2357                         goto skip;
2358
2359                 sc->beacon.tx_processed = true;
2360                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2361
2362 skip:
2363                 tasklet_enable(&sc->bcon_tasklet);
2364         }
2365
2366         return sc->beacon.tx_last;
2367 }
2368
2369 struct ieee80211_ops ath9k_ops = {
2370         .tx                 = ath9k_tx,
2371         .start              = ath9k_start,
2372         .stop               = ath9k_stop,
2373         .add_interface      = ath9k_add_interface,
2374         .change_interface   = ath9k_change_interface,
2375         .remove_interface   = ath9k_remove_interface,
2376         .config             = ath9k_config,
2377         .configure_filter   = ath9k_configure_filter,
2378         .sta_add            = ath9k_sta_add,
2379         .sta_remove         = ath9k_sta_remove,
2380         .sta_notify         = ath9k_sta_notify,
2381         .conf_tx            = ath9k_conf_tx,
2382         .bss_info_changed   = ath9k_bss_info_changed,
2383         .set_key            = ath9k_set_key,
2384         .get_tsf            = ath9k_get_tsf,
2385         .set_tsf            = ath9k_set_tsf,
2386         .reset_tsf          = ath9k_reset_tsf,
2387         .ampdu_action       = ath9k_ampdu_action,
2388         .get_survey         = ath9k_get_survey,
2389         .rfkill_poll        = ath9k_rfkill_poll_state,
2390         .set_coverage_class = ath9k_set_coverage_class,
2391         .flush              = ath9k_flush,
2392         .tx_frames_pending  = ath9k_tx_frames_pending,
2393         .tx_last_beacon = ath9k_tx_last_beacon,
2394 };