2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
66 spin_unlock_bh(&txq->axq_lock);
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
82 void ath9k_ps_wakeup(struct ath_softc *sc)
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
86 enum ath9k_power_mode power_mode;
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
111 void ath9k_ps_restore(struct ath_softc *sc)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
136 ath9k_hw_setpower(sc->sc_ah, mode);
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142 void ath_start_ani(struct ath_common *common)
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
158 mod_timer(&common->ani.timer,
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
180 static int ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
207 if (cc->cycles < div)
211 ret = cc->rx_busy * 100 / cc->cycles;
213 memset(cc, 0, sizeof(*cc));
215 ath_update_survey_nf(sc, pos);
220 static void __ath_cancel_work(struct ath_softc *sc)
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
228 static void ath_cancel_work(struct ath_softc *sc)
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
240 ieee80211_stop_queues(sc->hw);
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
248 ret = ath_drain_all_txq(sc, retry_tx);
250 if (!ath_stoprecv(sc))
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah);
277 ath9k_hw_enable_interrupts(ah);
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
289 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
305 ieee80211_wake_queues(sc->hw);
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
320 __ath_cancel_work(sc);
322 spin_lock_bh(&sc->sc_pcu_lock);
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
326 caldata = &sc->caldata;
335 if (fastcc && (ah->chip_fullsleep ||
336 !ath9k_hw_check_alive(ah)))
339 if (!ath_prepare_reset(sc, retry_tx, flush))
342 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
343 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
345 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
348 "Unable to reset channel, reset status %d\n", r);
352 if (!ath_complete_reset(sc, true))
356 spin_unlock_bh(&sc->sc_pcu_lock);
362 * Set/change channels. If the channel is really being changed, it's done
363 * by reseting the chip. To accomplish this we must first cleanup any pending
364 * DMA, then restart stuff.
366 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
367 struct ath9k_channel *hchan)
371 if (sc->sc_flags & SC_OP_INVALID)
376 r = ath_reset_internal(sc, hchan, false);
378 ath9k_ps_restore(sc);
383 static void ath_paprd_activate(struct ath_softc *sc)
385 struct ath_hw *ah = sc->sc_ah;
386 struct ath9k_hw_cal_data *caldata = ah->caldata;
389 if (!caldata || !caldata->paprd_done)
393 ar9003_paprd_enable(ah, false);
394 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
395 if (!(ah->txchainmask & BIT(chain)))
398 ar9003_paprd_populate_single_table(ah, caldata, chain);
401 ar9003_paprd_enable(ah, true);
402 ath9k_ps_restore(sc);
405 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
407 struct ieee80211_hw *hw = sc->hw;
408 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
409 struct ath_hw *ah = sc->sc_ah;
410 struct ath_common *common = ath9k_hw_common(ah);
411 struct ath_tx_control txctl;
414 memset(&txctl, 0, sizeof(txctl));
415 txctl.txq = sc->tx.txq_map[WME_AC_BE];
417 memset(tx_info, 0, sizeof(*tx_info));
418 tx_info->band = hw->conf.channel->band;
419 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
420 tx_info->control.rates[0].idx = 0;
421 tx_info->control.rates[0].count = 1;
422 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
423 tx_info->control.rates[1].idx = -1;
425 init_completion(&sc->paprd_complete);
426 txctl.paprd = BIT(chain);
428 if (ath_tx_start(hw, skb, &txctl) != 0) {
429 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
430 dev_kfree_skb_any(skb);
434 time_left = wait_for_completion_timeout(&sc->paprd_complete,
435 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
438 ath_dbg(common, CALIBRATE,
439 "Timeout waiting for paprd training on TX chain %d\n",
445 void ath_paprd_calibrate(struct work_struct *work)
447 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
448 struct ieee80211_hw *hw = sc->hw;
449 struct ath_hw *ah = sc->sc_ah;
450 struct ieee80211_hdr *hdr;
451 struct sk_buff *skb = NULL;
452 struct ath9k_hw_cal_data *caldata = ah->caldata;
453 struct ath_common *common = ath9k_hw_common(ah);
464 if (ar9003_paprd_init_table(ah) < 0)
467 skb = alloc_skb(len, GFP_KERNEL);
472 memset(skb->data, 0, len);
473 hdr = (struct ieee80211_hdr *)skb->data;
474 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
475 hdr->frame_control = cpu_to_le16(ftype);
476 hdr->duration_id = cpu_to_le16(10);
477 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
478 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
479 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
481 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
482 if (!(ah->txchainmask & BIT(chain)))
487 ath_dbg(common, CALIBRATE,
488 "Sending PAPRD frame for thermal measurement on chain %d\n",
490 if (!ath_paprd_send_frame(sc, skb, chain))
493 ar9003_paprd_setup_gain_table(ah, chain);
495 ath_dbg(common, CALIBRATE,
496 "Sending PAPRD training frame on chain %d\n", chain);
497 if (!ath_paprd_send_frame(sc, skb, chain))
500 if (!ar9003_paprd_is_done(ah)) {
501 ath_dbg(common, CALIBRATE,
502 "PAPRD not yet done on chain %d\n", chain);
506 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
507 ath_dbg(common, CALIBRATE,
508 "PAPRD create curve failed on chain %d\n",
518 caldata->paprd_done = true;
519 ath_paprd_activate(sc);
523 ath9k_ps_restore(sc);
527 * This routine performs the periodic noise floor calibration function
528 * that is used to adjust and optimize the chip performance. This
529 * takes environmental changes (location, temperature) into account.
530 * When the task is complete, it reschedules itself depending on the
531 * appropriate interval that was calculated.
533 void ath_ani_calibrate(unsigned long data)
535 struct ath_softc *sc = (struct ath_softc *)data;
536 struct ath_hw *ah = sc->sc_ah;
537 struct ath_common *common = ath9k_hw_common(ah);
538 bool longcal = false;
539 bool shortcal = false;
540 bool aniflag = false;
541 unsigned int timestamp = jiffies_to_msecs(jiffies);
542 u32 cal_interval, short_cal_interval, long_cal_interval;
545 if (ah->caldata && ah->caldata->nfcal_interference)
546 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
548 long_cal_interval = ATH_LONG_CALINTERVAL;
550 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
551 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
553 /* Only calibrate if awake */
554 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
559 /* Long calibration runs independently of short calibration. */
560 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
562 common->ani.longcal_timer = timestamp;
565 /* Short calibration applies only while caldone is false */
566 if (!common->ani.caldone) {
567 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
569 common->ani.shortcal_timer = timestamp;
570 common->ani.resetcal_timer = timestamp;
573 if ((timestamp - common->ani.resetcal_timer) >=
574 ATH_RESTART_CALINTERVAL) {
575 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
576 if (common->ani.caldone)
577 common->ani.resetcal_timer = timestamp;
581 /* Verify whether we must check ANI */
582 if (sc->sc_ah->config.enable_ani
583 && (timestamp - common->ani.checkani_timer) >=
584 ah->config.ani_poll_interval) {
586 common->ani.checkani_timer = timestamp;
589 /* Call ANI routine if necessary */
591 spin_lock_irqsave(&common->cc_lock, flags);
592 ath9k_hw_ani_monitor(ah, ah->curchan);
593 ath_update_survey_stats(sc);
594 spin_unlock_irqrestore(&common->cc_lock, flags);
597 /* Perform calibration if necessary */
598 if (longcal || shortcal) {
599 common->ani.caldone =
600 ath9k_hw_calibrate(ah, ah->curchan,
601 ah->rxchainmask, longcal);
605 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
607 longcal ? "long" : "", shortcal ? "short" : "",
608 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
610 ath9k_ps_restore(sc);
614 * Set timer interval based on previous results.
615 * The interval must be the shortest necessary to satisfy ANI,
616 * short calibration and long calibration.
618 ath9k_debug_samp_bb_mac(sc);
619 cal_interval = ATH_LONG_CALINTERVAL;
620 if (sc->sc_ah->config.enable_ani)
621 cal_interval = min(cal_interval,
622 (u32)ah->config.ani_poll_interval);
623 if (!common->ani.caldone)
624 cal_interval = min(cal_interval, (u32)short_cal_interval);
626 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
627 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
628 if (!ah->caldata->paprd_done)
629 ieee80211_queue_work(sc->hw, &sc->paprd_work);
630 else if (!ah->paprd_table_write_done)
631 ath_paprd_activate(sc);
635 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
636 struct ieee80211_vif *vif)
639 an = (struct ath_node *)sta->drv_priv;
641 #ifdef CONFIG_ATH9K_DEBUGFS
642 spin_lock(&sc->nodes_lock);
643 list_add(&an->list, &sc->nodes);
644 spin_unlock(&sc->nodes_lock);
648 if (sc->sc_flags & SC_OP_TXAGGR) {
649 ath_tx_node_init(sc, an);
650 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
651 sta->ht_cap.ampdu_factor);
652 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
656 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
658 struct ath_node *an = (struct ath_node *)sta->drv_priv;
660 #ifdef CONFIG_ATH9K_DEBUGFS
661 spin_lock(&sc->nodes_lock);
663 spin_unlock(&sc->nodes_lock);
667 if (sc->sc_flags & SC_OP_TXAGGR)
668 ath_tx_node_cleanup(sc, an);
672 void ath9k_tasklet(unsigned long data)
674 struct ath_softc *sc = (struct ath_softc *)data;
675 struct ath_hw *ah = sc->sc_ah;
676 struct ath_common *common = ath9k_hw_common(ah);
678 u32 status = sc->intrstatus;
682 spin_lock(&sc->sc_pcu_lock);
684 if ((status & ATH9K_INT_FATAL) ||
685 (status & ATH9K_INT_BB_WATCHDOG)) {
686 #ifdef CONFIG_ATH9K_DEBUGFS
687 enum ath_reset_type type;
689 if (status & ATH9K_INT_FATAL)
690 type = RESET_TYPE_FATAL_INT;
692 type = RESET_TYPE_BB_WATCHDOG;
694 RESET_STAT_INC(sc, type);
696 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
701 * Only run the baseband hang check if beacons stop working in AP or
702 * IBSS mode, because it has a high false positive rate. For station
703 * mode it should not be necessary, since the upper layers will detect
704 * this through a beacon miss automatically and the following channel
705 * change will trigger a hardware reset anyway
707 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
708 !ath9k_hw_check_alive(ah))
709 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
711 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
713 * TSF sync does not look correct; remain awake to sync with
716 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
717 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
720 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
721 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
724 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
726 if (status & rxmask) {
727 /* Check for high priority Rx first */
728 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
729 (status & ATH9K_INT_RXHP))
730 ath_rx_tasklet(sc, 0, true);
732 ath_rx_tasklet(sc, 0, false);
735 if (status & ATH9K_INT_TX) {
736 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
737 ath_tx_edma_tasklet(sc);
742 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
743 if (status & ATH9K_INT_GENTIMER)
744 ath_gen_timer_isr(sc->sc_ah);
746 if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
750 /* re-enable hardware interrupt */
751 ath9k_hw_enable_interrupts(ah);
753 spin_unlock(&sc->sc_pcu_lock);
754 ath9k_ps_restore(sc);
757 irqreturn_t ath_isr(int irq, void *dev)
759 #define SCHED_INTR ( \
761 ATH9K_INT_BB_WATCHDOG | \
771 ATH9K_INT_GENTIMER | \
774 struct ath_softc *sc = dev;
775 struct ath_hw *ah = sc->sc_ah;
776 struct ath_common *common = ath9k_hw_common(ah);
777 enum ath9k_int status;
781 * The hardware is not ready/present, don't
782 * touch anything. Note this can happen early
783 * on if the IRQ is shared.
785 if (sc->sc_flags & SC_OP_INVALID)
789 /* shared irq, not for us */
791 if (!ath9k_hw_intrpend(ah))
795 * Figure out the reason(s) for the interrupt. Note
796 * that the hal returns a pseudo-ISR that may include
797 * bits we haven't explicitly enabled so we mask the
798 * value to insure we only process bits we requested.
800 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
801 status &= ah->imask; /* discard unasked-for bits */
804 * If there are no status bits set, then this interrupt was not
805 * for me (should have been caught above).
810 /* Cache the status */
811 sc->intrstatus = status;
813 if (status & SCHED_INTR)
817 * If a FATAL or RXORN interrupt is received, we have to reset the
820 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
821 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
824 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
825 (status & ATH9K_INT_BB_WATCHDOG)) {
827 spin_lock(&common->cc_lock);
828 ath_hw_cycle_counters_update(common);
829 ar9003_hw_bb_watchdog_dbg_info(ah);
830 spin_unlock(&common->cc_lock);
835 if (status & ATH9K_INT_SWBA)
836 tasklet_schedule(&sc->bcon_tasklet);
838 if (status & ATH9K_INT_TXURN)
839 ath9k_hw_updatetxtriglevel(ah, true);
841 if (status & ATH9K_INT_RXEOL) {
842 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
843 ath9k_hw_set_interrupts(ah);
846 if (status & ATH9K_INT_MIB) {
848 * Disable interrupts until we service the MIB
849 * interrupt; otherwise it will continue to
852 ath9k_hw_disable_interrupts(ah);
854 * Let the hal handle the event. We assume
855 * it will clear whatever condition caused
858 spin_lock(&common->cc_lock);
859 ath9k_hw_proc_mib_event(ah);
860 spin_unlock(&common->cc_lock);
861 ath9k_hw_enable_interrupts(ah);
864 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
865 if (status & ATH9K_INT_TIM_TIMER) {
866 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
868 /* Clear RxAbort bit so that we can
870 ath9k_setpower(sc, ATH9K_PM_AWAKE);
871 ath9k_hw_setrxabort(sc->sc_ah, 0);
872 sc->ps_flags |= PS_WAIT_FOR_BEACON;
877 ath_debug_stat_interrupt(sc, status);
880 /* turn off every interrupt */
881 ath9k_hw_disable_interrupts(ah);
882 tasklet_schedule(&sc->intr_tq);
890 static int ath_reset(struct ath_softc *sc, bool retry_tx)
896 r = ath_reset_internal(sc, NULL, retry_tx);
900 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
901 if (ATH_TXQ_SETUP(sc, i)) {
902 spin_lock_bh(&sc->tx.txq[i].axq_lock);
903 ath_txq_schedule(sc, &sc->tx.txq[i]);
904 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
909 ath9k_ps_restore(sc);
914 void ath_reset_work(struct work_struct *work)
916 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
921 void ath_hw_check(struct work_struct *work)
923 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
924 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
929 if (ath9k_hw_check_alive(sc->sc_ah))
932 spin_lock_irqsave(&common->cc_lock, flags);
933 busy = ath_update_survey_stats(sc);
934 spin_unlock_irqrestore(&common->cc_lock, flags);
936 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
937 busy, sc->hw_busy_count + 1);
939 if (++sc->hw_busy_count >= 3) {
940 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
941 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
944 } else if (busy >= 0)
945 sc->hw_busy_count = 0;
948 ath9k_ps_restore(sc);
951 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
954 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
956 if (pll_sqsum >= 0x40000) {
959 /* Rx is hung for more than 500ms. Reset it */
960 ath_dbg(common, RESET, "Possible RX hang, resetting\n");
961 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
962 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
969 void ath_hw_pll_work(struct work_struct *work)
971 struct ath_softc *sc = container_of(work, struct ath_softc,
975 if (AR_SREV_9485(sc->sc_ah)) {
978 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
979 ath9k_ps_restore(sc);
981 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
983 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
987 /**********************/
988 /* mac80211 callbacks */
989 /**********************/
991 static int ath9k_start(struct ieee80211_hw *hw)
993 struct ath_softc *sc = hw->priv;
994 struct ath_hw *ah = sc->sc_ah;
995 struct ath_common *common = ath9k_hw_common(ah);
996 struct ieee80211_channel *curchan = hw->conf.channel;
997 struct ath9k_channel *init_channel;
1000 ath_dbg(common, CONFIG,
1001 "Starting driver with initial channel: %d MHz\n",
1002 curchan->center_freq);
1004 ath9k_ps_wakeup(sc);
1006 mutex_lock(&sc->mutex);
1008 /* setup initial channel */
1009 sc->chan_idx = curchan->hw_value;
1011 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1013 /* Reset SERDES registers */
1014 ath9k_hw_configpcipowersave(ah, false);
1017 * The basic interface to setting the hardware in a good
1018 * state is ``reset''. On return the hardware is known to
1019 * be powered up and with interrupts disabled. This must
1020 * be followed by initialization of the appropriate bits
1021 * and then setup of the interrupt mask.
1023 spin_lock_bh(&sc->sc_pcu_lock);
1025 atomic_set(&ah->intr_ref_cnt, -1);
1027 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1030 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1031 r, curchan->center_freq);
1032 spin_unlock_bh(&sc->sc_pcu_lock);
1036 /* Setup our intr mask. */
1037 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1038 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1041 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1042 ah->imask |= ATH9K_INT_RXHP |
1044 ATH9K_INT_BB_WATCHDOG;
1046 ah->imask |= ATH9K_INT_RX;
1048 ah->imask |= ATH9K_INT_GTT;
1050 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1051 ah->imask |= ATH9K_INT_CST;
1053 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1054 ah->imask |= ATH9K_INT_MCI;
1056 sc->sc_flags &= ~SC_OP_INVALID;
1057 sc->sc_ah->is_monitoring = false;
1059 /* Disable BMISS interrupt when we're not associated */
1060 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1062 if (!ath_complete_reset(sc, false)) {
1064 spin_unlock_bh(&sc->sc_pcu_lock);
1068 if (ah->led_pin >= 0) {
1069 ath9k_hw_cfg_output(ah, ah->led_pin,
1070 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1071 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1075 * Reset key cache to sane defaults (all entries cleared) instead of
1076 * semi-random values after suspend/resume.
1078 ath9k_cmn_init_crypto(sc->sc_ah);
1080 spin_unlock_bh(&sc->sc_pcu_lock);
1082 if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
1083 !ah->btcoex_hw.enabled) {
1084 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
1085 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1086 AR_STOMP_LOW_WLAN_WGHT);
1087 ath9k_hw_btcoex_enable(ah);
1089 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
1090 ath9k_btcoex_timer_resume(sc);
1093 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1094 common->bus_ops->extn_synch_en(common);
1097 mutex_unlock(&sc->mutex);
1099 ath9k_ps_restore(sc);
1104 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1106 struct ath_softc *sc = hw->priv;
1107 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1108 struct ath_tx_control txctl;
1109 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1111 if (sc->ps_enabled) {
1113 * mac80211 does not set PM field for normal data frames, so we
1114 * need to update that based on the current PS mode.
1116 if (ieee80211_is_data(hdr->frame_control) &&
1117 !ieee80211_is_nullfunc(hdr->frame_control) &&
1118 !ieee80211_has_pm(hdr->frame_control)) {
1120 "Add PM=1 for a TX frame while in PS mode\n");
1121 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1126 * Cannot tx while the hardware is in full sleep, it first needs a full
1127 * chip reset to recover from that
1129 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1132 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1134 * We are using PS-Poll and mac80211 can request TX while in
1135 * power save mode. Need to wake up hardware for the TX to be
1136 * completed and if needed, also for RX of buffered frames.
1138 ath9k_ps_wakeup(sc);
1139 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1140 ath9k_hw_setrxabort(sc->sc_ah, 0);
1141 if (ieee80211_is_pspoll(hdr->frame_control)) {
1143 "Sending PS-Poll to pick a buffered frame\n");
1144 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1146 ath_dbg(common, PS, "Wake up to complete TX\n");
1147 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1150 * The actual restore operation will happen only after
1151 * the sc_flags bit is cleared. We are just dropping
1152 * the ps_usecount here.
1154 ath9k_ps_restore(sc);
1157 memset(&txctl, 0, sizeof(struct ath_tx_control));
1158 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1160 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1162 if (ath_tx_start(hw, skb, &txctl) != 0) {
1163 ath_dbg(common, XMIT, "TX failed\n");
1169 dev_kfree_skb_any(skb);
1172 static void ath9k_stop(struct ieee80211_hw *hw)
1174 struct ath_softc *sc = hw->priv;
1175 struct ath_hw *ah = sc->sc_ah;
1176 struct ath_common *common = ath9k_hw_common(ah);
1179 mutex_lock(&sc->mutex);
1181 ath_cancel_work(sc);
1183 if (sc->sc_flags & SC_OP_INVALID) {
1184 ath_dbg(common, ANY, "Device not present\n");
1185 mutex_unlock(&sc->mutex);
1189 /* Ensure HW is awake when we try to shut it down. */
1190 ath9k_ps_wakeup(sc);
1192 if (ah->btcoex_hw.enabled &&
1193 ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
1194 ath9k_hw_btcoex_disable(ah);
1195 if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
1196 ath9k_btcoex_timer_pause(sc);
1197 ath_mci_flush_profile(&sc->btcoex.mci);
1200 spin_lock_bh(&sc->sc_pcu_lock);
1202 /* prevent tasklets to enable interrupts once we disable them */
1203 ah->imask &= ~ATH9K_INT_GLOBAL;
1205 /* make sure h/w will not generate any interrupt
1206 * before setting the invalid flag. */
1207 ath9k_hw_disable_interrupts(ah);
1209 spin_unlock_bh(&sc->sc_pcu_lock);
1211 /* we can now sync irq and kill any running tasklets, since we already
1212 * disabled interrupts and not holding a spin lock */
1213 synchronize_irq(sc->irq);
1214 tasklet_kill(&sc->intr_tq);
1215 tasklet_kill(&sc->bcon_tasklet);
1217 prev_idle = sc->ps_idle;
1220 spin_lock_bh(&sc->sc_pcu_lock);
1222 if (ah->led_pin >= 0) {
1223 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1224 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1227 ath_prepare_reset(sc, false, true);
1230 dev_kfree_skb_any(sc->rx.frag);
1235 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1237 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1238 ath9k_hw_phy_disable(ah);
1240 ath9k_hw_configpcipowersave(ah, true);
1242 spin_unlock_bh(&sc->sc_pcu_lock);
1244 ath9k_ps_restore(sc);
1246 sc->sc_flags |= SC_OP_INVALID;
1247 sc->ps_idle = prev_idle;
1249 mutex_unlock(&sc->mutex);
1251 ath_dbg(common, CONFIG, "Driver halt\n");
1254 bool ath9k_uses_beacons(int type)
1257 case NL80211_IFTYPE_AP:
1258 case NL80211_IFTYPE_ADHOC:
1259 case NL80211_IFTYPE_MESH_POINT:
1266 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1267 struct ieee80211_vif *vif)
1269 struct ath_vif *avp = (void *)vif->drv_priv;
1271 ath9k_set_beaconing_status(sc, false);
1272 ath_beacon_return(sc, avp);
1273 ath9k_set_beaconing_status(sc, true);
1274 sc->sc_flags &= ~SC_OP_BEACONS;
1277 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1279 struct ath9k_vif_iter_data *iter_data = data;
1282 if (iter_data->hw_macaddr)
1283 for (i = 0; i < ETH_ALEN; i++)
1284 iter_data->mask[i] &=
1285 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1287 switch (vif->type) {
1288 case NL80211_IFTYPE_AP:
1291 case NL80211_IFTYPE_STATION:
1292 iter_data->nstations++;
1294 case NL80211_IFTYPE_ADHOC:
1295 iter_data->nadhocs++;
1297 case NL80211_IFTYPE_MESH_POINT:
1298 iter_data->nmeshes++;
1300 case NL80211_IFTYPE_WDS:
1304 iter_data->nothers++;
1309 /* Called with sc->mutex held. */
1310 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1311 struct ieee80211_vif *vif,
1312 struct ath9k_vif_iter_data *iter_data)
1314 struct ath_softc *sc = hw->priv;
1315 struct ath_hw *ah = sc->sc_ah;
1316 struct ath_common *common = ath9k_hw_common(ah);
1319 * Use the hardware MAC address as reference, the hardware uses it
1320 * together with the BSSID mask when matching addresses.
1322 memset(iter_data, 0, sizeof(*iter_data));
1323 iter_data->hw_macaddr = common->macaddr;
1324 memset(&iter_data->mask, 0xff, ETH_ALEN);
1327 ath9k_vif_iter(iter_data, vif->addr, vif);
1329 /* Get list of all active MAC addresses */
1330 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1334 /* Called with sc->mutex held. */
1335 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1336 struct ieee80211_vif *vif)
1338 struct ath_softc *sc = hw->priv;
1339 struct ath_hw *ah = sc->sc_ah;
1340 struct ath_common *common = ath9k_hw_common(ah);
1341 struct ath9k_vif_iter_data iter_data;
1343 ath9k_calculate_iter_data(hw, vif, &iter_data);
1345 /* Set BSSID mask. */
1346 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1347 ath_hw_setbssidmask(common);
1349 /* Set op-mode & TSF */
1350 if (iter_data.naps > 0) {
1351 ath9k_hw_set_tsfadjust(ah, 1);
1352 sc->sc_flags |= SC_OP_TSF_RESET;
1353 ah->opmode = NL80211_IFTYPE_AP;
1355 ath9k_hw_set_tsfadjust(ah, 0);
1356 sc->sc_flags &= ~SC_OP_TSF_RESET;
1358 if (iter_data.nmeshes)
1359 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1360 else if (iter_data.nwds)
1361 ah->opmode = NL80211_IFTYPE_AP;
1362 else if (iter_data.nadhocs)
1363 ah->opmode = NL80211_IFTYPE_ADHOC;
1365 ah->opmode = NL80211_IFTYPE_STATION;
1369 * Enable MIB interrupts when there are hardware phy counters.
1371 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1372 if (ah->config.enable_ani)
1373 ah->imask |= ATH9K_INT_MIB;
1374 ah->imask |= ATH9K_INT_TSFOOR;
1376 ah->imask &= ~ATH9K_INT_MIB;
1377 ah->imask &= ~ATH9K_INT_TSFOOR;
1380 ath9k_hw_set_interrupts(ah);
1383 if (iter_data.naps > 0) {
1384 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1386 if (!common->disable_ani) {
1387 sc->sc_flags |= SC_OP_ANI_RUN;
1388 ath_start_ani(common);
1392 sc->sc_flags &= ~SC_OP_ANI_RUN;
1393 del_timer_sync(&common->ani.timer);
1397 /* Called with sc->mutex held, vif counts set up properly. */
1398 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1399 struct ieee80211_vif *vif)
1401 struct ath_softc *sc = hw->priv;
1403 ath9k_calculate_summary_state(hw, vif);
1405 if (ath9k_uses_beacons(vif->type)) {
1407 /* This may fail because upper levels do not have beacons
1408 * properly configured yet. That's OK, we assume it
1409 * will be properly configured and then we will be notified
1410 * in the info_changed method and set up beacons properly
1413 ath9k_set_beaconing_status(sc, false);
1414 error = ath_beacon_alloc(sc, vif);
1416 ath_beacon_config(sc, vif);
1417 ath9k_set_beaconing_status(sc, true);
1422 static int ath9k_add_interface(struct ieee80211_hw *hw,
1423 struct ieee80211_vif *vif)
1425 struct ath_softc *sc = hw->priv;
1426 struct ath_hw *ah = sc->sc_ah;
1427 struct ath_common *common = ath9k_hw_common(ah);
1430 ath9k_ps_wakeup(sc);
1431 mutex_lock(&sc->mutex);
1433 switch (vif->type) {
1434 case NL80211_IFTYPE_STATION:
1435 case NL80211_IFTYPE_WDS:
1436 case NL80211_IFTYPE_ADHOC:
1437 case NL80211_IFTYPE_AP:
1438 case NL80211_IFTYPE_MESH_POINT:
1441 ath_err(common, "Interface type %d not yet supported\n",
1447 if (ath9k_uses_beacons(vif->type)) {
1448 if (sc->nbcnvifs >= ATH_BCBUF) {
1449 ath_err(common, "Not enough beacon buffers when adding"
1450 " new interface of type: %i\n",
1457 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1458 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1460 ath_err(common, "Cannot create ADHOC interface when other"
1461 " interfaces already exist.\n");
1466 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1470 ath9k_do_vif_add_setup(hw, vif);
1472 mutex_unlock(&sc->mutex);
1473 ath9k_ps_restore(sc);
1477 static int ath9k_change_interface(struct ieee80211_hw *hw,
1478 struct ieee80211_vif *vif,
1479 enum nl80211_iftype new_type,
1482 struct ath_softc *sc = hw->priv;
1483 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1486 ath_dbg(common, CONFIG, "Change Interface\n");
1487 mutex_lock(&sc->mutex);
1488 ath9k_ps_wakeup(sc);
1490 /* See if new interface type is valid. */
1491 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1493 ath_err(common, "When using ADHOC, it must be the only"
1499 if (ath9k_uses_beacons(new_type) &&
1500 !ath9k_uses_beacons(vif->type)) {
1501 if (sc->nbcnvifs >= ATH_BCBUF) {
1502 ath_err(common, "No beacon slot available\n");
1508 /* Clean up old vif stuff */
1509 if (ath9k_uses_beacons(vif->type))
1510 ath9k_reclaim_beacon(sc, vif);
1512 /* Add new settings */
1513 vif->type = new_type;
1516 ath9k_do_vif_add_setup(hw, vif);
1518 ath9k_ps_restore(sc);
1519 mutex_unlock(&sc->mutex);
1523 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1524 struct ieee80211_vif *vif)
1526 struct ath_softc *sc = hw->priv;
1527 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1529 ath_dbg(common, CONFIG, "Detach Interface\n");
1531 ath9k_ps_wakeup(sc);
1532 mutex_lock(&sc->mutex);
1536 /* Reclaim beacon resources */
1537 if (ath9k_uses_beacons(vif->type))
1538 ath9k_reclaim_beacon(sc, vif);
1540 ath9k_calculate_summary_state(hw, NULL);
1542 mutex_unlock(&sc->mutex);
1543 ath9k_ps_restore(sc);
1546 static void ath9k_enable_ps(struct ath_softc *sc)
1548 struct ath_hw *ah = sc->sc_ah;
1550 sc->ps_enabled = true;
1551 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1552 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1553 ah->imask |= ATH9K_INT_TIM_TIMER;
1554 ath9k_hw_set_interrupts(ah);
1556 ath9k_hw_setrxabort(ah, 1);
1560 static void ath9k_disable_ps(struct ath_softc *sc)
1562 struct ath_hw *ah = sc->sc_ah;
1564 sc->ps_enabled = false;
1565 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1566 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1567 ath9k_hw_setrxabort(ah, 0);
1568 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1570 PS_WAIT_FOR_PSPOLL_DATA |
1571 PS_WAIT_FOR_TX_ACK);
1572 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1573 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1574 ath9k_hw_set_interrupts(ah);
1580 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1582 struct ath_softc *sc = hw->priv;
1583 struct ath_hw *ah = sc->sc_ah;
1584 struct ath_common *common = ath9k_hw_common(ah);
1585 struct ieee80211_conf *conf = &hw->conf;
1587 ath9k_ps_wakeup(sc);
1588 mutex_lock(&sc->mutex);
1590 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1591 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1593 ath_cancel_work(sc);
1597 * We just prepare to enable PS. We have to wait until our AP has
1598 * ACK'd our null data frame to disable RX otherwise we'll ignore
1599 * those ACKs and end up retransmitting the same null data frames.
1600 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1602 if (changed & IEEE80211_CONF_CHANGE_PS) {
1603 unsigned long flags;
1604 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1605 if (conf->flags & IEEE80211_CONF_PS)
1606 ath9k_enable_ps(sc);
1608 ath9k_disable_ps(sc);
1609 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1612 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1613 if (conf->flags & IEEE80211_CONF_MONITOR) {
1614 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1615 sc->sc_ah->is_monitoring = true;
1617 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1618 sc->sc_ah->is_monitoring = false;
1622 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1623 struct ieee80211_channel *curchan = hw->conf.channel;
1624 int pos = curchan->hw_value;
1626 unsigned long flags;
1629 old_pos = ah->curchan - &ah->channels[0];
1631 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1632 sc->sc_flags |= SC_OP_OFFCHANNEL;
1634 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1636 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1637 curchan->center_freq, conf->channel_type);
1639 /* update survey stats for the old channel before switching */
1640 spin_lock_irqsave(&common->cc_lock, flags);
1641 ath_update_survey_stats(sc);
1642 spin_unlock_irqrestore(&common->cc_lock, flags);
1645 * Preserve the current channel values, before updating
1648 if (ah->curchan && (old_pos == pos))
1649 ath9k_hw_getnf(ah, ah->curchan);
1651 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1652 curchan, conf->channel_type);
1655 * If the operating channel changes, change the survey in-use flags
1657 * Reset the survey data for the new channel, unless we're switching
1658 * back to the operating channel from an off-channel operation.
1660 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1661 sc->cur_survey != &sc->survey[pos]) {
1664 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1666 sc->cur_survey = &sc->survey[pos];
1668 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1669 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1670 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1671 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1674 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1675 ath_err(common, "Unable to set channel\n");
1676 mutex_unlock(&sc->mutex);
1681 * The most recent snapshot of channel->noisefloor for the old
1682 * channel is only available after the hardware reset. Copy it to
1683 * the survey stats now.
1686 ath_update_survey_nf(sc, old_pos);
1689 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1690 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1691 sc->config.txpowlimit = 2 * conf->power_level;
1692 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1693 sc->config.txpowlimit, &sc->curtxpow);
1696 mutex_unlock(&sc->mutex);
1697 ath9k_ps_restore(sc);
1702 #define SUPPORTED_FILTERS \
1703 (FIF_PROMISC_IN_BSS | \
1708 FIF_BCN_PRBRESP_PROMISC | \
1712 /* FIXME: sc->sc_full_reset ? */
1713 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1714 unsigned int changed_flags,
1715 unsigned int *total_flags,
1718 struct ath_softc *sc = hw->priv;
1721 changed_flags &= SUPPORTED_FILTERS;
1722 *total_flags &= SUPPORTED_FILTERS;
1724 sc->rx.rxfilter = *total_flags;
1725 ath9k_ps_wakeup(sc);
1726 rfilt = ath_calcrxfilter(sc);
1727 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1728 ath9k_ps_restore(sc);
1730 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1734 static int ath9k_sta_add(struct ieee80211_hw *hw,
1735 struct ieee80211_vif *vif,
1736 struct ieee80211_sta *sta)
1738 struct ath_softc *sc = hw->priv;
1739 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1740 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1741 struct ieee80211_key_conf ps_key = { };
1743 ath_node_attach(sc, sta, vif);
1745 if (vif->type != NL80211_IFTYPE_AP &&
1746 vif->type != NL80211_IFTYPE_AP_VLAN)
1749 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1754 static void ath9k_del_ps_key(struct ath_softc *sc,
1755 struct ieee80211_vif *vif,
1756 struct ieee80211_sta *sta)
1758 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1759 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1760 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1765 ath_key_delete(common, &ps_key);
1768 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1769 struct ieee80211_vif *vif,
1770 struct ieee80211_sta *sta)
1772 struct ath_softc *sc = hw->priv;
1774 ath9k_del_ps_key(sc, vif, sta);
1775 ath_node_detach(sc, sta);
1780 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1781 struct ieee80211_vif *vif,
1782 enum sta_notify_cmd cmd,
1783 struct ieee80211_sta *sta)
1785 struct ath_softc *sc = hw->priv;
1786 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1788 if (!(sc->sc_flags & SC_OP_TXAGGR))
1792 case STA_NOTIFY_SLEEP:
1793 an->sleeping = true;
1794 ath_tx_aggr_sleep(sta, sc, an);
1796 case STA_NOTIFY_AWAKE:
1797 an->sleeping = false;
1798 ath_tx_aggr_wakeup(sc, an);
1803 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1804 struct ieee80211_vif *vif, u16 queue,
1805 const struct ieee80211_tx_queue_params *params)
1807 struct ath_softc *sc = hw->priv;
1808 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1809 struct ath_txq *txq;
1810 struct ath9k_tx_queue_info qi;
1813 if (queue >= WME_NUM_AC)
1816 txq = sc->tx.txq_map[queue];
1818 ath9k_ps_wakeup(sc);
1819 mutex_lock(&sc->mutex);
1821 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1823 qi.tqi_aifs = params->aifs;
1824 qi.tqi_cwmin = params->cw_min;
1825 qi.tqi_cwmax = params->cw_max;
1826 qi.tqi_burstTime = params->txop;
1828 ath_dbg(common, CONFIG,
1829 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1830 queue, txq->axq_qnum, params->aifs, params->cw_min,
1831 params->cw_max, params->txop);
1833 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1835 ath_err(common, "TXQ Update failed\n");
1837 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1838 if (queue == WME_AC_BE && !ret)
1839 ath_beaconq_config(sc);
1841 mutex_unlock(&sc->mutex);
1842 ath9k_ps_restore(sc);
1847 static int ath9k_set_key(struct ieee80211_hw *hw,
1848 enum set_key_cmd cmd,
1849 struct ieee80211_vif *vif,
1850 struct ieee80211_sta *sta,
1851 struct ieee80211_key_conf *key)
1853 struct ath_softc *sc = hw->priv;
1854 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1857 if (ath9k_modparam_nohwcrypt)
1860 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1861 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1862 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1863 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1864 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1866 * For now, disable hw crypto for the RSN IBSS group keys. This
1867 * could be optimized in the future to use a modified key cache
1868 * design to support per-STA RX GTK, but until that gets
1869 * implemented, use of software crypto for group addressed
1870 * frames is a acceptable to allow RSN IBSS to be used.
1875 mutex_lock(&sc->mutex);
1876 ath9k_ps_wakeup(sc);
1877 ath_dbg(common, CONFIG, "Set HW Key\n");
1882 ath9k_del_ps_key(sc, vif, sta);
1884 ret = ath_key_config(common, vif, sta, key);
1886 key->hw_key_idx = ret;
1887 /* push IV and Michael MIC generation to stack */
1888 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1889 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1890 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1891 if (sc->sc_ah->sw_mgmt_crypto &&
1892 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1893 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1898 ath_key_delete(common, key);
1904 ath9k_ps_restore(sc);
1905 mutex_unlock(&sc->mutex);
1909 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1911 struct ath_softc *sc = data;
1912 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1913 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1914 struct ath_vif *avp = (void *)vif->drv_priv;
1917 * Skip iteration if primary station vif's bss info
1920 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1923 if (bss_conf->assoc) {
1924 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1925 avp->primary_sta_vif = true;
1926 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1927 common->curaid = bss_conf->aid;
1928 ath9k_hw_write_associd(sc->sc_ah);
1929 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1930 bss_conf->aid, common->curbssid);
1931 ath_beacon_config(sc, vif);
1933 * Request a re-configuration of Beacon related timers
1934 * on the receipt of the first Beacon frame (i.e.,
1935 * after time sync with the AP).
1937 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1938 /* Reset rssi stats */
1939 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1940 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1942 if (!common->disable_ani) {
1943 sc->sc_flags |= SC_OP_ANI_RUN;
1944 ath_start_ani(common);
1950 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1952 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1953 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1954 struct ath_vif *avp = (void *)vif->drv_priv;
1956 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1959 /* Reconfigure bss info */
1960 if (avp->primary_sta_vif && !bss_conf->assoc) {
1961 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1962 common->curaid, common->curbssid);
1963 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1964 avp->primary_sta_vif = false;
1965 memset(common->curbssid, 0, ETH_ALEN);
1969 ieee80211_iterate_active_interfaces_atomic(
1970 sc->hw, ath9k_bss_iter, sc);
1973 * None of station vifs are associated.
1976 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1977 ath9k_hw_write_associd(sc->sc_ah);
1979 sc->sc_flags &= ~SC_OP_ANI_RUN;
1980 del_timer_sync(&common->ani.timer);
1981 memset(&sc->caldata, 0, sizeof(sc->caldata));
1985 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1986 struct ieee80211_vif *vif,
1987 struct ieee80211_bss_conf *bss_conf,
1990 struct ath_softc *sc = hw->priv;
1991 struct ath_hw *ah = sc->sc_ah;
1992 struct ath_common *common = ath9k_hw_common(ah);
1993 struct ath_vif *avp = (void *)vif->drv_priv;
1997 ath9k_ps_wakeup(sc);
1998 mutex_lock(&sc->mutex);
2000 if (changed & BSS_CHANGED_BSSID) {
2001 ath9k_config_bss(sc, vif);
2003 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
2004 common->curbssid, common->curaid);
2007 if (changed & BSS_CHANGED_IBSS) {
2008 /* There can be only one vif available */
2009 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2010 common->curaid = bss_conf->aid;
2011 ath9k_hw_write_associd(sc->sc_ah);
2013 if (bss_conf->ibss_joined) {
2014 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2016 if (!common->disable_ani) {
2017 sc->sc_flags |= SC_OP_ANI_RUN;
2018 ath_start_ani(common);
2022 sc->sc_flags &= ~SC_OP_ANI_RUN;
2023 del_timer_sync(&common->ani.timer);
2027 /* Enable transmission of beacons (AP, IBSS, MESH) */
2028 if ((changed & BSS_CHANGED_BEACON) ||
2029 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2030 ath9k_set_beaconing_status(sc, false);
2031 error = ath_beacon_alloc(sc, vif);
2033 ath_beacon_config(sc, vif);
2034 ath9k_set_beaconing_status(sc, true);
2037 if (changed & BSS_CHANGED_ERP_SLOT) {
2038 if (bss_conf->use_short_slot)
2042 if (vif->type == NL80211_IFTYPE_AP) {
2044 * Defer update, so that connected stations can adjust
2045 * their settings at the same time.
2046 * See beacon.c for more details
2048 sc->beacon.slottime = slottime;
2049 sc->beacon.updateslot = UPDATE;
2051 ah->slottime = slottime;
2052 ath9k_hw_init_global_settings(ah);
2056 /* Disable transmission of beacons */
2057 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2058 !bss_conf->enable_beacon) {
2059 ath9k_set_beaconing_status(sc, false);
2060 avp->is_bslot_active = false;
2061 ath9k_set_beaconing_status(sc, true);
2064 if (changed & BSS_CHANGED_BEACON_INT) {
2066 * In case of AP mode, the HW TSF has to be reset
2067 * when the beacon interval changes.
2069 if (vif->type == NL80211_IFTYPE_AP) {
2070 sc->sc_flags |= SC_OP_TSF_RESET;
2071 ath9k_set_beaconing_status(sc, false);
2072 error = ath_beacon_alloc(sc, vif);
2074 ath_beacon_config(sc, vif);
2075 ath9k_set_beaconing_status(sc, true);
2077 ath_beacon_config(sc, vif);
2080 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2081 ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
2082 bss_conf->use_short_preamble);
2083 if (bss_conf->use_short_preamble)
2084 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2086 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2089 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2090 ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
2091 bss_conf->use_cts_prot);
2092 if (bss_conf->use_cts_prot &&
2093 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2094 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2096 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2099 mutex_unlock(&sc->mutex);
2100 ath9k_ps_restore(sc);
2103 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2105 struct ath_softc *sc = hw->priv;
2108 mutex_lock(&sc->mutex);
2109 ath9k_ps_wakeup(sc);
2110 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2111 ath9k_ps_restore(sc);
2112 mutex_unlock(&sc->mutex);
2117 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2118 struct ieee80211_vif *vif,
2121 struct ath_softc *sc = hw->priv;
2123 mutex_lock(&sc->mutex);
2124 ath9k_ps_wakeup(sc);
2125 ath9k_hw_settsf64(sc->sc_ah, tsf);
2126 ath9k_ps_restore(sc);
2127 mutex_unlock(&sc->mutex);
2130 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2132 struct ath_softc *sc = hw->priv;
2134 mutex_lock(&sc->mutex);
2136 ath9k_ps_wakeup(sc);
2137 ath9k_hw_reset_tsf(sc->sc_ah);
2138 ath9k_ps_restore(sc);
2140 mutex_unlock(&sc->mutex);
2143 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2144 struct ieee80211_vif *vif,
2145 enum ieee80211_ampdu_mlme_action action,
2146 struct ieee80211_sta *sta,
2147 u16 tid, u16 *ssn, u8 buf_size)
2149 struct ath_softc *sc = hw->priv;
2155 case IEEE80211_AMPDU_RX_START:
2156 if (!(sc->sc_flags & SC_OP_RXAGGR))
2159 case IEEE80211_AMPDU_RX_STOP:
2161 case IEEE80211_AMPDU_TX_START:
2162 if (!(sc->sc_flags & SC_OP_TXAGGR))
2165 ath9k_ps_wakeup(sc);
2166 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2168 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2169 ath9k_ps_restore(sc);
2171 case IEEE80211_AMPDU_TX_STOP:
2172 ath9k_ps_wakeup(sc);
2173 ath_tx_aggr_stop(sc, sta, tid);
2174 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2175 ath9k_ps_restore(sc);
2177 case IEEE80211_AMPDU_TX_OPERATIONAL:
2178 ath9k_ps_wakeup(sc);
2179 ath_tx_aggr_resume(sc, sta, tid);
2180 ath9k_ps_restore(sc);
2183 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2191 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2192 struct survey_info *survey)
2194 struct ath_softc *sc = hw->priv;
2195 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2196 struct ieee80211_supported_band *sband;
2197 struct ieee80211_channel *chan;
2198 unsigned long flags;
2201 spin_lock_irqsave(&common->cc_lock, flags);
2203 ath_update_survey_stats(sc);
2205 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2206 if (sband && idx >= sband->n_channels) {
2207 idx -= sband->n_channels;
2212 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2214 if (!sband || idx >= sband->n_channels) {
2215 spin_unlock_irqrestore(&common->cc_lock, flags);
2219 chan = &sband->channels[idx];
2220 pos = chan->hw_value;
2221 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2222 survey->channel = chan;
2223 spin_unlock_irqrestore(&common->cc_lock, flags);
2228 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2230 struct ath_softc *sc = hw->priv;
2231 struct ath_hw *ah = sc->sc_ah;
2233 mutex_lock(&sc->mutex);
2234 ah->coverage_class = coverage_class;
2236 ath9k_ps_wakeup(sc);
2237 ath9k_hw_init_global_settings(ah);
2238 ath9k_ps_restore(sc);
2240 mutex_unlock(&sc->mutex);
2243 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2245 struct ath_softc *sc = hw->priv;
2246 struct ath_hw *ah = sc->sc_ah;
2247 struct ath_common *common = ath9k_hw_common(ah);
2248 int timeout = 200; /* ms */
2252 mutex_lock(&sc->mutex);
2253 cancel_delayed_work_sync(&sc->tx_complete_work);
2255 if (ah->ah_flags & AH_UNPLUGGED) {
2256 ath_dbg(common, ANY, "Device has been unplugged!\n");
2257 mutex_unlock(&sc->mutex);
2261 if (sc->sc_flags & SC_OP_INVALID) {
2262 ath_dbg(common, ANY, "Device not present\n");
2263 mutex_unlock(&sc->mutex);
2267 for (j = 0; j < timeout; j++) {
2271 usleep_range(1000, 2000);
2273 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2274 if (!ATH_TXQ_SETUP(sc, i))
2277 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2288 ath9k_ps_wakeup(sc);
2289 spin_lock_bh(&sc->sc_pcu_lock);
2290 drain_txq = ath_drain_all_txq(sc, false);
2291 spin_unlock_bh(&sc->sc_pcu_lock);
2294 ath_reset(sc, false);
2296 ath9k_ps_restore(sc);
2297 ieee80211_wake_queues(hw);
2300 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2301 mutex_unlock(&sc->mutex);
2304 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2306 struct ath_softc *sc = hw->priv;
2309 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2310 if (!ATH_TXQ_SETUP(sc, i))
2313 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2319 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2321 struct ath_softc *sc = hw->priv;
2322 struct ath_hw *ah = sc->sc_ah;
2323 struct ieee80211_vif *vif;
2324 struct ath_vif *avp;
2326 struct ath_tx_status ts;
2329 vif = sc->beacon.bslot[0];
2333 avp = (void *)vif->drv_priv;
2334 if (!avp->is_bslot_active)
2337 if (!sc->beacon.tx_processed) {
2338 tasklet_disable(&sc->bcon_tasklet);
2341 if (!bf || !bf->bf_mpdu)
2344 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2345 if (status == -EINPROGRESS)
2348 sc->beacon.tx_processed = true;
2349 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2352 tasklet_enable(&sc->bcon_tasklet);
2355 return sc->beacon.tx_last;
2358 static int ath9k_get_stats(struct ieee80211_hw *hw,
2359 struct ieee80211_low_level_stats *stats)
2361 struct ath_softc *sc = hw->priv;
2362 struct ath_hw *ah = sc->sc_ah;
2363 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2365 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2366 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2367 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2368 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2372 static u32 fill_chainmask(u32 cap, u32 new)
2377 for (i = 0; cap && new; i++, cap >>= 1) {
2378 if (!(cap & BIT(0)))
2390 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2392 struct ath_softc *sc = hw->priv;
2393 struct ath_hw *ah = sc->sc_ah;
2395 if (!rx_ant || !tx_ant)
2398 sc->ant_rx = rx_ant;
2399 sc->ant_tx = tx_ant;
2401 if (ah->caps.rx_chainmask == 1)
2404 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2405 if (AR_SREV_9100(ah))
2406 ah->rxchainmask = 0x7;
2408 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2410 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2411 ath9k_reload_chainmask_settings(sc);
2416 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2418 struct ath_softc *sc = hw->priv;
2420 *tx_ant = sc->ant_tx;
2421 *rx_ant = sc->ant_rx;
2425 struct ieee80211_ops ath9k_ops = {
2427 .start = ath9k_start,
2429 .add_interface = ath9k_add_interface,
2430 .change_interface = ath9k_change_interface,
2431 .remove_interface = ath9k_remove_interface,
2432 .config = ath9k_config,
2433 .configure_filter = ath9k_configure_filter,
2434 .sta_add = ath9k_sta_add,
2435 .sta_remove = ath9k_sta_remove,
2436 .sta_notify = ath9k_sta_notify,
2437 .conf_tx = ath9k_conf_tx,
2438 .bss_info_changed = ath9k_bss_info_changed,
2439 .set_key = ath9k_set_key,
2440 .get_tsf = ath9k_get_tsf,
2441 .set_tsf = ath9k_set_tsf,
2442 .reset_tsf = ath9k_reset_tsf,
2443 .ampdu_action = ath9k_ampdu_action,
2444 .get_survey = ath9k_get_survey,
2445 .rfkill_poll = ath9k_rfkill_poll_state,
2446 .set_coverage_class = ath9k_set_coverage_class,
2447 .flush = ath9k_flush,
2448 .tx_frames_pending = ath9k_tx_frames_pending,
2449 .tx_last_beacon = ath9k_tx_last_beacon,
2450 .get_stats = ath9k_get_stats,
2451 .set_antenna = ath9k_set_antenna,
2452 .get_antenna = ath9k_get_antenna,