drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 125         unsigned long flags;
 126
 127         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 128         if (++sc->ps_usecount != 1)
 129                 goto unlock;
 130
 131         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 132
 133         /*
 134          * While the hardware is asleep, the cycle counters contain no
 135          * useful data. Better clear them now so that they don't mess up
 136          * survey data results.
 137          */
 138         spin_lock(&common->cc_lock);
 139         ath_hw_cycle_counters_update(common);
 140         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 141         spin_unlock(&common->cc_lock);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 void ath9k_ps_restore(struct ath_softc *sc)
 148 {
 149         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 150         unsigned long flags;
 151
 152         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 153         if (--sc->ps_usecount != 0)
 154                 goto unlock;
 155
 156         spin_lock(&common->cc_lock);
 157         ath_hw_cycle_counters_update(common);
 158         spin_unlock(&common->cc_lock);
 159
 160         if (sc->ps_idle)
 161                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 162         else if (sc->ps_enabled &&
 163                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 164                               PS_WAIT_FOR_CAB |
 165                               PS_WAIT_FOR_PSPOLL_DATA |
 166                               PS_WAIT_FOR_TX_ACK)))
 167                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 168
 169  unlock:
 170         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 171 }
 172
 173 static void ath_start_ani(struct ath_common *common)
 174 {
 175         struct ath_hw *ah = common->ah;
 176         unsigned long timestamp = jiffies_to_msecs(jiffies);
 177         struct ath_softc *sc = (struct ath_softc *) common->priv;
 178
 179         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 180                 return;
 181
 182         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 183                 return;
 184
 185         common->ani.longcal_timer = timestamp;
 186         common->ani.shortcal_timer = timestamp;
 187         common->ani.checkani_timer = timestamp;
 188
 189         mod_timer(&common->ani.timer,
 190                   jiffies +
 191                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 192 }
 193
 194 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 195 {
 196         struct ath_hw *ah = sc->sc_ah;
 197         struct ath9k_channel *chan = &ah->channels[channel];
 198         struct survey_info *survey = &sc->survey[channel];
 199
 200         if (chan->noisefloor) {
 201                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 202                 survey->noise = chan->noisefloor;
 203         }
 204 }
 205
 206 static void ath_update_survey_stats(struct ath_softc *sc)
 207 {
 208         struct ath_hw *ah = sc->sc_ah;
 209         struct ath_common *common = ath9k_hw_common(ah);
 210         int pos = ah->curchan - &ah->channels[0];
 211         struct survey_info *survey = &sc->survey[pos];
 212         struct ath_cycle_counters *cc = &common->cc_survey;
 213         unsigned int div = common->clockrate * 1000;
 214
 215         if (ah->power_mode == ATH9K_PM_AWAKE)
 216                 ath_hw_cycle_counters_update(common);
 217
 218         if (cc->cycles > 0) {
 219                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 220                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 221                         SURVEY_INFO_CHANNEL_TIME_RX |
 222                         SURVEY_INFO_CHANNEL_TIME_TX;
 223                 survey->channel_time += cc->cycles / div;
 224                 survey->channel_time_busy += cc->rx_busy / div;
 225                 survey->channel_time_rx += cc->rx_frame / div;
 226                 survey->channel_time_tx += cc->tx_frame / div;
 227         }
 228         memset(cc, 0, sizeof(*cc));
 229
 230         ath_update_survey_nf(sc, pos);
 231 }
 232
 233 /*
 234  * Set/change channels.  If the channel is really being changed, it's done
 235  * by reseting the chip.  To accomplish this we must first cleanup any pending
 236  * DMA, then restart stuff.
 237 */
 238 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 239                     struct ath9k_channel *hchan)
 240 {
 241         struct ath_wiphy *aphy = hw->priv;
 242         struct ath_hw *ah = sc->sc_ah;
 243         struct ath_common *common = ath9k_hw_common(ah);
 244         struct ieee80211_conf *conf = &common->hw->conf;
 245         bool fastcc = true, stopped;
 246         struct ieee80211_channel *channel = hw->conf.channel;
 247         struct ath9k_hw_cal_data *caldata = NULL;
 248         int r;
 249
 250         if (sc->sc_flags & SC_OP_INVALID)
 251                 return -EIO;
 252
 253         del_timer_sync(&common->ani.timer);
 254         cancel_work_sync(&sc->paprd_work);
 255         cancel_work_sync(&sc->hw_check_work);
 256         cancel_delayed_work_sync(&sc->tx_complete_work);
 257
 258         ath9k_ps_wakeup(sc);
 259
 260         /*
 261          * This is only performed if the channel settings have
 262          * actually changed.
 263          *
 264          * To switch channels clear any pending DMA operations;
 265          * wait long enough for the RX fifo to drain, reset the
 266          * hardware at the new frequency, and then re-enable
 267          * the relevant bits of the h/w.
 268          */
 269         ath9k_hw_set_interrupts(ah, 0);
 270         ath_drain_all_txq(sc, false);
 271         stopped = ath_stoprecv(sc);
 272
 273         /* XXX: do not flush receive queue here. We don't want
 274          * to flush data frames already in queue because of
 275          * changing channel. */
 276
 277         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 278                 fastcc = false;
 279
 280         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 281                 caldata = &aphy->caldata;
 282
 283         ath_print(common, ATH_DBG_CONFIG,
 284                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 285                   sc->sc_ah->curchan->channel,
 286                   channel->center_freq, conf_is_ht40(conf),
 287                   fastcc);
 288
 289         spin_lock_bh(&sc->sc_resetlock);
 290
 291         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 292         if (r) {
 293                 ath_print(common, ATH_DBG_FATAL,
 294                           "Unable to reset channel (%u MHz), "
 295                           "reset status %d\n",
 296                           channel->center_freq, r);
 297                 spin_unlock_bh(&sc->sc_resetlock);
 298                 goto ps_restore;
 299         }
 300         spin_unlock_bh(&sc->sc_resetlock);
 301
 302         if (ath_startrecv(sc) != 0) {
 303                 ath_print(common, ATH_DBG_FATAL,
 304                           "Unable to restart recv logic\n");
 305                 r = -EIO;
 306                 goto ps_restore;
 307         }
 308
 309         ath_cache_conf_rate(sc, &hw->conf);
 310         ath_update_txpow(sc);
 311         ath9k_hw_set_interrupts(ah, ah->imask);
 312
 313         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 314                 ath_beacon_config(sc, NULL);
 315                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 316                 ath_start_ani(common);
 317         }
 318
 319  ps_restore:
 320         ath9k_ps_restore(sc);
 321         return r;
 322 }
 323
 324 static void ath_paprd_activate(struct ath_softc *sc)
 325 {
 326         struct ath_hw *ah = sc->sc_ah;
 327         struct ath9k_hw_cal_data *caldata = ah->caldata;
 328         struct ath_common *common = ath9k_hw_common(ah);
 329         int chain;
 330
 331         if (!caldata || !caldata->paprd_done)
 332                 return;
 333
 334         ath9k_ps_wakeup(sc);
 335         ar9003_paprd_enable(ah, false);
 336         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 337                 if (!(common->tx_chainmask & BIT(chain)))
 338                         continue;
 339
 340                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 341         }
 342
 343         ar9003_paprd_enable(ah, true);
 344         ath9k_ps_restore(sc);
 345 }
 346
 347 void ath_paprd_calibrate(struct work_struct *work)
 348 {
 349         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 350         struct ieee80211_hw *hw = sc->hw;
 351         struct ath_hw *ah = sc->sc_ah;
 352         struct ieee80211_hdr *hdr;
 353         struct sk_buff *skb = NULL;
 354         struct ieee80211_tx_info *tx_info;
 355         int band = hw->conf.channel->band;
 356         struct ieee80211_supported_band *sband = &sc->sbands[band];
 357         struct ath_tx_control txctl;
 358         struct ath9k_hw_cal_data *caldata = ah->caldata;
 359         struct ath_common *common = ath9k_hw_common(ah);
 360         int qnum, ftype;
 361         int chain_ok = 0;
 362         int chain;
 363         int len = 1800;
 364         int time_left;
 365         int i;
 366
 367         if (!caldata)
 368                 return;
 369
 370         skb = alloc_skb(len, GFP_KERNEL);
 371         if (!skb)
 372                 return;
 373
 374         tx_info = IEEE80211_SKB_CB(skb);
 375
 376         skb_put(skb, len);
 377         memset(skb->data, 0, len);
 378         hdr = (struct ieee80211_hdr *)skb->data;
 379         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 380         hdr->frame_control = cpu_to_le16(ftype);
 381         hdr->duration_id = cpu_to_le16(10);
 382         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 383         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 384         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 385
 386         memset(&txctl, 0, sizeof(txctl));
 387         qnum = sc->tx.hwq_map[WME_AC_BE];
 388         txctl.txq = &sc->tx.txq[qnum];
 389
 390         ath9k_ps_wakeup(sc);
 391         ar9003_paprd_init_table(ah);
 392         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 393                 if (!(common->tx_chainmask & BIT(chain)))
 394                         continue;
 395
 396                 chain_ok = 0;
 397                 memset(tx_info, 0, sizeof(*tx_info));
 398                 tx_info->band = band;
 399
 400                 for (i = 0; i < 4; i++) {
 401                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 402                         tx_info->control.rates[i].count = 6;
 403                 }
 404
 405                 init_completion(&sc->paprd_complete);
 406                 ar9003_paprd_setup_gain_table(ah, chain);
 407                 txctl.paprd = BIT(chain);
 408                 if (ath_tx_start(hw, skb, &txctl) != 0)
 409                         break;
 410
 411                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 412                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 413                 if (!time_left) {
 414                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 415                                   "Timeout waiting for paprd training on "
 416                                   "TX chain %d\n",
 417                                   chain);
 418                         goto fail_paprd;
 419                 }
 420
 421                 if (!ar9003_paprd_is_done(ah))
 422                         break;
 423
 424                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 425                         break;
 426
 427                 chain_ok = 1;
 428         }
 429         kfree_skb(skb);
 430
 431         if (chain_ok) {
 432                 caldata->paprd_done = true;
 433                 ath_paprd_activate(sc);
 434         }
 435
 436 fail_paprd:
 437         ath9k_ps_restore(sc);
 438 }
 439
 440 /*
 441  *  This routine performs the periodic noise floor calibration function
 442  *  that is used to adjust and optimize the chip performance.  This
 443  *  takes environmental changes (location, temperature) into account.
 444  *  When the task is complete, it reschedules itself depending on the
 445  *  appropriate interval that was calculated.
 446  */
 447 void ath_ani_calibrate(unsigned long data)
 448 {
 449         struct ath_softc *sc = (struct ath_softc *)data;
 450         struct ath_hw *ah = sc->sc_ah;
 451         struct ath_common *common = ath9k_hw_common(ah);
 452         bool longcal = false;
 453         bool shortcal = false;
 454         bool aniflag = false;
 455         unsigned int timestamp = jiffies_to_msecs(jiffies);
 456         u32 cal_interval, short_cal_interval, long_cal_interval;
 457         unsigned long flags;
 458
 459         if (ah->caldata && ah->caldata->nfcal_interference)
 460                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 461         else
 462                 long_cal_interval = ATH_LONG_CALINTERVAL;
 463
 464         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 465                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 466
 467         /* Only calibrate if awake */
 468         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 469                 goto set_timer;
 470
 471         ath9k_ps_wakeup(sc);
 472
 473         /* Long calibration runs independently of short calibration. */
 474         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 475                 longcal = true;
 476                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 477                 common->ani.longcal_timer = timestamp;
 478         }
 479
 480         /* Short calibration applies only while caldone is false */
 481         if (!common->ani.caldone) {
 482                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 483                         shortcal = true;
 484                         ath_print(common, ATH_DBG_ANI,
 485                                   "shortcal @%lu\n", jiffies);
 486                         common->ani.shortcal_timer = timestamp;
 487                         common->ani.resetcal_timer = timestamp;
 488                 }
 489         } else {
 490                 if ((timestamp - common->ani.resetcal_timer) >=
 491                     ATH_RESTART_CALINTERVAL) {
 492                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 493                         if (common->ani.caldone)
 494                                 common->ani.resetcal_timer = timestamp;
 495                 }
 496         }
 497
 498         /* Verify whether we must check ANI */
 499         if ((timestamp - common->ani.checkani_timer) >=
 500              ah->config.ani_poll_interval) {
 501                 aniflag = true;
 502                 common->ani.checkani_timer = timestamp;
 503         }
 504
 505         /* Skip all processing if there's nothing to do. */
 506         if (longcal || shortcal || aniflag) {
 507                 /* Call ANI routine if necessary */
 508                 if (aniflag) {
 509                         spin_lock_irqsave(&common->cc_lock, flags);
 510                         ath9k_hw_ani_monitor(ah, ah->curchan);
 511                         ath_update_survey_stats(sc);
 512                         spin_unlock_irqrestore(&common->cc_lock, flags);
 513                 }
 514
 515                 /* Perform calibration if necessary */
 516                 if (longcal || shortcal) {
 517                         common->ani.caldone =
 518                                 ath9k_hw_calibrate(ah,
 519                                                    ah->curchan,
 520                                                    common->rx_chainmask,
 521                                                    longcal);
 522                 }
 523         }
 524
 525         ath9k_ps_restore(sc);
 526
 527 set_timer:
 528         /*
 529         * Set timer interval based on previous results.
 530         * The interval must be the shortest necessary to satisfy ANI,
 531         * short calibration and long calibration.
 532         */
 533         cal_interval = ATH_LONG_CALINTERVAL;
 534         if (sc->sc_ah->config.enable_ani)
 535                 cal_interval = min(cal_interval,
 536                                    (u32)ah->config.ani_poll_interval);
 537         if (!common->ani.caldone)
 538                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 539
 540         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 541         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 542                 if (!ah->caldata->paprd_done)
 543                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 544                 else
 545                         ath_paprd_activate(sc);
 546         }
 547 }
 548
 549 /*
 550  * Update tx/rx chainmask. For legacy association,
 551  * hard code chainmask to 1x1, for 11n association, use
 552  * the chainmask configuration, for bt coexistence, use
 553  * the chainmask configuration even in legacy mode.
 554  */
 555 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 556 {
 557         struct ath_hw *ah = sc->sc_ah;
 558         struct ath_common *common = ath9k_hw_common(ah);
 559
 560         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 561             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 562                 common->tx_chainmask = ah->caps.tx_chainmask;
 563                 common->rx_chainmask = ah->caps.rx_chainmask;
 564         } else {
 565                 common->tx_chainmask = 1;
 566                 common->rx_chainmask = 1;
 567         }
 568
 569         ath_print(common, ATH_DBG_CONFIG,
 570                   "tx chmask: %d, rx chmask: %d\n",
 571                   common->tx_chainmask,
 572                   common->rx_chainmask);
 573 }
 574
 575 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 576 {
 577         struct ath_node *an;
 578
 579         an = (struct ath_node *)sta->drv_priv;
 580
 581         if (sc->sc_flags & SC_OP_TXAGGR) {
 582                 ath_tx_node_init(sc, an);
 583                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 584                                      sta->ht_cap.ampdu_factor);
 585                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 586                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 587         }
 588 }
 589
 590 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 591 {
 592         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 593
 594         if (sc->sc_flags & SC_OP_TXAGGR)
 595                 ath_tx_node_cleanup(sc, an);
 596 }
 597
 598 void ath_hw_check(struct work_struct *work)
 599 {
 600         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 601         int i;
 602
 603         ath9k_ps_wakeup(sc);
 604
 605         for (i = 0; i < 3; i++) {
 606                 if (ath9k_hw_check_alive(sc->sc_ah))
 607                         goto out;
 608
 609                 msleep(1);
 610         }
 611         ath_reset(sc, false);
 612
 613 out:
 614         ath9k_ps_restore(sc);
 615 }
 616
 617 void ath9k_tasklet(unsigned long data)
 618 {
 619         struct ath_softc *sc = (struct ath_softc *)data;
 620         struct ath_hw *ah = sc->sc_ah;
 621         struct ath_common *common = ath9k_hw_common(ah);
 622
 623         u32 status = sc->intrstatus;
 624         u32 rxmask;
 625
 626         ath9k_ps_wakeup(sc);
 627
 628         if (status & ATH9K_INT_FATAL) {
 629                 ath_reset(sc, false);
 630                 ath9k_ps_restore(sc);
 631                 return;
 632         }
 633
 634         if (!ath9k_hw_check_alive(ah))
 635                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 636
 637         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 638                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 639                           ATH9K_INT_RXORN);
 640         else
 641                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 642
 643         if (status & rxmask) {
 644                 spin_lock_bh(&sc->rx.rxflushlock);
 645
 646                 /* Check for high priority Rx first */
 647                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 648                     (status & ATH9K_INT_RXHP))
 649                         ath_rx_tasklet(sc, 0, true);
 650
 651                 ath_rx_tasklet(sc, 0, false);
 652                 spin_unlock_bh(&sc->rx.rxflushlock);
 653         }
 654
 655         if (status & ATH9K_INT_TX) {
 656                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 657                         ath_tx_edma_tasklet(sc);
 658                 else
 659                         ath_tx_tasklet(sc);
 660         }
 661
 662         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 663                 /*
 664                  * TSF sync does not look correct; remain awake to sync with
 665                  * the next Beacon.
 666                  */
 667                 ath_print(common, ATH_DBG_PS,
 668                           "TSFOOR - Sync with next Beacon\n");
 669                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 670         }
 671
 672         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 673                 if (status & ATH9K_INT_GENTIMER)
 674                         ath_gen_timer_isr(sc->sc_ah);
 675
 676         /* re-enable hardware interrupt */
 677         ath9k_hw_set_interrupts(ah, ah->imask);
 678         ath9k_ps_restore(sc);
 679 }
 680
 681 irqreturn_t ath_isr(int irq, void *dev)
 682 {
 683 #define SCHED_INTR (                            \
 684                 ATH9K_INT_FATAL |               \
 685                 ATH9K_INT_RXORN |               \
 686                 ATH9K_INT_RXEOL |               \
 687                 ATH9K_INT_RX |                  \
 688                 ATH9K_INT_RXLP |                \
 689                 ATH9K_INT_RXHP |                \
 690                 ATH9K_INT_TX |                  \
 691                 ATH9K_INT_BMISS |               \
 692                 ATH9K_INT_CST |                 \
 693                 ATH9K_INT_TSFOOR |              \
 694                 ATH9K_INT_GENTIMER)
 695
 696         struct ath_softc *sc = dev;
 697         struct ath_hw *ah = sc->sc_ah;
 698         struct ath_common *common = ath9k_hw_common(ah);
 699         enum ath9k_int status;
 700         bool sched = false;
 701
 702         /*
 703          * The hardware is not ready/present, don't
 704          * touch anything. Note this can happen early
 705          * on if the IRQ is shared.
 706          */
 707         if (sc->sc_flags & SC_OP_INVALID)
 708                 return IRQ_NONE;
 709
 710
 711         /* shared irq, not for us */
 712
 713         if (!ath9k_hw_intrpend(ah))
 714                 return IRQ_NONE;
 715
 716         /*
 717          * Figure out the reason(s) for the interrupt.  Note
 718          * that the hal returns a pseudo-ISR that may include
 719          * bits we haven't explicitly enabled so we mask the
 720          * value to insure we only process bits we requested.
 721          */
 722         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 723         status &= ah->imask;    /* discard unasked-for bits */
 724
 725         /*
 726          * If there are no status bits set, then this interrupt was not
 727          * for me (should have been caught above).
 728          */
 729         if (!status)
 730                 return IRQ_NONE;
 731
 732         /* Cache the status */
 733         sc->intrstatus = status;
 734
 735         if (status & SCHED_INTR)
 736                 sched = true;
 737
 738         /*
 739          * If a FATAL or RXORN interrupt is received, we have to reset the
 740          * chip immediately.
 741          */
 742         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 743             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 744                 goto chip_reset;
 745
 746         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 747             (status & ATH9K_INT_BB_WATCHDOG)) {
 748
 749                 spin_lock(&common->cc_lock);
 750                 ath_hw_cycle_counters_update(common);
 751                 ar9003_hw_bb_watchdog_dbg_info(ah);
 752                 spin_unlock(&common->cc_lock);
 753
 754                 goto chip_reset;
 755         }
 756
 757         if (status & ATH9K_INT_SWBA)
 758                 tasklet_schedule(&sc->bcon_tasklet);
 759
 760         if (status & ATH9K_INT_TXURN)
 761                 ath9k_hw_updatetxtriglevel(ah, true);
 762
 763         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 764                 if (status & ATH9K_INT_RXEOL) {
 765                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 766                         ath9k_hw_set_interrupts(ah, ah->imask);
 767                 }
 768         }
 769
 770         if (status & ATH9K_INT_MIB) {
 771                 /*
 772                  * Disable interrupts until we service the MIB
 773                  * interrupt; otherwise it will continue to
 774                  * fire.
 775                  */
 776                 ath9k_hw_set_interrupts(ah, 0);
 777                 /*
 778                  * Let the hal handle the event. We assume
 779                  * it will clear whatever condition caused
 780                  * the interrupt.
 781                  */
 782                 spin_lock(&common->cc_lock);
 783                 ath9k_hw_proc_mib_event(ah);
 784                 spin_unlock(&common->cc_lock);
 785                 ath9k_hw_set_interrupts(ah, ah->imask);
 786         }
 787
 788         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 789                 if (status & ATH9K_INT_TIM_TIMER) {
 790                         /* Clear RxAbort bit so that we can
 791                          * receive frames */
 792                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 793                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 794                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 795                 }
 796
 797 chip_reset:
 798
 799         ath_debug_stat_interrupt(sc, status);
 800
 801         if (sched) {
 802                 /* turn off every interrupt except SWBA */
 803                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 804                 tasklet_schedule(&sc->intr_tq);
 805         }
 806
 807         return IRQ_HANDLED;
 808
 809 #undef SCHED_INTR
 810 }
 811
 812 static u32 ath_get_extchanmode(struct ath_softc *sc,
 813                                struct ieee80211_channel *chan,
 814                                enum nl80211_channel_type channel_type)
 815 {
 816         u32 chanmode = 0;
 817
 818         switch (chan->band) {
 819         case IEEE80211_BAND_2GHZ:
 820                 switch(channel_type) {
 821                 case NL80211_CHAN_NO_HT:
 822                 case NL80211_CHAN_HT20:
 823                         chanmode = CHANNEL_G_HT20;
 824                         break;
 825                 case NL80211_CHAN_HT40PLUS:
 826                         chanmode = CHANNEL_G_HT40PLUS;
 827                         break;
 828                 case NL80211_CHAN_HT40MINUS:
 829                         chanmode = CHANNEL_G_HT40MINUS;
 830                         break;
 831                 }
 832                 break;
 833         case IEEE80211_BAND_5GHZ:
 834                 switch(channel_type) {
 835                 case NL80211_CHAN_NO_HT:
 836                 case NL80211_CHAN_HT20:
 837                         chanmode = CHANNEL_A_HT20;
 838                         break;
 839                 case NL80211_CHAN_HT40PLUS:
 840                         chanmode = CHANNEL_A_HT40PLUS;
 841                         break;
 842                 case NL80211_CHAN_HT40MINUS:
 843                         chanmode = CHANNEL_A_HT40MINUS;
 844                         break;
 845                 }
 846                 break;
 847         default:
 848                 break;
 849         }
 850
 851         return chanmode;
 852 }
 853
 854 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 855                                  struct ieee80211_vif *vif,
 856                                  struct ieee80211_bss_conf *bss_conf)
 857 {
 858         struct ath_hw *ah = sc->sc_ah;
 859         struct ath_common *common = ath9k_hw_common(ah);
 860
 861         if (bss_conf->assoc) {
 862                 ath_print(common, ATH_DBG_CONFIG,
 863                           "Bss Info ASSOC %d, bssid: %pM\n",
 864                            bss_conf->aid, common->curbssid);
 865
 866                 /* New association, store aid */
 867                 common->curaid = bss_conf->aid;
 868                 ath9k_hw_write_associd(ah);
 869
 870                 /*
 871                  * Request a re-configuration of Beacon related timers
 872                  * on the receipt of the first Beacon frame (i.e.,
 873                  * after time sync with the AP).
 874                  */
 875                 sc->ps_flags |= PS_BEACON_SYNC;
 876
 877                 /* Configure the beacon */
 878                 ath_beacon_config(sc, vif);
 879
 880                 /* Reset rssi stats */
 881                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 882
 883                 sc->sc_flags |= SC_OP_ANI_RUN;
 884                 ath_start_ani(common);
 885         } else {
 886                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 887                 common->curaid = 0;
 888                 /* Stop ANI */
 889                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 890                 del_timer_sync(&common->ani.timer);
 891         }
 892 }
 893
 894 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 895 {
 896         struct ath_hw *ah = sc->sc_ah;
 897         struct ath_common *common = ath9k_hw_common(ah);
 898         struct ieee80211_channel *channel = hw->conf.channel;
 899         int r;
 900
 901         ath9k_ps_wakeup(sc);
 902         ath9k_hw_configpcipowersave(ah, 0, 0);
 903
 904         if (!ah->curchan)
 905                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 906
 907         spin_lock_bh(&sc->sc_resetlock);
 908         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 909         if (r) {
 910                 ath_print(common, ATH_DBG_FATAL,
 911                           "Unable to reset channel (%u MHz), "
 912                           "reset status %d\n",
 913                           channel->center_freq, r);
 914         }
 915         spin_unlock_bh(&sc->sc_resetlock);
 916
 917         ath_update_txpow(sc);
 918         if (ath_startrecv(sc) != 0) {
 919                 ath_print(common, ATH_DBG_FATAL,
 920                           "Unable to restart recv logic\n");
 921                 return;
 922         }
 923
 924         if (sc->sc_flags & SC_OP_BEACONS)
 925                 ath_beacon_config(sc, NULL);    /* restart beacons */
 926
 927         /* Re-Enable  interrupts */
 928         ath9k_hw_set_interrupts(ah, ah->imask);
 929
 930         /* Enable LED */
 931         ath9k_hw_cfg_output(ah, ah->led_pin,
 932                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 933         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 934
 935         ieee80211_wake_queues(hw);
 936         ath9k_ps_restore(sc);
 937 }
 938
 939 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 940 {
 941         struct ath_hw *ah = sc->sc_ah;
 942         struct ieee80211_channel *channel = hw->conf.channel;
 943         int r;
 944
 945         ath9k_ps_wakeup(sc);
 946         ieee80211_stop_queues(hw);
 947
 948         /*
 949          * Keep the LED on when the radio is disabled
 950          * during idle unassociated state.
 951          */
 952         if (!sc->ps_idle) {
 953                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 954                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 955         }
 956
 957         /* Disable interrupts */
 958         ath9k_hw_set_interrupts(ah, 0);
 959
 960         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 961         ath_stoprecv(sc);               /* turn off frame recv */
 962         ath_flushrecv(sc);              /* flush recv queue */
 963
 964         if (!ah->curchan)
 965                 ah->curchan = ath_get_curchannel(sc, hw);
 966
 967         spin_lock_bh(&sc->sc_resetlock);
 968         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 969         if (r) {
 970                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 971                           "Unable to reset channel (%u MHz), "
 972                           "reset status %d\n",
 973                           channel->center_freq, r);
 974         }
 975         spin_unlock_bh(&sc->sc_resetlock);
 976
 977         ath9k_hw_phy_disable(ah);
 978         ath9k_hw_configpcipowersave(ah, 1, 1);
 979         ath9k_ps_restore(sc);
 980         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 981 }
 982
 983 int ath_reset(struct ath_softc *sc, bool retry_tx)
 984 {
 985         struct ath_hw *ah = sc->sc_ah;
 986         struct ath_common *common = ath9k_hw_common(ah);
 987         struct ieee80211_hw *hw = sc->hw;
 988         int r;
 989
 990         /* Stop ANI */
 991         del_timer_sync(&common->ani.timer);
 992
 993         ieee80211_stop_queues(hw);
 994
 995         ath9k_hw_set_interrupts(ah, 0);
 996         ath_drain_all_txq(sc, retry_tx);
 997         ath_stoprecv(sc);
 998         ath_flushrecv(sc);
 999
1000         spin_lock_bh(&sc->sc_resetlock);
1001         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1002         if (r)
1003                 ath_print(common, ATH_DBG_FATAL,
1004                           "Unable to reset hardware; reset status %d\n", r);
1005         spin_unlock_bh(&sc->sc_resetlock);
1006
1007         if (ath_startrecv(sc) != 0)
1008                 ath_print(common, ATH_DBG_FATAL,
1009                           "Unable to start recv logic\n");
1010
1011         /*
1012          * We may be doing a reset in response to a request
1013          * that changes the channel so update any state that
1014          * might change as a result.
1015          */
1016         ath_cache_conf_rate(sc, &hw->conf);
1017
1018         ath_update_txpow(sc);
1019
1020         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1021                 ath_beacon_config(sc, NULL);    /* restart beacons */
1022
1023         ath9k_hw_set_interrupts(ah, ah->imask);
1024
1025         if (retry_tx) {
1026                 int i;
1027                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1028                         if (ATH_TXQ_SETUP(sc, i)) {
1029                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1030                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1031                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1032                         }
1033                 }
1034         }
1035
1036         ieee80211_wake_queues(hw);
1037
1038         /* Start ANI */
1039         ath_start_ani(common);
1040
1041         return r;
1042 }
1043
1044 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1045 {
1046         int qnum;
1047
1048         switch (queue) {
1049         case 0:
1050                 qnum = sc->tx.hwq_map[WME_AC_VO];
1051                 break;
1052         case 1:
1053                 qnum = sc->tx.hwq_map[WME_AC_VI];
1054                 break;
1055         case 2:
1056                 qnum = sc->tx.hwq_map[WME_AC_BE];
1057                 break;
1058         case 3:
1059                 qnum = sc->tx.hwq_map[WME_AC_BK];
1060                 break;
1061         default:
1062                 qnum = sc->tx.hwq_map[WME_AC_BE];
1063                 break;
1064         }
1065
1066         return qnum;
1067 }
1068
1069 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1070 {
1071         int qnum;
1072
1073         switch (queue) {
1074         case WME_AC_VO:
1075                 qnum = 0;
1076                 break;
1077         case WME_AC_VI:
1078                 qnum = 1;
1079                 break;
1080         case WME_AC_BE:
1081                 qnum = 2;
1082                 break;
1083         case WME_AC_BK:
1084                 qnum = 3;
1085                 break;
1086         default:
1087                 qnum = -1;
1088                 break;
1089         }
1090
1091         return qnum;
1092 }
1093
1094 /* XXX: Remove me once we don't depend on ath9k_channel for all
1095  * this redundant data */
1096 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1097                            struct ath9k_channel *ichan)
1098 {
1099         struct ieee80211_channel *chan = hw->conf.channel;
1100         struct ieee80211_conf *conf = &hw->conf;
1101
1102         ichan->channel = chan->center_freq;
1103         ichan->chan = chan;
1104
1105         if (chan->band == IEEE80211_BAND_2GHZ) {
1106                 ichan->chanmode = CHANNEL_G;
1107                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1108         } else {
1109                 ichan->chanmode = CHANNEL_A;
1110                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1111         }
1112
1113         if (conf_is_ht(conf))
1114                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1115                                             conf->channel_type);
1116 }
1117
1118 /**********************/
1119 /* mac80211 callbacks */
1120 /**********************/
1121
1122 static int ath9k_start(struct ieee80211_hw *hw)
1123 {
1124         struct ath_wiphy *aphy = hw->priv;
1125         struct ath_softc *sc = aphy->sc;
1126         struct ath_hw *ah = sc->sc_ah;
1127         struct ath_common *common = ath9k_hw_common(ah);
1128         struct ieee80211_channel *curchan = hw->conf.channel;
1129         struct ath9k_channel *init_channel;
1130         int r;
1131
1132         ath_print(common, ATH_DBG_CONFIG,
1133                   "Starting driver with initial channel: %d MHz\n",
1134                   curchan->center_freq);
1135
1136         mutex_lock(&sc->mutex);
1137
1138         if (ath9k_wiphy_started(sc)) {
1139                 if (sc->chan_idx == curchan->hw_value) {
1140                         /*
1141                          * Already on the operational channel, the new wiphy
1142                          * can be marked active.
1143                          */
1144                         aphy->state = ATH_WIPHY_ACTIVE;
1145                         ieee80211_wake_queues(hw);
1146                 } else {
1147                         /*
1148                          * Another wiphy is on another channel, start the new
1149                          * wiphy in paused state.
1150                          */
1151                         aphy->state = ATH_WIPHY_PAUSED;
1152                         ieee80211_stop_queues(hw);
1153                 }
1154                 mutex_unlock(&sc->mutex);
1155                 return 0;
1156         }
1157         aphy->state = ATH_WIPHY_ACTIVE;
1158
1159         /* setup initial channel */
1160
1161         sc->chan_idx = curchan->hw_value;
1162
1163         init_channel = ath_get_curchannel(sc, hw);
1164
1165         /* Reset SERDES registers */
1166         ath9k_hw_configpcipowersave(ah, 0, 0);
1167
1168         /*
1169          * The basic interface to setting the hardware in a good
1170          * state is ``reset''.  On return the hardware is known to
1171          * be powered up and with interrupts disabled.  This must
1172          * be followed by initialization of the appropriate bits
1173          * and then setup of the interrupt mask.
1174          */
1175         spin_lock_bh(&sc->sc_resetlock);
1176         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1177         if (r) {
1178                 ath_print(common, ATH_DBG_FATAL,
1179                           "Unable to reset hardware; reset status %d "
1180                           "(freq %u MHz)\n", r,
1181                           curchan->center_freq);
1182                 spin_unlock_bh(&sc->sc_resetlock);
1183                 goto mutex_unlock;
1184         }
1185         spin_unlock_bh(&sc->sc_resetlock);
1186
1187         /*
1188          * This is needed only to setup initial state
1189          * but it's best done after a reset.
1190          */
1191         ath_update_txpow(sc);
1192
1193         /*
1194          * Setup the hardware after reset:
1195          * The receive engine is set going.
1196          * Frame transmit is handled entirely
1197          * in the frame output path; there's nothing to do
1198          * here except setup the interrupt mask.
1199          */
1200         if (ath_startrecv(sc) != 0) {
1201                 ath_print(common, ATH_DBG_FATAL,
1202                           "Unable to start recv logic\n");
1203                 r = -EIO;
1204                 goto mutex_unlock;
1205         }
1206
1207         /* Setup our intr mask. */
1208         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1209                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1210                     ATH9K_INT_GLOBAL;
1211
1212         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1213                 ah->imask |= ATH9K_INT_RXHP |
1214                              ATH9K_INT_RXLP |
1215                              ATH9K_INT_BB_WATCHDOG;
1216         else
1217                 ah->imask |= ATH9K_INT_RX;
1218
1219         ah->imask |= ATH9K_INT_GTT;
1220
1221         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1222                 ah->imask |= ATH9K_INT_CST;
1223
1224         ath_cache_conf_rate(sc, &hw->conf);
1225
1226         sc->sc_flags &= ~SC_OP_INVALID;
1227
1228         /* Disable BMISS interrupt when we're not associated */
1229         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1230         ath9k_hw_set_interrupts(ah, ah->imask);
1231
1232         ieee80211_wake_queues(hw);
1233
1234         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1235
1236         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1237             !ah->btcoex_hw.enabled) {
1238                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1239                                            AR_STOMP_LOW_WLAN_WGHT);
1240                 ath9k_hw_btcoex_enable(ah);
1241
1242                 if (common->bus_ops->bt_coex_prep)
1243                         common->bus_ops->bt_coex_prep(common);
1244                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1245                         ath9k_btcoex_timer_resume(sc);
1246         }
1247
1248 mutex_unlock:
1249         mutex_unlock(&sc->mutex);
1250
1251         return r;
1252 }
1253
1254 static int ath9k_tx(struct ieee80211_hw *hw,
1255                     struct sk_buff *skb)
1256 {
1257         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1258         struct ath_wiphy *aphy = hw->priv;
1259         struct ath_softc *sc = aphy->sc;
1260         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1261         struct ath_tx_control txctl;
1262         int padpos, padsize;
1263         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1264         int qnum;
1265
1266         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1267                 ath_print(common, ATH_DBG_XMIT,
1268                           "ath9k: %s: TX in unexpected wiphy state "
1269                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1270                 goto exit;
1271         }
1272
1273         if (sc->ps_enabled) {
1274                 /*
1275                  * mac80211 does not set PM field for normal data frames, so we
1276                  * need to update that based on the current PS mode.
1277                  */
1278                 if (ieee80211_is_data(hdr->frame_control) &&
1279                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1280                     !ieee80211_has_pm(hdr->frame_control)) {
1281                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1282                                   "while in PS mode\n");
1283                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1284                 }
1285         }
1286
1287         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1288                 /*
1289                  * We are using PS-Poll and mac80211 can request TX while in
1290                  * power save mode. Need to wake up hardware for the TX to be
1291                  * completed and if needed, also for RX of buffered frames.
1292                  */
1293                 ath9k_ps_wakeup(sc);
1294                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1295                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1296                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1297                         ath_print(common, ATH_DBG_PS,
1298                                   "Sending PS-Poll to pick a buffered frame\n");
1299                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1300                 } else {
1301                         ath_print(common, ATH_DBG_PS,
1302                                   "Wake up to complete TX\n");
1303                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1304                 }
1305                 /*
1306                  * The actual restore operation will happen only after
1307                  * the sc_flags bit is cleared. We are just dropping
1308                  * the ps_usecount here.
1309                  */
1310                 ath9k_ps_restore(sc);
1311         }
1312
1313         memset(&txctl, 0, sizeof(struct ath_tx_control));
1314
1315         /*
1316          * As a temporary workaround, assign seq# here; this will likely need
1317          * to be cleaned up to work better with Beacon transmission and virtual
1318          * BSSes.
1319          */
1320         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1321                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1322                         sc->tx.seq_no += 0x10;
1323                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1324                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1325         }
1326
1327         /* Add the padding after the header if this is not already done */
1328         padpos = ath9k_cmn_padpos(hdr->frame_control);
1329         padsize = padpos & 3;
1330         if (padsize && skb->len>padpos) {
1331                 if (skb_headroom(skb) < padsize)
1332                         return -1;
1333                 skb_push(skb, padsize);
1334                 memmove(skb->data, skb->data + padsize, padpos);
1335         }
1336
1337         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1338         txctl.txq = &sc->tx.txq[qnum];
1339
1340         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1341
1342         if (ath_tx_start(hw, skb, &txctl) != 0) {
1343                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1344                 goto exit;
1345         }
1346
1347         return 0;
1348 exit:
1349         dev_kfree_skb_any(skb);
1350         return 0;
1351 }
1352
1353 static void ath9k_stop(struct ieee80211_hw *hw)
1354 {
1355         struct ath_wiphy *aphy = hw->priv;
1356         struct ath_softc *sc = aphy->sc;
1357         struct ath_hw *ah = sc->sc_ah;
1358         struct ath_common *common = ath9k_hw_common(ah);
1359         int i;
1360
1361         mutex_lock(&sc->mutex);
1362
1363         aphy->state = ATH_WIPHY_INACTIVE;
1364
1365         if (led_blink)
1366                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1367
1368         cancel_delayed_work_sync(&sc->tx_complete_work);
1369         cancel_work_sync(&sc->paprd_work);
1370         cancel_work_sync(&sc->hw_check_work);
1371
1372         for (i = 0; i < sc->num_sec_wiphy; i++) {
1373                 if (sc->sec_wiphy[i])
1374                         break;
1375         }
1376
1377         if (i == sc->num_sec_wiphy) {
1378                 cancel_delayed_work_sync(&sc->wiphy_work);
1379                 cancel_work_sync(&sc->chan_work);
1380         }
1381
1382         if (sc->sc_flags & SC_OP_INVALID) {
1383                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1384                 mutex_unlock(&sc->mutex);
1385                 return;
1386         }
1387
1388         if (ath9k_wiphy_started(sc)) {
1389                 mutex_unlock(&sc->mutex);
1390                 return; /* another wiphy still in use */
1391         }
1392
1393         /* Ensure HW is awake when we try to shut it down. */
1394         ath9k_ps_wakeup(sc);
1395
1396         if (ah->btcoex_hw.enabled) {
1397                 ath9k_hw_btcoex_disable(ah);
1398                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1399                         ath9k_btcoex_timer_pause(sc);
1400         }
1401
1402         /* make sure h/w will not generate any interrupt
1403          * before setting the invalid flag. */
1404         ath9k_hw_set_interrupts(ah, 0);
1405
1406         if (!(sc->sc_flags & SC_OP_INVALID)) {
1407                 ath_drain_all_txq(sc, false);
1408                 ath_stoprecv(sc);
1409                 ath9k_hw_phy_disable(ah);
1410         } else
1411                 sc->rx.rxlink = NULL;
1412
1413         /* disable HAL and put h/w to sleep */
1414         ath9k_hw_disable(ah);
1415         ath9k_hw_configpcipowersave(ah, 1, 1);
1416         ath9k_ps_restore(sc);
1417
1418         /* Finally, put the chip in FULL SLEEP mode */
1419         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1420
1421         sc->sc_flags |= SC_OP_INVALID;
1422
1423         mutex_unlock(&sc->mutex);
1424
1425         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1426 }
1427
1428 static int ath9k_add_interface(struct ieee80211_hw *hw,
1429                                struct ieee80211_vif *vif)
1430 {
1431         struct ath_wiphy *aphy = hw->priv;
1432         struct ath_softc *sc = aphy->sc;
1433         struct ath_hw *ah = sc->sc_ah;
1434         struct ath_common *common = ath9k_hw_common(ah);
1435         struct ath_vif *avp = (void *)vif->drv_priv;
1436         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1437         int ret = 0;
1438
1439         mutex_lock(&sc->mutex);
1440
1441         switch (vif->type) {
1442         case NL80211_IFTYPE_STATION:
1443                 ic_opmode = NL80211_IFTYPE_STATION;
1444                 break;
1445         case NL80211_IFTYPE_WDS:
1446                 ic_opmode = NL80211_IFTYPE_WDS;
1447                 break;
1448         case NL80211_IFTYPE_ADHOC:
1449         case NL80211_IFTYPE_AP:
1450         case NL80211_IFTYPE_MESH_POINT:
1451                 if (sc->nbcnvifs >= ATH_BCBUF) {
1452                         ret = -ENOBUFS;
1453                         goto out;
1454                 }
1455                 ic_opmode = vif->type;
1456                 break;
1457         default:
1458                 ath_print(common, ATH_DBG_FATAL,
1459                         "Interface type %d not yet supported\n", vif->type);
1460                 ret = -EOPNOTSUPP;
1461                 goto out;
1462         }
1463
1464         ath_print(common, ATH_DBG_CONFIG,
1465                   "Attach a VIF of type: %d\n", ic_opmode);
1466
1467         /* Set the VIF opmode */
1468         avp->av_opmode = ic_opmode;
1469         avp->av_bslot = -1;
1470
1471         sc->nvifs++;
1472
1473         ath9k_set_bssid_mask(hw, vif);
1474
1475         if (sc->nvifs > 1)
1476                 goto out; /* skip global settings for secondary vif */
1477
1478         if (ic_opmode == NL80211_IFTYPE_AP) {
1479                 ath9k_hw_set_tsfadjust(ah, 1);
1480                 sc->sc_flags |= SC_OP_TSF_RESET;
1481         }
1482
1483         /* Set the device opmode */
1484         ah->opmode = ic_opmode;
1485
1486         /*
1487          * Enable MIB interrupts when there are hardware phy counters.
1488          * Note we only do this (at the moment) for station mode.
1489          */
1490         if ((vif->type == NL80211_IFTYPE_STATION) ||
1491             (vif->type == NL80211_IFTYPE_ADHOC) ||
1492             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1493                 if (ah->config.enable_ani)
1494                         ah->imask |= ATH9K_INT_MIB;
1495                 ah->imask |= ATH9K_INT_TSFOOR;
1496         }
1497
1498         ath9k_hw_set_interrupts(ah, ah->imask);
1499
1500         if (vif->type == NL80211_IFTYPE_AP    ||
1501             vif->type == NL80211_IFTYPE_ADHOC ||
1502             vif->type == NL80211_IFTYPE_MONITOR) {
1503                 sc->sc_flags |= SC_OP_ANI_RUN;
1504                 ath_start_ani(common);
1505         }
1506
1507 out:
1508         mutex_unlock(&sc->mutex);
1509         return ret;
1510 }
1511
1512 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1513                                    struct ieee80211_vif *vif)
1514 {
1515         struct ath_wiphy *aphy = hw->priv;
1516         struct ath_softc *sc = aphy->sc;
1517         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518         struct ath_vif *avp = (void *)vif->drv_priv;
1519         int i;
1520
1521         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1522
1523         mutex_lock(&sc->mutex);
1524
1525         /* Stop ANI */
1526         sc->sc_flags &= ~SC_OP_ANI_RUN;
1527         del_timer_sync(&common->ani.timer);
1528
1529         /* Reclaim beacon resources */
1530         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1531             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1532             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1533                 ath9k_ps_wakeup(sc);
1534                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1535                 ath9k_ps_restore(sc);
1536         }
1537
1538         ath_beacon_return(sc, avp);
1539         sc->sc_flags &= ~SC_OP_BEACONS;
1540
1541         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1542                 if (sc->beacon.bslot[i] == vif) {
1543                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1544                                "slot\n", __func__);
1545                         sc->beacon.bslot[i] = NULL;
1546                         sc->beacon.bslot_aphy[i] = NULL;
1547                 }
1548         }
1549
1550         sc->nvifs--;
1551
1552         mutex_unlock(&sc->mutex);
1553 }
1554
1555 static void ath9k_enable_ps(struct ath_softc *sc)
1556 {
1557         struct ath_hw *ah = sc->sc_ah;
1558
1559         sc->ps_enabled = true;
1560         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1561                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1562                         ah->imask |= ATH9K_INT_TIM_TIMER;
1563                         ath9k_hw_set_interrupts(ah, ah->imask);
1564                 }
1565                 ath9k_hw_setrxabort(ah, 1);
1566         }
1567 }
1568
1569 static void ath9k_disable_ps(struct ath_softc *sc)
1570 {
1571         struct ath_hw *ah = sc->sc_ah;
1572
1573         sc->ps_enabled = false;
1574         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1575         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1576                 ath9k_hw_setrxabort(ah, 0);
1577                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1578                                   PS_WAIT_FOR_CAB |
1579                                   PS_WAIT_FOR_PSPOLL_DATA |
1580                                   PS_WAIT_FOR_TX_ACK);
1581                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1582                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1583                         ath9k_hw_set_interrupts(ah, ah->imask);
1584                 }
1585         }
1586
1587 }
1588
1589 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1590 {
1591         struct ath_wiphy *aphy = hw->priv;
1592         struct ath_softc *sc = aphy->sc;
1593         struct ath_hw *ah = sc->sc_ah;
1594         struct ath_common *common = ath9k_hw_common(ah);
1595         struct ieee80211_conf *conf = &hw->conf;
1596         bool disable_radio;
1597
1598         mutex_lock(&sc->mutex);
1599
1600         /*
1601          * Leave this as the first check because we need to turn on the
1602          * radio if it was disabled before prior to processing the rest
1603          * of the changes. Likewise we must only disable the radio towards
1604          * the end.
1605          */
1606         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1607                 bool enable_radio;
1608                 bool all_wiphys_idle;
1609                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1610
1611                 spin_lock_bh(&sc->wiphy_lock);
1612                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1613                 ath9k_set_wiphy_idle(aphy, idle);
1614
1615                 enable_radio = (!idle && all_wiphys_idle);
1616
1617                 /*
1618                  * After we unlock here its possible another wiphy
1619                  * can be re-renabled so to account for that we will
1620                  * only disable the radio toward the end of this routine
1621                  * if by then all wiphys are still idle.
1622                  */
1623                 spin_unlock_bh(&sc->wiphy_lock);
1624
1625                 if (enable_radio) {
1626                         sc->ps_idle = false;
1627                         ath_radio_enable(sc, hw);
1628                         ath_print(common, ATH_DBG_CONFIG,
1629                                   "not-idle: enabling radio\n");
1630                 }
1631         }
1632
1633         /*
1634          * We just prepare to enable PS. We have to wait until our AP has
1635          * ACK'd our null data frame to disable RX otherwise we'll ignore
1636          * those ACKs and end up retransmitting the same null data frames.
1637          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1638          */
1639         if (changed & IEEE80211_CONF_CHANGE_PS) {
1640                 unsigned long flags;
1641                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1642                 if (conf->flags & IEEE80211_CONF_PS)
1643                         ath9k_enable_ps(sc);
1644                 else
1645                         ath9k_disable_ps(sc);
1646                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1647         }
1648
1649         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1650                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1651                         ath_print(common, ATH_DBG_CONFIG,
1652                                   "HW opmode set to Monitor mode\n");
1653                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1654                 }
1655         }
1656
1657         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1658                 struct ieee80211_channel *curchan = hw->conf.channel;
1659                 int pos = curchan->hw_value;
1660                 int old_pos = -1;
1661                 unsigned long flags;
1662
1663                 if (ah->curchan)
1664                         old_pos = ah->curchan - &ah->channels[0];
1665
1666                 aphy->chan_idx = pos;
1667                 aphy->chan_is_ht = conf_is_ht(conf);
1668                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1669                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1670                 else
1671                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1672
1673                 if (aphy->state == ATH_WIPHY_SCAN ||
1674                     aphy->state == ATH_WIPHY_ACTIVE)
1675                         ath9k_wiphy_pause_all_forced(sc, aphy);
1676                 else {
1677                         /*
1678                          * Do not change operational channel based on a paused
1679                          * wiphy changes.
1680                          */
1681                         goto skip_chan_change;
1682                 }
1683
1684                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1685                           curchan->center_freq);
1686
1687                 /* XXX: remove me eventualy */
1688                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1689
1690                 ath_update_chainmask(sc, conf_is_ht(conf));
1691
1692                 /* update survey stats for the old channel before switching */
1693                 spin_lock_irqsave(&common->cc_lock, flags);
1694                 ath_update_survey_stats(sc);
1695                 spin_unlock_irqrestore(&common->cc_lock, flags);
1696
1697                 /*
1698                  * If the operating channel changes, change the survey in-use flags
1699                  * along with it.
1700                  * Reset the survey data for the new channel, unless we're switching
1701                  * back to the operating channel from an off-channel operation.
1702                  */
1703                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1704                     sc->cur_survey != &sc->survey[pos]) {
1705
1706                         if (sc->cur_survey)
1707                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1708
1709                         sc->cur_survey = &sc->survey[pos];
1710
1711                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1712                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1713                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1714                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1715                 }
1716
1717                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1718                         ath_print(common, ATH_DBG_FATAL,
1719                                   "Unable to set channel\n");
1720                         mutex_unlock(&sc->mutex);
1721                         return -EINVAL;
1722                 }
1723
1724                 /*
1725                  * The most recent snapshot of channel->noisefloor for the old
1726                  * channel is only available after the hardware reset. Copy it to
1727                  * the survey stats now.
1728                  */
1729                 if (old_pos >= 0)
1730                         ath_update_survey_nf(sc, old_pos);
1731         }
1732
1733 skip_chan_change:
1734         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1735                 sc->config.txpowlimit = 2 * conf->power_level;
1736                 ath_update_txpow(sc);
1737         }
1738
1739         spin_lock_bh(&sc->wiphy_lock);
1740         disable_radio = ath9k_all_wiphys_idle(sc);
1741         spin_unlock_bh(&sc->wiphy_lock);
1742
1743         if (disable_radio) {
1744                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1745                 sc->ps_idle = true;
1746                 ath_radio_disable(sc, hw);
1747         }
1748
1749         mutex_unlock(&sc->mutex);
1750
1751         return 0;
1752 }
1753
1754 #define SUPPORTED_FILTERS                       \
1755         (FIF_PROMISC_IN_BSS |                   \
1756         FIF_ALLMULTI |                          \
1757         FIF_CONTROL |                           \
1758         FIF_PSPOLL |                            \
1759         FIF_OTHER_BSS |                         \
1760         FIF_BCN_PRBRESP_PROMISC |               \
1761         FIF_PROBE_REQ |                         \
1762         FIF_FCSFAIL)
1763
1764 /* FIXME: sc->sc_full_reset ? */
1765 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1766                                    unsigned int changed_flags,
1767                                    unsigned int *total_flags,
1768                                    u64 multicast)
1769 {
1770         struct ath_wiphy *aphy = hw->priv;
1771         struct ath_softc *sc = aphy->sc;
1772         u32 rfilt;
1773
1774         changed_flags &= SUPPORTED_FILTERS;
1775         *total_flags &= SUPPORTED_FILTERS;
1776
1777         sc->rx.rxfilter = *total_flags;
1778         ath9k_ps_wakeup(sc);
1779         rfilt = ath_calcrxfilter(sc);
1780         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1781         ath9k_ps_restore(sc);
1782
1783         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1784                   "Set HW RX filter: 0x%x\n", rfilt);
1785 }
1786
1787 static int ath9k_sta_add(struct ieee80211_hw *hw,
1788                          struct ieee80211_vif *vif,
1789                          struct ieee80211_sta *sta)
1790 {
1791         struct ath_wiphy *aphy = hw->priv;
1792         struct ath_softc *sc = aphy->sc;
1793
1794         ath_node_attach(sc, sta);
1795
1796         return 0;
1797 }
1798
1799 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1800                             struct ieee80211_vif *vif,
1801                             struct ieee80211_sta *sta)
1802 {
1803         struct ath_wiphy *aphy = hw->priv;
1804         struct ath_softc *sc = aphy->sc;
1805
1806         ath_node_detach(sc, sta);
1807
1808         return 0;
1809 }
1810
1811 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1812                          const struct ieee80211_tx_queue_params *params)
1813 {
1814         struct ath_wiphy *aphy = hw->priv;
1815         struct ath_softc *sc = aphy->sc;
1816         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1817         struct ath9k_tx_queue_info qi;
1818         int ret = 0, qnum;
1819
1820         if (queue >= WME_NUM_AC)
1821                 return 0;
1822
1823         mutex_lock(&sc->mutex);
1824
1825         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1826
1827         qi.tqi_aifs = params->aifs;
1828         qi.tqi_cwmin = params->cw_min;
1829         qi.tqi_cwmax = params->cw_max;
1830         qi.tqi_burstTime = params->txop;
1831         qnum = ath_get_hal_qnum(queue, sc);
1832
1833         ath_print(common, ATH_DBG_CONFIG,
1834                   "Configure tx [queue/halq] [%d/%d],  "
1835                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1836                   queue, qnum, params->aifs, params->cw_min,
1837                   params->cw_max, params->txop);
1838
1839         ret = ath_txq_update(sc, qnum, &qi);
1840         if (ret)
1841                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1842
1843         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1844                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1845                         ath_beaconq_config(sc);
1846
1847         mutex_unlock(&sc->mutex);
1848
1849         return ret;
1850 }
1851
1852 static int ath9k_set_key(struct ieee80211_hw *hw,
1853                          enum set_key_cmd cmd,
1854                          struct ieee80211_vif *vif,
1855                          struct ieee80211_sta *sta,
1856                          struct ieee80211_key_conf *key)
1857 {
1858         struct ath_wiphy *aphy = hw->priv;
1859         struct ath_softc *sc = aphy->sc;
1860         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1861         int ret = 0;
1862
1863         if (modparam_nohwcrypt)
1864                 return -ENOSPC;
1865
1866         mutex_lock(&sc->mutex);
1867         ath9k_ps_wakeup(sc);
1868         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1869
1870         switch (cmd) {
1871         case SET_KEY:
1872                 ret = ath_key_config(common, vif, sta, key);
1873                 if (ret >= 0) {
1874                         key->hw_key_idx = ret;
1875                         /* push IV and Michael MIC generation to stack */
1876                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1877                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1878                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1879                         if (sc->sc_ah->sw_mgmt_crypto &&
1880                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1881                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1882                         ret = 0;
1883                 }
1884                 break;
1885         case DISABLE_KEY:
1886                 ath_key_delete(common, key);
1887                 break;
1888         default:
1889                 ret = -EINVAL;
1890         }
1891
1892         ath9k_ps_restore(sc);
1893         mutex_unlock(&sc->mutex);
1894
1895         return ret;
1896 }
1897
1898 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1899                                    struct ieee80211_vif *vif,
1900                                    struct ieee80211_bss_conf *bss_conf,
1901                                    u32 changed)
1902 {
1903         struct ath_wiphy *aphy = hw->priv;
1904         struct ath_softc *sc = aphy->sc;
1905         struct ath_hw *ah = sc->sc_ah;
1906         struct ath_common *common = ath9k_hw_common(ah);
1907         struct ath_vif *avp = (void *)vif->drv_priv;
1908         int slottime;
1909         int error;
1910
1911         mutex_lock(&sc->mutex);
1912
1913         if (changed & BSS_CHANGED_BSSID) {
1914                 /* Set BSSID */
1915                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1916                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1917                 common->curaid = 0;
1918                 ath9k_hw_write_associd(ah);
1919
1920                 /* Set aggregation protection mode parameters */
1921                 sc->config.ath_aggr_prot = 0;
1922
1923                 /* Only legacy IBSS for now */
1924                 if (vif->type == NL80211_IFTYPE_ADHOC)
1925                         ath_update_chainmask(sc, 0);
1926
1927                 ath_print(common, ATH_DBG_CONFIG,
1928                           "BSSID: %pM aid: 0x%x\n",
1929                           common->curbssid, common->curaid);
1930
1931                 /* need to reconfigure the beacon */
1932                 sc->sc_flags &= ~SC_OP_BEACONS ;
1933         }
1934
1935         /* Enable transmission of beacons (AP, IBSS, MESH) */
1936         if ((changed & BSS_CHANGED_BEACON) ||
1937             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1938                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1939                 error = ath_beacon_alloc(aphy, vif);
1940                 if (!error)
1941                         ath_beacon_config(sc, vif);
1942         }
1943
1944         if (changed & BSS_CHANGED_ERP_SLOT) {
1945                 if (bss_conf->use_short_slot)
1946                         slottime = 9;
1947                 else
1948                         slottime = 20;
1949                 if (vif->type == NL80211_IFTYPE_AP) {
1950                         /*
1951                          * Defer update, so that connected stations can adjust
1952                          * their settings at the same time.
1953                          * See beacon.c for more details
1954                          */
1955                         sc->beacon.slottime = slottime;
1956                         sc->beacon.updateslot = UPDATE;
1957                 } else {
1958                         ah->slottime = slottime;
1959                         ath9k_hw_init_global_settings(ah);
1960                 }
1961         }
1962
1963         /* Disable transmission of beacons */
1964         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1965                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1966
1967         if (changed & BSS_CHANGED_BEACON_INT) {
1968                 sc->beacon_interval = bss_conf->beacon_int;
1969                 /*
1970                  * In case of AP mode, the HW TSF has to be reset
1971                  * when the beacon interval changes.
1972                  */
1973                 if (vif->type == NL80211_IFTYPE_AP) {
1974                         sc->sc_flags |= SC_OP_TSF_RESET;
1975                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1976                         error = ath_beacon_alloc(aphy, vif);
1977                         if (!error)
1978                                 ath_beacon_config(sc, vif);
1979                 } else {
1980                         ath_beacon_config(sc, vif);
1981                 }
1982         }
1983
1984         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1985                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1986                           bss_conf->use_short_preamble);
1987                 if (bss_conf->use_short_preamble)
1988                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1989                 else
1990                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1991         }
1992
1993         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1994                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1995                           bss_conf->use_cts_prot);
1996                 if (bss_conf->use_cts_prot &&
1997                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1998                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1999                 else
2000                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2001         }
2002
2003         if (changed & BSS_CHANGED_ASSOC) {
2004                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2005                         bss_conf->assoc);
2006                 ath9k_bss_assoc_info(sc, vif, bss_conf);
2007         }
2008
2009         mutex_unlock(&sc->mutex);
2010 }
2011
2012 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2013 {
2014         u64 tsf;
2015         struct ath_wiphy *aphy = hw->priv;
2016         struct ath_softc *sc = aphy->sc;
2017
2018         mutex_lock(&sc->mutex);
2019         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2020         mutex_unlock(&sc->mutex);
2021
2022         return tsf;
2023 }
2024
2025 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2026 {
2027         struct ath_wiphy *aphy = hw->priv;
2028         struct ath_softc *sc = aphy->sc;
2029
2030         mutex_lock(&sc->mutex);
2031         ath9k_hw_settsf64(sc->sc_ah, tsf);
2032         mutex_unlock(&sc->mutex);
2033 }
2034
2035 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2036 {
2037         struct ath_wiphy *aphy = hw->priv;
2038         struct ath_softc *sc = aphy->sc;
2039
2040         mutex_lock(&sc->mutex);
2041
2042         ath9k_ps_wakeup(sc);
2043         ath9k_hw_reset_tsf(sc->sc_ah);
2044         ath9k_ps_restore(sc);
2045
2046         mutex_unlock(&sc->mutex);
2047 }
2048
2049 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2050                               struct ieee80211_vif *vif,
2051                               enum ieee80211_ampdu_mlme_action action,
2052                               struct ieee80211_sta *sta,
2053                               u16 tid, u16 *ssn)
2054 {
2055         struct ath_wiphy *aphy = hw->priv;
2056         struct ath_softc *sc = aphy->sc;
2057         int ret = 0;
2058
2059         local_bh_disable();
2060
2061         switch (action) {
2062         case IEEE80211_AMPDU_RX_START:
2063                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2064                         ret = -ENOTSUPP;
2065                 break;
2066         case IEEE80211_AMPDU_RX_STOP:
2067                 break;
2068         case IEEE80211_AMPDU_TX_START:
2069                 ath9k_ps_wakeup(sc);
2070                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2071                 if (!ret)
2072                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2073                 ath9k_ps_restore(sc);
2074                 break;
2075         case IEEE80211_AMPDU_TX_STOP:
2076                 ath9k_ps_wakeup(sc);
2077                 ath_tx_aggr_stop(sc, sta, tid);
2078                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2079                 ath9k_ps_restore(sc);
2080                 break;
2081         case IEEE80211_AMPDU_TX_OPERATIONAL:
2082                 ath9k_ps_wakeup(sc);
2083                 ath_tx_aggr_resume(sc, sta, tid);
2084                 ath9k_ps_restore(sc);
2085                 break;
2086         default:
2087                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2088                           "Unknown AMPDU action\n");
2089         }
2090
2091         local_bh_enable();
2092
2093         return ret;
2094 }
2095
2096 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2097                              struct survey_info *survey)
2098 {
2099         struct ath_wiphy *aphy = hw->priv;
2100         struct ath_softc *sc = aphy->sc;
2101         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2102         struct ieee80211_supported_band *sband;
2103         struct ieee80211_channel *chan;
2104         unsigned long flags;
2105         int pos;
2106
2107         spin_lock_irqsave(&common->cc_lock, flags);
2108         if (idx == 0)
2109                 ath_update_survey_stats(sc);
2110
2111         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2112         if (sband && idx >= sband->n_channels) {
2113                 idx -= sband->n_channels;
2114                 sband = NULL;
2115         }
2116
2117         if (!sband)
2118                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2119
2120         if (!sband || idx >= sband->n_channels) {
2121                 spin_unlock_irqrestore(&common->cc_lock, flags);
2122                 return -ENOENT;
2123         }
2124
2125         chan = &sband->channels[idx];
2126         pos = chan->hw_value;
2127         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2128         survey->channel = chan;
2129         spin_unlock_irqrestore(&common->cc_lock, flags);
2130
2131         return 0;
2132 }
2133
2134 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2135 {
2136         struct ath_wiphy *aphy = hw->priv;
2137         struct ath_softc *sc = aphy->sc;
2138
2139         mutex_lock(&sc->mutex);
2140         if (ath9k_wiphy_scanning(sc)) {
2141                 /*
2142                  * There is a race here in mac80211 but fixing it requires
2143                  * we revisit how we handle the scan complete callback.
2144                  * After mac80211 fixes we will not have configured hardware
2145                  * to the home channel nor would we have configured the RX
2146                  * filter yet.
2147                  */
2148                 mutex_unlock(&sc->mutex);
2149                 return;
2150         }
2151
2152         aphy->state = ATH_WIPHY_SCAN;
2153         ath9k_wiphy_pause_all_forced(sc, aphy);
2154         mutex_unlock(&sc->mutex);
2155 }
2156
2157 /*
2158  * XXX: this requires a revisit after the driver
2159  * scan_complete gets moved to another place/removed in mac80211.
2160  */
2161 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2162 {
2163         struct ath_wiphy *aphy = hw->priv;
2164         struct ath_softc *sc = aphy->sc;
2165
2166         mutex_lock(&sc->mutex);
2167         aphy->state = ATH_WIPHY_ACTIVE;
2168         mutex_unlock(&sc->mutex);
2169 }
2170
2171 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2172 {
2173         struct ath_wiphy *aphy = hw->priv;
2174         struct ath_softc *sc = aphy->sc;
2175         struct ath_hw *ah = sc->sc_ah;
2176
2177         mutex_lock(&sc->mutex);
2178         ah->coverage_class = coverage_class;
2179         ath9k_hw_init_global_settings(ah);
2180         mutex_unlock(&sc->mutex);
2181 }
2182
2183 struct ieee80211_ops ath9k_ops = {
2184         .tx                 = ath9k_tx,
2185         .start              = ath9k_start,
2186         .stop               = ath9k_stop,
2187         .add_interface      = ath9k_add_interface,
2188         .remove_interface   = ath9k_remove_interface,
2189         .config             = ath9k_config,
2190         .configure_filter   = ath9k_configure_filter,
2191         .sta_add            = ath9k_sta_add,
2192         .sta_remove         = ath9k_sta_remove,
2193         .conf_tx            = ath9k_conf_tx,
2194         .bss_info_changed   = ath9k_bss_info_changed,
2195         .set_key            = ath9k_set_key,
2196         .get_tsf            = ath9k_get_tsf,
2197         .set_tsf            = ath9k_set_tsf,
2198         .reset_tsf          = ath9k_reset_tsf,
2199         .ampdu_action       = ath9k_ampdu_action,
2200         .get_survey         = ath9k_get_survey,
2201         .sw_scan_start      = ath9k_sw_scan_start,
2202         .sw_scan_complete   = ath9k_sw_scan_complete,
2203         .rfkill_poll        = ath9k_rfkill_poll_state,
2204         .set_coverage_class = ath9k_set_coverage_class,
2205 };