2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
97 spin_lock_irqsave(&sc->sc_pm_lock, flags);
98 if (++sc->ps_usecount != 1)
101 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104 * While the hardware is asleep, the cycle counters contain no
105 * useful data. Better clear them now so that they don't mess up
106 * survey data results.
108 spin_lock(&common->cc_lock);
109 ath_hw_cycle_counters_update(common);
110 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
111 spin_unlock(&common->cc_lock);
114 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
117 void ath9k_ps_restore(struct ath_softc *sc)
119 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
126 spin_lock(&common->cc_lock);
127 ath_hw_cycle_counters_update(common);
128 spin_unlock(&common->cc_lock);
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
132 else if (sc->ps_enabled &&
133 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
135 PS_WAIT_FOR_PSPOLL_DATA |
136 PS_WAIT_FOR_TX_ACK)))
137 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 static void ath_start_ani(struct ath_common *common)
145 struct ath_hw *ah = common->ah;
146 unsigned long timestamp = jiffies_to_msecs(jiffies);
147 struct ath_softc *sc = (struct ath_softc *) common->priv;
149 if (!(sc->sc_flags & SC_OP_ANI_RUN))
152 if (sc->sc_flags & SC_OP_OFFCHANNEL)
155 common->ani.longcal_timer = timestamp;
156 common->ani.shortcal_timer = timestamp;
157 common->ani.checkani_timer = timestamp;
159 mod_timer(&common->ani.timer,
161 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
166 struct ath_hw *ah = sc->sc_ah;
167 struct ath9k_channel *chan = &ah->channels[channel];
168 struct survey_info *survey = &sc->survey[channel];
170 if (chan->noisefloor) {
171 survey->filled |= SURVEY_INFO_NOISE_DBM;
172 survey->noise = chan->noisefloor;
176 static void ath_update_survey_stats(struct ath_softc *sc)
178 struct ath_hw *ah = sc->sc_ah;
179 struct ath_common *common = ath9k_hw_common(ah);
180 int pos = ah->curchan - &ah->channels[0];
181 struct survey_info *survey = &sc->survey[pos];
182 struct ath_cycle_counters *cc = &common->cc_survey;
183 unsigned int div = common->clockrate * 1000;
185 if (ah->power_mode == ATH9K_PM_AWAKE)
186 ath_hw_cycle_counters_update(common);
188 if (cc->cycles > 0) {
189 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
190 SURVEY_INFO_CHANNEL_TIME_BUSY |
191 SURVEY_INFO_CHANNEL_TIME_RX |
192 SURVEY_INFO_CHANNEL_TIME_TX;
193 survey->channel_time += cc->cycles / div;
194 survey->channel_time_busy += cc->rx_busy / div;
195 survey->channel_time_rx += cc->rx_frame / div;
196 survey->channel_time_tx += cc->tx_frame / div;
198 memset(cc, 0, sizeof(*cc));
200 ath_update_survey_nf(sc, pos);
204 * Set/change channels. If the channel is really being changed, it's done
205 * by reseting the chip. To accomplish this we must first cleanup any pending
206 * DMA, then restart stuff.
208 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
209 struct ath9k_channel *hchan)
211 struct ath_wiphy *aphy = hw->priv;
212 struct ath_hw *ah = sc->sc_ah;
213 struct ath_common *common = ath9k_hw_common(ah);
214 struct ieee80211_conf *conf = &common->hw->conf;
215 bool fastcc = true, stopped;
216 struct ieee80211_channel *channel = hw->conf.channel;
217 struct ath9k_hw_cal_data *caldata = NULL;
220 if (sc->sc_flags & SC_OP_INVALID)
223 del_timer_sync(&common->ani.timer);
224 cancel_work_sync(&sc->paprd_work);
225 cancel_work_sync(&sc->hw_check_work);
226 cancel_delayed_work_sync(&sc->tx_complete_work);
231 * This is only performed if the channel settings have
234 * To switch channels clear any pending DMA operations;
235 * wait long enough for the RX fifo to drain, reset the
236 * hardware at the new frequency, and then re-enable
237 * the relevant bits of the h/w.
239 ath9k_hw_set_interrupts(ah, 0);
240 ath_drain_all_txq(sc, false);
241 stopped = ath_stoprecv(sc);
243 /* XXX: do not flush receive queue here. We don't want
244 * to flush data frames already in queue because of
245 * changing channel. */
247 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
250 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
251 caldata = &aphy->caldata;
253 ath_print(common, ATH_DBG_CONFIG,
254 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
255 sc->sc_ah->curchan->channel,
256 channel->center_freq, conf_is_ht40(conf),
259 spin_lock_bh(&sc->sc_resetlock);
261 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
263 ath_print(common, ATH_DBG_FATAL,
264 "Unable to reset channel (%u MHz), "
266 channel->center_freq, r);
267 spin_unlock_bh(&sc->sc_resetlock);
270 spin_unlock_bh(&sc->sc_resetlock);
272 if (ath_startrecv(sc) != 0) {
273 ath_print(common, ATH_DBG_FATAL,
274 "Unable to restart recv logic\n");
279 ath_update_txpow(sc);
280 ath9k_hw_set_interrupts(ah, ah->imask);
282 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
283 ath_beacon_config(sc, NULL);
284 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
285 ath_start_ani(common);
289 ath9k_ps_restore(sc);
293 static void ath_paprd_activate(struct ath_softc *sc)
295 struct ath_hw *ah = sc->sc_ah;
296 struct ath9k_hw_cal_data *caldata = ah->caldata;
297 struct ath_common *common = ath9k_hw_common(ah);
300 if (!caldata || !caldata->paprd_done)
304 ar9003_paprd_enable(ah, false);
305 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
306 if (!(common->tx_chainmask & BIT(chain)))
309 ar9003_paprd_populate_single_table(ah, caldata, chain);
312 ar9003_paprd_enable(ah, true);
313 ath9k_ps_restore(sc);
316 void ath_paprd_calibrate(struct work_struct *work)
318 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
319 struct ieee80211_hw *hw = sc->hw;
320 struct ath_hw *ah = sc->sc_ah;
321 struct ieee80211_hdr *hdr;
322 struct sk_buff *skb = NULL;
323 struct ieee80211_tx_info *tx_info;
324 int band = hw->conf.channel->band;
325 struct ieee80211_supported_band *sband = &sc->sbands[band];
326 struct ath_tx_control txctl;
327 struct ath9k_hw_cal_data *caldata = ah->caldata;
328 struct ath_common *common = ath9k_hw_common(ah);
339 skb = alloc_skb(len, GFP_KERNEL);
343 tx_info = IEEE80211_SKB_CB(skb);
346 memset(skb->data, 0, len);
347 hdr = (struct ieee80211_hdr *)skb->data;
348 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
349 hdr->frame_control = cpu_to_le16(ftype);
350 hdr->duration_id = cpu_to_le16(10);
351 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
352 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
353 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
355 memset(&txctl, 0, sizeof(txctl));
356 qnum = sc->tx.hwq_map[WME_AC_BE];
357 txctl.txq = &sc->tx.txq[qnum];
360 ar9003_paprd_init_table(ah);
361 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
362 if (!(common->tx_chainmask & BIT(chain)))
366 memset(tx_info, 0, sizeof(*tx_info));
367 tx_info->band = band;
369 for (i = 0; i < 4; i++) {
370 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
371 tx_info->control.rates[i].count = 6;
374 init_completion(&sc->paprd_complete);
375 ar9003_paprd_setup_gain_table(ah, chain);
376 txctl.paprd = BIT(chain);
377 if (ath_tx_start(hw, skb, &txctl) != 0)
380 time_left = wait_for_completion_timeout(&sc->paprd_complete,
381 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
383 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
384 "Timeout waiting for paprd training on "
390 if (!ar9003_paprd_is_done(ah))
393 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
401 caldata->paprd_done = true;
402 ath_paprd_activate(sc);
406 ath9k_ps_restore(sc);
410 * This routine performs the periodic noise floor calibration function
411 * that is used to adjust and optimize the chip performance. This
412 * takes environmental changes (location, temperature) into account.
413 * When the task is complete, it reschedules itself depending on the
414 * appropriate interval that was calculated.
416 void ath_ani_calibrate(unsigned long data)
418 struct ath_softc *sc = (struct ath_softc *)data;
419 struct ath_hw *ah = sc->sc_ah;
420 struct ath_common *common = ath9k_hw_common(ah);
421 bool longcal = false;
422 bool shortcal = false;
423 bool aniflag = false;
424 unsigned int timestamp = jiffies_to_msecs(jiffies);
425 u32 cal_interval, short_cal_interval, long_cal_interval;
428 if (ah->caldata && ah->caldata->nfcal_interference)
429 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
431 long_cal_interval = ATH_LONG_CALINTERVAL;
433 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
434 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
436 /* Only calibrate if awake */
437 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
442 /* Long calibration runs independently of short calibration. */
443 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
445 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
446 common->ani.longcal_timer = timestamp;
449 /* Short calibration applies only while caldone is false */
450 if (!common->ani.caldone) {
451 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
453 ath_print(common, ATH_DBG_ANI,
454 "shortcal @%lu\n", jiffies);
455 common->ani.shortcal_timer = timestamp;
456 common->ani.resetcal_timer = timestamp;
459 if ((timestamp - common->ani.resetcal_timer) >=
460 ATH_RESTART_CALINTERVAL) {
461 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
462 if (common->ani.caldone)
463 common->ani.resetcal_timer = timestamp;
467 /* Verify whether we must check ANI */
468 if ((timestamp - common->ani.checkani_timer) >=
469 ah->config.ani_poll_interval) {
471 common->ani.checkani_timer = timestamp;
474 /* Skip all processing if there's nothing to do. */
475 if (longcal || shortcal || aniflag) {
476 /* Call ANI routine if necessary */
478 spin_lock_irqsave(&common->cc_lock, flags);
479 ath9k_hw_ani_monitor(ah, ah->curchan);
480 ath_update_survey_stats(sc);
481 spin_unlock_irqrestore(&common->cc_lock, flags);
484 /* Perform calibration if necessary */
485 if (longcal || shortcal) {
486 common->ani.caldone =
487 ath9k_hw_calibrate(ah,
489 common->rx_chainmask,
494 ath9k_ps_restore(sc);
498 * Set timer interval based on previous results.
499 * The interval must be the shortest necessary to satisfy ANI,
500 * short calibration and long calibration.
502 cal_interval = ATH_LONG_CALINTERVAL;
503 if (sc->sc_ah->config.enable_ani)
504 cal_interval = min(cal_interval,
505 (u32)ah->config.ani_poll_interval);
506 if (!common->ani.caldone)
507 cal_interval = min(cal_interval, (u32)short_cal_interval);
509 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
510 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
511 if (!ah->caldata->paprd_done)
512 ieee80211_queue_work(sc->hw, &sc->paprd_work);
514 ath_paprd_activate(sc);
519 * Update tx/rx chainmask. For legacy association,
520 * hard code chainmask to 1x1, for 11n association, use
521 * the chainmask configuration, for bt coexistence, use
522 * the chainmask configuration even in legacy mode.
524 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
526 struct ath_hw *ah = sc->sc_ah;
527 struct ath_common *common = ath9k_hw_common(ah);
529 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
530 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
531 common->tx_chainmask = ah->caps.tx_chainmask;
532 common->rx_chainmask = ah->caps.rx_chainmask;
534 common->tx_chainmask = 1;
535 common->rx_chainmask = 1;
538 ath_print(common, ATH_DBG_CONFIG,
539 "tx chmask: %d, rx chmask: %d\n",
540 common->tx_chainmask,
541 common->rx_chainmask);
544 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
548 an = (struct ath_node *)sta->drv_priv;
550 if (sc->sc_flags & SC_OP_TXAGGR) {
551 ath_tx_node_init(sc, an);
552 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
553 sta->ht_cap.ampdu_factor);
554 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
555 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
559 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
561 struct ath_node *an = (struct ath_node *)sta->drv_priv;
563 if (sc->sc_flags & SC_OP_TXAGGR)
564 ath_tx_node_cleanup(sc, an);
567 void ath_hw_check(struct work_struct *work)
569 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
574 for (i = 0; i < 3; i++) {
575 if (ath9k_hw_check_alive(sc->sc_ah))
580 ath_reset(sc, false);
583 ath9k_ps_restore(sc);
586 void ath9k_tasklet(unsigned long data)
588 struct ath_softc *sc = (struct ath_softc *)data;
589 struct ath_hw *ah = sc->sc_ah;
590 struct ath_common *common = ath9k_hw_common(ah);
592 u32 status = sc->intrstatus;
597 if (status & ATH9K_INT_FATAL) {
598 ath_reset(sc, false);
599 ath9k_ps_restore(sc);
603 if (!ath9k_hw_check_alive(ah))
604 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
606 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
607 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
610 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
612 if (status & rxmask) {
613 spin_lock_bh(&sc->rx.rxflushlock);
615 /* Check for high priority Rx first */
616 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
617 (status & ATH9K_INT_RXHP))
618 ath_rx_tasklet(sc, 0, true);
620 ath_rx_tasklet(sc, 0, false);
621 spin_unlock_bh(&sc->rx.rxflushlock);
624 if (status & ATH9K_INT_TX) {
625 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
626 ath_tx_edma_tasklet(sc);
631 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
633 * TSF sync does not look correct; remain awake to sync with
636 ath_print(common, ATH_DBG_PS,
637 "TSFOOR - Sync with next Beacon\n");
638 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
641 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
642 if (status & ATH9K_INT_GENTIMER)
643 ath_gen_timer_isr(sc->sc_ah);
645 /* re-enable hardware interrupt */
646 ath9k_hw_set_interrupts(ah, ah->imask);
647 ath9k_ps_restore(sc);
650 irqreturn_t ath_isr(int irq, void *dev)
652 #define SCHED_INTR ( \
665 struct ath_softc *sc = dev;
666 struct ath_hw *ah = sc->sc_ah;
667 struct ath_common *common = ath9k_hw_common(ah);
668 enum ath9k_int status;
672 * The hardware is not ready/present, don't
673 * touch anything. Note this can happen early
674 * on if the IRQ is shared.
676 if (sc->sc_flags & SC_OP_INVALID)
680 /* shared irq, not for us */
682 if (!ath9k_hw_intrpend(ah))
686 * Figure out the reason(s) for the interrupt. Note
687 * that the hal returns a pseudo-ISR that may include
688 * bits we haven't explicitly enabled so we mask the
689 * value to insure we only process bits we requested.
691 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
692 status &= ah->imask; /* discard unasked-for bits */
695 * If there are no status bits set, then this interrupt was not
696 * for me (should have been caught above).
701 /* Cache the status */
702 sc->intrstatus = status;
704 if (status & SCHED_INTR)
708 * If a FATAL or RXORN interrupt is received, we have to reset the
711 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
712 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
715 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
716 (status & ATH9K_INT_BB_WATCHDOG)) {
718 spin_lock(&common->cc_lock);
719 ath_hw_cycle_counters_update(common);
720 ar9003_hw_bb_watchdog_dbg_info(ah);
721 spin_unlock(&common->cc_lock);
726 if (status & ATH9K_INT_SWBA)
727 tasklet_schedule(&sc->bcon_tasklet);
729 if (status & ATH9K_INT_TXURN)
730 ath9k_hw_updatetxtriglevel(ah, true);
732 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
733 if (status & ATH9K_INT_RXEOL) {
734 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
735 ath9k_hw_set_interrupts(ah, ah->imask);
739 if (status & ATH9K_INT_MIB) {
741 * Disable interrupts until we service the MIB
742 * interrupt; otherwise it will continue to
745 ath9k_hw_set_interrupts(ah, 0);
747 * Let the hal handle the event. We assume
748 * it will clear whatever condition caused
751 spin_lock(&common->cc_lock);
752 ath9k_hw_proc_mib_event(ah);
753 spin_unlock(&common->cc_lock);
754 ath9k_hw_set_interrupts(ah, ah->imask);
757 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
758 if (status & ATH9K_INT_TIM_TIMER) {
759 /* Clear RxAbort bit so that we can
761 ath9k_setpower(sc, ATH9K_PM_AWAKE);
762 ath9k_hw_setrxabort(sc->sc_ah, 0);
763 sc->ps_flags |= PS_WAIT_FOR_BEACON;
768 ath_debug_stat_interrupt(sc, status);
771 /* turn off every interrupt except SWBA */
772 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
773 tasklet_schedule(&sc->intr_tq);
781 static u32 ath_get_extchanmode(struct ath_softc *sc,
782 struct ieee80211_channel *chan,
783 enum nl80211_channel_type channel_type)
787 switch (chan->band) {
788 case IEEE80211_BAND_2GHZ:
789 switch(channel_type) {
790 case NL80211_CHAN_NO_HT:
791 case NL80211_CHAN_HT20:
792 chanmode = CHANNEL_G_HT20;
794 case NL80211_CHAN_HT40PLUS:
795 chanmode = CHANNEL_G_HT40PLUS;
797 case NL80211_CHAN_HT40MINUS:
798 chanmode = CHANNEL_G_HT40MINUS;
802 case IEEE80211_BAND_5GHZ:
803 switch(channel_type) {
804 case NL80211_CHAN_NO_HT:
805 case NL80211_CHAN_HT20:
806 chanmode = CHANNEL_A_HT20;
808 case NL80211_CHAN_HT40PLUS:
809 chanmode = CHANNEL_A_HT40PLUS;
811 case NL80211_CHAN_HT40MINUS:
812 chanmode = CHANNEL_A_HT40MINUS;
823 static void ath9k_bss_assoc_info(struct ath_softc *sc,
824 struct ieee80211_vif *vif,
825 struct ieee80211_bss_conf *bss_conf)
827 struct ath_hw *ah = sc->sc_ah;
828 struct ath_common *common = ath9k_hw_common(ah);
830 if (bss_conf->assoc) {
831 ath_print(common, ATH_DBG_CONFIG,
832 "Bss Info ASSOC %d, bssid: %pM\n",
833 bss_conf->aid, common->curbssid);
835 /* New association, store aid */
836 common->curaid = bss_conf->aid;
837 ath9k_hw_write_associd(ah);
840 * Request a re-configuration of Beacon related timers
841 * on the receipt of the first Beacon frame (i.e.,
842 * after time sync with the AP).
844 sc->ps_flags |= PS_BEACON_SYNC;
846 /* Configure the beacon */
847 ath_beacon_config(sc, vif);
849 /* Reset rssi stats */
850 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
852 sc->sc_flags |= SC_OP_ANI_RUN;
853 ath_start_ani(common);
855 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
858 sc->sc_flags &= ~SC_OP_ANI_RUN;
859 del_timer_sync(&common->ani.timer);
863 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
865 struct ath_hw *ah = sc->sc_ah;
866 struct ath_common *common = ath9k_hw_common(ah);
867 struct ieee80211_channel *channel = hw->conf.channel;
871 ath9k_hw_configpcipowersave(ah, 0, 0);
874 ah->curchan = ath_get_curchannel(sc, sc->hw);
876 spin_lock_bh(&sc->sc_resetlock);
877 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
879 ath_print(common, ATH_DBG_FATAL,
880 "Unable to reset channel (%u MHz), "
882 channel->center_freq, r);
884 spin_unlock_bh(&sc->sc_resetlock);
886 ath_update_txpow(sc);
887 if (ath_startrecv(sc) != 0) {
888 ath_print(common, ATH_DBG_FATAL,
889 "Unable to restart recv logic\n");
893 if (sc->sc_flags & SC_OP_BEACONS)
894 ath_beacon_config(sc, NULL); /* restart beacons */
896 /* Re-Enable interrupts */
897 ath9k_hw_set_interrupts(ah, ah->imask);
900 ath9k_hw_cfg_output(ah, ah->led_pin,
901 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
902 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
904 ieee80211_wake_queues(hw);
905 ath9k_ps_restore(sc);
908 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
910 struct ath_hw *ah = sc->sc_ah;
911 struct ieee80211_channel *channel = hw->conf.channel;
915 ieee80211_stop_queues(hw);
918 * Keep the LED on when the radio is disabled
919 * during idle unassociated state.
922 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
923 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
926 /* Disable interrupts */
927 ath9k_hw_set_interrupts(ah, 0);
929 ath_drain_all_txq(sc, false); /* clear pending tx frames */
930 ath_stoprecv(sc); /* turn off frame recv */
931 ath_flushrecv(sc); /* flush recv queue */
934 ah->curchan = ath_get_curchannel(sc, hw);
936 spin_lock_bh(&sc->sc_resetlock);
937 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
939 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
940 "Unable to reset channel (%u MHz), "
942 channel->center_freq, r);
944 spin_unlock_bh(&sc->sc_resetlock);
946 ath9k_hw_phy_disable(ah);
947 ath9k_hw_configpcipowersave(ah, 1, 1);
948 ath9k_ps_restore(sc);
949 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
952 int ath_reset(struct ath_softc *sc, bool retry_tx)
954 struct ath_hw *ah = sc->sc_ah;
955 struct ath_common *common = ath9k_hw_common(ah);
956 struct ieee80211_hw *hw = sc->hw;
960 del_timer_sync(&common->ani.timer);
962 ieee80211_stop_queues(hw);
964 ath9k_hw_set_interrupts(ah, 0);
965 ath_drain_all_txq(sc, retry_tx);
969 spin_lock_bh(&sc->sc_resetlock);
970 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
972 ath_print(common, ATH_DBG_FATAL,
973 "Unable to reset hardware; reset status %d\n", r);
974 spin_unlock_bh(&sc->sc_resetlock);
976 if (ath_startrecv(sc) != 0)
977 ath_print(common, ATH_DBG_FATAL,
978 "Unable to start recv logic\n");
981 * We may be doing a reset in response to a request
982 * that changes the channel so update any state that
983 * might change as a result.
985 ath_update_txpow(sc);
987 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
988 ath_beacon_config(sc, NULL); /* restart beacons */
990 ath9k_hw_set_interrupts(ah, ah->imask);
994 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
995 if (ATH_TXQ_SETUP(sc, i)) {
996 spin_lock_bh(&sc->tx.txq[i].axq_lock);
997 ath_txq_schedule(sc, &sc->tx.txq[i]);
998 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1003 ieee80211_wake_queues(hw);
1006 ath_start_ani(common);
1011 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1017 qnum = sc->tx.hwq_map[WME_AC_VO];
1020 qnum = sc->tx.hwq_map[WME_AC_VI];
1023 qnum = sc->tx.hwq_map[WME_AC_BE];
1026 qnum = sc->tx.hwq_map[WME_AC_BK];
1029 qnum = sc->tx.hwq_map[WME_AC_BE];
1036 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1061 /* XXX: Remove me once we don't depend on ath9k_channel for all
1062 * this redundant data */
1063 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1064 struct ath9k_channel *ichan)
1066 struct ieee80211_channel *chan = hw->conf.channel;
1067 struct ieee80211_conf *conf = &hw->conf;
1069 ichan->channel = chan->center_freq;
1072 if (chan->band == IEEE80211_BAND_2GHZ) {
1073 ichan->chanmode = CHANNEL_G;
1074 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1076 ichan->chanmode = CHANNEL_A;
1077 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1080 if (conf_is_ht(conf))
1081 ichan->chanmode = ath_get_extchanmode(sc, chan,
1082 conf->channel_type);
1085 /**********************/
1086 /* mac80211 callbacks */
1087 /**********************/
1089 static int ath9k_start(struct ieee80211_hw *hw)
1091 struct ath_wiphy *aphy = hw->priv;
1092 struct ath_softc *sc = aphy->sc;
1093 struct ath_hw *ah = sc->sc_ah;
1094 struct ath_common *common = ath9k_hw_common(ah);
1095 struct ieee80211_channel *curchan = hw->conf.channel;
1096 struct ath9k_channel *init_channel;
1099 ath_print(common, ATH_DBG_CONFIG,
1100 "Starting driver with initial channel: %d MHz\n",
1101 curchan->center_freq);
1103 mutex_lock(&sc->mutex);
1105 if (ath9k_wiphy_started(sc)) {
1106 if (sc->chan_idx == curchan->hw_value) {
1108 * Already on the operational channel, the new wiphy
1109 * can be marked active.
1111 aphy->state = ATH_WIPHY_ACTIVE;
1112 ieee80211_wake_queues(hw);
1115 * Another wiphy is on another channel, start the new
1116 * wiphy in paused state.
1118 aphy->state = ATH_WIPHY_PAUSED;
1119 ieee80211_stop_queues(hw);
1121 mutex_unlock(&sc->mutex);
1124 aphy->state = ATH_WIPHY_ACTIVE;
1126 /* setup initial channel */
1128 sc->chan_idx = curchan->hw_value;
1130 init_channel = ath_get_curchannel(sc, hw);
1132 /* Reset SERDES registers */
1133 ath9k_hw_configpcipowersave(ah, 0, 0);
1136 * The basic interface to setting the hardware in a good
1137 * state is ``reset''. On return the hardware is known to
1138 * be powered up and with interrupts disabled. This must
1139 * be followed by initialization of the appropriate bits
1140 * and then setup of the interrupt mask.
1142 spin_lock_bh(&sc->sc_resetlock);
1143 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1145 ath_print(common, ATH_DBG_FATAL,
1146 "Unable to reset hardware; reset status %d "
1147 "(freq %u MHz)\n", r,
1148 curchan->center_freq);
1149 spin_unlock_bh(&sc->sc_resetlock);
1152 spin_unlock_bh(&sc->sc_resetlock);
1155 * This is needed only to setup initial state
1156 * but it's best done after a reset.
1158 ath_update_txpow(sc);
1161 * Setup the hardware after reset:
1162 * The receive engine is set going.
1163 * Frame transmit is handled entirely
1164 * in the frame output path; there's nothing to do
1165 * here except setup the interrupt mask.
1167 if (ath_startrecv(sc) != 0) {
1168 ath_print(common, ATH_DBG_FATAL,
1169 "Unable to start recv logic\n");
1174 /* Setup our intr mask. */
1175 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1176 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1179 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1180 ah->imask |= ATH9K_INT_RXHP |
1182 ATH9K_INT_BB_WATCHDOG;
1184 ah->imask |= ATH9K_INT_RX;
1186 ah->imask |= ATH9K_INT_GTT;
1188 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1189 ah->imask |= ATH9K_INT_CST;
1191 sc->sc_flags &= ~SC_OP_INVALID;
1193 /* Disable BMISS interrupt when we're not associated */
1194 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1195 ath9k_hw_set_interrupts(ah, ah->imask);
1197 ieee80211_wake_queues(hw);
1199 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1201 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1202 !ah->btcoex_hw.enabled) {
1203 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1204 AR_STOMP_LOW_WLAN_WGHT);
1205 ath9k_hw_btcoex_enable(ah);
1207 if (common->bus_ops->bt_coex_prep)
1208 common->bus_ops->bt_coex_prep(common);
1209 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1210 ath9k_btcoex_timer_resume(sc);
1214 mutex_unlock(&sc->mutex);
1219 static int ath9k_tx(struct ieee80211_hw *hw,
1220 struct sk_buff *skb)
1222 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1223 struct ath_wiphy *aphy = hw->priv;
1224 struct ath_softc *sc = aphy->sc;
1225 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1226 struct ath_tx_control txctl;
1227 int padpos, padsize;
1228 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1231 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1232 ath_print(common, ATH_DBG_XMIT,
1233 "ath9k: %s: TX in unexpected wiphy state "
1234 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1238 if (sc->ps_enabled) {
1240 * mac80211 does not set PM field for normal data frames, so we
1241 * need to update that based on the current PS mode.
1243 if (ieee80211_is_data(hdr->frame_control) &&
1244 !ieee80211_is_nullfunc(hdr->frame_control) &&
1245 !ieee80211_has_pm(hdr->frame_control)) {
1246 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1247 "while in PS mode\n");
1248 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1252 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1254 * We are using PS-Poll and mac80211 can request TX while in
1255 * power save mode. Need to wake up hardware for the TX to be
1256 * completed and if needed, also for RX of buffered frames.
1258 ath9k_ps_wakeup(sc);
1259 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1260 ath9k_hw_setrxabort(sc->sc_ah, 0);
1261 if (ieee80211_is_pspoll(hdr->frame_control)) {
1262 ath_print(common, ATH_DBG_PS,
1263 "Sending PS-Poll to pick a buffered frame\n");
1264 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1266 ath_print(common, ATH_DBG_PS,
1267 "Wake up to complete TX\n");
1268 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1271 * The actual restore operation will happen only after
1272 * the sc_flags bit is cleared. We are just dropping
1273 * the ps_usecount here.
1275 ath9k_ps_restore(sc);
1278 memset(&txctl, 0, sizeof(struct ath_tx_control));
1281 * As a temporary workaround, assign seq# here; this will likely need
1282 * to be cleaned up to work better with Beacon transmission and virtual
1285 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1286 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1287 sc->tx.seq_no += 0x10;
1288 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1289 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1292 /* Add the padding after the header if this is not already done */
1293 padpos = ath9k_cmn_padpos(hdr->frame_control);
1294 padsize = padpos & 3;
1295 if (padsize && skb->len>padpos) {
1296 if (skb_headroom(skb) < padsize)
1298 skb_push(skb, padsize);
1299 memmove(skb->data, skb->data + padsize, padpos);
1302 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1303 txctl.txq = &sc->tx.txq[qnum];
1305 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1307 if (ath_tx_start(hw, skb, &txctl) != 0) {
1308 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1314 dev_kfree_skb_any(skb);
1318 static void ath9k_stop(struct ieee80211_hw *hw)
1320 struct ath_wiphy *aphy = hw->priv;
1321 struct ath_softc *sc = aphy->sc;
1322 struct ath_hw *ah = sc->sc_ah;
1323 struct ath_common *common = ath9k_hw_common(ah);
1326 mutex_lock(&sc->mutex);
1328 aphy->state = ATH_WIPHY_INACTIVE;
1331 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1333 cancel_delayed_work_sync(&sc->tx_complete_work);
1334 cancel_work_sync(&sc->paprd_work);
1335 cancel_work_sync(&sc->hw_check_work);
1337 for (i = 0; i < sc->num_sec_wiphy; i++) {
1338 if (sc->sec_wiphy[i])
1342 if (i == sc->num_sec_wiphy) {
1343 cancel_delayed_work_sync(&sc->wiphy_work);
1344 cancel_work_sync(&sc->chan_work);
1347 if (sc->sc_flags & SC_OP_INVALID) {
1348 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1349 mutex_unlock(&sc->mutex);
1353 if (ath9k_wiphy_started(sc)) {
1354 mutex_unlock(&sc->mutex);
1355 return; /* another wiphy still in use */
1358 /* Ensure HW is awake when we try to shut it down. */
1359 ath9k_ps_wakeup(sc);
1361 if (ah->btcoex_hw.enabled) {
1362 ath9k_hw_btcoex_disable(ah);
1363 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1364 ath9k_btcoex_timer_pause(sc);
1367 /* make sure h/w will not generate any interrupt
1368 * before setting the invalid flag. */
1369 ath9k_hw_set_interrupts(ah, 0);
1371 if (!(sc->sc_flags & SC_OP_INVALID)) {
1372 ath_drain_all_txq(sc, false);
1374 ath9k_hw_phy_disable(ah);
1376 sc->rx.rxlink = NULL;
1378 /* disable HAL and put h/w to sleep */
1379 ath9k_hw_disable(ah);
1380 ath9k_hw_configpcipowersave(ah, 1, 1);
1381 ath9k_ps_restore(sc);
1383 /* Finally, put the chip in FULL SLEEP mode */
1384 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1386 sc->sc_flags |= SC_OP_INVALID;
1388 mutex_unlock(&sc->mutex);
1390 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1393 static int ath9k_add_interface(struct ieee80211_hw *hw,
1394 struct ieee80211_vif *vif)
1396 struct ath_wiphy *aphy = hw->priv;
1397 struct ath_softc *sc = aphy->sc;
1398 struct ath_hw *ah = sc->sc_ah;
1399 struct ath_common *common = ath9k_hw_common(ah);
1400 struct ath_vif *avp = (void *)vif->drv_priv;
1401 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1404 mutex_lock(&sc->mutex);
1406 switch (vif->type) {
1407 case NL80211_IFTYPE_STATION:
1408 ic_opmode = NL80211_IFTYPE_STATION;
1410 case NL80211_IFTYPE_WDS:
1411 ic_opmode = NL80211_IFTYPE_WDS;
1413 case NL80211_IFTYPE_ADHOC:
1414 case NL80211_IFTYPE_AP:
1415 case NL80211_IFTYPE_MESH_POINT:
1416 if (sc->nbcnvifs >= ATH_BCBUF) {
1420 ic_opmode = vif->type;
1423 ath_print(common, ATH_DBG_FATAL,
1424 "Interface type %d not yet supported\n", vif->type);
1429 ath_print(common, ATH_DBG_CONFIG,
1430 "Attach a VIF of type: %d\n", ic_opmode);
1432 /* Set the VIF opmode */
1433 avp->av_opmode = ic_opmode;
1438 ath9k_set_bssid_mask(hw, vif);
1441 goto out; /* skip global settings for secondary vif */
1443 if (ic_opmode == NL80211_IFTYPE_AP) {
1444 ath9k_hw_set_tsfadjust(ah, 1);
1445 sc->sc_flags |= SC_OP_TSF_RESET;
1448 /* Set the device opmode */
1449 ah->opmode = ic_opmode;
1452 * Enable MIB interrupts when there are hardware phy counters.
1453 * Note we only do this (at the moment) for station mode.
1455 if ((vif->type == NL80211_IFTYPE_STATION) ||
1456 (vif->type == NL80211_IFTYPE_ADHOC) ||
1457 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1458 if (ah->config.enable_ani)
1459 ah->imask |= ATH9K_INT_MIB;
1460 ah->imask |= ATH9K_INT_TSFOOR;
1463 ath9k_hw_set_interrupts(ah, ah->imask);
1465 if (vif->type == NL80211_IFTYPE_AP ||
1466 vif->type == NL80211_IFTYPE_ADHOC ||
1467 vif->type == NL80211_IFTYPE_MONITOR) {
1468 sc->sc_flags |= SC_OP_ANI_RUN;
1469 ath_start_ani(common);
1473 mutex_unlock(&sc->mutex);
1477 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1478 struct ieee80211_vif *vif)
1480 struct ath_wiphy *aphy = hw->priv;
1481 struct ath_softc *sc = aphy->sc;
1482 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1483 struct ath_vif *avp = (void *)vif->drv_priv;
1486 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1488 mutex_lock(&sc->mutex);
1491 sc->sc_flags &= ~SC_OP_ANI_RUN;
1492 del_timer_sync(&common->ani.timer);
1494 /* Reclaim beacon resources */
1495 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1496 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1497 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1498 ath9k_ps_wakeup(sc);
1499 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1500 ath9k_ps_restore(sc);
1503 ath_beacon_return(sc, avp);
1504 sc->sc_flags &= ~SC_OP_BEACONS;
1506 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1507 if (sc->beacon.bslot[i] == vif) {
1508 printk(KERN_DEBUG "%s: vif had allocated beacon "
1509 "slot\n", __func__);
1510 sc->beacon.bslot[i] = NULL;
1511 sc->beacon.bslot_aphy[i] = NULL;
1517 mutex_unlock(&sc->mutex);
1520 static void ath9k_enable_ps(struct ath_softc *sc)
1522 struct ath_hw *ah = sc->sc_ah;
1524 sc->ps_enabled = true;
1525 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1526 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1527 ah->imask |= ATH9K_INT_TIM_TIMER;
1528 ath9k_hw_set_interrupts(ah, ah->imask);
1530 ath9k_hw_setrxabort(ah, 1);
1534 static void ath9k_disable_ps(struct ath_softc *sc)
1536 struct ath_hw *ah = sc->sc_ah;
1538 sc->ps_enabled = false;
1539 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1540 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1541 ath9k_hw_setrxabort(ah, 0);
1542 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1544 PS_WAIT_FOR_PSPOLL_DATA |
1545 PS_WAIT_FOR_TX_ACK);
1546 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1547 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1548 ath9k_hw_set_interrupts(ah, ah->imask);
1554 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1556 struct ath_wiphy *aphy = hw->priv;
1557 struct ath_softc *sc = aphy->sc;
1558 struct ath_hw *ah = sc->sc_ah;
1559 struct ath_common *common = ath9k_hw_common(ah);
1560 struct ieee80211_conf *conf = &hw->conf;
1563 mutex_lock(&sc->mutex);
1566 * Leave this as the first check because we need to turn on the
1567 * radio if it was disabled before prior to processing the rest
1568 * of the changes. Likewise we must only disable the radio towards
1571 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1573 bool all_wiphys_idle;
1574 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1576 spin_lock_bh(&sc->wiphy_lock);
1577 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1578 ath9k_set_wiphy_idle(aphy, idle);
1580 enable_radio = (!idle && all_wiphys_idle);
1583 * After we unlock here its possible another wiphy
1584 * can be re-renabled so to account for that we will
1585 * only disable the radio toward the end of this routine
1586 * if by then all wiphys are still idle.
1588 spin_unlock_bh(&sc->wiphy_lock);
1591 sc->ps_idle = false;
1592 ath_radio_enable(sc, hw);
1593 ath_print(common, ATH_DBG_CONFIG,
1594 "not-idle: enabling radio\n");
1599 * We just prepare to enable PS. We have to wait until our AP has
1600 * ACK'd our null data frame to disable RX otherwise we'll ignore
1601 * those ACKs and end up retransmitting the same null data frames.
1602 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1604 if (changed & IEEE80211_CONF_CHANGE_PS) {
1605 unsigned long flags;
1606 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1607 if (conf->flags & IEEE80211_CONF_PS)
1608 ath9k_enable_ps(sc);
1610 ath9k_disable_ps(sc);
1611 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1614 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1615 if (conf->flags & IEEE80211_CONF_MONITOR) {
1616 ath_print(common, ATH_DBG_CONFIG,
1617 "HW opmode set to Monitor mode\n");
1618 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1622 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1623 struct ieee80211_channel *curchan = hw->conf.channel;
1624 int pos = curchan->hw_value;
1626 unsigned long flags;
1629 old_pos = ah->curchan - &ah->channels[0];
1631 aphy->chan_idx = pos;
1632 aphy->chan_is_ht = conf_is_ht(conf);
1633 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1634 sc->sc_flags |= SC_OP_OFFCHANNEL;
1636 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1638 if (aphy->state == ATH_WIPHY_SCAN ||
1639 aphy->state == ATH_WIPHY_ACTIVE)
1640 ath9k_wiphy_pause_all_forced(sc, aphy);
1643 * Do not change operational channel based on a paused
1646 goto skip_chan_change;
1649 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1650 curchan->center_freq);
1652 /* XXX: remove me eventualy */
1653 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1655 ath_update_chainmask(sc, conf_is_ht(conf));
1657 /* update survey stats for the old channel before switching */
1658 spin_lock_irqsave(&common->cc_lock, flags);
1659 ath_update_survey_stats(sc);
1660 spin_unlock_irqrestore(&common->cc_lock, flags);
1663 * If the operating channel changes, change the survey in-use flags
1665 * Reset the survey data for the new channel, unless we're switching
1666 * back to the operating channel from an off-channel operation.
1668 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1669 sc->cur_survey != &sc->survey[pos]) {
1672 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1674 sc->cur_survey = &sc->survey[pos];
1676 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1677 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1678 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1679 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1682 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1683 ath_print(common, ATH_DBG_FATAL,
1684 "Unable to set channel\n");
1685 mutex_unlock(&sc->mutex);
1690 * The most recent snapshot of channel->noisefloor for the old
1691 * channel is only available after the hardware reset. Copy it to
1692 * the survey stats now.
1695 ath_update_survey_nf(sc, old_pos);
1699 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1700 sc->config.txpowlimit = 2 * conf->power_level;
1701 ath_update_txpow(sc);
1704 spin_lock_bh(&sc->wiphy_lock);
1705 disable_radio = ath9k_all_wiphys_idle(sc);
1706 spin_unlock_bh(&sc->wiphy_lock);
1708 if (disable_radio) {
1709 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1711 ath_radio_disable(sc, hw);
1714 mutex_unlock(&sc->mutex);
1719 #define SUPPORTED_FILTERS \
1720 (FIF_PROMISC_IN_BSS | \
1725 FIF_BCN_PRBRESP_PROMISC | \
1729 /* FIXME: sc->sc_full_reset ? */
1730 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1731 unsigned int changed_flags,
1732 unsigned int *total_flags,
1735 struct ath_wiphy *aphy = hw->priv;
1736 struct ath_softc *sc = aphy->sc;
1739 changed_flags &= SUPPORTED_FILTERS;
1740 *total_flags &= SUPPORTED_FILTERS;
1742 sc->rx.rxfilter = *total_flags;
1743 ath9k_ps_wakeup(sc);
1744 rfilt = ath_calcrxfilter(sc);
1745 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1746 ath9k_ps_restore(sc);
1748 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1749 "Set HW RX filter: 0x%x\n", rfilt);
1752 static int ath9k_sta_add(struct ieee80211_hw *hw,
1753 struct ieee80211_vif *vif,
1754 struct ieee80211_sta *sta)
1756 struct ath_wiphy *aphy = hw->priv;
1757 struct ath_softc *sc = aphy->sc;
1759 ath_node_attach(sc, sta);
1764 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1765 struct ieee80211_vif *vif,
1766 struct ieee80211_sta *sta)
1768 struct ath_wiphy *aphy = hw->priv;
1769 struct ath_softc *sc = aphy->sc;
1771 ath_node_detach(sc, sta);
1776 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1777 const struct ieee80211_tx_queue_params *params)
1779 struct ath_wiphy *aphy = hw->priv;
1780 struct ath_softc *sc = aphy->sc;
1781 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1782 struct ath9k_tx_queue_info qi;
1785 if (queue >= WME_NUM_AC)
1788 mutex_lock(&sc->mutex);
1790 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1792 qi.tqi_aifs = params->aifs;
1793 qi.tqi_cwmin = params->cw_min;
1794 qi.tqi_cwmax = params->cw_max;
1795 qi.tqi_burstTime = params->txop;
1796 qnum = ath_get_hal_qnum(queue, sc);
1798 ath_print(common, ATH_DBG_CONFIG,
1799 "Configure tx [queue/halq] [%d/%d], "
1800 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1801 queue, qnum, params->aifs, params->cw_min,
1802 params->cw_max, params->txop);
1804 ret = ath_txq_update(sc, qnum, &qi);
1806 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1808 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1809 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1810 ath_beaconq_config(sc);
1812 mutex_unlock(&sc->mutex);
1817 static int ath9k_set_key(struct ieee80211_hw *hw,
1818 enum set_key_cmd cmd,
1819 struct ieee80211_vif *vif,
1820 struct ieee80211_sta *sta,
1821 struct ieee80211_key_conf *key)
1823 struct ath_wiphy *aphy = hw->priv;
1824 struct ath_softc *sc = aphy->sc;
1825 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1828 if (modparam_nohwcrypt)
1831 mutex_lock(&sc->mutex);
1832 ath9k_ps_wakeup(sc);
1833 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1837 ret = ath_key_config(common, vif, sta, key);
1839 key->hw_key_idx = ret;
1840 /* push IV and Michael MIC generation to stack */
1841 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1842 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1843 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1844 if (sc->sc_ah->sw_mgmt_crypto &&
1845 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1846 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1851 ath_key_delete(common, key);
1857 ath9k_ps_restore(sc);
1858 mutex_unlock(&sc->mutex);
1863 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1864 struct ieee80211_vif *vif,
1865 struct ieee80211_bss_conf *bss_conf,
1868 struct ath_wiphy *aphy = hw->priv;
1869 struct ath_softc *sc = aphy->sc;
1870 struct ath_hw *ah = sc->sc_ah;
1871 struct ath_common *common = ath9k_hw_common(ah);
1872 struct ath_vif *avp = (void *)vif->drv_priv;
1876 mutex_lock(&sc->mutex);
1878 if (changed & BSS_CHANGED_BSSID) {
1880 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1881 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1883 ath9k_hw_write_associd(ah);
1885 /* Set aggregation protection mode parameters */
1886 sc->config.ath_aggr_prot = 0;
1888 /* Only legacy IBSS for now */
1889 if (vif->type == NL80211_IFTYPE_ADHOC)
1890 ath_update_chainmask(sc, 0);
1892 ath_print(common, ATH_DBG_CONFIG,
1893 "BSSID: %pM aid: 0x%x\n",
1894 common->curbssid, common->curaid);
1896 /* need to reconfigure the beacon */
1897 sc->sc_flags &= ~SC_OP_BEACONS ;
1900 /* Enable transmission of beacons (AP, IBSS, MESH) */
1901 if ((changed & BSS_CHANGED_BEACON) ||
1902 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1903 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1904 error = ath_beacon_alloc(aphy, vif);
1906 ath_beacon_config(sc, vif);
1909 if (changed & BSS_CHANGED_ERP_SLOT) {
1910 if (bss_conf->use_short_slot)
1914 if (vif->type == NL80211_IFTYPE_AP) {
1916 * Defer update, so that connected stations can adjust
1917 * their settings at the same time.
1918 * See beacon.c for more details
1920 sc->beacon.slottime = slottime;
1921 sc->beacon.updateslot = UPDATE;
1923 ah->slottime = slottime;
1924 ath9k_hw_init_global_settings(ah);
1928 /* Disable transmission of beacons */
1929 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1930 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1932 if (changed & BSS_CHANGED_BEACON_INT) {
1933 sc->beacon_interval = bss_conf->beacon_int;
1935 * In case of AP mode, the HW TSF has to be reset
1936 * when the beacon interval changes.
1938 if (vif->type == NL80211_IFTYPE_AP) {
1939 sc->sc_flags |= SC_OP_TSF_RESET;
1940 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1941 error = ath_beacon_alloc(aphy, vif);
1943 ath_beacon_config(sc, vif);
1945 ath_beacon_config(sc, vif);
1949 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1950 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1951 bss_conf->use_short_preamble);
1952 if (bss_conf->use_short_preamble)
1953 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1955 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1958 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1959 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1960 bss_conf->use_cts_prot);
1961 if (bss_conf->use_cts_prot &&
1962 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1963 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1965 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1968 if (changed & BSS_CHANGED_ASSOC) {
1969 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1971 ath9k_bss_assoc_info(sc, vif, bss_conf);
1974 mutex_unlock(&sc->mutex);
1977 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1980 struct ath_wiphy *aphy = hw->priv;
1981 struct ath_softc *sc = aphy->sc;
1983 mutex_lock(&sc->mutex);
1984 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1985 mutex_unlock(&sc->mutex);
1990 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1992 struct ath_wiphy *aphy = hw->priv;
1993 struct ath_softc *sc = aphy->sc;
1995 mutex_lock(&sc->mutex);
1996 ath9k_hw_settsf64(sc->sc_ah, tsf);
1997 mutex_unlock(&sc->mutex);
2000 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2002 struct ath_wiphy *aphy = hw->priv;
2003 struct ath_softc *sc = aphy->sc;
2005 mutex_lock(&sc->mutex);
2007 ath9k_ps_wakeup(sc);
2008 ath9k_hw_reset_tsf(sc->sc_ah);
2009 ath9k_ps_restore(sc);
2011 mutex_unlock(&sc->mutex);
2014 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2015 struct ieee80211_vif *vif,
2016 enum ieee80211_ampdu_mlme_action action,
2017 struct ieee80211_sta *sta,
2020 struct ath_wiphy *aphy = hw->priv;
2021 struct ath_softc *sc = aphy->sc;
2027 case IEEE80211_AMPDU_RX_START:
2028 if (!(sc->sc_flags & SC_OP_RXAGGR))
2031 case IEEE80211_AMPDU_RX_STOP:
2033 case IEEE80211_AMPDU_TX_START:
2034 ath9k_ps_wakeup(sc);
2035 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2037 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2038 ath9k_ps_restore(sc);
2040 case IEEE80211_AMPDU_TX_STOP:
2041 ath9k_ps_wakeup(sc);
2042 ath_tx_aggr_stop(sc, sta, tid);
2043 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2044 ath9k_ps_restore(sc);
2046 case IEEE80211_AMPDU_TX_OPERATIONAL:
2047 ath9k_ps_wakeup(sc);
2048 ath_tx_aggr_resume(sc, sta, tid);
2049 ath9k_ps_restore(sc);
2052 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2053 "Unknown AMPDU action\n");
2061 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2062 struct survey_info *survey)
2064 struct ath_wiphy *aphy = hw->priv;
2065 struct ath_softc *sc = aphy->sc;
2066 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2067 struct ieee80211_supported_band *sband;
2068 struct ieee80211_channel *chan;
2069 unsigned long flags;
2072 spin_lock_irqsave(&common->cc_lock, flags);
2074 ath_update_survey_stats(sc);
2076 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2077 if (sband && idx >= sband->n_channels) {
2078 idx -= sband->n_channels;
2083 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2085 if (!sband || idx >= sband->n_channels) {
2086 spin_unlock_irqrestore(&common->cc_lock, flags);
2090 chan = &sband->channels[idx];
2091 pos = chan->hw_value;
2092 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2093 survey->channel = chan;
2094 spin_unlock_irqrestore(&common->cc_lock, flags);
2099 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2101 struct ath_wiphy *aphy = hw->priv;
2102 struct ath_softc *sc = aphy->sc;
2104 mutex_lock(&sc->mutex);
2105 if (ath9k_wiphy_scanning(sc)) {
2107 * There is a race here in mac80211 but fixing it requires
2108 * we revisit how we handle the scan complete callback.
2109 * After mac80211 fixes we will not have configured hardware
2110 * to the home channel nor would we have configured the RX
2113 mutex_unlock(&sc->mutex);
2117 aphy->state = ATH_WIPHY_SCAN;
2118 ath9k_wiphy_pause_all_forced(sc, aphy);
2119 mutex_unlock(&sc->mutex);
2123 * XXX: this requires a revisit after the driver
2124 * scan_complete gets moved to another place/removed in mac80211.
2126 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2128 struct ath_wiphy *aphy = hw->priv;
2129 struct ath_softc *sc = aphy->sc;
2131 mutex_lock(&sc->mutex);
2132 aphy->state = ATH_WIPHY_ACTIVE;
2133 mutex_unlock(&sc->mutex);
2136 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2138 struct ath_wiphy *aphy = hw->priv;
2139 struct ath_softc *sc = aphy->sc;
2140 struct ath_hw *ah = sc->sc_ah;
2142 mutex_lock(&sc->mutex);
2143 ah->coverage_class = coverage_class;
2144 ath9k_hw_init_global_settings(ah);
2145 mutex_unlock(&sc->mutex);
2148 struct ieee80211_ops ath9k_ops = {
2150 .start = ath9k_start,
2152 .add_interface = ath9k_add_interface,
2153 .remove_interface = ath9k_remove_interface,
2154 .config = ath9k_config,
2155 .configure_filter = ath9k_configure_filter,
2156 .sta_add = ath9k_sta_add,
2157 .sta_remove = ath9k_sta_remove,
2158 .conf_tx = ath9k_conf_tx,
2159 .bss_info_changed = ath9k_bss_info_changed,
2160 .set_key = ath9k_set_key,
2161 .get_tsf = ath9k_get_tsf,
2162 .set_tsf = ath9k_set_tsf,
2163 .reset_tsf = ath9k_reset_tsf,
2164 .ampdu_action = ath9k_ampdu_action,
2165 .get_survey = ath9k_get_survey,
2166 .sw_scan_start = ath9k_sw_scan_start,
2167 .sw_scan_complete = ath9k_sw_scan_complete,
2168 .rfkill_poll = ath9k_rfkill_poll_state,
2169 .set_coverage_class = ath9k_set_coverage_class,