drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/pm_qos_params.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static void ath_update_txpow(struct ath_softc *sc)
  23 {
  24         struct ath_hw *ah = sc->sc_ah;
  25
  26         if (sc->curtxpow != sc->config.txpowlimit) {
  27                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  28                 /* read back in case value is clamped */
  29                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  30         }
  31 }
  32
  33 static u8 parse_mpdudensity(u8 mpdudensity)
  34 {
  35         /*
  36          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  37          *   0 for no restriction
  38          *   1 for 1/4 us
  39          *   2 for 1/2 us
  40          *   3 for 1 us
  41          *   4 for 2 us
  42          *   5 for 4 us
  43          *   6 for 8 us
  44          *   7 for 16 us
  45          */
  46         switch (mpdudensity) {
  47         case 0:
  48                 return 0;
  49         case 1:
  50         case 2:
  51         case 3:
  52                 /* Our lower layer calculations limit our precision to
  53                    1 microsecond */
  54                 return 1;
  55         case 4:
  56                 return 2;
  57         case 5:
  58                 return 4;
  59         case 6:
  60                 return 8;
  61         case 7:
  62                 return 16;
  63         default:
  64                 return 0;
  65         }
  66 }
  67
  68 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  69                                                 struct ieee80211_hw *hw)
  70 {
  71         struct ieee80211_channel *curchan = hw->conf.channel;
  72         struct ath9k_channel *channel;
  73         u8 chan_idx;
  74
  75         chan_idx = curchan->hw_value;
  76         channel = &sc->sc_ah->channels[chan_idx];
  77         ath9k_update_ichannel(sc, hw, channel);
  78         return channel;
  79 }
  80
  81 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  82 {
  83         unsigned long flags;
  84         bool ret;
  85
  86         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  88         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  89
  90         return ret;
  91 }
  92
  93 void ath9k_ps_wakeup(struct ath_softc *sc)
  94 {
  95         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  96         unsigned long flags;
  97         enum ath9k_power_mode power_mode;
  98
  99         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 100         if (++sc->ps_usecount != 1)
 101                 goto unlock;
 102
 103         power_mode = sc->sc_ah->power_mode;
 104         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 105
 106         /*
 107          * While the hardware is asleep, the cycle counters contain no
 108          * useful data. Better clear them now so that they don't mess up
 109          * survey data results.
 110          */
 111         if (power_mode != ATH9K_PM_AWAKE) {
 112                 spin_lock(&common->cc_lock);
 113                 ath_hw_cycle_counters_update(common);
 114                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 115                 spin_unlock(&common->cc_lock);
 116         }
 117
 118  unlock:
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120 }
 121
 122 void ath9k_ps_restore(struct ath_softc *sc)
 123 {
 124         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 125         unsigned long flags;
 126
 127         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 128         if (--sc->ps_usecount != 0)
 129                 goto unlock;
 130
 131         spin_lock(&common->cc_lock);
 132         ath_hw_cycle_counters_update(common);
 133         spin_unlock(&common->cc_lock);
 134
 135         if (sc->ps_idle)
 136                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 137         else if (sc->ps_enabled &&
 138                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 139                               PS_WAIT_FOR_CAB |
 140                               PS_WAIT_FOR_PSPOLL_DATA |
 141                               PS_WAIT_FOR_TX_ACK)))
 142                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 143
 144  unlock:
 145         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 146 }
 147
 148 static void ath_start_ani(struct ath_common *common)
 149 {
 150         struct ath_hw *ah = common->ah;
 151         unsigned long timestamp = jiffies_to_msecs(jiffies);
 152         struct ath_softc *sc = (struct ath_softc *) common->priv;
 153
 154         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 155                 return;
 156
 157         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 158                 return;
 159
 160         common->ani.longcal_timer = timestamp;
 161         common->ani.shortcal_timer = timestamp;
 162         common->ani.checkani_timer = timestamp;
 163
 164         mod_timer(&common->ani.timer,
 165                   jiffies +
 166                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 167 }
 168
 169 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 170 {
 171         struct ath_hw *ah = sc->sc_ah;
 172         struct ath9k_channel *chan = &ah->channels[channel];
 173         struct survey_info *survey = &sc->survey[channel];
 174
 175         if (chan->noisefloor) {
 176                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 177                 survey->noise = chan->noisefloor;
 178         }
 179 }
 180
 181 static void ath_update_survey_stats(struct ath_softc *sc)
 182 {
 183         struct ath_hw *ah = sc->sc_ah;
 184         struct ath_common *common = ath9k_hw_common(ah);
 185         int pos = ah->curchan - &ah->channels[0];
 186         struct survey_info *survey = &sc->survey[pos];
 187         struct ath_cycle_counters *cc = &common->cc_survey;
 188         unsigned int div = common->clockrate * 1000;
 189
 190         if (!ah->curchan)
 191                 return;
 192
 193         if (ah->power_mode == ATH9K_PM_AWAKE)
 194                 ath_hw_cycle_counters_update(common);
 195
 196         if (cc->cycles > 0) {
 197                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 198                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 199                         SURVEY_INFO_CHANNEL_TIME_RX |
 200                         SURVEY_INFO_CHANNEL_TIME_TX;
 201                 survey->channel_time += cc->cycles / div;
 202                 survey->channel_time_busy += cc->rx_busy / div;
 203                 survey->channel_time_rx += cc->rx_frame / div;
 204                 survey->channel_time_tx += cc->tx_frame / div;
 205         }
 206         memset(cc, 0, sizeof(*cc));
 207
 208         ath_update_survey_nf(sc, pos);
 209 }
 210
 211 /*
 212  * Set/change channels.  If the channel is really being changed, it's done
 213  * by reseting the chip.  To accomplish this we must first cleanup any pending
 214  * DMA, then restart stuff.
 215 */
 216 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 217                     struct ath9k_channel *hchan)
 218 {
 219         struct ath_wiphy *aphy = hw->priv;
 220         struct ath_hw *ah = sc->sc_ah;
 221         struct ath_common *common = ath9k_hw_common(ah);
 222         struct ieee80211_conf *conf = &common->hw->conf;
 223         bool fastcc = true, stopped;
 224         struct ieee80211_channel *channel = hw->conf.channel;
 225         struct ath9k_hw_cal_data *caldata = NULL;
 226         int r;
 227
 228         if (sc->sc_flags & SC_OP_INVALID)
 229                 return -EIO;
 230
 231         del_timer_sync(&common->ani.timer);
 232         cancel_work_sync(&sc->paprd_work);
 233         cancel_work_sync(&sc->hw_check_work);
 234         cancel_delayed_work_sync(&sc->tx_complete_work);
 235
 236         ath9k_ps_wakeup(sc);
 237
 238         spin_lock_bh(&sc->sc_pcu_lock);
 239
 240         /*
 241          * This is only performed if the channel settings have
 242          * actually changed.
 243          *
 244          * To switch channels clear any pending DMA operations;
 245          * wait long enough for the RX fifo to drain, reset the
 246          * hardware at the new frequency, and then re-enable
 247          * the relevant bits of the h/w.
 248          */
 249         ath9k_hw_disable_interrupts(ah);
 250         ath_drain_all_txq(sc, false);
 251
 252         stopped = ath_stoprecv(sc);
 253
 254         /* XXX: do not flush receive queue here. We don't want
 255          * to flush data frames already in queue because of
 256          * changing channel. */
 257
 258         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 259                 fastcc = false;
 260
 261         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 caldata = &aphy->caldata;
 263
 264         ath_print(common, ATH_DBG_CONFIG,
 265                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 266                   sc->sc_ah->curchan->channel,
 267                   channel->center_freq, conf_is_ht40(conf),
 268                   fastcc);
 269
 270         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 271         if (r) {
 272                 ath_print(common, ATH_DBG_FATAL,
 273                           "Unable to reset channel (%u MHz), "
 274                           "reset status %d\n",
 275                           channel->center_freq, r);
 276                 goto ps_restore;
 277         }
 278
 279         if (ath_startrecv(sc) != 0) {
 280                 ath_print(common, ATH_DBG_FATAL,
 281                           "Unable to restart recv logic\n");
 282                 r = -EIO;
 283                 goto ps_restore;
 284         }
 285
 286         ath_update_txpow(sc);
 287         ath9k_hw_set_interrupts(ah, ah->imask);
 288
 289         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 290                 ath_beacon_config(sc, NULL);
 291                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 292                 ath_start_ani(common);
 293         }
 294
 295  ps_restore:
 296         spin_unlock_bh(&sc->sc_pcu_lock);
 297
 298         ath9k_ps_restore(sc);
 299         return r;
 300 }
 301
 302 static void ath_paprd_activate(struct ath_softc *sc)
 303 {
 304         struct ath_hw *ah = sc->sc_ah;
 305         struct ath9k_hw_cal_data *caldata = ah->caldata;
 306         struct ath_common *common = ath9k_hw_common(ah);
 307         int chain;
 308
 309         if (!caldata || !caldata->paprd_done)
 310                 return;
 311
 312         ath9k_ps_wakeup(sc);
 313         ar9003_paprd_enable(ah, false);
 314         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 315                 if (!(common->tx_chainmask & BIT(chain)))
 316                         continue;
 317
 318                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 319         }
 320
 321         ar9003_paprd_enable(ah, true);
 322         ath9k_ps_restore(sc);
 323 }
 324
 325 void ath_paprd_calibrate(struct work_struct *work)
 326 {
 327         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 328         struct ieee80211_hw *hw = sc->hw;
 329         struct ath_hw *ah = sc->sc_ah;
 330         struct ieee80211_hdr *hdr;
 331         struct sk_buff *skb = NULL;
 332         struct ieee80211_tx_info *tx_info;
 333         int band = hw->conf.channel->band;
 334         struct ieee80211_supported_band *sband = &sc->sbands[band];
 335         struct ath_tx_control txctl;
 336         struct ath9k_hw_cal_data *caldata = ah->caldata;
 337         struct ath_common *common = ath9k_hw_common(ah);
 338         int ftype;
 339         int chain_ok = 0;
 340         int chain;
 341         int len = 1800;
 342         int time_left;
 343         int i;
 344
 345         if (!caldata)
 346                 return;
 347
 348         skb = alloc_skb(len, GFP_KERNEL);
 349         if (!skb)
 350                 return;
 351
 352         tx_info = IEEE80211_SKB_CB(skb);
 353
 354         skb_put(skb, len);
 355         memset(skb->data, 0, len);
 356         hdr = (struct ieee80211_hdr *)skb->data;
 357         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 358         hdr->frame_control = cpu_to_le16(ftype);
 359         hdr->duration_id = cpu_to_le16(10);
 360         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 361         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 362         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 363
 364         memset(&txctl, 0, sizeof(txctl));
 365         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 366
 367         ath9k_ps_wakeup(sc);
 368         ar9003_paprd_init_table(ah);
 369         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 370                 if (!(common->tx_chainmask & BIT(chain)))
 371                         continue;
 372
 373                 chain_ok = 0;
 374                 memset(tx_info, 0, sizeof(*tx_info));
 375                 tx_info->band = band;
 376
 377                 for (i = 0; i < 4; i++) {
 378                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 379                         tx_info->control.rates[i].count = 6;
 380                 }
 381
 382                 init_completion(&sc->paprd_complete);
 383                 sc->paprd_pending = true;
 384                 ar9003_paprd_setup_gain_table(ah, chain);
 385                 txctl.paprd = BIT(chain);
 386                 if (ath_tx_start(hw, skb, &txctl) != 0)
 387                         break;
 388
 389                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 390                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 391                 sc->paprd_pending = false;
 392                 if (!time_left) {
 393                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 394                                   "Timeout waiting for paprd training on "
 395                                   "TX chain %d\n",
 396                                   chain);
 397                         goto fail_paprd;
 398                 }
 399
 400                 if (!ar9003_paprd_is_done(ah))
 401                         break;
 402
 403                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 404                         break;
 405
 406                 chain_ok = 1;
 407         }
 408         kfree_skb(skb);
 409
 410         if (chain_ok) {
 411                 caldata->paprd_done = true;
 412                 ath_paprd_activate(sc);
 413         }
 414
 415 fail_paprd:
 416         ath9k_ps_restore(sc);
 417 }
 418
 419 /*
 420  *  This routine performs the periodic noise floor calibration function
 421  *  that is used to adjust and optimize the chip performance.  This
 422  *  takes environmental changes (location, temperature) into account.
 423  *  When the task is complete, it reschedules itself depending on the
 424  *  appropriate interval that was calculated.
 425  */
 426 void ath_ani_calibrate(unsigned long data)
 427 {
 428         struct ath_softc *sc = (struct ath_softc *)data;
 429         struct ath_hw *ah = sc->sc_ah;
 430         struct ath_common *common = ath9k_hw_common(ah);
 431         bool longcal = false;
 432         bool shortcal = false;
 433         bool aniflag = false;
 434         unsigned int timestamp = jiffies_to_msecs(jiffies);
 435         u32 cal_interval, short_cal_interval, long_cal_interval;
 436         unsigned long flags;
 437
 438         if (ah->caldata && ah->caldata->nfcal_interference)
 439                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 440         else
 441                 long_cal_interval = ATH_LONG_CALINTERVAL;
 442
 443         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 444                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 445
 446         /* Only calibrate if awake */
 447         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 448                 goto set_timer;
 449
 450         ath9k_ps_wakeup(sc);
 451
 452         /* Long calibration runs independently of short calibration. */
 453         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 454                 longcal = true;
 455                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 456                 common->ani.longcal_timer = timestamp;
 457         }
 458
 459         /* Short calibration applies only while caldone is false */
 460         if (!common->ani.caldone) {
 461                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 462                         shortcal = true;
 463                         ath_print(common, ATH_DBG_ANI,
 464                                   "shortcal @%lu\n", jiffies);
 465                         common->ani.shortcal_timer = timestamp;
 466                         common->ani.resetcal_timer = timestamp;
 467                 }
 468         } else {
 469                 if ((timestamp - common->ani.resetcal_timer) >=
 470                     ATH_RESTART_CALINTERVAL) {
 471                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 472                         if (common->ani.caldone)
 473                                 common->ani.resetcal_timer = timestamp;
 474                 }
 475         }
 476
 477         /* Verify whether we must check ANI */
 478         if ((timestamp - common->ani.checkani_timer) >=
 479              ah->config.ani_poll_interval) {
 480                 aniflag = true;
 481                 common->ani.checkani_timer = timestamp;
 482         }
 483
 484         /* Skip all processing if there's nothing to do. */
 485         if (longcal || shortcal || aniflag) {
 486                 /* Call ANI routine if necessary */
 487                 if (aniflag) {
 488                         spin_lock_irqsave(&common->cc_lock, flags);
 489                         ath9k_hw_ani_monitor(ah, ah->curchan);
 490                         ath_update_survey_stats(sc);
 491                         spin_unlock_irqrestore(&common->cc_lock, flags);
 492                 }
 493
 494                 /* Perform calibration if necessary */
 495                 if (longcal || shortcal) {
 496                         common->ani.caldone =
 497                                 ath9k_hw_calibrate(ah,
 498                                                    ah->curchan,
 499                                                    common->rx_chainmask,
 500                                                    longcal);
 501                 }
 502         }
 503
 504         ath9k_ps_restore(sc);
 505
 506 set_timer:
 507         /*
 508         * Set timer interval based on previous results.
 509         * The interval must be the shortest necessary to satisfy ANI,
 510         * short calibration and long calibration.
 511         */
 512         cal_interval = ATH_LONG_CALINTERVAL;
 513         if (sc->sc_ah->config.enable_ani)
 514                 cal_interval = min(cal_interval,
 515                                    (u32)ah->config.ani_poll_interval);
 516         if (!common->ani.caldone)
 517                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 518
 519         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 520         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 521                 if (!ah->caldata->paprd_done)
 522                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 523                 else
 524                         ath_paprd_activate(sc);
 525         }
 526 }
 527
 528 /*
 529  * Update tx/rx chainmask. For legacy association,
 530  * hard code chainmask to 1x1, for 11n association, use
 531  * the chainmask configuration, for bt coexistence, use
 532  * the chainmask configuration even in legacy mode.
 533  */
 534 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 535 {
 536         struct ath_hw *ah = sc->sc_ah;
 537         struct ath_common *common = ath9k_hw_common(ah);
 538
 539         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 540             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 541                 common->tx_chainmask = ah->caps.tx_chainmask;
 542                 common->rx_chainmask = ah->caps.rx_chainmask;
 543         } else {
 544                 common->tx_chainmask = 1;
 545                 common->rx_chainmask = 1;
 546         }
 547
 548         ath_print(common, ATH_DBG_CONFIG,
 549                   "tx chmask: %d, rx chmask: %d\n",
 550                   common->tx_chainmask,
 551                   common->rx_chainmask);
 552 }
 553
 554 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 555 {
 556         struct ath_node *an;
 557
 558         an = (struct ath_node *)sta->drv_priv;
 559
 560         if (sc->sc_flags & SC_OP_TXAGGR) {
 561                 ath_tx_node_init(sc, an);
 562                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 563                                      sta->ht_cap.ampdu_factor);
 564                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 565         }
 566 }
 567
 568 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 569 {
 570         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 571
 572         if (sc->sc_flags & SC_OP_TXAGGR)
 573                 ath_tx_node_cleanup(sc, an);
 574 }
 575
 576 void ath_hw_check(struct work_struct *work)
 577 {
 578         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 579         int i;
 580
 581         ath9k_ps_wakeup(sc);
 582
 583         for (i = 0; i < 3; i++) {
 584                 if (ath9k_hw_check_alive(sc->sc_ah))
 585                         goto out;
 586
 587                 msleep(1);
 588         }
 589         ath_reset(sc, true);
 590
 591 out:
 592         ath9k_ps_restore(sc);
 593 }
 594
 595 void ath9k_tasklet(unsigned long data)
 596 {
 597         struct ath_softc *sc = (struct ath_softc *)data;
 598         struct ath_hw *ah = sc->sc_ah;
 599         struct ath_common *common = ath9k_hw_common(ah);
 600
 601         u32 status = sc->intrstatus;
 602         u32 rxmask;
 603
 604         ath9k_ps_wakeup(sc);
 605
 606         if (status & ATH9K_INT_FATAL) {
 607                 ath_reset(sc, true);
 608                 ath9k_ps_restore(sc);
 609                 return;
 610         }
 611
 612         spin_lock_bh(&sc->sc_pcu_lock);
 613
 614         if (!ath9k_hw_check_alive(ah))
 615                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 616
 617         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 618                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 619                           ATH9K_INT_RXORN);
 620         else
 621                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 622
 623         if (status & rxmask) {
 624                 /* Check for high priority Rx first */
 625                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 626                     (status & ATH9K_INT_RXHP))
 627                         ath_rx_tasklet(sc, 0, true);
 628
 629                 ath_rx_tasklet(sc, 0, false);
 630         }
 631
 632         if (status & ATH9K_INT_TX) {
 633                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 634                         ath_tx_edma_tasklet(sc);
 635                 else
 636                         ath_tx_tasklet(sc);
 637         }
 638
 639         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 640                 /*
 641                  * TSF sync does not look correct; remain awake to sync with
 642                  * the next Beacon.
 643                  */
 644                 ath_print(common, ATH_DBG_PS,
 645                           "TSFOOR - Sync with next Beacon\n");
 646                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 647         }
 648
 649         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 650                 if (status & ATH9K_INT_GENTIMER)
 651                         ath_gen_timer_isr(sc->sc_ah);
 652
 653         /* re-enable hardware interrupt */
 654         ath9k_hw_enable_interrupts(ah);
 655
 656         spin_unlock_bh(&sc->sc_pcu_lock);
 657         ath9k_ps_restore(sc);
 658 }
 659
 660 irqreturn_t ath_isr(int irq, void *dev)
 661 {
 662 #define SCHED_INTR (                            \
 663                 ATH9K_INT_FATAL |               \
 664                 ATH9K_INT_RXORN |               \
 665                 ATH9K_INT_RXEOL |               \
 666                 ATH9K_INT_RX |                  \
 667                 ATH9K_INT_RXLP |                \
 668                 ATH9K_INT_RXHP |                \
 669                 ATH9K_INT_TX |                  \
 670                 ATH9K_INT_BMISS |               \
 671                 ATH9K_INT_CST |                 \
 672                 ATH9K_INT_TSFOOR |              \
 673                 ATH9K_INT_GENTIMER)
 674
 675         struct ath_softc *sc = dev;
 676         struct ath_hw *ah = sc->sc_ah;
 677         struct ath_common *common = ath9k_hw_common(ah);
 678         enum ath9k_int status;
 679         bool sched = false;
 680
 681         /*
 682          * The hardware is not ready/present, don't
 683          * touch anything. Note this can happen early
 684          * on if the IRQ is shared.
 685          */
 686         if (sc->sc_flags & SC_OP_INVALID)
 687                 return IRQ_NONE;
 688
 689
 690         /* shared irq, not for us */
 691
 692         if (!ath9k_hw_intrpend(ah))
 693                 return IRQ_NONE;
 694
 695         /*
 696          * Figure out the reason(s) for the interrupt.  Note
 697          * that the hal returns a pseudo-ISR that may include
 698          * bits we haven't explicitly enabled so we mask the
 699          * value to insure we only process bits we requested.
 700          */
 701         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 702         status &= ah->imask;    /* discard unasked-for bits */
 703
 704         /*
 705          * If there are no status bits set, then this interrupt was not
 706          * for me (should have been caught above).
 707          */
 708         if (!status)
 709                 return IRQ_NONE;
 710
 711         /* Cache the status */
 712         sc->intrstatus = status;
 713
 714         if (status & SCHED_INTR)
 715                 sched = true;
 716
 717         /*
 718          * If a FATAL or RXORN interrupt is received, we have to reset the
 719          * chip immediately.
 720          */
 721         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 722             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 723                 goto chip_reset;
 724
 725         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 726             (status & ATH9K_INT_BB_WATCHDOG)) {
 727
 728                 spin_lock(&common->cc_lock);
 729                 ath_hw_cycle_counters_update(common);
 730                 ar9003_hw_bb_watchdog_dbg_info(ah);
 731                 spin_unlock(&common->cc_lock);
 732
 733                 goto chip_reset;
 734         }
 735
 736         if (status & ATH9K_INT_SWBA)
 737                 tasklet_schedule(&sc->bcon_tasklet);
 738
 739         if (status & ATH9K_INT_TXURN)
 740                 ath9k_hw_updatetxtriglevel(ah, true);
 741
 742         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 743                 if (status & ATH9K_INT_RXEOL) {
 744                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 745                         ath9k_hw_set_interrupts(ah, ah->imask);
 746                 }
 747         }
 748
 749         if (status & ATH9K_INT_MIB) {
 750                 /*
 751                  * Disable interrupts until we service the MIB
 752                  * interrupt; otherwise it will continue to
 753                  * fire.
 754                  */
 755                 ath9k_hw_disable_interrupts(ah);
 756                 /*
 757                  * Let the hal handle the event. We assume
 758                  * it will clear whatever condition caused
 759                  * the interrupt.
 760                  */
 761                 spin_lock(&common->cc_lock);
 762                 ath9k_hw_proc_mib_event(ah);
 763                 spin_unlock(&common->cc_lock);
 764                 ath9k_hw_enable_interrupts(ah);
 765         }
 766
 767         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 768                 if (status & ATH9K_INT_TIM_TIMER) {
 769                         /* Clear RxAbort bit so that we can
 770                          * receive frames */
 771                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 772                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 773                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 774                 }
 775
 776 chip_reset:
 777
 778         ath_debug_stat_interrupt(sc, status);
 779
 780         if (sched) {
 781                 /* turn off every interrupt */
 782                 ath9k_hw_disable_interrupts(ah);
 783                 tasklet_schedule(&sc->intr_tq);
 784         }
 785
 786         return IRQ_HANDLED;
 787
 788 #undef SCHED_INTR
 789 }
 790
 791 static u32 ath_get_extchanmode(struct ath_softc *sc,
 792                                struct ieee80211_channel *chan,
 793                                enum nl80211_channel_type channel_type)
 794 {
 795         u32 chanmode = 0;
 796
 797         switch (chan->band) {
 798         case IEEE80211_BAND_2GHZ:
 799                 switch(channel_type) {
 800                 case NL80211_CHAN_NO_HT:
 801                 case NL80211_CHAN_HT20:
 802                         chanmode = CHANNEL_G_HT20;
 803                         break;
 804                 case NL80211_CHAN_HT40PLUS:
 805                         chanmode = CHANNEL_G_HT40PLUS;
 806                         break;
 807                 case NL80211_CHAN_HT40MINUS:
 808                         chanmode = CHANNEL_G_HT40MINUS;
 809                         break;
 810                 }
 811                 break;
 812         case IEEE80211_BAND_5GHZ:
 813                 switch(channel_type) {
 814                 case NL80211_CHAN_NO_HT:
 815                 case NL80211_CHAN_HT20:
 816                         chanmode = CHANNEL_A_HT20;
 817                         break;
 818                 case NL80211_CHAN_HT40PLUS:
 819                         chanmode = CHANNEL_A_HT40PLUS;
 820                         break;
 821                 case NL80211_CHAN_HT40MINUS:
 822                         chanmode = CHANNEL_A_HT40MINUS;
 823                         break;
 824                 }
 825                 break;
 826         default:
 827                 break;
 828         }
 829
 830         return chanmode;
 831 }
 832
 833 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 834                                  struct ieee80211_hw *hw,
 835                                  struct ieee80211_vif *vif,
 836                                  struct ieee80211_bss_conf *bss_conf)
 837 {
 838         struct ath_wiphy *aphy = hw->priv;
 839         struct ath_hw *ah = sc->sc_ah;
 840         struct ath_common *common = ath9k_hw_common(ah);
 841
 842         if (bss_conf->assoc) {
 843                 ath_print(common, ATH_DBG_CONFIG,
 844                           "Bss Info ASSOC %d, bssid: %pM\n",
 845                            bss_conf->aid, common->curbssid);
 846
 847                 /* New association, store aid */
 848                 common->curaid = bss_conf->aid;
 849                 ath9k_hw_write_associd(ah);
 850
 851                 /*
 852                  * Request a re-configuration of Beacon related timers
 853                  * on the receipt of the first Beacon frame (i.e.,
 854                  * after time sync with the AP).
 855                  */
 856                 sc->ps_flags |= PS_BEACON_SYNC;
 857
 858                 /* Configure the beacon */
 859                 ath_beacon_config(sc, vif);
 860
 861                 /* Reset rssi stats */
 862                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 863                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 864
 865                 sc->sc_flags |= SC_OP_ANI_RUN;
 866                 ath_start_ani(common);
 867         } else {
 868                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 869                 common->curaid = 0;
 870                 /* Stop ANI */
 871                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 872                 del_timer_sync(&common->ani.timer);
 873         }
 874 }
 875
 876 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 877 {
 878         struct ath_hw *ah = sc->sc_ah;
 879         struct ath_common *common = ath9k_hw_common(ah);
 880         struct ieee80211_channel *channel = hw->conf.channel;
 881         int r;
 882
 883         ath9k_ps_wakeup(sc);
 884         spin_lock_bh(&sc->sc_pcu_lock);
 885
 886         ath9k_hw_configpcipowersave(ah, 0, 0);
 887
 888         if (!ah->curchan)
 889                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 890
 891         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 892         if (r) {
 893                 ath_print(common, ATH_DBG_FATAL,
 894                           "Unable to reset channel (%u MHz), "
 895                           "reset status %d\n",
 896                           channel->center_freq, r);
 897         }
 898
 899         ath_update_txpow(sc);
 900         if (ath_startrecv(sc) != 0) {
 901                 ath_print(common, ATH_DBG_FATAL,
 902                           "Unable to restart recv logic\n");
 903                 spin_unlock_bh(&sc->sc_pcu_lock);
 904                 return;
 905         }
 906         if (sc->sc_flags & SC_OP_BEACONS)
 907                 ath_beacon_config(sc, NULL);    /* restart beacons */
 908
 909         /* Re-Enable  interrupts */
 910         ath9k_hw_set_interrupts(ah, ah->imask);
 911
 912         /* Enable LED */
 913         ath9k_hw_cfg_output(ah, ah->led_pin,
 914                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 915         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 916
 917         ieee80211_wake_queues(hw);
 918         spin_unlock_bh(&sc->sc_pcu_lock);
 919
 920         ath9k_ps_restore(sc);
 921 }
 922
 923 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 924 {
 925         struct ath_hw *ah = sc->sc_ah;
 926         struct ieee80211_channel *channel = hw->conf.channel;
 927         int r;
 928
 929         ath9k_ps_wakeup(sc);
 930         spin_lock_bh(&sc->sc_pcu_lock);
 931
 932         ieee80211_stop_queues(hw);
 933
 934         /*
 935          * Keep the LED on when the radio is disabled
 936          * during idle unassociated state.
 937          */
 938         if (!sc->ps_idle) {
 939                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 940                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 941         }
 942
 943         /* Disable interrupts */
 944         ath9k_hw_disable_interrupts(ah);
 945
 946         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 947
 948         ath_stoprecv(sc);               /* turn off frame recv */
 949         ath_flushrecv(sc);              /* flush recv queue */
 950
 951         if (!ah->curchan)
 952                 ah->curchan = ath_get_curchannel(sc, hw);
 953
 954         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 955         if (r) {
 956                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 957                           "Unable to reset channel (%u MHz), "
 958                           "reset status %d\n",
 959                           channel->center_freq, r);
 960         }
 961
 962         ath9k_hw_phy_disable(ah);
 963
 964         ath9k_hw_configpcipowersave(ah, 1, 1);
 965
 966         spin_unlock_bh(&sc->sc_pcu_lock);
 967         ath9k_ps_restore(sc);
 968
 969         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 970 }
 971
 972 int ath_reset(struct ath_softc *sc, bool retry_tx)
 973 {
 974         struct ath_hw *ah = sc->sc_ah;
 975         struct ath_common *common = ath9k_hw_common(ah);
 976         struct ieee80211_hw *hw = sc->hw;
 977         int r;
 978
 979         /* Stop ANI */
 980         del_timer_sync(&common->ani.timer);
 981
 982         spin_lock_bh(&sc->sc_pcu_lock);
 983
 984         ieee80211_stop_queues(hw);
 985
 986         ath9k_hw_disable_interrupts(ah);
 987         ath_drain_all_txq(sc, retry_tx);
 988
 989         ath_stoprecv(sc);
 990         ath_flushrecv(sc);
 991
 992         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 993         if (r)
 994                 ath_print(common, ATH_DBG_FATAL,
 995                           "Unable to reset hardware; reset status %d\n", r);
 996
 997         if (ath_startrecv(sc) != 0)
 998                 ath_print(common, ATH_DBG_FATAL,
 999                           "Unable to start recv logic\n");
1000
1001         /*
1002          * We may be doing a reset in response to a request
1003          * that changes the channel so update any state that
1004          * might change as a result.
1005          */
1006         ath_update_txpow(sc);
1007
1008         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1009                 ath_beacon_config(sc, NULL);    /* restart beacons */
1010
1011         ath9k_hw_set_interrupts(ah, ah->imask);
1012
1013         if (retry_tx) {
1014                 int i;
1015                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1016                         if (ATH_TXQ_SETUP(sc, i)) {
1017                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1018                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1019                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1020                         }
1021                 }
1022         }
1023
1024         ieee80211_wake_queues(hw);
1025         spin_unlock_bh(&sc->sc_pcu_lock);
1026
1027         /* Start ANI */
1028         ath_start_ani(common);
1029
1030         return r;
1031 }
1032
1033 /* XXX: Remove me once we don't depend on ath9k_channel for all
1034  * this redundant data */
1035 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1036                            struct ath9k_channel *ichan)
1037 {
1038         struct ieee80211_channel *chan = hw->conf.channel;
1039         struct ieee80211_conf *conf = &hw->conf;
1040
1041         ichan->channel = chan->center_freq;
1042         ichan->chan = chan;
1043
1044         if (chan->band == IEEE80211_BAND_2GHZ) {
1045                 ichan->chanmode = CHANNEL_G;
1046                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1047         } else {
1048                 ichan->chanmode = CHANNEL_A;
1049                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1050         }
1051
1052         if (conf_is_ht(conf))
1053                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1054                                             conf->channel_type);
1055 }
1056
1057 /**********************/
1058 /* mac80211 callbacks */
1059 /**********************/
1060
1061 static int ath9k_start(struct ieee80211_hw *hw)
1062 {
1063         struct ath_wiphy *aphy = hw->priv;
1064         struct ath_softc *sc = aphy->sc;
1065         struct ath_hw *ah = sc->sc_ah;
1066         struct ath_common *common = ath9k_hw_common(ah);
1067         struct ieee80211_channel *curchan = hw->conf.channel;
1068         struct ath9k_channel *init_channel;
1069         int r;
1070
1071         ath_print(common, ATH_DBG_CONFIG,
1072                   "Starting driver with initial channel: %d MHz\n",
1073                   curchan->center_freq);
1074
1075         mutex_lock(&sc->mutex);
1076
1077         if (ath9k_wiphy_started(sc)) {
1078                 if (sc->chan_idx == curchan->hw_value) {
1079                         /*
1080                          * Already on the operational channel, the new wiphy
1081                          * can be marked active.
1082                          */
1083                         aphy->state = ATH_WIPHY_ACTIVE;
1084                         ieee80211_wake_queues(hw);
1085                 } else {
1086                         /*
1087                          * Another wiphy is on another channel, start the new
1088                          * wiphy in paused state.
1089                          */
1090                         aphy->state = ATH_WIPHY_PAUSED;
1091                         ieee80211_stop_queues(hw);
1092                 }
1093                 mutex_unlock(&sc->mutex);
1094                 return 0;
1095         }
1096         aphy->state = ATH_WIPHY_ACTIVE;
1097
1098         /* setup initial channel */
1099
1100         sc->chan_idx = curchan->hw_value;
1101
1102         init_channel = ath_get_curchannel(sc, hw);
1103
1104         /* Reset SERDES registers */
1105         ath9k_hw_configpcipowersave(ah, 0, 0);
1106
1107         /*
1108          * The basic interface to setting the hardware in a good
1109          * state is ``reset''.  On return the hardware is known to
1110          * be powered up and with interrupts disabled.  This must
1111          * be followed by initialization of the appropriate bits
1112          * and then setup of the interrupt mask.
1113          */
1114         spin_lock_bh(&sc->sc_pcu_lock);
1115         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1116         if (r) {
1117                 ath_print(common, ATH_DBG_FATAL,
1118                           "Unable to reset hardware; reset status %d "
1119                           "(freq %u MHz)\n", r,
1120                           curchan->center_freq);
1121                 spin_unlock_bh(&sc->sc_pcu_lock);
1122                 goto mutex_unlock;
1123         }
1124
1125         /*
1126          * This is needed only to setup initial state
1127          * but it's best done after a reset.
1128          */
1129         ath_update_txpow(sc);
1130
1131         /*
1132          * Setup the hardware after reset:
1133          * The receive engine is set going.
1134          * Frame transmit is handled entirely
1135          * in the frame output path; there's nothing to do
1136          * here except setup the interrupt mask.
1137          */
1138         if (ath_startrecv(sc) != 0) {
1139                 ath_print(common, ATH_DBG_FATAL,
1140                           "Unable to start recv logic\n");
1141                 r = -EIO;
1142                 spin_unlock_bh(&sc->sc_pcu_lock);
1143                 goto mutex_unlock;
1144         }
1145         spin_unlock_bh(&sc->sc_pcu_lock);
1146
1147         /* Setup our intr mask. */
1148         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1149                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1150                     ATH9K_INT_GLOBAL;
1151
1152         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1153                 ah->imask |= ATH9K_INT_RXHP |
1154                              ATH9K_INT_RXLP |
1155                              ATH9K_INT_BB_WATCHDOG;
1156         else
1157                 ah->imask |= ATH9K_INT_RX;
1158
1159         ah->imask |= ATH9K_INT_GTT;
1160
1161         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1162                 ah->imask |= ATH9K_INT_CST;
1163
1164         sc->sc_flags &= ~SC_OP_INVALID;
1165         sc->sc_ah->is_monitoring = false;
1166
1167         /* Disable BMISS interrupt when we're not associated */
1168         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1169         ath9k_hw_set_interrupts(ah, ah->imask);
1170
1171         ieee80211_wake_queues(hw);
1172
1173         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1174
1175         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1176             !ah->btcoex_hw.enabled) {
1177                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1178                                            AR_STOMP_LOW_WLAN_WGHT);
1179                 ath9k_hw_btcoex_enable(ah);
1180
1181                 if (common->bus_ops->bt_coex_prep)
1182                         common->bus_ops->bt_coex_prep(common);
1183                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1184                         ath9k_btcoex_timer_resume(sc);
1185         }
1186
1187         pm_qos_update_request(&ath9k_pm_qos_req, 55);
1188
1189 mutex_unlock:
1190         mutex_unlock(&sc->mutex);
1191
1192         return r;
1193 }
1194
1195 static int ath9k_tx(struct ieee80211_hw *hw,
1196                     struct sk_buff *skb)
1197 {
1198         struct ath_wiphy *aphy = hw->priv;
1199         struct ath_softc *sc = aphy->sc;
1200         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1201         struct ath_tx_control txctl;
1202         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1203
1204         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1205                 ath_print(common, ATH_DBG_XMIT,
1206                           "ath9k: %s: TX in unexpected wiphy state "
1207                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1208                 goto exit;
1209         }
1210
1211         if (sc->ps_enabled) {
1212                 /*
1213                  * mac80211 does not set PM field for normal data frames, so we
1214                  * need to update that based on the current PS mode.
1215                  */
1216                 if (ieee80211_is_data(hdr->frame_control) &&
1217                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1218                     !ieee80211_has_pm(hdr->frame_control)) {
1219                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1220                                   "while in PS mode\n");
1221                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1222                 }
1223         }
1224
1225         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1226                 /*
1227                  * We are using PS-Poll and mac80211 can request TX while in
1228                  * power save mode. Need to wake up hardware for the TX to be
1229                  * completed and if needed, also for RX of buffered frames.
1230                  */
1231                 ath9k_ps_wakeup(sc);
1232                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1233                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1234                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1235                         ath_print(common, ATH_DBG_PS,
1236                                   "Sending PS-Poll to pick a buffered frame\n");
1237                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1238                 } else {
1239                         ath_print(common, ATH_DBG_PS,
1240                                   "Wake up to complete TX\n");
1241                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1242                 }
1243                 /*
1244                  * The actual restore operation will happen only after
1245                  * the sc_flags bit is cleared. We are just dropping
1246                  * the ps_usecount here.
1247                  */
1248                 ath9k_ps_restore(sc);
1249         }
1250
1251         memset(&txctl, 0, sizeof(struct ath_tx_control));
1252         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1253
1254         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1255
1256         if (ath_tx_start(hw, skb, &txctl) != 0) {
1257                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1258                 goto exit;
1259         }
1260
1261         return 0;
1262 exit:
1263         dev_kfree_skb_any(skb);
1264         return 0;
1265 }
1266
1267 static void ath9k_stop(struct ieee80211_hw *hw)
1268 {
1269         struct ath_wiphy *aphy = hw->priv;
1270         struct ath_softc *sc = aphy->sc;
1271         struct ath_hw *ah = sc->sc_ah;
1272         struct ath_common *common = ath9k_hw_common(ah);
1273         int i;
1274
1275         mutex_lock(&sc->mutex);
1276
1277         aphy->state = ATH_WIPHY_INACTIVE;
1278
1279         if (led_blink)
1280                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1281
1282         cancel_delayed_work_sync(&sc->tx_complete_work);
1283         cancel_work_sync(&sc->paprd_work);
1284         cancel_work_sync(&sc->hw_check_work);
1285
1286         for (i = 0; i < sc->num_sec_wiphy; i++) {
1287                 if (sc->sec_wiphy[i])
1288                         break;
1289         }
1290
1291         if (i == sc->num_sec_wiphy) {
1292                 cancel_delayed_work_sync(&sc->wiphy_work);
1293                 cancel_work_sync(&sc->chan_work);
1294         }
1295
1296         if (sc->sc_flags & SC_OP_INVALID) {
1297                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1298                 mutex_unlock(&sc->mutex);
1299                 return;
1300         }
1301
1302         if (ath9k_wiphy_started(sc)) {
1303                 mutex_unlock(&sc->mutex);
1304                 return; /* another wiphy still in use */
1305         }
1306
1307         /* Ensure HW is awake when we try to shut it down. */
1308         ath9k_ps_wakeup(sc);
1309
1310         if (ah->btcoex_hw.enabled) {
1311                 ath9k_hw_btcoex_disable(ah);
1312                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1313                         ath9k_btcoex_timer_pause(sc);
1314         }
1315
1316         spin_lock_bh(&sc->sc_pcu_lock);
1317
1318         /* make sure h/w will not generate any interrupt
1319          * before setting the invalid flag. */
1320         ath9k_hw_disable_interrupts(ah);
1321
1322         if (!(sc->sc_flags & SC_OP_INVALID)) {
1323                 ath_drain_all_txq(sc, false);
1324                 ath_stoprecv(sc);
1325                 ath9k_hw_phy_disable(ah);
1326         } else
1327                 sc->rx.rxlink = NULL;
1328
1329         /* disable HAL and put h/w to sleep */
1330         ath9k_hw_disable(ah);
1331         ath9k_hw_configpcipowersave(ah, 1, 1);
1332
1333         spin_unlock_bh(&sc->sc_pcu_lock);
1334
1335         ath9k_ps_restore(sc);
1336
1337         /* Finally, put the chip in FULL SLEEP mode */
1338         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1339
1340         sc->sc_flags |= SC_OP_INVALID;
1341
1342         pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE);
1343
1344         mutex_unlock(&sc->mutex);
1345
1346         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1347 }
1348
1349 static int ath9k_add_interface(struct ieee80211_hw *hw,
1350                                struct ieee80211_vif *vif)
1351 {
1352         struct ath_wiphy *aphy = hw->priv;
1353         struct ath_softc *sc = aphy->sc;
1354         struct ath_hw *ah = sc->sc_ah;
1355         struct ath_common *common = ath9k_hw_common(ah);
1356         struct ath_vif *avp = (void *)vif->drv_priv;
1357         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1358         int ret = 0;
1359
1360         mutex_lock(&sc->mutex);
1361
1362         switch (vif->type) {
1363         case NL80211_IFTYPE_STATION:
1364                 ic_opmode = NL80211_IFTYPE_STATION;
1365                 break;
1366         case NL80211_IFTYPE_WDS:
1367                 ic_opmode = NL80211_IFTYPE_WDS;
1368                 break;
1369         case NL80211_IFTYPE_ADHOC:
1370         case NL80211_IFTYPE_AP:
1371         case NL80211_IFTYPE_MESH_POINT:
1372                 if (sc->nbcnvifs >= ATH_BCBUF) {
1373                         ret = -ENOBUFS;
1374                         goto out;
1375                 }
1376                 ic_opmode = vif->type;
1377                 break;
1378         default:
1379                 ath_print(common, ATH_DBG_FATAL,
1380                         "Interface type %d not yet supported\n", vif->type);
1381                 ret = -EOPNOTSUPP;
1382                 goto out;
1383         }
1384
1385         ath_print(common, ATH_DBG_CONFIG,
1386                   "Attach a VIF of type: %d\n", ic_opmode);
1387
1388         /* Set the VIF opmode */
1389         avp->av_opmode = ic_opmode;
1390         avp->av_bslot = -1;
1391
1392         sc->nvifs++;
1393
1394         ath9k_set_bssid_mask(hw, vif);
1395
1396         if (sc->nvifs > 1)
1397                 goto out; /* skip global settings for secondary vif */
1398
1399         if (ic_opmode == NL80211_IFTYPE_AP) {
1400                 ath9k_hw_set_tsfadjust(ah, 1);
1401                 sc->sc_flags |= SC_OP_TSF_RESET;
1402         }
1403
1404         /* Set the device opmode */
1405         ah->opmode = ic_opmode;
1406
1407         /*
1408          * Enable MIB interrupts when there are hardware phy counters.
1409          * Note we only do this (at the moment) for station mode.
1410          */
1411         if ((vif->type == NL80211_IFTYPE_STATION) ||
1412             (vif->type == NL80211_IFTYPE_ADHOC) ||
1413             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1414                 if (ah->config.enable_ani)
1415                         ah->imask |= ATH9K_INT_MIB;
1416                 ah->imask |= ATH9K_INT_TSFOOR;
1417         }
1418
1419         ath9k_hw_set_interrupts(ah, ah->imask);
1420
1421         if (vif->type == NL80211_IFTYPE_AP    ||
1422             vif->type == NL80211_IFTYPE_ADHOC) {
1423                 sc->sc_flags |= SC_OP_ANI_RUN;
1424                 ath_start_ani(common);
1425         }
1426
1427 out:
1428         mutex_unlock(&sc->mutex);
1429         return ret;
1430 }
1431
1432 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1433                                    struct ieee80211_vif *vif)
1434 {
1435         struct ath_wiphy *aphy = hw->priv;
1436         struct ath_softc *sc = aphy->sc;
1437         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1438         struct ath_vif *avp = (void *)vif->drv_priv;
1439         int i;
1440
1441         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1442
1443         mutex_lock(&sc->mutex);
1444
1445         /* Stop ANI */
1446         sc->sc_flags &= ~SC_OP_ANI_RUN;
1447         del_timer_sync(&common->ani.timer);
1448
1449         /* Reclaim beacon resources */
1450         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1451             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1452             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1453                 ath9k_ps_wakeup(sc);
1454                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1455                 ath9k_ps_restore(sc);
1456         }
1457
1458         ath_beacon_return(sc, avp);
1459         sc->sc_flags &= ~SC_OP_BEACONS;
1460
1461         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1462                 if (sc->beacon.bslot[i] == vif) {
1463                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1464                                "slot\n", __func__);
1465                         sc->beacon.bslot[i] = NULL;
1466                         sc->beacon.bslot_aphy[i] = NULL;
1467                 }
1468         }
1469
1470         sc->nvifs--;
1471
1472         mutex_unlock(&sc->mutex);
1473 }
1474
1475 static void ath9k_enable_ps(struct ath_softc *sc)
1476 {
1477         struct ath_hw *ah = sc->sc_ah;
1478
1479         sc->ps_enabled = true;
1480         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1481                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1482                         ah->imask |= ATH9K_INT_TIM_TIMER;
1483                         ath9k_hw_set_interrupts(ah, ah->imask);
1484                 }
1485                 ath9k_hw_setrxabort(ah, 1);
1486         }
1487 }
1488
1489 static void ath9k_disable_ps(struct ath_softc *sc)
1490 {
1491         struct ath_hw *ah = sc->sc_ah;
1492
1493         sc->ps_enabled = false;
1494         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1495         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1496                 ath9k_hw_setrxabort(ah, 0);
1497                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1498                                   PS_WAIT_FOR_CAB |
1499                                   PS_WAIT_FOR_PSPOLL_DATA |
1500                                   PS_WAIT_FOR_TX_ACK);
1501                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1502                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1503                         ath9k_hw_set_interrupts(ah, ah->imask);
1504                 }
1505         }
1506
1507 }
1508
1509 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1510 {
1511         struct ath_wiphy *aphy = hw->priv;
1512         struct ath_softc *sc = aphy->sc;
1513         struct ath_hw *ah = sc->sc_ah;
1514         struct ath_common *common = ath9k_hw_common(ah);
1515         struct ieee80211_conf *conf = &hw->conf;
1516         bool disable_radio;
1517
1518         mutex_lock(&sc->mutex);
1519
1520         /*
1521          * Leave this as the first check because we need to turn on the
1522          * radio if it was disabled before prior to processing the rest
1523          * of the changes. Likewise we must only disable the radio towards
1524          * the end.
1525          */
1526         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1527                 bool enable_radio;
1528                 bool all_wiphys_idle;
1529                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1530
1531                 spin_lock_bh(&sc->wiphy_lock);
1532                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1533                 ath9k_set_wiphy_idle(aphy, idle);
1534
1535                 enable_radio = (!idle && all_wiphys_idle);
1536
1537                 /*
1538                  * After we unlock here its possible another wiphy
1539                  * can be re-renabled so to account for that we will
1540                  * only disable the radio toward the end of this routine
1541                  * if by then all wiphys are still idle.
1542                  */
1543                 spin_unlock_bh(&sc->wiphy_lock);
1544
1545                 if (enable_radio) {
1546                         sc->ps_idle = false;
1547                         ath_radio_enable(sc, hw);
1548                         ath_print(common, ATH_DBG_CONFIG,
1549                                   "not-idle: enabling radio\n");
1550                 }
1551         }
1552
1553         /*
1554          * We just prepare to enable PS. We have to wait until our AP has
1555          * ACK'd our null data frame to disable RX otherwise we'll ignore
1556          * those ACKs and end up retransmitting the same null data frames.
1557          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1558          */
1559         if (changed & IEEE80211_CONF_CHANGE_PS) {
1560                 unsigned long flags;
1561                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1562                 if (conf->flags & IEEE80211_CONF_PS)
1563                         ath9k_enable_ps(sc);
1564                 else
1565                         ath9k_disable_ps(sc);
1566                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1567         }
1568
1569         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1570                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1571                         ath_print(common, ATH_DBG_CONFIG,
1572                                   "Monitor mode is enabled\n");
1573                         sc->sc_ah->is_monitoring = true;
1574                 } else {
1575                         ath_print(common, ATH_DBG_CONFIG,
1576                                   "Monitor mode is disabled\n");
1577                         sc->sc_ah->is_monitoring = false;
1578                 }
1579         }
1580
1581         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1582                 struct ieee80211_channel *curchan = hw->conf.channel;
1583                 int pos = curchan->hw_value;
1584                 int old_pos = -1;
1585                 unsigned long flags;
1586
1587                 if (ah->curchan)
1588                         old_pos = ah->curchan - &ah->channels[0];
1589
1590                 aphy->chan_idx = pos;
1591                 aphy->chan_is_ht = conf_is_ht(conf);
1592                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1593                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1594                 else
1595                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1596
1597                 if (aphy->state == ATH_WIPHY_SCAN ||
1598                     aphy->state == ATH_WIPHY_ACTIVE)
1599                         ath9k_wiphy_pause_all_forced(sc, aphy);
1600                 else {
1601                         /*
1602                          * Do not change operational channel based on a paused
1603                          * wiphy changes.
1604                          */
1605                         goto skip_chan_change;
1606                 }
1607
1608                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1609                           curchan->center_freq);
1610
1611                 /* XXX: remove me eventualy */
1612                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1613
1614                 ath_update_chainmask(sc, conf_is_ht(conf));
1615
1616                 /* update survey stats for the old channel before switching */
1617                 spin_lock_irqsave(&common->cc_lock, flags);
1618                 ath_update_survey_stats(sc);
1619                 spin_unlock_irqrestore(&common->cc_lock, flags);
1620
1621                 /*
1622                  * If the operating channel changes, change the survey in-use flags
1623                  * along with it.
1624                  * Reset the survey data for the new channel, unless we're switching
1625                  * back to the operating channel from an off-channel operation.
1626                  */
1627                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1628                     sc->cur_survey != &sc->survey[pos]) {
1629
1630                         if (sc->cur_survey)
1631                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1632
1633                         sc->cur_survey = &sc->survey[pos];
1634
1635                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1636                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1637                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1638                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1639                 }
1640
1641                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1642                         ath_print(common, ATH_DBG_FATAL,
1643                                   "Unable to set channel\n");
1644                         mutex_unlock(&sc->mutex);
1645                         return -EINVAL;
1646                 }
1647
1648                 /*
1649                  * The most recent snapshot of channel->noisefloor for the old
1650                  * channel is only available after the hardware reset. Copy it to
1651                  * the survey stats now.
1652                  */
1653                 if (old_pos >= 0)
1654                         ath_update_survey_nf(sc, old_pos);
1655         }
1656
1657 skip_chan_change:
1658         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1659                 sc->config.txpowlimit = 2 * conf->power_level;
1660                 ath_update_txpow(sc);
1661         }
1662
1663         spin_lock_bh(&sc->wiphy_lock);
1664         disable_radio = ath9k_all_wiphys_idle(sc);
1665         spin_unlock_bh(&sc->wiphy_lock);
1666
1667         if (disable_radio) {
1668                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1669                 sc->ps_idle = true;
1670                 ath_radio_disable(sc, hw);
1671         }
1672
1673         mutex_unlock(&sc->mutex);
1674
1675         return 0;
1676 }
1677
1678 #define SUPPORTED_FILTERS                       \
1679         (FIF_PROMISC_IN_BSS |                   \
1680         FIF_ALLMULTI |                          \
1681         FIF_CONTROL |                           \
1682         FIF_PSPOLL |                            \
1683         FIF_OTHER_BSS |                         \
1684         FIF_BCN_PRBRESP_PROMISC |               \
1685         FIF_PROBE_REQ |                         \
1686         FIF_FCSFAIL)
1687
1688 /* FIXME: sc->sc_full_reset ? */
1689 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1690                                    unsigned int changed_flags,
1691                                    unsigned int *total_flags,
1692                                    u64 multicast)
1693 {
1694         struct ath_wiphy *aphy = hw->priv;
1695         struct ath_softc *sc = aphy->sc;
1696         u32 rfilt;
1697
1698         changed_flags &= SUPPORTED_FILTERS;
1699         *total_flags &= SUPPORTED_FILTERS;
1700
1701         sc->rx.rxfilter = *total_flags;
1702         ath9k_ps_wakeup(sc);
1703         rfilt = ath_calcrxfilter(sc);
1704         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1705         ath9k_ps_restore(sc);
1706
1707         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1708                   "Set HW RX filter: 0x%x\n", rfilt);
1709 }
1710
1711 static int ath9k_sta_add(struct ieee80211_hw *hw,
1712                          struct ieee80211_vif *vif,
1713                          struct ieee80211_sta *sta)
1714 {
1715         struct ath_wiphy *aphy = hw->priv;
1716         struct ath_softc *sc = aphy->sc;
1717
1718         ath_node_attach(sc, sta);
1719
1720         return 0;
1721 }
1722
1723 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1724                             struct ieee80211_vif *vif,
1725                             struct ieee80211_sta *sta)
1726 {
1727         struct ath_wiphy *aphy = hw->priv;
1728         struct ath_softc *sc = aphy->sc;
1729
1730         ath_node_detach(sc, sta);
1731
1732         return 0;
1733 }
1734
1735 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1736                          const struct ieee80211_tx_queue_params *params)
1737 {
1738         struct ath_wiphy *aphy = hw->priv;
1739         struct ath_softc *sc = aphy->sc;
1740         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1741         struct ath_txq *txq;
1742         struct ath9k_tx_queue_info qi;
1743         int ret = 0;
1744
1745         if (queue >= WME_NUM_AC)
1746                 return 0;
1747
1748         txq = sc->tx.txq_map[queue];
1749
1750         mutex_lock(&sc->mutex);
1751
1752         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1753
1754         qi.tqi_aifs = params->aifs;
1755         qi.tqi_cwmin = params->cw_min;
1756         qi.tqi_cwmax = params->cw_max;
1757         qi.tqi_burstTime = params->txop;
1758
1759         ath_print(common, ATH_DBG_CONFIG,
1760                   "Configure tx [queue/halq] [%d/%d],  "
1761                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1762                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1763                   params->cw_max, params->txop);
1764
1765         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1766         if (ret)
1767                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1768
1769         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1770                 if (queue == WME_AC_BE && !ret)
1771                         ath_beaconq_config(sc);
1772
1773         mutex_unlock(&sc->mutex);
1774
1775         return ret;
1776 }
1777
1778 static int ath9k_set_key(struct ieee80211_hw *hw,
1779                          enum set_key_cmd cmd,
1780                          struct ieee80211_vif *vif,
1781                          struct ieee80211_sta *sta,
1782                          struct ieee80211_key_conf *key)
1783 {
1784         struct ath_wiphy *aphy = hw->priv;
1785         struct ath_softc *sc = aphy->sc;
1786         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1787         int ret = 0;
1788
1789         if (modparam_nohwcrypt)
1790                 return -ENOSPC;
1791
1792         mutex_lock(&sc->mutex);
1793         ath9k_ps_wakeup(sc);
1794         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1795
1796         switch (cmd) {
1797         case SET_KEY:
1798                 ret = ath_key_config(common, vif, sta, key);
1799                 if (ret >= 0) {
1800                         key->hw_key_idx = ret;
1801                         /* push IV and Michael MIC generation to stack */
1802                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1803                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1804                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1805                         if (sc->sc_ah->sw_mgmt_crypto &&
1806                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1807                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1808                         ret = 0;
1809                 }
1810                 break;
1811         case DISABLE_KEY:
1812                 ath_key_delete(common, key);
1813                 break;
1814         default:
1815                 ret = -EINVAL;
1816         }
1817
1818         ath9k_ps_restore(sc);
1819         mutex_unlock(&sc->mutex);
1820
1821         return ret;
1822 }
1823
1824 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1825                                    struct ieee80211_vif *vif,
1826                                    struct ieee80211_bss_conf *bss_conf,
1827                                    u32 changed)
1828 {
1829         struct ath_wiphy *aphy = hw->priv;
1830         struct ath_softc *sc = aphy->sc;
1831         struct ath_hw *ah = sc->sc_ah;
1832         struct ath_common *common = ath9k_hw_common(ah);
1833         struct ath_vif *avp = (void *)vif->drv_priv;
1834         int slottime;
1835         int error;
1836
1837         mutex_lock(&sc->mutex);
1838
1839         if (changed & BSS_CHANGED_BSSID) {
1840                 /* Set BSSID */
1841                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1842                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1843                 common->curaid = 0;
1844                 ath9k_hw_write_associd(ah);
1845
1846                 /* Set aggregation protection mode parameters */
1847                 sc->config.ath_aggr_prot = 0;
1848
1849                 /* Only legacy IBSS for now */
1850                 if (vif->type == NL80211_IFTYPE_ADHOC)
1851                         ath_update_chainmask(sc, 0);
1852
1853                 ath_print(common, ATH_DBG_CONFIG,
1854                           "BSSID: %pM aid: 0x%x\n",
1855                           common->curbssid, common->curaid);
1856
1857                 /* need to reconfigure the beacon */
1858                 sc->sc_flags &= ~SC_OP_BEACONS ;
1859         }
1860
1861         /* Enable transmission of beacons (AP, IBSS, MESH) */
1862         if ((changed & BSS_CHANGED_BEACON) ||
1863             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1864                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1865                 error = ath_beacon_alloc(aphy, vif);
1866                 if (!error)
1867                         ath_beacon_config(sc, vif);
1868         }
1869
1870         if (changed & BSS_CHANGED_ERP_SLOT) {
1871                 if (bss_conf->use_short_slot)
1872                         slottime = 9;
1873                 else
1874                         slottime = 20;
1875                 if (vif->type == NL80211_IFTYPE_AP) {
1876                         /*
1877                          * Defer update, so that connected stations can adjust
1878                          * their settings at the same time.
1879                          * See beacon.c for more details
1880                          */
1881                         sc->beacon.slottime = slottime;
1882                         sc->beacon.updateslot = UPDATE;
1883                 } else {
1884                         ah->slottime = slottime;
1885                         ath9k_hw_init_global_settings(ah);
1886                 }
1887         }
1888
1889         /* Disable transmission of beacons */
1890         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1891                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1892
1893         if (changed & BSS_CHANGED_BEACON_INT) {
1894                 sc->beacon_interval = bss_conf->beacon_int;
1895                 /*
1896                  * In case of AP mode, the HW TSF has to be reset
1897                  * when the beacon interval changes.
1898                  */
1899                 if (vif->type == NL80211_IFTYPE_AP) {
1900                         sc->sc_flags |= SC_OP_TSF_RESET;
1901                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1902                         error = ath_beacon_alloc(aphy, vif);
1903                         if (!error)
1904                                 ath_beacon_config(sc, vif);
1905                 } else {
1906                         ath_beacon_config(sc, vif);
1907                 }
1908         }
1909
1910         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1911                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1912                           bss_conf->use_short_preamble);
1913                 if (bss_conf->use_short_preamble)
1914                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1915                 else
1916                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1917         }
1918
1919         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1920                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1921                           bss_conf->use_cts_prot);
1922                 if (bss_conf->use_cts_prot &&
1923                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1924                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1925                 else
1926                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1927         }
1928
1929         if (changed & BSS_CHANGED_ASSOC) {
1930                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1931                         bss_conf->assoc);
1932                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1933         }
1934
1935         mutex_unlock(&sc->mutex);
1936 }
1937
1938 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1939 {
1940         u64 tsf;
1941         struct ath_wiphy *aphy = hw->priv;
1942         struct ath_softc *sc = aphy->sc;
1943
1944         mutex_lock(&sc->mutex);
1945         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1946         mutex_unlock(&sc->mutex);
1947
1948         return tsf;
1949 }
1950
1951 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1952 {
1953         struct ath_wiphy *aphy = hw->priv;
1954         struct ath_softc *sc = aphy->sc;
1955
1956         mutex_lock(&sc->mutex);
1957         ath9k_hw_settsf64(sc->sc_ah, tsf);
1958         mutex_unlock(&sc->mutex);
1959 }
1960
1961 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1962 {
1963         struct ath_wiphy *aphy = hw->priv;
1964         struct ath_softc *sc = aphy->sc;
1965
1966         mutex_lock(&sc->mutex);
1967
1968         ath9k_ps_wakeup(sc);
1969         ath9k_hw_reset_tsf(sc->sc_ah);
1970         ath9k_ps_restore(sc);
1971
1972         mutex_unlock(&sc->mutex);
1973 }
1974
1975 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1976                               struct ieee80211_vif *vif,
1977                               enum ieee80211_ampdu_mlme_action action,
1978                               struct ieee80211_sta *sta,
1979                               u16 tid, u16 *ssn)
1980 {
1981         struct ath_wiphy *aphy = hw->priv;
1982         struct ath_softc *sc = aphy->sc;
1983         int ret = 0;
1984
1985         local_bh_disable();
1986
1987         switch (action) {
1988         case IEEE80211_AMPDU_RX_START:
1989                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1990                         ret = -ENOTSUPP;
1991                 break;
1992         case IEEE80211_AMPDU_RX_STOP:
1993                 break;
1994         case IEEE80211_AMPDU_TX_START:
1995                 if (!(sc->sc_flags & SC_OP_TXAGGR))
1996                         return -EOPNOTSUPP;
1997
1998                 ath9k_ps_wakeup(sc);
1999                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2000                 if (!ret)
2001                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2002                 ath9k_ps_restore(sc);
2003                 break;
2004         case IEEE80211_AMPDU_TX_STOP:
2005                 ath9k_ps_wakeup(sc);
2006                 ath_tx_aggr_stop(sc, sta, tid);
2007                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2008                 ath9k_ps_restore(sc);
2009                 break;
2010         case IEEE80211_AMPDU_TX_OPERATIONAL:
2011                 ath9k_ps_wakeup(sc);
2012                 ath_tx_aggr_resume(sc, sta, tid);
2013                 ath9k_ps_restore(sc);
2014                 break;
2015         default:
2016                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2017                           "Unknown AMPDU action\n");
2018         }
2019
2020         local_bh_enable();
2021
2022         return ret;
2023 }
2024
2025 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2026                              struct survey_info *survey)
2027 {
2028         struct ath_wiphy *aphy = hw->priv;
2029         struct ath_softc *sc = aphy->sc;
2030         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2031         struct ieee80211_supported_band *sband;
2032         struct ieee80211_channel *chan;
2033         unsigned long flags;
2034         int pos;
2035
2036         spin_lock_irqsave(&common->cc_lock, flags);
2037         if (idx == 0)
2038                 ath_update_survey_stats(sc);
2039
2040         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2041         if (sband && idx >= sband->n_channels) {
2042                 idx -= sband->n_channels;
2043                 sband = NULL;
2044         }
2045
2046         if (!sband)
2047                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2048
2049         if (!sband || idx >= sband->n_channels) {
2050                 spin_unlock_irqrestore(&common->cc_lock, flags);
2051                 return -ENOENT;
2052         }
2053
2054         chan = &sband->channels[idx];
2055         pos = chan->hw_value;
2056         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2057         survey->channel = chan;
2058         spin_unlock_irqrestore(&common->cc_lock, flags);
2059
2060         return 0;
2061 }
2062
2063 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2064 {
2065         struct ath_wiphy *aphy = hw->priv;
2066         struct ath_softc *sc = aphy->sc;
2067
2068         mutex_lock(&sc->mutex);
2069         if (ath9k_wiphy_scanning(sc)) {
2070                 /*
2071                  * There is a race here in mac80211 but fixing it requires
2072                  * we revisit how we handle the scan complete callback.
2073                  * After mac80211 fixes we will not have configured hardware
2074                  * to the home channel nor would we have configured the RX
2075                  * filter yet.
2076                  */
2077                 mutex_unlock(&sc->mutex);
2078                 return;
2079         }
2080
2081         aphy->state = ATH_WIPHY_SCAN;
2082         ath9k_wiphy_pause_all_forced(sc, aphy);
2083         mutex_unlock(&sc->mutex);
2084 }
2085
2086 /*
2087  * XXX: this requires a revisit after the driver
2088  * scan_complete gets moved to another place/removed in mac80211.
2089  */
2090 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2091 {
2092         struct ath_wiphy *aphy = hw->priv;
2093         struct ath_softc *sc = aphy->sc;
2094
2095         mutex_lock(&sc->mutex);
2096         aphy->state = ATH_WIPHY_ACTIVE;
2097         mutex_unlock(&sc->mutex);
2098 }
2099
2100 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2101 {
2102         struct ath_wiphy *aphy = hw->priv;
2103         struct ath_softc *sc = aphy->sc;
2104         struct ath_hw *ah = sc->sc_ah;
2105
2106         mutex_lock(&sc->mutex);
2107         ah->coverage_class = coverage_class;
2108         ath9k_hw_init_global_settings(ah);
2109         mutex_unlock(&sc->mutex);
2110 }
2111
2112 struct ieee80211_ops ath9k_ops = {
2113         .tx                 = ath9k_tx,
2114         .start              = ath9k_start,
2115         .stop               = ath9k_stop,
2116         .add_interface      = ath9k_add_interface,
2117         .remove_interface   = ath9k_remove_interface,
2118         .config             = ath9k_config,
2119         .configure_filter   = ath9k_configure_filter,
2120         .sta_add            = ath9k_sta_add,
2121         .sta_remove         = ath9k_sta_remove,
2122         .conf_tx            = ath9k_conf_tx,
2123         .bss_info_changed   = ath9k_bss_info_changed,
2124         .set_key            = ath9k_set_key,
2125         .get_tsf            = ath9k_get_tsf,
2126         .set_tsf            = ath9k_set_tsf,
2127         .reset_tsf          = ath9k_reset_tsf,
2128         .ampdu_action       = ath9k_ampdu_action,
2129         .get_survey         = ath9k_get_survey,
2130         .sw_scan_start      = ath9k_sw_scan_start,
2131         .sw_scan_complete   = ath9k_sw_scan_complete,
2132         .rfkill_poll        = ath9k_rfkill_poll_state,
2133         .set_coverage_class = ath9k_set_coverage_class,
2134 };