drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65
  66         spin_unlock_bh(&txq->axq_lock);
  67         return pending;
  68 }
  69
  70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  71 {
  72         unsigned long flags;
  73         bool ret;
  74
  75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  78
  79         return ret;
  80 }
  81
  82 void ath9k_ps_wakeup(struct ath_softc *sc)
  83 {
  84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85         unsigned long flags;
  86         enum ath9k_power_mode power_mode;
  87
  88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  89         if (++sc->ps_usecount != 1)
  90                 goto unlock;
  91
  92         power_mode = sc->sc_ah->power_mode;
  93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  94
  95         /*
  96          * While the hardware is asleep, the cycle counters contain no
  97          * useful data. Better clear them now so that they don't mess up
  98          * survey data results.
  99          */
 100         if (power_mode != ATH9K_PM_AWAKE) {
 101                 spin_lock(&common->cc_lock);
 102                 ath_hw_cycle_counters_update(common);
 103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 104                 spin_unlock(&common->cc_lock);
 105         }
 106
 107  unlock:
 108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 109 }
 110
 111 void ath9k_ps_restore(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         enum ath9k_power_mode mode;
 115         unsigned long flags;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         if (--sc->ps_usecount != 0)
 119                 goto unlock;
 120
 121         if (sc->ps_flags & PS_WAIT_FOR_TX_ACK)
 122                 goto unlock;
 123
 124         if (sc->ps_idle)
 125                 mode = ATH9K_PM_FULL_SLEEP;
 126         else if (sc->ps_enabled &&
 127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 128                               PS_WAIT_FOR_CAB |
 129                               PS_WAIT_FOR_PSPOLL_DATA)))
 130                 mode = ATH9K_PM_NETWORK_SLEEP;
 131         else
 132                 goto unlock;
 133
 134         spin_lock(&common->cc_lock);
 135         ath_hw_cycle_counters_update(common);
 136         spin_unlock(&common->cc_lock);
 137
 138         ath9k_hw_setpower(sc->sc_ah, mode);
 139
 140  unlock:
 141         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 142 }
 143
 144 void ath_start_ani(struct ath_common *common)
 145 {
 146         struct ath_hw *ah = common->ah;
 147         unsigned long timestamp = jiffies_to_msecs(jiffies);
 148         struct ath_softc *sc = (struct ath_softc *) common->priv;
 149
 150         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 151                 return;
 152
 153         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 154                 return;
 155
 156         common->ani.longcal_timer = timestamp;
 157         common->ani.shortcal_timer = timestamp;
 158         common->ani.checkani_timer = timestamp;
 159
 160         mod_timer(&common->ani.timer,
 161                   jiffies +
 162                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 163 }
 164
 165 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath9k_channel *chan = &ah->channels[channel];
 169         struct survey_info *survey = &sc->survey[channel];
 170
 171         if (chan->noisefloor) {
 172                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 173                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
 174         }
 175 }
 176
 177 /*
 178  * Updates the survey statistics and returns the busy time since last
 179  * update in %, if the measurement duration was long enough for the
 180  * result to be useful, -1 otherwise.
 181  */
 182 static int ath_update_survey_stats(struct ath_softc *sc)
 183 {
 184         struct ath_hw *ah = sc->sc_ah;
 185         struct ath_common *common = ath9k_hw_common(ah);
 186         int pos = ah->curchan - &ah->channels[0];
 187         struct survey_info *survey = &sc->survey[pos];
 188         struct ath_cycle_counters *cc = &common->cc_survey;
 189         unsigned int div = common->clockrate * 1000;
 190         int ret = 0;
 191
 192         if (!ah->curchan)
 193                 return -1;
 194
 195         if (ah->power_mode == ATH9K_PM_AWAKE)
 196                 ath_hw_cycle_counters_update(common);
 197
 198         if (cc->cycles > 0) {
 199                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 200                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 201                         SURVEY_INFO_CHANNEL_TIME_RX |
 202                         SURVEY_INFO_CHANNEL_TIME_TX;
 203                 survey->channel_time += cc->cycles / div;
 204                 survey->channel_time_busy += cc->rx_busy / div;
 205                 survey->channel_time_rx += cc->rx_frame / div;
 206                 survey->channel_time_tx += cc->tx_frame / div;
 207         }
 208
 209         if (cc->cycles < div)
 210                 return -1;
 211
 212         if (cc->cycles > 0)
 213                 ret = cc->rx_busy * 100 / cc->cycles;
 214
 215         memset(cc, 0, sizeof(*cc));
 216
 217         ath_update_survey_nf(sc, pos);
 218
 219         return ret;
 220 }
 221
 222 static void __ath_cancel_work(struct ath_softc *sc)
 223 {
 224         cancel_work_sync(&sc->paprd_work);
 225         cancel_work_sync(&sc->hw_check_work);
 226         cancel_delayed_work_sync(&sc->tx_complete_work);
 227         cancel_delayed_work_sync(&sc->hw_pll_work);
 228 }
 229
 230 static void ath_cancel_work(struct ath_softc *sc)
 231 {
 232         __ath_cancel_work(sc);
 233         cancel_work_sync(&sc->hw_reset_work);
 234 }
 235
 236 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
 237 {
 238         struct ath_hw *ah = sc->sc_ah;
 239         struct ath_common *common = ath9k_hw_common(ah);
 240         bool ret;
 241
 242         ieee80211_stop_queues(sc->hw);
 243
 244         sc->hw_busy_count = 0;
 245         del_timer_sync(&common->ani.timer);
 246         del_timer_sync(&sc->rx_poll_timer);
 247
 248         ath9k_debug_samp_bb_mac(sc);
 249         ath9k_hw_disable_interrupts(ah);
 250
 251         ret = ath_drain_all_txq(sc, retry_tx);
 252
 253         if (!ath_stoprecv(sc))
 254                 ret = false;
 255
 256         if (!flush) {
 257                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 258                         ath_rx_tasklet(sc, 1, true);
 259                 ath_rx_tasklet(sc, 1, false);
 260         } else {
 261                 ath_flushrecv(sc);
 262         }
 263
 264         return ret;
 265 }
 266
 267 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 268 {
 269         struct ath_hw *ah = sc->sc_ah;
 270         struct ath_common *common = ath9k_hw_common(ah);
 271
 272         if (ath_startrecv(sc) != 0) {
 273                 ath_err(common, "Unable to restart recv logic\n");
 274                 return false;
 275         }
 276
 277         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 278                                sc->config.txpowlimit, &sc->curtxpow);
 279         ath9k_hw_set_interrupts(ah);
 280         ath9k_hw_enable_interrupts(ah);
 281
 282         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
 283                 if (sc->sc_flags & SC_OP_BEACONS)
 284                         ath_set_beacon(sc);
 285
 286                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 287                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 288                 ath_start_rx_poll(sc, 3);
 289                 if (!common->disable_ani)
 290                         ath_start_ani(common);
 291         }
 292
 293         if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
 294                 struct ath_hw_antcomb_conf div_ant_conf;
 295                 u8 lna_conf;
 296
 297                 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
 298
 299                 if (sc->ant_rx == 1)
 300                         lna_conf = ATH_ANT_DIV_COMB_LNA1;
 301                 else
 302                         lna_conf = ATH_ANT_DIV_COMB_LNA2;
 303                 div_ant_conf.main_lna_conf = lna_conf;
 304                 div_ant_conf.alt_lna_conf = lna_conf;
 305
 306                 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
 307         }
 308
 309         ieee80211_wake_queues(sc->hw);
 310
 311         return true;
 312 }
 313
 314 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 315                               bool retry_tx)
 316 {
 317         struct ath_hw *ah = sc->sc_ah;
 318         struct ath_common *common = ath9k_hw_common(ah);
 319         struct ath9k_hw_cal_data *caldata = NULL;
 320         bool fastcc = true;
 321         bool flush = false;
 322         int r;
 323
 324         __ath_cancel_work(sc);
 325
 326         spin_lock_bh(&sc->sc_pcu_lock);
 327
 328         if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
 329                 fastcc = false;
 330                 caldata = &sc->caldata;
 331         }
 332
 333         if (!hchan) {
 334                 fastcc = false;
 335                 flush = true;
 336                 hchan = ah->curchan;
 337         }
 338
 339         if (!ath_prepare_reset(sc, retry_tx, flush))
 340                 fastcc = false;
 341
 342         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 343                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 344
 345         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 346         if (r) {
 347                 ath_err(common,
 348                         "Unable to reset channel, reset status %d\n", r);
 349                 goto out;
 350         }
 351
 352         if (!ath_complete_reset(sc, true))
 353                 r = -EIO;
 354
 355 out:
 356         spin_unlock_bh(&sc->sc_pcu_lock);
 357         return r;
 358 }
 359
 360
 361 /*
 362  * Set/change channels.  If the channel is really being changed, it's done
 363  * by reseting the chip.  To accomplish this we must first cleanup any pending
 364  * DMA, then restart stuff.
 365 */
 366 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 367                     struct ath9k_channel *hchan)
 368 {
 369         int r;
 370
 371         if (sc->sc_flags & SC_OP_INVALID)
 372                 return -EIO;
 373
 374         r = ath_reset_internal(sc, hchan, false);
 375
 376         return r;
 377 }
 378
 379 static void ath_paprd_activate(struct ath_softc *sc)
 380 {
 381         struct ath_hw *ah = sc->sc_ah;
 382         struct ath9k_hw_cal_data *caldata = ah->caldata;
 383         int chain;
 384
 385         if (!caldata || !caldata->paprd_done)
 386                 return;
 387
 388         ath9k_ps_wakeup(sc);
 389         ar9003_paprd_enable(ah, false);
 390         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 391                 if (!(ah->txchainmask & BIT(chain)))
 392                         continue;
 393
 394                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 395         }
 396
 397         ar9003_paprd_enable(ah, true);
 398         ath9k_ps_restore(sc);
 399 }
 400
 401 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 402 {
 403         struct ieee80211_hw *hw = sc->hw;
 404         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 405         struct ath_hw *ah = sc->sc_ah;
 406         struct ath_common *common = ath9k_hw_common(ah);
 407         struct ath_tx_control txctl;
 408         int time_left;
 409
 410         memset(&txctl, 0, sizeof(txctl));
 411         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 412
 413         memset(tx_info, 0, sizeof(*tx_info));
 414         tx_info->band = hw->conf.channel->band;
 415         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 416         tx_info->control.rates[0].idx = 0;
 417         tx_info->control.rates[0].count = 1;
 418         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 419         tx_info->control.rates[1].idx = -1;
 420
 421         init_completion(&sc->paprd_complete);
 422         txctl.paprd = BIT(chain);
 423
 424         if (ath_tx_start(hw, skb, &txctl) != 0) {
 425                 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
 426                 dev_kfree_skb_any(skb);
 427                 return false;
 428         }
 429
 430         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 431                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 432
 433         if (!time_left)
 434                 ath_dbg(common, CALIBRATE,
 435                         "Timeout waiting for paprd training on TX chain %d\n",
 436                         chain);
 437
 438         return !!time_left;
 439 }
 440
 441 void ath_paprd_calibrate(struct work_struct *work)
 442 {
 443         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 444         struct ieee80211_hw *hw = sc->hw;
 445         struct ath_hw *ah = sc->sc_ah;
 446         struct ieee80211_hdr *hdr;
 447         struct sk_buff *skb = NULL;
 448         struct ath9k_hw_cal_data *caldata = ah->caldata;
 449         struct ath_common *common = ath9k_hw_common(ah);
 450         int ftype;
 451         int chain_ok = 0;
 452         int chain;
 453         int len = 1800;
 454
 455         if (!caldata)
 456                 return;
 457
 458         ath9k_ps_wakeup(sc);
 459
 460         if (ar9003_paprd_init_table(ah) < 0)
 461                 goto fail_paprd;
 462
 463         skb = alloc_skb(len, GFP_KERNEL);
 464         if (!skb)
 465                 goto fail_paprd;
 466
 467         skb_put(skb, len);
 468         memset(skb->data, 0, len);
 469         hdr = (struct ieee80211_hdr *)skb->data;
 470         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 471         hdr->frame_control = cpu_to_le16(ftype);
 472         hdr->duration_id = cpu_to_le16(10);
 473         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 474         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 475         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 476
 477         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 478                 if (!(ah->txchainmask & BIT(chain)))
 479                         continue;
 480
 481                 chain_ok = 0;
 482
 483                 ath_dbg(common, CALIBRATE,
 484                         "Sending PAPRD frame for thermal measurement on chain %d\n",
 485                         chain);
 486                 if (!ath_paprd_send_frame(sc, skb, chain))
 487                         goto fail_paprd;
 488
 489                 ar9003_paprd_setup_gain_table(ah, chain);
 490
 491                 ath_dbg(common, CALIBRATE,
 492                         "Sending PAPRD training frame on chain %d\n", chain);
 493                 if (!ath_paprd_send_frame(sc, skb, chain))
 494                         goto fail_paprd;
 495
 496                 if (!ar9003_paprd_is_done(ah)) {
 497                         ath_dbg(common, CALIBRATE,
 498                                 "PAPRD not yet done on chain %d\n", chain);
 499                         break;
 500                 }
 501
 502                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
 503                         ath_dbg(common, CALIBRATE,
 504                                 "PAPRD create curve failed on chain %d\n",
 505                                                                    chain);
 506                         break;
 507                 }
 508
 509                 chain_ok = 1;
 510         }
 511         kfree_skb(skb);
 512
 513         if (chain_ok) {
 514                 caldata->paprd_done = true;
 515                 ath_paprd_activate(sc);
 516         }
 517
 518 fail_paprd:
 519         ath9k_ps_restore(sc);
 520 }
 521
 522 /*
 523  *  This routine performs the periodic noise floor calibration function
 524  *  that is used to adjust and optimize the chip performance.  This
 525  *  takes environmental changes (location, temperature) into account.
 526  *  When the task is complete, it reschedules itself depending on the
 527  *  appropriate interval that was calculated.
 528  */
 529 void ath_ani_calibrate(unsigned long data)
 530 {
 531         struct ath_softc *sc = (struct ath_softc *)data;
 532         struct ath_hw *ah = sc->sc_ah;
 533         struct ath_common *common = ath9k_hw_common(ah);
 534         bool longcal = false;
 535         bool shortcal = false;
 536         bool aniflag = false;
 537         unsigned int timestamp = jiffies_to_msecs(jiffies);
 538         u32 cal_interval, short_cal_interval, long_cal_interval;
 539         unsigned long flags;
 540
 541         if (ah->caldata && ah->caldata->nfcal_interference)
 542                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 543         else
 544                 long_cal_interval = ATH_LONG_CALINTERVAL;
 545
 546         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 547                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 548
 549         /* Only calibrate if awake */
 550         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 551                 goto set_timer;
 552
 553         ath9k_ps_wakeup(sc);
 554
 555         /* Long calibration runs independently of short calibration. */
 556         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 557                 longcal = true;
 558                 common->ani.longcal_timer = timestamp;
 559         }
 560
 561         /* Short calibration applies only while caldone is false */
 562         if (!common->ani.caldone) {
 563                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 564                         shortcal = true;
 565                         common->ani.shortcal_timer = timestamp;
 566                         common->ani.resetcal_timer = timestamp;
 567                 }
 568         } else {
 569                 if ((timestamp - common->ani.resetcal_timer) >=
 570                     ATH_RESTART_CALINTERVAL) {
 571                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 572                         if (common->ani.caldone)
 573                                 common->ani.resetcal_timer = timestamp;
 574                 }
 575         }
 576
 577         /* Verify whether we must check ANI */
 578         if (sc->sc_ah->config.enable_ani
 579             && (timestamp - common->ani.checkani_timer) >=
 580             ah->config.ani_poll_interval) {
 581                 aniflag = true;
 582                 common->ani.checkani_timer = timestamp;
 583         }
 584
 585         /* Call ANI routine if necessary */
 586         if (aniflag) {
 587                 spin_lock_irqsave(&common->cc_lock, flags);
 588                 ath9k_hw_ani_monitor(ah, ah->curchan);
 589                 ath_update_survey_stats(sc);
 590                 spin_unlock_irqrestore(&common->cc_lock, flags);
 591         }
 592
 593         /* Perform calibration if necessary */
 594         if (longcal || shortcal) {
 595                 common->ani.caldone =
 596                         ath9k_hw_calibrate(ah, ah->curchan,
 597                                                 ah->rxchainmask, longcal);
 598         }
 599
 600         ath_dbg(common, ANI,
 601                 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
 602                 jiffies,
 603                 longcal ? "long" : "", shortcal ? "short" : "",
 604                 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
 605
 606         ath9k_ps_restore(sc);
 607
 608 set_timer:
 609         /*
 610         * Set timer interval based on previous results.
 611         * The interval must be the shortest necessary to satisfy ANI,
 612         * short calibration and long calibration.
 613         */
 614         ath9k_debug_samp_bb_mac(sc);
 615         cal_interval = ATH_LONG_CALINTERVAL;
 616         if (sc->sc_ah->config.enable_ani)
 617                 cal_interval = min(cal_interval,
 618                                    (u32)ah->config.ani_poll_interval);
 619         if (!common->ani.caldone)
 620                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 621
 622         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 623         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 624                 if (!ah->caldata->paprd_done)
 625                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 626                 else if (!ah->paprd_table_write_done)
 627                         ath_paprd_activate(sc);
 628         }
 629 }
 630
 631 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 632                             struct ieee80211_vif *vif)
 633 {
 634         struct ath_node *an;
 635         an = (struct ath_node *)sta->drv_priv;
 636
 637 #ifdef CONFIG_ATH9K_DEBUGFS
 638         spin_lock(&sc->nodes_lock);
 639         list_add(&an->list, &sc->nodes);
 640         spin_unlock(&sc->nodes_lock);
 641 #endif
 642         an->sta = sta;
 643         an->vif = vif;
 644
 645         if (sta->ht_cap.ht_supported) {
 646                 ath_tx_node_init(sc, an);
 647                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 648                                      sta->ht_cap.ampdu_factor);
 649                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 650         }
 651 }
 652
 653 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 654 {
 655         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 656
 657 #ifdef CONFIG_ATH9K_DEBUGFS
 658         spin_lock(&sc->nodes_lock);
 659         list_del(&an->list);
 660         spin_unlock(&sc->nodes_lock);
 661         an->sta = NULL;
 662 #endif
 663
 664         if (sta->ht_cap.ht_supported)
 665                 ath_tx_node_cleanup(sc, an);
 666 }
 667
 668
 669 void ath9k_tasklet(unsigned long data)
 670 {
 671         struct ath_softc *sc = (struct ath_softc *)data;
 672         struct ath_hw *ah = sc->sc_ah;
 673         struct ath_common *common = ath9k_hw_common(ah);
 674
 675         u32 status = sc->intrstatus;
 676         u32 rxmask;
 677
 678         ath9k_ps_wakeup(sc);
 679         spin_lock(&sc->sc_pcu_lock);
 680
 681         if ((status & ATH9K_INT_FATAL) ||
 682             (status & ATH9K_INT_BB_WATCHDOG)) {
 683 #ifdef CONFIG_ATH9K_DEBUGFS
 684                 enum ath_reset_type type;
 685
 686                 if (status & ATH9K_INT_FATAL)
 687                         type = RESET_TYPE_FATAL_INT;
 688                 else
 689                         type = RESET_TYPE_BB_WATCHDOG;
 690
 691                 RESET_STAT_INC(sc, type);
 692 #endif
 693                 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 694                 goto out;
 695         }
 696
 697         /*
 698          * Only run the baseband hang check if beacons stop working in AP or
 699          * IBSS mode, because it has a high false positive rate. For station
 700          * mode it should not be necessary, since the upper layers will detect
 701          * this through a beacon miss automatically and the following channel
 702          * change will trigger a hardware reset anyway
 703          */
 704         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 705             !ath9k_hw_check_alive(ah))
 706                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 707
 708         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 709                 /*
 710                  * TSF sync does not look correct; remain awake to sync with
 711                  * the next Beacon.
 712                  */
 713                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 714                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 715         }
 716
 717         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 718                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 719                           ATH9K_INT_RXORN);
 720         else
 721                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 722
 723         if (status & rxmask) {
 724                 /* Check for high priority Rx first */
 725                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 726                     (status & ATH9K_INT_RXHP))
 727                         ath_rx_tasklet(sc, 0, true);
 728
 729                 ath_rx_tasklet(sc, 0, false);
 730         }
 731
 732         if (status & ATH9K_INT_TX) {
 733                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 734                         ath_tx_edma_tasklet(sc);
 735                 else
 736                         ath_tx_tasklet(sc);
 737         }
 738
 739         ath9k_btcoex_handle_interrupt(sc, status);
 740
 741 out:
 742         /* re-enable hardware interrupt */
 743         ath9k_hw_enable_interrupts(ah);
 744
 745         spin_unlock(&sc->sc_pcu_lock);
 746         ath9k_ps_restore(sc);
 747 }
 748
 749 irqreturn_t ath_isr(int irq, void *dev)
 750 {
 751 #define SCHED_INTR (                            \
 752                 ATH9K_INT_FATAL |               \
 753                 ATH9K_INT_BB_WATCHDOG |         \
 754                 ATH9K_INT_RXORN |               \
 755                 ATH9K_INT_RXEOL |               \
 756                 ATH9K_INT_RX |                  \
 757                 ATH9K_INT_RXLP |                \
 758                 ATH9K_INT_RXHP |                \
 759                 ATH9K_INT_TX |                  \
 760                 ATH9K_INT_BMISS |               \
 761                 ATH9K_INT_CST |                 \
 762                 ATH9K_INT_TSFOOR |              \
 763                 ATH9K_INT_GENTIMER |            \
 764                 ATH9K_INT_MCI)
 765
 766         struct ath_softc *sc = dev;
 767         struct ath_hw *ah = sc->sc_ah;
 768         struct ath_common *common = ath9k_hw_common(ah);
 769         enum ath9k_int status;
 770         bool sched = false;
 771
 772         /*
 773          * The hardware is not ready/present, don't
 774          * touch anything. Note this can happen early
 775          * on if the IRQ is shared.
 776          */
 777         if (sc->sc_flags & SC_OP_INVALID)
 778                 return IRQ_NONE;
 779
 780
 781         /* shared irq, not for us */
 782
 783         if (!ath9k_hw_intrpend(ah))
 784                 return IRQ_NONE;
 785
 786         /*
 787          * Figure out the reason(s) for the interrupt.  Note
 788          * that the hal returns a pseudo-ISR that may include
 789          * bits we haven't explicitly enabled so we mask the
 790          * value to insure we only process bits we requested.
 791          */
 792         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 793         status &= ah->imask;    /* discard unasked-for bits */
 794
 795         /*
 796          * If there are no status bits set, then this interrupt was not
 797          * for me (should have been caught above).
 798          */
 799         if (!status)
 800                 return IRQ_NONE;
 801
 802         /* Cache the status */
 803         sc->intrstatus = status;
 804
 805         if (status & SCHED_INTR)
 806                 sched = true;
 807
 808         /*
 809          * If a FATAL or RXORN interrupt is received, we have to reset the
 810          * chip immediately.
 811          */
 812         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 813             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 814                 goto chip_reset;
 815
 816         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 817             (status & ATH9K_INT_BB_WATCHDOG)) {
 818
 819                 spin_lock(&common->cc_lock);
 820                 ath_hw_cycle_counters_update(common);
 821                 ar9003_hw_bb_watchdog_dbg_info(ah);
 822                 spin_unlock(&common->cc_lock);
 823
 824                 goto chip_reset;
 825         }
 826
 827         if (status & ATH9K_INT_SWBA)
 828                 tasklet_schedule(&sc->bcon_tasklet);
 829
 830         if (status & ATH9K_INT_TXURN)
 831                 ath9k_hw_updatetxtriglevel(ah, true);
 832
 833         if (status & ATH9K_INT_RXEOL) {
 834                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 835                 ath9k_hw_set_interrupts(ah);
 836         }
 837
 838         if (status & ATH9K_INT_MIB) {
 839                 /*
 840                  * Disable interrupts until we service the MIB
 841                  * interrupt; otherwise it will continue to
 842                  * fire.
 843                  */
 844                 ath9k_hw_disable_interrupts(ah);
 845                 /*
 846                  * Let the hal handle the event. We assume
 847                  * it will clear whatever condition caused
 848                  * the interrupt.
 849                  */
 850                 spin_lock(&common->cc_lock);
 851                 ath9k_hw_proc_mib_event(ah);
 852                 spin_unlock(&common->cc_lock);
 853                 ath9k_hw_enable_interrupts(ah);
 854         }
 855
 856         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 857                 if (status & ATH9K_INT_TIM_TIMER) {
 858                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 859                                 goto chip_reset;
 860                         /* Clear RxAbort bit so that we can
 861                          * receive frames */
 862                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 863                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 864                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 865                 }
 866
 867 chip_reset:
 868
 869         ath_debug_stat_interrupt(sc, status);
 870
 871         if (sched) {
 872                 /* turn off every interrupt */
 873                 ath9k_hw_disable_interrupts(ah);
 874                 tasklet_schedule(&sc->intr_tq);
 875         }
 876
 877         return IRQ_HANDLED;
 878
 879 #undef SCHED_INTR
 880 }
 881
 882 static int ath_reset(struct ath_softc *sc, bool retry_tx)
 883 {
 884         int r;
 885
 886         ath9k_ps_wakeup(sc);
 887
 888         r = ath_reset_internal(sc, NULL, retry_tx);
 889
 890         if (retry_tx) {
 891                 int i;
 892                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 893                         if (ATH_TXQ_SETUP(sc, i)) {
 894                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 895                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 896                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 897                         }
 898                 }
 899         }
 900
 901         ath9k_ps_restore(sc);
 902
 903         return r;
 904 }
 905
 906 void ath_reset_work(struct work_struct *work)
 907 {
 908         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 909
 910         ath_reset(sc, true);
 911 }
 912
 913 void ath_hw_check(struct work_struct *work)
 914 {
 915         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 916         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 917         unsigned long flags;
 918         int busy;
 919         u8 is_alive, nbeacon = 1;
 920
 921         ath9k_ps_wakeup(sc);
 922         is_alive = ath9k_hw_check_alive(sc->sc_ah);
 923
 924         if (is_alive && !AR_SREV_9300(sc->sc_ah))
 925                 goto out;
 926         else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
 927                 ath_dbg(common, RESET,
 928                         "DCU stuck is detected. Schedule chip reset\n");
 929                 RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
 930                 goto sched_reset;
 931         }
 932
 933         spin_lock_irqsave(&common->cc_lock, flags);
 934         busy = ath_update_survey_stats(sc);
 935         spin_unlock_irqrestore(&common->cc_lock, flags);
 936
 937         ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
 938                 busy, sc->hw_busy_count + 1);
 939         if (busy >= 99) {
 940                 if (++sc->hw_busy_count >= 3) {
 941                         RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
 942                         goto sched_reset;
 943                 }
 944         } else if (busy >= 0) {
 945                 sc->hw_busy_count = 0;
 946                 nbeacon = 3;
 947         }
 948
 949         ath_start_rx_poll(sc, nbeacon);
 950         goto out;
 951
 952 sched_reset:
 953         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 954 out:
 955         ath9k_ps_restore(sc);
 956 }
 957
 958 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
 959 {
 960         static int count;
 961         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 962
 963         if (pll_sqsum >= 0x40000) {
 964                 count++;
 965                 if (count == 3) {
 966                         /* Rx is hung for more than 500ms. Reset it */
 967                         ath_dbg(common, RESET, "Possible RX hang, resetting\n");
 968                         RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
 969                         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 970                         count = 0;
 971                 }
 972         } else
 973                 count = 0;
 974 }
 975
 976 void ath_hw_pll_work(struct work_struct *work)
 977 {
 978         struct ath_softc *sc = container_of(work, struct ath_softc,
 979                                             hw_pll_work.work);
 980         u32 pll_sqsum;
 981
 982         if (AR_SREV_9485(sc->sc_ah)) {
 983
 984                 ath9k_ps_wakeup(sc);
 985                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
 986                 ath9k_ps_restore(sc);
 987
 988                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
 989
 990                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
 991         }
 992 }
 993
 994 /**********************/
 995 /* mac80211 callbacks */
 996 /**********************/
 997
 998 static int ath9k_start(struct ieee80211_hw *hw)
 999 {
1000         struct ath_softc *sc = hw->priv;
1001         struct ath_hw *ah = sc->sc_ah;
1002         struct ath_common *common = ath9k_hw_common(ah);
1003         struct ieee80211_channel *curchan = hw->conf.channel;
1004         struct ath9k_channel *init_channel;
1005         int r;
1006
1007         ath_dbg(common, CONFIG,
1008                 "Starting driver with initial channel: %d MHz\n",
1009                 curchan->center_freq);
1010
1011         ath9k_ps_wakeup(sc);
1012         mutex_lock(&sc->mutex);
1013
1014         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1015
1016         /* Reset SERDES registers */
1017         ath9k_hw_configpcipowersave(ah, false);
1018
1019         /*
1020          * The basic interface to setting the hardware in a good
1021          * state is ``reset''.  On return the hardware is known to
1022          * be powered up and with interrupts disabled.  This must
1023          * be followed by initialization of the appropriate bits
1024          * and then setup of the interrupt mask.
1025          */
1026         spin_lock_bh(&sc->sc_pcu_lock);
1027
1028         atomic_set(&ah->intr_ref_cnt, -1);
1029
1030         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1031         if (r) {
1032                 ath_err(common,
1033                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1034                         r, curchan->center_freq);
1035                 spin_unlock_bh(&sc->sc_pcu_lock);
1036                 goto mutex_unlock;
1037         }
1038
1039         /* Setup our intr mask. */
1040         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1041                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1042                     ATH9K_INT_GLOBAL;
1043
1044         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1045                 ah->imask |= ATH9K_INT_RXHP |
1046                              ATH9K_INT_RXLP |
1047                              ATH9K_INT_BB_WATCHDOG;
1048         else
1049                 ah->imask |= ATH9K_INT_RX;
1050
1051         ah->imask |= ATH9K_INT_GTT;
1052
1053         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1054                 ah->imask |= ATH9K_INT_CST;
1055
1056         if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1057                 ah->imask |= ATH9K_INT_MCI;
1058
1059         sc->sc_flags &= ~SC_OP_INVALID;
1060         sc->sc_ah->is_monitoring = false;
1061
1062         if (!ath_complete_reset(sc, false)) {
1063                 r = -EIO;
1064                 spin_unlock_bh(&sc->sc_pcu_lock);
1065                 goto mutex_unlock;
1066         }
1067
1068         if (ah->led_pin >= 0) {
1069                 ath9k_hw_cfg_output(ah, ah->led_pin,
1070                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1071                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1072         }
1073
1074         /*
1075          * Reset key cache to sane defaults (all entries cleared) instead of
1076          * semi-random values after suspend/resume.
1077          */
1078         ath9k_cmn_init_crypto(sc->sc_ah);
1079
1080         spin_unlock_bh(&sc->sc_pcu_lock);
1081
1082         ath9k_start_btcoex(sc);
1083
1084         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1085                 common->bus_ops->extn_synch_en(common);
1086
1087 mutex_unlock:
1088         mutex_unlock(&sc->mutex);
1089
1090         ath9k_ps_restore(sc);
1091
1092         return r;
1093 }
1094
1095 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1096 {
1097         struct ath_softc *sc = hw->priv;
1098         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1099         struct ath_tx_control txctl;
1100         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1101
1102         if (sc->ps_enabled) {
1103                 /*
1104                  * mac80211 does not set PM field for normal data frames, so we
1105                  * need to update that based on the current PS mode.
1106                  */
1107                 if (ieee80211_is_data(hdr->frame_control) &&
1108                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1109                     !ieee80211_has_pm(hdr->frame_control)) {
1110                         ath_dbg(common, PS,
1111                                 "Add PM=1 for a TX frame while in PS mode\n");
1112                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1113                 }
1114         }
1115
1116         /*
1117          * Cannot tx while the hardware is in full sleep, it first needs a full
1118          * chip reset to recover from that
1119          */
1120         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1121                 goto exit;
1122
1123         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1124                 /*
1125                  * We are using PS-Poll and mac80211 can request TX while in
1126                  * power save mode. Need to wake up hardware for the TX to be
1127                  * completed and if needed, also for RX of buffered frames.
1128                  */
1129                 ath9k_ps_wakeup(sc);
1130                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1131                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1132                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1133                         ath_dbg(common, PS,
1134                                 "Sending PS-Poll to pick a buffered frame\n");
1135                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1136                 } else {
1137                         ath_dbg(common, PS, "Wake up to complete TX\n");
1138                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1139                 }
1140                 /*
1141                  * The actual restore operation will happen only after
1142                  * the sc_flags bit is cleared. We are just dropping
1143                  * the ps_usecount here.
1144                  */
1145                 ath9k_ps_restore(sc);
1146         }
1147
1148         memset(&txctl, 0, sizeof(struct ath_tx_control));
1149         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1150
1151         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
1152
1153         if (ath_tx_start(hw, skb, &txctl) != 0) {
1154                 ath_dbg(common, XMIT, "TX failed\n");
1155                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
1156                 goto exit;
1157         }
1158
1159         return;
1160 exit:
1161         dev_kfree_skb_any(skb);
1162 }
1163
1164 static void ath9k_stop(struct ieee80211_hw *hw)
1165 {
1166         struct ath_softc *sc = hw->priv;
1167         struct ath_hw *ah = sc->sc_ah;
1168         struct ath_common *common = ath9k_hw_common(ah);
1169         bool prev_idle;
1170
1171         mutex_lock(&sc->mutex);
1172
1173         ath_cancel_work(sc);
1174         del_timer_sync(&sc->rx_poll_timer);
1175
1176         if (sc->sc_flags & SC_OP_INVALID) {
1177                 ath_dbg(common, ANY, "Device not present\n");
1178                 mutex_unlock(&sc->mutex);
1179                 return;
1180         }
1181
1182         /* Ensure HW is awake when we try to shut it down. */
1183         ath9k_ps_wakeup(sc);
1184
1185         ath9k_stop_btcoex(sc);
1186
1187         spin_lock_bh(&sc->sc_pcu_lock);
1188
1189         /* prevent tasklets to enable interrupts once we disable them */
1190         ah->imask &= ~ATH9K_INT_GLOBAL;
1191
1192         /* make sure h/w will not generate any interrupt
1193          * before setting the invalid flag. */
1194         ath9k_hw_disable_interrupts(ah);
1195
1196         spin_unlock_bh(&sc->sc_pcu_lock);
1197
1198         /* we can now sync irq and kill any running tasklets, since we already
1199          * disabled interrupts and not holding a spin lock */
1200         synchronize_irq(sc->irq);
1201         tasklet_kill(&sc->intr_tq);
1202         tasklet_kill(&sc->bcon_tasklet);
1203
1204         prev_idle = sc->ps_idle;
1205         sc->ps_idle = true;
1206
1207         spin_lock_bh(&sc->sc_pcu_lock);
1208
1209         if (ah->led_pin >= 0) {
1210                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1211                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1212         }
1213
1214         ath_prepare_reset(sc, false, true);
1215
1216         if (sc->rx.frag) {
1217                 dev_kfree_skb_any(sc->rx.frag);
1218                 sc->rx.frag = NULL;
1219         }
1220
1221         if (!ah->curchan)
1222                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1223
1224         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1225         ath9k_hw_phy_disable(ah);
1226
1227         ath9k_hw_configpcipowersave(ah, true);
1228
1229         spin_unlock_bh(&sc->sc_pcu_lock);
1230
1231         ath9k_ps_restore(sc);
1232
1233         sc->sc_flags |= SC_OP_INVALID;
1234         sc->ps_idle = prev_idle;
1235
1236         mutex_unlock(&sc->mutex);
1237
1238         ath_dbg(common, CONFIG, "Driver halt\n");
1239 }
1240
1241 bool ath9k_uses_beacons(int type)
1242 {
1243         switch (type) {
1244         case NL80211_IFTYPE_AP:
1245         case NL80211_IFTYPE_ADHOC:
1246         case NL80211_IFTYPE_MESH_POINT:
1247                 return true;
1248         default:
1249                 return false;
1250         }
1251 }
1252
1253 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1254                                  struct ieee80211_vif *vif)
1255 {
1256         struct ath_vif *avp = (void *)vif->drv_priv;
1257
1258         ath9k_set_beaconing_status(sc, false);
1259         ath_beacon_return(sc, avp);
1260         ath9k_set_beaconing_status(sc, true);
1261         sc->sc_flags &= ~SC_OP_BEACONS;
1262 }
1263
1264 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1265 {
1266         struct ath9k_vif_iter_data *iter_data = data;
1267         int i;
1268
1269         if (iter_data->hw_macaddr)
1270                 for (i = 0; i < ETH_ALEN; i++)
1271                         iter_data->mask[i] &=
1272                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1273
1274         switch (vif->type) {
1275         case NL80211_IFTYPE_AP:
1276                 iter_data->naps++;
1277                 break;
1278         case NL80211_IFTYPE_STATION:
1279                 iter_data->nstations++;
1280                 break;
1281         case NL80211_IFTYPE_ADHOC:
1282                 iter_data->nadhocs++;
1283                 break;
1284         case NL80211_IFTYPE_MESH_POINT:
1285                 iter_data->nmeshes++;
1286                 break;
1287         case NL80211_IFTYPE_WDS:
1288                 iter_data->nwds++;
1289                 break;
1290         default:
1291                 break;
1292         }
1293 }
1294
1295 /* Called with sc->mutex held. */
1296 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1297                                struct ieee80211_vif *vif,
1298                                struct ath9k_vif_iter_data *iter_data)
1299 {
1300         struct ath_softc *sc = hw->priv;
1301         struct ath_hw *ah = sc->sc_ah;
1302         struct ath_common *common = ath9k_hw_common(ah);
1303
1304         /*
1305          * Use the hardware MAC address as reference, the hardware uses it
1306          * together with the BSSID mask when matching addresses.
1307          */
1308         memset(iter_data, 0, sizeof(*iter_data));
1309         iter_data->hw_macaddr = common->macaddr;
1310         memset(&iter_data->mask, 0xff, ETH_ALEN);
1311
1312         if (vif)
1313                 ath9k_vif_iter(iter_data, vif->addr, vif);
1314
1315         /* Get list of all active MAC addresses */
1316         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1317                                                    iter_data);
1318 }
1319
1320 /* Called with sc->mutex held. */
1321 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1322                                           struct ieee80211_vif *vif)
1323 {
1324         struct ath_softc *sc = hw->priv;
1325         struct ath_hw *ah = sc->sc_ah;
1326         struct ath_common *common = ath9k_hw_common(ah);
1327         struct ath9k_vif_iter_data iter_data;
1328
1329         ath9k_calculate_iter_data(hw, vif, &iter_data);
1330
1331         /* Set BSSID mask. */
1332         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1333         ath_hw_setbssidmask(common);
1334
1335         /* Set op-mode & TSF */
1336         if (iter_data.naps > 0) {
1337                 ath9k_hw_set_tsfadjust(ah, 1);
1338                 sc->sc_flags |= SC_OP_TSF_RESET;
1339                 ah->opmode = NL80211_IFTYPE_AP;
1340         } else {
1341                 ath9k_hw_set_tsfadjust(ah, 0);
1342                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1343
1344                 if (iter_data.nmeshes)
1345                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1346                 else if (iter_data.nwds)
1347                         ah->opmode = NL80211_IFTYPE_AP;
1348                 else if (iter_data.nadhocs)
1349                         ah->opmode = NL80211_IFTYPE_ADHOC;
1350                 else
1351                         ah->opmode = NL80211_IFTYPE_STATION;
1352         }
1353
1354         /*
1355          * Enable MIB interrupts when there are hardware phy counters.
1356          */
1357         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1358                 if (ah->config.enable_ani)
1359                         ah->imask |= ATH9K_INT_MIB;
1360                 ah->imask |= ATH9K_INT_TSFOOR;
1361         } else {
1362                 ah->imask &= ~ATH9K_INT_MIB;
1363                 ah->imask &= ~ATH9K_INT_TSFOOR;
1364         }
1365
1366         ath9k_hw_set_interrupts(ah);
1367
1368         /* Set up ANI */
1369         if (iter_data.naps > 0) {
1370                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1371
1372                 if (!common->disable_ani) {
1373                         sc->sc_flags |= SC_OP_ANI_RUN;
1374                         ath_start_ani(common);
1375                 }
1376
1377         } else {
1378                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1379                 del_timer_sync(&common->ani.timer);
1380         }
1381 }
1382
1383 /* Called with sc->mutex held, vif counts set up properly. */
1384 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1385                                    struct ieee80211_vif *vif)
1386 {
1387         struct ath_softc *sc = hw->priv;
1388
1389         ath9k_calculate_summary_state(hw, vif);
1390
1391         if (ath9k_uses_beacons(vif->type)) {
1392                 int error;
1393                 /* This may fail because upper levels do not have beacons
1394                  * properly configured yet.  That's OK, we assume it
1395                  * will be properly configured and then we will be notified
1396                  * in the info_changed method and set up beacons properly
1397                  * there.
1398                  */
1399                 ath9k_set_beaconing_status(sc, false);
1400                 error = ath_beacon_alloc(sc, vif);
1401                 if (!error)
1402                         ath_beacon_config(sc, vif);
1403                 ath9k_set_beaconing_status(sc, true);
1404         }
1405 }
1406
1407 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
1408 {
1409         if (!AR_SREV_9300(sc->sc_ah))
1410                 return;
1411
1412         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF))
1413                 return;
1414
1415         mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
1416                         (nbeacon * sc->cur_beacon_conf.beacon_interval));
1417 }
1418
1419 void ath_rx_poll(unsigned long data)
1420 {
1421         struct ath_softc *sc = (struct ath_softc *)data;
1422
1423         ieee80211_queue_work(sc->hw, &sc->hw_check_work);
1424 }
1425
1426 static int ath9k_add_interface(struct ieee80211_hw *hw,
1427                                struct ieee80211_vif *vif)
1428 {
1429         struct ath_softc *sc = hw->priv;
1430         struct ath_hw *ah = sc->sc_ah;
1431         struct ath_common *common = ath9k_hw_common(ah);
1432         int ret = 0;
1433
1434         ath9k_ps_wakeup(sc);
1435         mutex_lock(&sc->mutex);
1436
1437         switch (vif->type) {
1438         case NL80211_IFTYPE_STATION:
1439         case NL80211_IFTYPE_WDS:
1440         case NL80211_IFTYPE_ADHOC:
1441         case NL80211_IFTYPE_AP:
1442         case NL80211_IFTYPE_MESH_POINT:
1443                 break;
1444         default:
1445                 ath_err(common, "Interface type %d not yet supported\n",
1446                         vif->type);
1447                 ret = -EOPNOTSUPP;
1448                 goto out;
1449         }
1450
1451         if (ath9k_uses_beacons(vif->type)) {
1452                 if (sc->nbcnvifs >= ATH_BCBUF) {
1453                         ath_err(common, "Not enough beacon buffers when adding"
1454                                 " new interface of type: %i\n",
1455                                 vif->type);
1456                         ret = -ENOBUFS;
1457                         goto out;
1458                 }
1459         }
1460
1461         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1462             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1463              sc->nvifs > 0)) {
1464                 ath_err(common, "Cannot create ADHOC interface when other"
1465                         " interfaces already exist.\n");
1466                 ret = -EINVAL;
1467                 goto out;
1468         }
1469
1470         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1471
1472         sc->nvifs++;
1473
1474         ath9k_do_vif_add_setup(hw, vif);
1475 out:
1476         mutex_unlock(&sc->mutex);
1477         ath9k_ps_restore(sc);
1478         return ret;
1479 }
1480
1481 static int ath9k_change_interface(struct ieee80211_hw *hw,
1482                                   struct ieee80211_vif *vif,
1483                                   enum nl80211_iftype new_type,
1484                                   bool p2p)
1485 {
1486         struct ath_softc *sc = hw->priv;
1487         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1488         int ret = 0;
1489
1490         ath_dbg(common, CONFIG, "Change Interface\n");
1491         mutex_lock(&sc->mutex);
1492         ath9k_ps_wakeup(sc);
1493
1494         /* See if new interface type is valid. */
1495         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1496             (sc->nvifs > 1)) {
1497                 ath_err(common, "When using ADHOC, it must be the only"
1498                         " interface.\n");
1499                 ret = -EINVAL;
1500                 goto out;
1501         }
1502
1503         if (ath9k_uses_beacons(new_type) &&
1504             !ath9k_uses_beacons(vif->type)) {
1505                 if (sc->nbcnvifs >= ATH_BCBUF) {
1506                         ath_err(common, "No beacon slot available\n");
1507                         ret = -ENOBUFS;
1508                         goto out;
1509                 }
1510         }
1511
1512         /* Clean up old vif stuff */
1513         if (ath9k_uses_beacons(vif->type))
1514                 ath9k_reclaim_beacon(sc, vif);
1515
1516         /* Add new settings */
1517         vif->type = new_type;
1518         vif->p2p = p2p;
1519
1520         ath9k_do_vif_add_setup(hw, vif);
1521 out:
1522         ath9k_ps_restore(sc);
1523         mutex_unlock(&sc->mutex);
1524         return ret;
1525 }
1526
1527 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1528                                    struct ieee80211_vif *vif)
1529 {
1530         struct ath_softc *sc = hw->priv;
1531         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1532
1533         ath_dbg(common, CONFIG, "Detach Interface\n");
1534
1535         ath9k_ps_wakeup(sc);
1536         mutex_lock(&sc->mutex);
1537
1538         sc->nvifs--;
1539
1540         /* Reclaim beacon resources */
1541         if (ath9k_uses_beacons(vif->type))
1542                 ath9k_reclaim_beacon(sc, vif);
1543
1544         ath9k_calculate_summary_state(hw, NULL);
1545
1546         mutex_unlock(&sc->mutex);
1547         ath9k_ps_restore(sc);
1548 }
1549
1550 static void ath9k_enable_ps(struct ath_softc *sc)
1551 {
1552         struct ath_hw *ah = sc->sc_ah;
1553
1554         sc->ps_enabled = true;
1555         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1556                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1557                         ah->imask |= ATH9K_INT_TIM_TIMER;
1558                         ath9k_hw_set_interrupts(ah);
1559                 }
1560                 ath9k_hw_setrxabort(ah, 1);
1561         }
1562 }
1563
1564 static void ath9k_disable_ps(struct ath_softc *sc)
1565 {
1566         struct ath_hw *ah = sc->sc_ah;
1567
1568         sc->ps_enabled = false;
1569         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1570         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1571                 ath9k_hw_setrxabort(ah, 0);
1572                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1573                                   PS_WAIT_FOR_CAB |
1574                                   PS_WAIT_FOR_PSPOLL_DATA |
1575                                   PS_WAIT_FOR_TX_ACK);
1576                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1577                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1578                         ath9k_hw_set_interrupts(ah);
1579                 }
1580         }
1581
1582 }
1583
1584 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1585 {
1586         struct ath_softc *sc = hw->priv;
1587         struct ath_hw *ah = sc->sc_ah;
1588         struct ath_common *common = ath9k_hw_common(ah);
1589         struct ieee80211_conf *conf = &hw->conf;
1590
1591         ath9k_ps_wakeup(sc);
1592         mutex_lock(&sc->mutex);
1593
1594         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1595                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1596                 if (sc->ps_idle)
1597                         ath_cancel_work(sc);
1598         }
1599
1600         /*
1601          * We just prepare to enable PS. We have to wait until our AP has
1602          * ACK'd our null data frame to disable RX otherwise we'll ignore
1603          * those ACKs and end up retransmitting the same null data frames.
1604          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1605          */
1606         if (changed & IEEE80211_CONF_CHANGE_PS) {
1607                 unsigned long flags;
1608                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1609                 if (conf->flags & IEEE80211_CONF_PS)
1610                         ath9k_enable_ps(sc);
1611                 else
1612                         ath9k_disable_ps(sc);
1613                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1614         }
1615
1616         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1617                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1618                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1619                         sc->sc_ah->is_monitoring = true;
1620                 } else {
1621                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1622                         sc->sc_ah->is_monitoring = false;
1623                 }
1624         }
1625
1626         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1627                 struct ieee80211_channel *curchan = hw->conf.channel;
1628                 int pos = curchan->hw_value;
1629                 int old_pos = -1;
1630                 unsigned long flags;
1631
1632                 if (ah->curchan)
1633                         old_pos = ah->curchan - &ah->channels[0];
1634
1635                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1636                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1637                 else
1638                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1639
1640                 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1641                         curchan->center_freq, conf->channel_type);
1642
1643                 /* update survey stats for the old channel before switching */
1644                 spin_lock_irqsave(&common->cc_lock, flags);
1645                 ath_update_survey_stats(sc);
1646                 spin_unlock_irqrestore(&common->cc_lock, flags);
1647
1648                 /*
1649                  * Preserve the current channel values, before updating
1650                  * the same channel
1651                  */
1652                 if (ah->curchan && (old_pos == pos))
1653                         ath9k_hw_getnf(ah, ah->curchan);
1654
1655                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1656                                           curchan, conf->channel_type);
1657
1658                 /*
1659                  * If the operating channel changes, change the survey in-use flags
1660                  * along with it.
1661                  * Reset the survey data for the new channel, unless we're switching
1662                  * back to the operating channel from an off-channel operation.
1663                  */
1664                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1665                     sc->cur_survey != &sc->survey[pos]) {
1666
1667                         if (sc->cur_survey)
1668                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1669
1670                         sc->cur_survey = &sc->survey[pos];
1671
1672                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1673                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1674                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1675                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1676                 }
1677
1678                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1679                         ath_err(common, "Unable to set channel\n");
1680                         mutex_unlock(&sc->mutex);
1681                         return -EINVAL;
1682                 }
1683
1684                 /*
1685                  * The most recent snapshot of channel->noisefloor for the old
1686                  * channel is only available after the hardware reset. Copy it to
1687                  * the survey stats now.
1688                  */
1689                 if (old_pos >= 0)
1690                         ath_update_survey_nf(sc, old_pos);
1691         }
1692
1693         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1694                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1695                 sc->config.txpowlimit = 2 * conf->power_level;
1696                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1697                                        sc->config.txpowlimit, &sc->curtxpow);
1698         }
1699
1700         mutex_unlock(&sc->mutex);
1701         ath9k_ps_restore(sc);
1702
1703         return 0;
1704 }
1705
1706 #define SUPPORTED_FILTERS                       \
1707         (FIF_PROMISC_IN_BSS |                   \
1708         FIF_ALLMULTI |                          \
1709         FIF_CONTROL |                           \
1710         FIF_PSPOLL |                            \
1711         FIF_OTHER_BSS |                         \
1712         FIF_BCN_PRBRESP_PROMISC |               \
1713         FIF_PROBE_REQ |                         \
1714         FIF_FCSFAIL)
1715
1716 /* FIXME: sc->sc_full_reset ? */
1717 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1718                                    unsigned int changed_flags,
1719                                    unsigned int *total_flags,
1720                                    u64 multicast)
1721 {
1722         struct ath_softc *sc = hw->priv;
1723         u32 rfilt;
1724
1725         changed_flags &= SUPPORTED_FILTERS;
1726         *total_flags &= SUPPORTED_FILTERS;
1727
1728         sc->rx.rxfilter = *total_flags;
1729         ath9k_ps_wakeup(sc);
1730         rfilt = ath_calcrxfilter(sc);
1731         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1732         ath9k_ps_restore(sc);
1733
1734         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1735                 rfilt);
1736 }
1737
1738 static int ath9k_sta_add(struct ieee80211_hw *hw,
1739                          struct ieee80211_vif *vif,
1740                          struct ieee80211_sta *sta)
1741 {
1742         struct ath_softc *sc = hw->priv;
1743         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1744         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1745         struct ieee80211_key_conf ps_key = { };
1746
1747         ath_node_attach(sc, sta, vif);
1748
1749         if (vif->type != NL80211_IFTYPE_AP &&
1750             vif->type != NL80211_IFTYPE_AP_VLAN)
1751                 return 0;
1752
1753         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1754
1755         return 0;
1756 }
1757
1758 static void ath9k_del_ps_key(struct ath_softc *sc,
1759                              struct ieee80211_vif *vif,
1760                              struct ieee80211_sta *sta)
1761 {
1762         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1763         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1764         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1765
1766         if (!an->ps_key)
1767             return;
1768
1769         ath_key_delete(common, &ps_key);
1770 }
1771
1772 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1773                             struct ieee80211_vif *vif,
1774                             struct ieee80211_sta *sta)
1775 {
1776         struct ath_softc *sc = hw->priv;
1777
1778         ath9k_del_ps_key(sc, vif, sta);
1779         ath_node_detach(sc, sta);
1780
1781         return 0;
1782 }
1783
1784 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1785                          struct ieee80211_vif *vif,
1786                          enum sta_notify_cmd cmd,
1787                          struct ieee80211_sta *sta)
1788 {
1789         struct ath_softc *sc = hw->priv;
1790         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1791
1792         if (!sta->ht_cap.ht_supported)
1793                 return;
1794
1795         switch (cmd) {
1796         case STA_NOTIFY_SLEEP:
1797                 an->sleeping = true;
1798                 ath_tx_aggr_sleep(sta, sc, an);
1799                 break;
1800         case STA_NOTIFY_AWAKE:
1801                 an->sleeping = false;
1802                 ath_tx_aggr_wakeup(sc, an);
1803                 break;
1804         }
1805 }
1806
1807 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1808                          struct ieee80211_vif *vif, u16 queue,
1809                          const struct ieee80211_tx_queue_params *params)
1810 {
1811         struct ath_softc *sc = hw->priv;
1812         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1813         struct ath_txq *txq;
1814         struct ath9k_tx_queue_info qi;
1815         int ret = 0;
1816
1817         if (queue >= WME_NUM_AC)
1818                 return 0;
1819
1820         txq = sc->tx.txq_map[queue];
1821
1822         ath9k_ps_wakeup(sc);
1823         mutex_lock(&sc->mutex);
1824
1825         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1826
1827         qi.tqi_aifs = params->aifs;
1828         qi.tqi_cwmin = params->cw_min;
1829         qi.tqi_cwmax = params->cw_max;
1830         qi.tqi_burstTime = params->txop;
1831
1832         ath_dbg(common, CONFIG,
1833                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1834                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1835                 params->cw_max, params->txop);
1836
1837         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1838         if (ret)
1839                 ath_err(common, "TXQ Update failed\n");
1840
1841         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1842                 if (queue == WME_AC_BE && !ret)
1843                         ath_beaconq_config(sc);
1844
1845         mutex_unlock(&sc->mutex);
1846         ath9k_ps_restore(sc);
1847
1848         return ret;
1849 }
1850
1851 static int ath9k_set_key(struct ieee80211_hw *hw,
1852                          enum set_key_cmd cmd,
1853                          struct ieee80211_vif *vif,
1854                          struct ieee80211_sta *sta,
1855                          struct ieee80211_key_conf *key)
1856 {
1857         struct ath_softc *sc = hw->priv;
1858         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1859         int ret = 0;
1860
1861         if (ath9k_modparam_nohwcrypt)
1862                 return -ENOSPC;
1863
1864         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1865              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1866             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1867              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1868             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1869                 /*
1870                  * For now, disable hw crypto for the RSN IBSS group keys. This
1871                  * could be optimized in the future to use a modified key cache
1872                  * design to support per-STA RX GTK, but until that gets
1873                  * implemented, use of software crypto for group addressed
1874                  * frames is a acceptable to allow RSN IBSS to be used.
1875                  */
1876                 return -EOPNOTSUPP;
1877         }
1878
1879         mutex_lock(&sc->mutex);
1880         ath9k_ps_wakeup(sc);
1881         ath_dbg(common, CONFIG, "Set HW Key\n");
1882
1883         switch (cmd) {
1884         case SET_KEY:
1885                 if (sta)
1886                         ath9k_del_ps_key(sc, vif, sta);
1887
1888                 ret = ath_key_config(common, vif, sta, key);
1889                 if (ret >= 0) {
1890                         key->hw_key_idx = ret;
1891                         /* push IV and Michael MIC generation to stack */
1892                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1893                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1894                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1895                         if (sc->sc_ah->sw_mgmt_crypto &&
1896                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1897                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1898                         ret = 0;
1899                 }
1900                 break;
1901         case DISABLE_KEY:
1902                 ath_key_delete(common, key);
1903                 break;
1904         default:
1905                 ret = -EINVAL;
1906         }
1907
1908         ath9k_ps_restore(sc);
1909         mutex_unlock(&sc->mutex);
1910
1911         return ret;
1912 }
1913 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1914 {
1915         struct ath_softc *sc = data;
1916         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1917         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1918         struct ath_vif *avp = (void *)vif->drv_priv;
1919
1920         /*
1921          * Skip iteration if primary station vif's bss info
1922          * was not changed
1923          */
1924         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1925                 return;
1926
1927         if (bss_conf->assoc) {
1928                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1929                 avp->primary_sta_vif = true;
1930                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1931                 common->curaid = bss_conf->aid;
1932                 ath9k_hw_write_associd(sc->sc_ah);
1933                 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1934                         bss_conf->aid, common->curbssid);
1935                 ath_beacon_config(sc, vif);
1936                 /*
1937                  * Request a re-configuration of Beacon related timers
1938                  * on the receipt of the first Beacon frame (i.e.,
1939                  * after time sync with the AP).
1940                  */
1941                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1942                 /* Reset rssi stats */
1943                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1944                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1945
1946                 ath_start_rx_poll(sc, 3);
1947
1948                 if (!common->disable_ani) {
1949                         sc->sc_flags |= SC_OP_ANI_RUN;
1950                         ath_start_ani(common);
1951                 }
1952
1953         }
1954 }
1955
1956 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1957 {
1958         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1959         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1960         struct ath_vif *avp = (void *)vif->drv_priv;
1961
1962         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1963                 return;
1964
1965         /* Reconfigure bss info */
1966         if (avp->primary_sta_vif && !bss_conf->assoc) {
1967                 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1968                         common->curaid, common->curbssid);
1969                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1970                 avp->primary_sta_vif = false;
1971                 memset(common->curbssid, 0, ETH_ALEN);
1972                 common->curaid = 0;
1973         }
1974
1975         ieee80211_iterate_active_interfaces_atomic(
1976                         sc->hw, ath9k_bss_iter, sc);
1977
1978         /*
1979          * None of station vifs are associated.
1980          * Clear bssid & aid
1981          */
1982         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1983                 ath9k_hw_write_associd(sc->sc_ah);
1984                 /* Stop ANI */
1985                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1986                 del_timer_sync(&common->ani.timer);
1987                 del_timer_sync(&sc->rx_poll_timer);
1988                 memset(&sc->caldata, 0, sizeof(sc->caldata));
1989         }
1990 }
1991
1992 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1993                                    struct ieee80211_vif *vif,
1994                                    struct ieee80211_bss_conf *bss_conf,
1995                                    u32 changed)
1996 {
1997         struct ath_softc *sc = hw->priv;
1998         struct ath_hw *ah = sc->sc_ah;
1999         struct ath_common *common = ath9k_hw_common(ah);
2000         struct ath_vif *avp = (void *)vif->drv_priv;
2001         int slottime;
2002         int error;
2003
2004         ath9k_ps_wakeup(sc);
2005         mutex_lock(&sc->mutex);
2006
2007         if (changed & BSS_CHANGED_ASSOC) {
2008                 ath9k_config_bss(sc, vif);
2009
2010                 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
2011                         common->curbssid, common->curaid);
2012         }
2013
2014         if (changed & BSS_CHANGED_IBSS) {
2015                 /* There can be only one vif available */
2016                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2017                 common->curaid = bss_conf->aid;
2018                 ath9k_hw_write_associd(sc->sc_ah);
2019
2020                 if (bss_conf->ibss_joined) {
2021                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2022
2023                         if (!common->disable_ani) {
2024                                 sc->sc_flags |= SC_OP_ANI_RUN;
2025                                 ath_start_ani(common);
2026                         }
2027
2028                 } else {
2029                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2030                         del_timer_sync(&common->ani.timer);
2031                         del_timer_sync(&sc->rx_poll_timer);
2032                 }
2033         }
2034
2035         /* Enable transmission of beacons (AP, IBSS, MESH) */
2036         if ((changed & BSS_CHANGED_BEACON) ||
2037             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2038                 ath9k_set_beaconing_status(sc, false);
2039                 error = ath_beacon_alloc(sc, vif);
2040                 if (!error)
2041                         ath_beacon_config(sc, vif);
2042                 ath9k_set_beaconing_status(sc, true);
2043         }
2044
2045         if (changed & BSS_CHANGED_ERP_SLOT) {
2046                 if (bss_conf->use_short_slot)
2047                         slottime = 9;
2048                 else
2049                         slottime = 20;
2050                 if (vif->type == NL80211_IFTYPE_AP) {
2051                         /*
2052                          * Defer update, so that connected stations can adjust
2053                          * their settings at the same time.
2054                          * See beacon.c for more details
2055                          */
2056                         sc->beacon.slottime = slottime;
2057                         sc->beacon.updateslot = UPDATE;
2058                 } else {
2059                         ah->slottime = slottime;
2060                         ath9k_hw_init_global_settings(ah);
2061                 }
2062         }
2063
2064         /* Disable transmission of beacons */
2065         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2066             !bss_conf->enable_beacon) {
2067                 ath9k_set_beaconing_status(sc, false);
2068                 avp->is_bslot_active = false;
2069                 ath9k_set_beaconing_status(sc, true);
2070         }
2071
2072         if (changed & BSS_CHANGED_BEACON_INT) {
2073                 /*
2074                  * In case of AP mode, the HW TSF has to be reset
2075                  * when the beacon interval changes.
2076                  */
2077                 if (vif->type == NL80211_IFTYPE_AP) {
2078                         sc->sc_flags |= SC_OP_TSF_RESET;
2079                         ath9k_set_beaconing_status(sc, false);
2080                         error = ath_beacon_alloc(sc, vif);
2081                         if (!error)
2082                                 ath_beacon_config(sc, vif);
2083                         ath9k_set_beaconing_status(sc, true);
2084                 } else
2085                         ath_beacon_config(sc, vif);
2086         }
2087
2088         mutex_unlock(&sc->mutex);
2089         ath9k_ps_restore(sc);
2090 }
2091
2092 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2093 {
2094         struct ath_softc *sc = hw->priv;
2095         u64 tsf;
2096
2097         mutex_lock(&sc->mutex);
2098         ath9k_ps_wakeup(sc);
2099         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2100         ath9k_ps_restore(sc);
2101         mutex_unlock(&sc->mutex);
2102
2103         return tsf;
2104 }
2105
2106 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2107                           struct ieee80211_vif *vif,
2108                           u64 tsf)
2109 {
2110         struct ath_softc *sc = hw->priv;
2111
2112         mutex_lock(&sc->mutex);
2113         ath9k_ps_wakeup(sc);
2114         ath9k_hw_settsf64(sc->sc_ah, tsf);
2115         ath9k_ps_restore(sc);
2116         mutex_unlock(&sc->mutex);
2117 }
2118
2119 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2120 {
2121         struct ath_softc *sc = hw->priv;
2122
2123         mutex_lock(&sc->mutex);
2124
2125         ath9k_ps_wakeup(sc);
2126         ath9k_hw_reset_tsf(sc->sc_ah);
2127         ath9k_ps_restore(sc);
2128
2129         mutex_unlock(&sc->mutex);
2130 }
2131
2132 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2133                               struct ieee80211_vif *vif,
2134                               enum ieee80211_ampdu_mlme_action action,
2135                               struct ieee80211_sta *sta,
2136                               u16 tid, u16 *ssn, u8 buf_size)
2137 {
2138         struct ath_softc *sc = hw->priv;
2139         int ret = 0;
2140
2141         local_bh_disable();
2142
2143         switch (action) {
2144         case IEEE80211_AMPDU_RX_START:
2145                 break;
2146         case IEEE80211_AMPDU_RX_STOP:
2147                 break;
2148         case IEEE80211_AMPDU_TX_START:
2149                 ath9k_ps_wakeup(sc);
2150                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2151                 if (!ret)
2152                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2153                 ath9k_ps_restore(sc);
2154                 break;
2155         case IEEE80211_AMPDU_TX_STOP:
2156                 ath9k_ps_wakeup(sc);
2157                 ath_tx_aggr_stop(sc, sta, tid);
2158                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2159                 ath9k_ps_restore(sc);
2160                 break;
2161         case IEEE80211_AMPDU_TX_OPERATIONAL:
2162                 ath9k_ps_wakeup(sc);
2163                 ath_tx_aggr_resume(sc, sta, tid);
2164                 ath9k_ps_restore(sc);
2165                 break;
2166         default:
2167                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2168         }
2169
2170         local_bh_enable();
2171
2172         return ret;
2173 }
2174
2175 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2176                              struct survey_info *survey)
2177 {
2178         struct ath_softc *sc = hw->priv;
2179         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2180         struct ieee80211_supported_band *sband;
2181         struct ieee80211_channel *chan;
2182         unsigned long flags;
2183         int pos;
2184
2185         spin_lock_irqsave(&common->cc_lock, flags);
2186         if (idx == 0)
2187                 ath_update_survey_stats(sc);
2188
2189         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2190         if (sband && idx >= sband->n_channels) {
2191                 idx -= sband->n_channels;
2192                 sband = NULL;
2193         }
2194
2195         if (!sband)
2196                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2197
2198         if (!sband || idx >= sband->n_channels) {
2199                 spin_unlock_irqrestore(&common->cc_lock, flags);
2200                 return -ENOENT;
2201         }
2202
2203         chan = &sband->channels[idx];
2204         pos = chan->hw_value;
2205         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2206         survey->channel = chan;
2207         spin_unlock_irqrestore(&common->cc_lock, flags);
2208
2209         return 0;
2210 }
2211
2212 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2213 {
2214         struct ath_softc *sc = hw->priv;
2215         struct ath_hw *ah = sc->sc_ah;
2216
2217         mutex_lock(&sc->mutex);
2218         ah->coverage_class = coverage_class;
2219
2220         ath9k_ps_wakeup(sc);
2221         ath9k_hw_init_global_settings(ah);
2222         ath9k_ps_restore(sc);
2223
2224         mutex_unlock(&sc->mutex);
2225 }
2226
2227 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2228 {
2229         struct ath_softc *sc = hw->priv;
2230         struct ath_hw *ah = sc->sc_ah;
2231         struct ath_common *common = ath9k_hw_common(ah);
2232         int timeout = 200; /* ms */
2233         int i, j;
2234         bool drain_txq;
2235
2236         mutex_lock(&sc->mutex);
2237         cancel_delayed_work_sync(&sc->tx_complete_work);
2238
2239         if (ah->ah_flags & AH_UNPLUGGED) {
2240                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2241                 mutex_unlock(&sc->mutex);
2242                 return;
2243         }
2244
2245         if (sc->sc_flags & SC_OP_INVALID) {
2246                 ath_dbg(common, ANY, "Device not present\n");
2247                 mutex_unlock(&sc->mutex);
2248                 return;
2249         }
2250
2251         for (j = 0; j < timeout; j++) {
2252                 bool npend = false;
2253
2254                 if (j)
2255                         usleep_range(1000, 2000);
2256
2257                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2258                         if (!ATH_TXQ_SETUP(sc, i))
2259                                 continue;
2260
2261                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2262
2263                         if (npend)
2264                                 break;
2265                 }
2266
2267                 if (!npend)
2268                     break;
2269         }
2270
2271         if (drop) {
2272                 ath9k_ps_wakeup(sc);
2273                 spin_lock_bh(&sc->sc_pcu_lock);
2274                 drain_txq = ath_drain_all_txq(sc, false);
2275                 spin_unlock_bh(&sc->sc_pcu_lock);
2276
2277                 if (!drain_txq)
2278                         ath_reset(sc, false);
2279
2280                 ath9k_ps_restore(sc);
2281                 ieee80211_wake_queues(hw);
2282         }
2283
2284         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2285         mutex_unlock(&sc->mutex);
2286 }
2287
2288 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2289 {
2290         struct ath_softc *sc = hw->priv;
2291         int i;
2292
2293         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2294                 if (!ATH_TXQ_SETUP(sc, i))
2295                         continue;
2296
2297                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2298                         return true;
2299         }
2300         return false;
2301 }
2302
2303 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2304 {
2305         struct ath_softc *sc = hw->priv;
2306         struct ath_hw *ah = sc->sc_ah;
2307         struct ieee80211_vif *vif;
2308         struct ath_vif *avp;
2309         struct ath_buf *bf;
2310         struct ath_tx_status ts;
2311         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2312         int status;
2313
2314         vif = sc->beacon.bslot[0];
2315         if (!vif)
2316                 return 0;
2317
2318         avp = (void *)vif->drv_priv;
2319         if (!avp->is_bslot_active)
2320                 return 0;
2321
2322         if (!sc->beacon.tx_processed && !edma) {
2323                 tasklet_disable(&sc->bcon_tasklet);
2324
2325                 bf = avp->av_bcbuf;
2326                 if (!bf || !bf->bf_mpdu)
2327                         goto skip;
2328
2329                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2330                 if (status == -EINPROGRESS)
2331                         goto skip;
2332
2333                 sc->beacon.tx_processed = true;
2334                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2335
2336 skip:
2337                 tasklet_enable(&sc->bcon_tasklet);
2338         }
2339
2340         return sc->beacon.tx_last;
2341 }
2342
2343 static int ath9k_get_stats(struct ieee80211_hw *hw,
2344                            struct ieee80211_low_level_stats *stats)
2345 {
2346         struct ath_softc *sc = hw->priv;
2347         struct ath_hw *ah = sc->sc_ah;
2348         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2349
2350         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2351         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2352         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2353         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2354         return 0;
2355 }
2356
2357 static u32 fill_chainmask(u32 cap, u32 new)
2358 {
2359         u32 filled = 0;
2360         int i;
2361
2362         for (i = 0; cap && new; i++, cap >>= 1) {
2363                 if (!(cap & BIT(0)))
2364                         continue;
2365
2366                 if (new & BIT(0))
2367                         filled |= BIT(i);
2368
2369                 new >>= 1;
2370         }
2371
2372         return filled;
2373 }
2374
2375 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2376 {
2377         struct ath_softc *sc = hw->priv;
2378         struct ath_hw *ah = sc->sc_ah;
2379
2380         if (!rx_ant || !tx_ant)
2381                 return -EINVAL;
2382
2383         sc->ant_rx = rx_ant;
2384         sc->ant_tx = tx_ant;
2385
2386         if (ah->caps.rx_chainmask == 1)
2387                 return 0;
2388
2389         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2390         if (AR_SREV_9100(ah))
2391                 ah->rxchainmask = 0x7;
2392         else
2393                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2394
2395         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2396         ath9k_reload_chainmask_settings(sc);
2397
2398         return 0;
2399 }
2400
2401 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2402 {
2403         struct ath_softc *sc = hw->priv;
2404
2405         *tx_ant = sc->ant_tx;
2406         *rx_ant = sc->ant_rx;
2407         return 0;
2408 }
2409
2410 struct ieee80211_ops ath9k_ops = {
2411         .tx                 = ath9k_tx,
2412         .start              = ath9k_start,
2413         .stop               = ath9k_stop,
2414         .add_interface      = ath9k_add_interface,
2415         .change_interface   = ath9k_change_interface,
2416         .remove_interface   = ath9k_remove_interface,
2417         .config             = ath9k_config,
2418         .configure_filter   = ath9k_configure_filter,
2419         .sta_add            = ath9k_sta_add,
2420         .sta_remove         = ath9k_sta_remove,
2421         .sta_notify         = ath9k_sta_notify,
2422         .conf_tx            = ath9k_conf_tx,
2423         .bss_info_changed   = ath9k_bss_info_changed,
2424         .set_key            = ath9k_set_key,
2425         .get_tsf            = ath9k_get_tsf,
2426         .set_tsf            = ath9k_set_tsf,
2427         .reset_tsf          = ath9k_reset_tsf,
2428         .ampdu_action       = ath9k_ampdu_action,
2429         .get_survey         = ath9k_get_survey,
2430         .rfkill_poll        = ath9k_rfkill_poll_state,
2431         .set_coverage_class = ath9k_set_coverage_class,
2432         .flush              = ath9k_flush,
2433         .tx_frames_pending  = ath9k_tx_frames_pending,
2434         .tx_last_beacon     = ath9k_tx_last_beacon,
2435         .get_stats          = ath9k_get_stats,
2436         .set_antenna        = ath9k_set_antenna,
2437         .get_antenna        = ath9k_get_antenna,
2438 };