2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
227 if (sc->sc_flags & SC_OP_INVALID)
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
237 spin_lock_bh(&sc->sc_pcu_lock);
240 * This is only performed if the channel settings have
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
251 if (!ath_stoprecv(sc))
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 if (sc->sc_flags & SC_OP_BEACONS)
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
295 spin_unlock_bh(&sc->sc_pcu_lock);
297 ath9k_ps_restore(sc);
301 static void ath_paprd_activate(struct ath_softc *sc)
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
308 if (!caldata || !caldata->paprd_done)
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
326 struct ieee80211_hw *hw = sc->hw;
327 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328 struct ath_hw *ah = sc->sc_ah;
329 struct ath_common *common = ath9k_hw_common(ah);
330 struct ath_tx_control txctl;
333 memset(&txctl, 0, sizeof(txctl));
334 txctl.txq = sc->tx.txq_map[WME_AC_BE];
336 memset(tx_info, 0, sizeof(*tx_info));
337 tx_info->band = hw->conf.channel->band;
338 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
339 tx_info->control.rates[0].idx = 0;
340 tx_info->control.rates[0].count = 1;
341 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
342 tx_info->control.rates[1].idx = -1;
344 init_completion(&sc->paprd_complete);
345 txctl.paprd = BIT(chain);
347 if (ath_tx_start(hw, skb, &txctl) != 0) {
348 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
349 dev_kfree_skb_any(skb);
353 time_left = wait_for_completion_timeout(&sc->paprd_complete,
354 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
357 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
358 "Timeout waiting for paprd training on TX chain %d\n",
364 void ath_paprd_calibrate(struct work_struct *work)
366 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
367 struct ieee80211_hw *hw = sc->hw;
368 struct ath_hw *ah = sc->sc_ah;
369 struct ieee80211_hdr *hdr;
370 struct sk_buff *skb = NULL;
371 struct ath9k_hw_cal_data *caldata = ah->caldata;
372 struct ath_common *common = ath9k_hw_common(ah);
381 if (ar9003_paprd_init_table(ah) < 0)
384 skb = alloc_skb(len, GFP_KERNEL);
389 memset(skb->data, 0, len);
390 hdr = (struct ieee80211_hdr *)skb->data;
391 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
392 hdr->frame_control = cpu_to_le16(ftype);
393 hdr->duration_id = cpu_to_le16(10);
394 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
395 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
396 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
399 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
400 if (!(common->tx_chainmask & BIT(chain)))
405 ath_dbg(common, ATH_DBG_CALIBRATE,
406 "Sending PAPRD frame for thermal measurement "
407 "on chain %d\n", chain);
408 if (!ath_paprd_send_frame(sc, skb, chain))
411 ar9003_paprd_setup_gain_table(ah, chain);
413 ath_dbg(common, ATH_DBG_CALIBRATE,
414 "Sending PAPRD training frame on chain %d\n", chain);
415 if (!ath_paprd_send_frame(sc, skb, chain))
418 if (!ar9003_paprd_is_done(ah))
421 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
429 caldata->paprd_done = true;
430 ath_paprd_activate(sc);
434 ath9k_ps_restore(sc);
438 * This routine performs the periodic noise floor calibration function
439 * that is used to adjust and optimize the chip performance. This
440 * takes environmental changes (location, temperature) into account.
441 * When the task is complete, it reschedules itself depending on the
442 * appropriate interval that was calculated.
444 void ath_ani_calibrate(unsigned long data)
446 struct ath_softc *sc = (struct ath_softc *)data;
447 struct ath_hw *ah = sc->sc_ah;
448 struct ath_common *common = ath9k_hw_common(ah);
449 bool longcal = false;
450 bool shortcal = false;
451 bool aniflag = false;
452 unsigned int timestamp = jiffies_to_msecs(jiffies);
453 u32 cal_interval, short_cal_interval, long_cal_interval;
456 if (ah->caldata && ah->caldata->nfcal_interference)
457 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
459 long_cal_interval = ATH_LONG_CALINTERVAL;
461 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
462 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
464 /* Only calibrate if awake */
465 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
470 /* Long calibration runs independently of short calibration. */
471 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
473 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
474 common->ani.longcal_timer = timestamp;
477 /* Short calibration applies only while caldone is false */
478 if (!common->ani.caldone) {
479 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
481 ath_dbg(common, ATH_DBG_ANI,
482 "shortcal @%lu\n", jiffies);
483 common->ani.shortcal_timer = timestamp;
484 common->ani.resetcal_timer = timestamp;
487 if ((timestamp - common->ani.resetcal_timer) >=
488 ATH_RESTART_CALINTERVAL) {
489 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
490 if (common->ani.caldone)
491 common->ani.resetcal_timer = timestamp;
495 /* Verify whether we must check ANI */
496 if ((timestamp - common->ani.checkani_timer) >=
497 ah->config.ani_poll_interval) {
499 common->ani.checkani_timer = timestamp;
502 /* Skip all processing if there's nothing to do. */
503 if (longcal || shortcal || aniflag) {
504 /* Call ANI routine if necessary */
506 spin_lock_irqsave(&common->cc_lock, flags);
507 ath9k_hw_ani_monitor(ah, ah->curchan);
508 ath_update_survey_stats(sc);
509 spin_unlock_irqrestore(&common->cc_lock, flags);
512 /* Perform calibration if necessary */
513 if (longcal || shortcal) {
514 common->ani.caldone =
515 ath9k_hw_calibrate(ah,
517 common->rx_chainmask,
522 ath9k_ps_restore(sc);
526 * Set timer interval based on previous results.
527 * The interval must be the shortest necessary to satisfy ANI,
528 * short calibration and long calibration.
530 cal_interval = ATH_LONG_CALINTERVAL;
531 if (sc->sc_ah->config.enable_ani)
532 cal_interval = min(cal_interval,
533 (u32)ah->config.ani_poll_interval);
534 if (!common->ani.caldone)
535 cal_interval = min(cal_interval, (u32)short_cal_interval);
537 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
538 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
539 if (!ah->caldata->paprd_done)
540 ieee80211_queue_work(sc->hw, &sc->paprd_work);
541 else if (!ah->paprd_table_write_done)
542 ath_paprd_activate(sc);
546 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
549 struct ath_hw *ah = sc->sc_ah;
550 an = (struct ath_node *)sta->drv_priv;
552 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
553 sc->sc_flags |= SC_OP_ENABLE_APM;
555 if (sc->sc_flags & SC_OP_TXAGGR) {
556 ath_tx_node_init(sc, an);
557 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
558 sta->ht_cap.ampdu_factor);
559 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
563 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
565 struct ath_node *an = (struct ath_node *)sta->drv_priv;
567 if (sc->sc_flags & SC_OP_TXAGGR)
568 ath_tx_node_cleanup(sc, an);
571 void ath_hw_check(struct work_struct *work)
573 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
578 for (i = 0; i < 3; i++) {
579 if (ath9k_hw_check_alive(sc->sc_ah))
587 ath9k_ps_restore(sc);
590 void ath9k_tasklet(unsigned long data)
592 struct ath_softc *sc = (struct ath_softc *)data;
593 struct ath_hw *ah = sc->sc_ah;
594 struct ath_common *common = ath9k_hw_common(ah);
596 u32 status = sc->intrstatus;
599 if (status & ATH9K_INT_FATAL) {
605 spin_lock(&sc->sc_pcu_lock);
607 if (!ath9k_hw_check_alive(ah))
608 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
610 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
611 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
614 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
616 if (status & rxmask) {
617 /* Check for high priority Rx first */
618 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
619 (status & ATH9K_INT_RXHP))
620 ath_rx_tasklet(sc, 0, true);
622 ath_rx_tasklet(sc, 0, false);
625 if (status & ATH9K_INT_TX) {
626 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
627 ath_tx_edma_tasklet(sc);
632 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
634 * TSF sync does not look correct; remain awake to sync with
637 ath_dbg(common, ATH_DBG_PS,
638 "TSFOOR - Sync with next Beacon\n");
639 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
642 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
643 if (status & ATH9K_INT_GENTIMER)
644 ath_gen_timer_isr(sc->sc_ah);
646 /* re-enable hardware interrupt */
647 ath9k_hw_enable_interrupts(ah);
649 spin_unlock(&sc->sc_pcu_lock);
650 ath9k_ps_restore(sc);
653 irqreturn_t ath_isr(int irq, void *dev)
655 #define SCHED_INTR ( \
668 struct ath_softc *sc = dev;
669 struct ath_hw *ah = sc->sc_ah;
670 struct ath_common *common = ath9k_hw_common(ah);
671 enum ath9k_int status;
675 * The hardware is not ready/present, don't
676 * touch anything. Note this can happen early
677 * on if the IRQ is shared.
679 if (sc->sc_flags & SC_OP_INVALID)
683 /* shared irq, not for us */
685 if (!ath9k_hw_intrpend(ah))
689 * Figure out the reason(s) for the interrupt. Note
690 * that the hal returns a pseudo-ISR that may include
691 * bits we haven't explicitly enabled so we mask the
692 * value to insure we only process bits we requested.
694 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
695 status &= ah->imask; /* discard unasked-for bits */
698 * If there are no status bits set, then this interrupt was not
699 * for me (should have been caught above).
704 /* Cache the status */
705 sc->intrstatus = status;
707 if (status & SCHED_INTR)
711 * If a FATAL or RXORN interrupt is received, we have to reset the
714 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
715 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
718 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719 (status & ATH9K_INT_BB_WATCHDOG)) {
721 spin_lock(&common->cc_lock);
722 ath_hw_cycle_counters_update(common);
723 ar9003_hw_bb_watchdog_dbg_info(ah);
724 spin_unlock(&common->cc_lock);
729 if (status & ATH9K_INT_SWBA)
730 tasklet_schedule(&sc->bcon_tasklet);
732 if (status & ATH9K_INT_TXURN)
733 ath9k_hw_updatetxtriglevel(ah, true);
735 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
736 if (status & ATH9K_INT_RXEOL) {
737 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
738 ath9k_hw_set_interrupts(ah, ah->imask);
742 if (status & ATH9K_INT_MIB) {
744 * Disable interrupts until we service the MIB
745 * interrupt; otherwise it will continue to
748 ath9k_hw_disable_interrupts(ah);
750 * Let the hal handle the event. We assume
751 * it will clear whatever condition caused
754 spin_lock(&common->cc_lock);
755 ath9k_hw_proc_mib_event(ah);
756 spin_unlock(&common->cc_lock);
757 ath9k_hw_enable_interrupts(ah);
760 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
761 if (status & ATH9K_INT_TIM_TIMER) {
762 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
764 /* Clear RxAbort bit so that we can
766 ath9k_setpower(sc, ATH9K_PM_AWAKE);
767 ath9k_hw_setrxabort(sc->sc_ah, 0);
768 sc->ps_flags |= PS_WAIT_FOR_BEACON;
773 ath_debug_stat_interrupt(sc, status);
776 /* turn off every interrupt */
777 ath9k_hw_disable_interrupts(ah);
778 tasklet_schedule(&sc->intr_tq);
786 static u32 ath_get_extchanmode(struct ath_softc *sc,
787 struct ieee80211_channel *chan,
788 enum nl80211_channel_type channel_type)
792 switch (chan->band) {
793 case IEEE80211_BAND_2GHZ:
794 switch(channel_type) {
795 case NL80211_CHAN_NO_HT:
796 case NL80211_CHAN_HT20:
797 chanmode = CHANNEL_G_HT20;
799 case NL80211_CHAN_HT40PLUS:
800 chanmode = CHANNEL_G_HT40PLUS;
802 case NL80211_CHAN_HT40MINUS:
803 chanmode = CHANNEL_G_HT40MINUS;
807 case IEEE80211_BAND_5GHZ:
808 switch(channel_type) {
809 case NL80211_CHAN_NO_HT:
810 case NL80211_CHAN_HT20:
811 chanmode = CHANNEL_A_HT20;
813 case NL80211_CHAN_HT40PLUS:
814 chanmode = CHANNEL_A_HT40PLUS;
816 case NL80211_CHAN_HT40MINUS:
817 chanmode = CHANNEL_A_HT40MINUS;
828 static void ath9k_bss_assoc_info(struct ath_softc *sc,
829 struct ieee80211_hw *hw,
830 struct ieee80211_vif *vif,
831 struct ieee80211_bss_conf *bss_conf)
833 struct ath_wiphy *aphy = hw->priv;
834 struct ath_hw *ah = sc->sc_ah;
835 struct ath_common *common = ath9k_hw_common(ah);
837 if (bss_conf->assoc) {
838 ath_dbg(common, ATH_DBG_CONFIG,
839 "Bss Info ASSOC %d, bssid: %pM\n",
840 bss_conf->aid, common->curbssid);
842 /* New association, store aid */
843 common->curaid = bss_conf->aid;
844 ath9k_hw_write_associd(ah);
847 * Request a re-configuration of Beacon related timers
848 * on the receipt of the first Beacon frame (i.e.,
849 * after time sync with the AP).
851 sc->ps_flags |= PS_BEACON_SYNC;
853 /* Configure the beacon */
854 ath_beacon_config(sc, vif);
856 /* Reset rssi stats */
857 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
858 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
860 sc->sc_flags |= SC_OP_ANI_RUN;
861 ath_start_ani(common);
863 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
866 sc->sc_flags &= ~SC_OP_ANI_RUN;
867 del_timer_sync(&common->ani.timer);
871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
873 struct ath_hw *ah = sc->sc_ah;
874 struct ath_common *common = ath9k_hw_common(ah);
875 struct ieee80211_channel *channel = hw->conf.channel;
879 spin_lock_bh(&sc->sc_pcu_lock);
881 ath9k_hw_configpcipowersave(ah, 0, 0);
884 ah->curchan = ath_get_curchannel(sc, sc->hw);
886 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
889 "Unable to reset channel (%u MHz), reset status %d\n",
890 channel->center_freq, r);
893 ath_update_txpow(sc);
894 if (ath_startrecv(sc) != 0) {
895 ath_err(common, "Unable to restart recv logic\n");
898 if (sc->sc_flags & SC_OP_BEACONS)
899 ath_beacon_config(sc, NULL); /* restart beacons */
901 /* Re-Enable interrupts */
902 ath9k_hw_set_interrupts(ah, ah->imask);
905 ath9k_hw_cfg_output(ah, ah->led_pin,
906 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
907 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
909 ieee80211_wake_queues(hw);
911 spin_unlock_bh(&sc->sc_pcu_lock);
913 ath9k_ps_restore(sc);
916 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
918 struct ath_hw *ah = sc->sc_ah;
919 struct ieee80211_channel *channel = hw->conf.channel;
923 spin_lock_bh(&sc->sc_pcu_lock);
925 ieee80211_stop_queues(hw);
928 * Keep the LED on when the radio is disabled
929 * during idle unassociated state.
932 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
933 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
936 /* Disable interrupts */
937 ath9k_hw_disable_interrupts(ah);
939 ath_drain_all_txq(sc, false); /* clear pending tx frames */
941 ath_stoprecv(sc); /* turn off frame recv */
942 ath_flushrecv(sc); /* flush recv queue */
945 ah->curchan = ath_get_curchannel(sc, hw);
947 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
949 ath_err(ath9k_hw_common(sc->sc_ah),
950 "Unable to reset channel (%u MHz), reset status %d\n",
951 channel->center_freq, r);
954 ath9k_hw_phy_disable(ah);
956 ath9k_hw_configpcipowersave(ah, 1, 1);
958 spin_unlock_bh(&sc->sc_pcu_lock);
959 ath9k_ps_restore(sc);
962 int ath_reset(struct ath_softc *sc, bool retry_tx)
964 struct ath_hw *ah = sc->sc_ah;
965 struct ath_common *common = ath9k_hw_common(ah);
966 struct ieee80211_hw *hw = sc->hw;
970 del_timer_sync(&common->ani.timer);
973 spin_lock_bh(&sc->sc_pcu_lock);
975 ieee80211_stop_queues(hw);
977 ath9k_hw_disable_interrupts(ah);
978 ath_drain_all_txq(sc, retry_tx);
983 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
986 "Unable to reset hardware; reset status %d\n", r);
988 if (ath_startrecv(sc) != 0)
989 ath_err(common, "Unable to start recv logic\n");
992 * We may be doing a reset in response to a request
993 * that changes the channel so update any state that
994 * might change as a result.
996 ath_update_txpow(sc);
998 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
999 ath_beacon_config(sc, NULL); /* restart beacons */
1001 ath9k_hw_set_interrupts(ah, ah->imask);
1005 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1006 if (ATH_TXQ_SETUP(sc, i)) {
1007 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1008 ath_txq_schedule(sc, &sc->tx.txq[i]);
1009 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1014 ieee80211_wake_queues(hw);
1015 spin_unlock_bh(&sc->sc_pcu_lock);
1018 ath_start_ani(common);
1019 ath9k_ps_restore(sc);
1024 /* XXX: Remove me once we don't depend on ath9k_channel for all
1025 * this redundant data */
1026 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1027 struct ath9k_channel *ichan)
1029 struct ieee80211_channel *chan = hw->conf.channel;
1030 struct ieee80211_conf *conf = &hw->conf;
1032 ichan->channel = chan->center_freq;
1035 if (chan->band == IEEE80211_BAND_2GHZ) {
1036 ichan->chanmode = CHANNEL_G;
1037 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1039 ichan->chanmode = CHANNEL_A;
1040 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1043 if (conf_is_ht(conf))
1044 ichan->chanmode = ath_get_extchanmode(sc, chan,
1045 conf->channel_type);
1048 /**********************/
1049 /* mac80211 callbacks */
1050 /**********************/
1052 static int ath9k_start(struct ieee80211_hw *hw)
1054 struct ath_wiphy *aphy = hw->priv;
1055 struct ath_softc *sc = aphy->sc;
1056 struct ath_hw *ah = sc->sc_ah;
1057 struct ath_common *common = ath9k_hw_common(ah);
1058 struct ieee80211_channel *curchan = hw->conf.channel;
1059 struct ath9k_channel *init_channel;
1062 ath_dbg(common, ATH_DBG_CONFIG,
1063 "Starting driver with initial channel: %d MHz\n",
1064 curchan->center_freq);
1066 mutex_lock(&sc->mutex);
1068 if (ath9k_wiphy_started(sc)) {
1069 if (sc->chan_idx == curchan->hw_value) {
1071 * Already on the operational channel, the new wiphy
1072 * can be marked active.
1074 aphy->state = ATH_WIPHY_ACTIVE;
1075 ieee80211_wake_queues(hw);
1078 * Another wiphy is on another channel, start the new
1079 * wiphy in paused state.
1081 aphy->state = ATH_WIPHY_PAUSED;
1082 ieee80211_stop_queues(hw);
1084 mutex_unlock(&sc->mutex);
1087 aphy->state = ATH_WIPHY_ACTIVE;
1089 /* setup initial channel */
1091 sc->chan_idx = curchan->hw_value;
1093 init_channel = ath_get_curchannel(sc, hw);
1095 /* Reset SERDES registers */
1096 ath9k_hw_configpcipowersave(ah, 0, 0);
1099 * The basic interface to setting the hardware in a good
1100 * state is ``reset''. On return the hardware is known to
1101 * be powered up and with interrupts disabled. This must
1102 * be followed by initialization of the appropriate bits
1103 * and then setup of the interrupt mask.
1105 spin_lock_bh(&sc->sc_pcu_lock);
1106 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1109 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1110 r, curchan->center_freq);
1111 spin_unlock_bh(&sc->sc_pcu_lock);
1116 * This is needed only to setup initial state
1117 * but it's best done after a reset.
1119 ath_update_txpow(sc);
1122 * Setup the hardware after reset:
1123 * The receive engine is set going.
1124 * Frame transmit is handled entirely
1125 * in the frame output path; there's nothing to do
1126 * here except setup the interrupt mask.
1128 if (ath_startrecv(sc) != 0) {
1129 ath_err(common, "Unable to start recv logic\n");
1131 spin_unlock_bh(&sc->sc_pcu_lock);
1134 spin_unlock_bh(&sc->sc_pcu_lock);
1136 /* Setup our intr mask. */
1137 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1138 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1141 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1142 ah->imask |= ATH9K_INT_RXHP |
1144 ATH9K_INT_BB_WATCHDOG;
1146 ah->imask |= ATH9K_INT_RX;
1148 ah->imask |= ATH9K_INT_GTT;
1150 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1151 ah->imask |= ATH9K_INT_CST;
1153 sc->sc_flags &= ~SC_OP_INVALID;
1154 sc->sc_ah->is_monitoring = false;
1156 /* Disable BMISS interrupt when we're not associated */
1157 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1158 ath9k_hw_set_interrupts(ah, ah->imask);
1160 ieee80211_wake_queues(hw);
1162 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1164 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1165 !ah->btcoex_hw.enabled) {
1166 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1167 AR_STOMP_LOW_WLAN_WGHT);
1168 ath9k_hw_btcoex_enable(ah);
1170 if (common->bus_ops->bt_coex_prep)
1171 common->bus_ops->bt_coex_prep(common);
1172 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1173 ath9k_btcoex_timer_resume(sc);
1176 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1177 common->bus_ops->extn_synch_en(common);
1180 mutex_unlock(&sc->mutex);
1185 static int ath9k_tx(struct ieee80211_hw *hw,
1186 struct sk_buff *skb)
1188 struct ath_wiphy *aphy = hw->priv;
1189 struct ath_softc *sc = aphy->sc;
1190 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1191 struct ath_tx_control txctl;
1192 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1194 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1195 ath_dbg(common, ATH_DBG_XMIT,
1196 "ath9k: %s: TX in unexpected wiphy state %d\n",
1197 wiphy_name(hw->wiphy), aphy->state);
1201 if (sc->ps_enabled) {
1203 * mac80211 does not set PM field for normal data frames, so we
1204 * need to update that based on the current PS mode.
1206 if (ieee80211_is_data(hdr->frame_control) &&
1207 !ieee80211_is_nullfunc(hdr->frame_control) &&
1208 !ieee80211_has_pm(hdr->frame_control)) {
1209 ath_dbg(common, ATH_DBG_PS,
1210 "Add PM=1 for a TX frame while in PS mode\n");
1211 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1215 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1217 * We are using PS-Poll and mac80211 can request TX while in
1218 * power save mode. Need to wake up hardware for the TX to be
1219 * completed and if needed, also for RX of buffered frames.
1221 ath9k_ps_wakeup(sc);
1222 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1223 ath9k_hw_setrxabort(sc->sc_ah, 0);
1224 if (ieee80211_is_pspoll(hdr->frame_control)) {
1225 ath_dbg(common, ATH_DBG_PS,
1226 "Sending PS-Poll to pick a buffered frame\n");
1227 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1229 ath_dbg(common, ATH_DBG_PS,
1230 "Wake up to complete TX\n");
1231 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1234 * The actual restore operation will happen only after
1235 * the sc_flags bit is cleared. We are just dropping
1236 * the ps_usecount here.
1238 ath9k_ps_restore(sc);
1241 memset(&txctl, 0, sizeof(struct ath_tx_control));
1242 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1244 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1246 if (ath_tx_start(hw, skb, &txctl) != 0) {
1247 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1253 dev_kfree_skb_any(skb);
1257 static void ath9k_stop(struct ieee80211_hw *hw)
1259 struct ath_wiphy *aphy = hw->priv;
1260 struct ath_softc *sc = aphy->sc;
1261 struct ath_hw *ah = sc->sc_ah;
1262 struct ath_common *common = ath9k_hw_common(ah);
1265 mutex_lock(&sc->mutex);
1267 aphy->state = ATH_WIPHY_INACTIVE;
1270 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1272 cancel_delayed_work_sync(&sc->tx_complete_work);
1273 cancel_work_sync(&sc->paprd_work);
1274 cancel_work_sync(&sc->hw_check_work);
1276 for (i = 0; i < sc->num_sec_wiphy; i++) {
1277 if (sc->sec_wiphy[i])
1281 if (i == sc->num_sec_wiphy) {
1282 cancel_delayed_work_sync(&sc->wiphy_work);
1283 cancel_work_sync(&sc->chan_work);
1286 if (sc->sc_flags & SC_OP_INVALID) {
1287 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1288 mutex_unlock(&sc->mutex);
1292 if (ath9k_wiphy_started(sc)) {
1293 mutex_unlock(&sc->mutex);
1294 return; /* another wiphy still in use */
1297 /* Ensure HW is awake when we try to shut it down. */
1298 ath9k_ps_wakeup(sc);
1300 if (ah->btcoex_hw.enabled) {
1301 ath9k_hw_btcoex_disable(ah);
1302 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1303 ath9k_btcoex_timer_pause(sc);
1306 spin_lock_bh(&sc->sc_pcu_lock);
1308 /* prevent tasklets to enable interrupts once we disable them */
1309 ah->imask &= ~ATH9K_INT_GLOBAL;
1311 /* make sure h/w will not generate any interrupt
1312 * before setting the invalid flag. */
1313 ath9k_hw_disable_interrupts(ah);
1315 if (!(sc->sc_flags & SC_OP_INVALID)) {
1316 ath_drain_all_txq(sc, false);
1318 ath9k_hw_phy_disable(ah);
1320 sc->rx.rxlink = NULL;
1322 /* disable HAL and put h/w to sleep */
1323 ath9k_hw_disable(ah);
1324 ath9k_hw_configpcipowersave(ah, 1, 1);
1326 spin_unlock_bh(&sc->sc_pcu_lock);
1328 /* we can now sync irq and kill any running tasklets, since we already
1329 * disabled interrupts and not holding a spin lock */
1330 synchronize_irq(sc->irq);
1331 tasklet_kill(&sc->intr_tq);
1332 tasklet_kill(&sc->bcon_tasklet);
1334 ath9k_ps_restore(sc);
1337 ath9k_set_wiphy_idle(aphy, true);
1338 ath_radio_disable(sc, hw);
1340 sc->sc_flags |= SC_OP_INVALID;
1342 mutex_unlock(&sc->mutex);
1344 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1347 static int ath9k_add_interface(struct ieee80211_hw *hw,
1348 struct ieee80211_vif *vif)
1350 struct ath_wiphy *aphy = hw->priv;
1351 struct ath_softc *sc = aphy->sc;
1352 struct ath_hw *ah = sc->sc_ah;
1353 struct ath_common *common = ath9k_hw_common(ah);
1354 struct ath_vif *avp = (void *)vif->drv_priv;
1355 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1358 mutex_lock(&sc->mutex);
1360 switch (vif->type) {
1361 case NL80211_IFTYPE_STATION:
1362 ic_opmode = NL80211_IFTYPE_STATION;
1364 case NL80211_IFTYPE_WDS:
1365 ic_opmode = NL80211_IFTYPE_WDS;
1367 case NL80211_IFTYPE_ADHOC:
1368 case NL80211_IFTYPE_AP:
1369 case NL80211_IFTYPE_MESH_POINT:
1370 if (sc->nbcnvifs >= ATH_BCBUF) {
1374 ic_opmode = vif->type;
1377 ath_err(common, "Interface type %d not yet supported\n",
1383 ath_dbg(common, ATH_DBG_CONFIG,
1384 "Attach a VIF of type: %d\n", ic_opmode);
1386 /* Set the VIF opmode */
1387 avp->av_opmode = ic_opmode;
1392 ath9k_set_bssid_mask(hw, vif);
1395 goto out; /* skip global settings for secondary vif */
1397 if (ic_opmode == NL80211_IFTYPE_AP) {
1398 ath9k_hw_set_tsfadjust(ah, 1);
1399 sc->sc_flags |= SC_OP_TSF_RESET;
1402 /* Set the device opmode */
1403 ah->opmode = ic_opmode;
1406 * Enable MIB interrupts when there are hardware phy counters.
1407 * Note we only do this (at the moment) for station mode.
1409 if ((vif->type == NL80211_IFTYPE_STATION) ||
1410 (vif->type == NL80211_IFTYPE_ADHOC) ||
1411 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1412 if (ah->config.enable_ani)
1413 ah->imask |= ATH9K_INT_MIB;
1414 ah->imask |= ATH9K_INT_TSFOOR;
1417 ath9k_hw_set_interrupts(ah, ah->imask);
1419 if (vif->type == NL80211_IFTYPE_AP ||
1420 vif->type == NL80211_IFTYPE_ADHOC) {
1421 sc->sc_flags |= SC_OP_ANI_RUN;
1422 ath_start_ani(common);
1426 mutex_unlock(&sc->mutex);
1430 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1431 struct ieee80211_vif *vif)
1433 struct ath_vif *avp = (void *)vif->drv_priv;
1435 /* Disable SWBA interrupt */
1436 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1437 ath9k_ps_wakeup(sc);
1438 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1439 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1440 tasklet_kill(&sc->bcon_tasklet);
1441 ath9k_ps_restore(sc);
1443 ath_beacon_return(sc, avp);
1444 sc->sc_flags &= ~SC_OP_BEACONS;
1446 if (sc->nbcnvifs > 0) {
1447 /* Re-enable beaconing */
1448 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1449 ath9k_ps_wakeup(sc);
1450 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1451 ath9k_ps_restore(sc);
1455 static int ath9k_change_interface(struct ieee80211_hw *hw,
1456 struct ieee80211_vif *vif,
1457 enum nl80211_iftype new_type,
1460 struct ath_wiphy *aphy = hw->priv;
1461 struct ath_softc *sc = aphy->sc;
1462 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1465 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1466 mutex_lock(&sc->mutex);
1469 case NL80211_IFTYPE_AP:
1470 case NL80211_IFTYPE_ADHOC:
1471 if (sc->nbcnvifs >= ATH_BCBUF) {
1472 ath_err(common, "No beacon slot available\n");
1477 case NL80211_IFTYPE_STATION:
1479 sc->sc_flags &= ~SC_OP_ANI_RUN;
1480 del_timer_sync(&common->ani.timer);
1481 if ((vif->type == NL80211_IFTYPE_AP) ||
1482 (vif->type == NL80211_IFTYPE_ADHOC))
1483 ath9k_reclaim_beacon(sc, vif);
1486 ath_err(common, "Interface type %d not yet supported\n",
1491 vif->type = new_type;
1495 mutex_unlock(&sc->mutex);
1499 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1500 struct ieee80211_vif *vif)
1502 struct ath_wiphy *aphy = hw->priv;
1503 struct ath_softc *sc = aphy->sc;
1504 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1506 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1508 mutex_lock(&sc->mutex);
1511 sc->sc_flags &= ~SC_OP_ANI_RUN;
1512 del_timer_sync(&common->ani.timer);
1514 /* Reclaim beacon resources */
1515 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1516 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1517 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1518 ath9k_reclaim_beacon(sc, vif);
1522 mutex_unlock(&sc->mutex);
1525 static void ath9k_enable_ps(struct ath_softc *sc)
1527 struct ath_hw *ah = sc->sc_ah;
1529 sc->ps_enabled = true;
1530 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1531 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1532 ah->imask |= ATH9K_INT_TIM_TIMER;
1533 ath9k_hw_set_interrupts(ah, ah->imask);
1535 ath9k_hw_setrxabort(ah, 1);
1539 static void ath9k_disable_ps(struct ath_softc *sc)
1541 struct ath_hw *ah = sc->sc_ah;
1543 sc->ps_enabled = false;
1544 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1545 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1546 ath9k_hw_setrxabort(ah, 0);
1547 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1549 PS_WAIT_FOR_PSPOLL_DATA |
1550 PS_WAIT_FOR_TX_ACK);
1551 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1552 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1553 ath9k_hw_set_interrupts(ah, ah->imask);
1559 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1561 struct ath_wiphy *aphy = hw->priv;
1562 struct ath_softc *sc = aphy->sc;
1563 struct ath_hw *ah = sc->sc_ah;
1564 struct ath_common *common = ath9k_hw_common(ah);
1565 struct ieee80211_conf *conf = &hw->conf;
1568 mutex_lock(&sc->mutex);
1571 * Leave this as the first check because we need to turn on the
1572 * radio if it was disabled before prior to processing the rest
1573 * of the changes. Likewise we must only disable the radio towards
1576 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1578 bool all_wiphys_idle;
1579 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1581 spin_lock_bh(&sc->wiphy_lock);
1582 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1583 ath9k_set_wiphy_idle(aphy, idle);
1585 enable_radio = (!idle && all_wiphys_idle);
1588 * After we unlock here its possible another wiphy
1589 * can be re-renabled so to account for that we will
1590 * only disable the radio toward the end of this routine
1591 * if by then all wiphys are still idle.
1593 spin_unlock_bh(&sc->wiphy_lock);
1596 sc->ps_idle = false;
1597 ath_radio_enable(sc, hw);
1598 ath_dbg(common, ATH_DBG_CONFIG,
1599 "not-idle: enabling radio\n");
1604 * We just prepare to enable PS. We have to wait until our AP has
1605 * ACK'd our null data frame to disable RX otherwise we'll ignore
1606 * those ACKs and end up retransmitting the same null data frames.
1607 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1609 if (changed & IEEE80211_CONF_CHANGE_PS) {
1610 unsigned long flags;
1611 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1612 if (conf->flags & IEEE80211_CONF_PS)
1613 ath9k_enable_ps(sc);
1615 ath9k_disable_ps(sc);
1616 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1619 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1620 if (conf->flags & IEEE80211_CONF_MONITOR) {
1621 ath_dbg(common, ATH_DBG_CONFIG,
1622 "Monitor mode is enabled\n");
1623 sc->sc_ah->is_monitoring = true;
1625 ath_dbg(common, ATH_DBG_CONFIG,
1626 "Monitor mode is disabled\n");
1627 sc->sc_ah->is_monitoring = false;
1631 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1632 struct ieee80211_channel *curchan = hw->conf.channel;
1633 int pos = curchan->hw_value;
1635 unsigned long flags;
1638 old_pos = ah->curchan - &ah->channels[0];
1640 aphy->chan_idx = pos;
1641 aphy->chan_is_ht = conf_is_ht(conf);
1642 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1643 sc->sc_flags |= SC_OP_OFFCHANNEL;
1645 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1647 if (aphy->state == ATH_WIPHY_SCAN ||
1648 aphy->state == ATH_WIPHY_ACTIVE)
1649 ath9k_wiphy_pause_all_forced(sc, aphy);
1652 * Do not change operational channel based on a paused
1655 goto skip_chan_change;
1658 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1659 curchan->center_freq);
1661 /* XXX: remove me eventualy */
1662 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1664 /* update survey stats for the old channel before switching */
1665 spin_lock_irqsave(&common->cc_lock, flags);
1666 ath_update_survey_stats(sc);
1667 spin_unlock_irqrestore(&common->cc_lock, flags);
1670 * If the operating channel changes, change the survey in-use flags
1672 * Reset the survey data for the new channel, unless we're switching
1673 * back to the operating channel from an off-channel operation.
1675 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1676 sc->cur_survey != &sc->survey[pos]) {
1679 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1681 sc->cur_survey = &sc->survey[pos];
1683 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1684 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1685 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1686 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1689 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1690 ath_err(common, "Unable to set channel\n");
1691 mutex_unlock(&sc->mutex);
1696 * The most recent snapshot of channel->noisefloor for the old
1697 * channel is only available after the hardware reset. Copy it to
1698 * the survey stats now.
1701 ath_update_survey_nf(sc, old_pos);
1705 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1706 sc->config.txpowlimit = 2 * conf->power_level;
1707 ath9k_ps_wakeup(sc);
1708 ath_update_txpow(sc);
1709 ath9k_ps_restore(sc);
1712 spin_lock_bh(&sc->wiphy_lock);
1713 disable_radio = ath9k_all_wiphys_idle(sc);
1714 spin_unlock_bh(&sc->wiphy_lock);
1716 if (disable_radio) {
1717 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1719 ath_radio_disable(sc, hw);
1722 mutex_unlock(&sc->mutex);
1727 #define SUPPORTED_FILTERS \
1728 (FIF_PROMISC_IN_BSS | \
1733 FIF_BCN_PRBRESP_PROMISC | \
1737 /* FIXME: sc->sc_full_reset ? */
1738 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1739 unsigned int changed_flags,
1740 unsigned int *total_flags,
1743 struct ath_wiphy *aphy = hw->priv;
1744 struct ath_softc *sc = aphy->sc;
1747 changed_flags &= SUPPORTED_FILTERS;
1748 *total_flags &= SUPPORTED_FILTERS;
1750 sc->rx.rxfilter = *total_flags;
1751 ath9k_ps_wakeup(sc);
1752 rfilt = ath_calcrxfilter(sc);
1753 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1754 ath9k_ps_restore(sc);
1756 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1757 "Set HW RX filter: 0x%x\n", rfilt);
1760 static int ath9k_sta_add(struct ieee80211_hw *hw,
1761 struct ieee80211_vif *vif,
1762 struct ieee80211_sta *sta)
1764 struct ath_wiphy *aphy = hw->priv;
1765 struct ath_softc *sc = aphy->sc;
1767 ath_node_attach(sc, sta);
1772 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1773 struct ieee80211_vif *vif,
1774 struct ieee80211_sta *sta)
1776 struct ath_wiphy *aphy = hw->priv;
1777 struct ath_softc *sc = aphy->sc;
1779 ath_node_detach(sc, sta);
1784 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1785 const struct ieee80211_tx_queue_params *params)
1787 struct ath_wiphy *aphy = hw->priv;
1788 struct ath_softc *sc = aphy->sc;
1789 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1790 struct ath_txq *txq;
1791 struct ath9k_tx_queue_info qi;
1794 if (queue >= WME_NUM_AC)
1797 txq = sc->tx.txq_map[queue];
1799 mutex_lock(&sc->mutex);
1801 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1803 qi.tqi_aifs = params->aifs;
1804 qi.tqi_cwmin = params->cw_min;
1805 qi.tqi_cwmax = params->cw_max;
1806 qi.tqi_burstTime = params->txop;
1808 ath_dbg(common, ATH_DBG_CONFIG,
1809 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1810 queue, txq->axq_qnum, params->aifs, params->cw_min,
1811 params->cw_max, params->txop);
1813 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1815 ath_err(common, "TXQ Update failed\n");
1817 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1818 if (queue == WME_AC_BE && !ret)
1819 ath_beaconq_config(sc);
1821 mutex_unlock(&sc->mutex);
1826 static int ath9k_set_key(struct ieee80211_hw *hw,
1827 enum set_key_cmd cmd,
1828 struct ieee80211_vif *vif,
1829 struct ieee80211_sta *sta,
1830 struct ieee80211_key_conf *key)
1832 struct ath_wiphy *aphy = hw->priv;
1833 struct ath_softc *sc = aphy->sc;
1834 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1837 if (ath9k_modparam_nohwcrypt)
1840 mutex_lock(&sc->mutex);
1841 ath9k_ps_wakeup(sc);
1842 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1846 ret = ath_key_config(common, vif, sta, key);
1848 key->hw_key_idx = ret;
1849 /* push IV and Michael MIC generation to stack */
1850 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1851 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1852 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1853 if (sc->sc_ah->sw_mgmt_crypto &&
1854 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1855 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1860 ath_key_delete(common, key);
1866 ath9k_ps_restore(sc);
1867 mutex_unlock(&sc->mutex);
1872 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1873 struct ieee80211_vif *vif,
1874 struct ieee80211_bss_conf *bss_conf,
1877 struct ath_wiphy *aphy = hw->priv;
1878 struct ath_softc *sc = aphy->sc;
1879 struct ath_hw *ah = sc->sc_ah;
1880 struct ath_common *common = ath9k_hw_common(ah);
1881 struct ath_vif *avp = (void *)vif->drv_priv;
1885 mutex_lock(&sc->mutex);
1887 if (changed & BSS_CHANGED_BSSID) {
1889 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1890 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1892 ath9k_hw_write_associd(ah);
1894 /* Set aggregation protection mode parameters */
1895 sc->config.ath_aggr_prot = 0;
1897 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1898 common->curbssid, common->curaid);
1900 /* need to reconfigure the beacon */
1901 sc->sc_flags &= ~SC_OP_BEACONS ;
1904 /* Enable transmission of beacons (AP, IBSS, MESH) */
1905 if ((changed & BSS_CHANGED_BEACON) ||
1906 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1907 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1908 error = ath_beacon_alloc(aphy, vif);
1910 ath_beacon_config(sc, vif);
1913 if (changed & BSS_CHANGED_ERP_SLOT) {
1914 if (bss_conf->use_short_slot)
1918 if (vif->type == NL80211_IFTYPE_AP) {
1920 * Defer update, so that connected stations can adjust
1921 * their settings at the same time.
1922 * See beacon.c for more details
1924 sc->beacon.slottime = slottime;
1925 sc->beacon.updateslot = UPDATE;
1927 ah->slottime = slottime;
1928 ath9k_hw_init_global_settings(ah);
1932 /* Disable transmission of beacons */
1933 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1934 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1936 if (changed & BSS_CHANGED_BEACON_INT) {
1937 sc->beacon_interval = bss_conf->beacon_int;
1939 * In case of AP mode, the HW TSF has to be reset
1940 * when the beacon interval changes.
1942 if (vif->type == NL80211_IFTYPE_AP) {
1943 sc->sc_flags |= SC_OP_TSF_RESET;
1944 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1945 error = ath_beacon_alloc(aphy, vif);
1947 ath_beacon_config(sc, vif);
1949 ath_beacon_config(sc, vif);
1953 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1954 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1955 bss_conf->use_short_preamble);
1956 if (bss_conf->use_short_preamble)
1957 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1959 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1962 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1963 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1964 bss_conf->use_cts_prot);
1965 if (bss_conf->use_cts_prot &&
1966 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1967 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1969 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1972 if (changed & BSS_CHANGED_ASSOC) {
1973 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1975 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1978 mutex_unlock(&sc->mutex);
1981 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1984 struct ath_wiphy *aphy = hw->priv;
1985 struct ath_softc *sc = aphy->sc;
1987 mutex_lock(&sc->mutex);
1988 ath9k_ps_wakeup(sc);
1989 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1990 ath9k_ps_restore(sc);
1991 mutex_unlock(&sc->mutex);
1996 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1998 struct ath_wiphy *aphy = hw->priv;
1999 struct ath_softc *sc = aphy->sc;
2001 mutex_lock(&sc->mutex);
2002 ath9k_ps_wakeup(sc);
2003 ath9k_hw_settsf64(sc->sc_ah, tsf);
2004 ath9k_ps_restore(sc);
2005 mutex_unlock(&sc->mutex);
2008 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2010 struct ath_wiphy *aphy = hw->priv;
2011 struct ath_softc *sc = aphy->sc;
2013 mutex_lock(&sc->mutex);
2015 ath9k_ps_wakeup(sc);
2016 ath9k_hw_reset_tsf(sc->sc_ah);
2017 ath9k_ps_restore(sc);
2019 mutex_unlock(&sc->mutex);
2022 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2023 struct ieee80211_vif *vif,
2024 enum ieee80211_ampdu_mlme_action action,
2025 struct ieee80211_sta *sta,
2028 struct ath_wiphy *aphy = hw->priv;
2029 struct ath_softc *sc = aphy->sc;
2035 case IEEE80211_AMPDU_RX_START:
2036 if (!(sc->sc_flags & SC_OP_RXAGGR))
2039 case IEEE80211_AMPDU_RX_STOP:
2041 case IEEE80211_AMPDU_TX_START:
2042 if (!(sc->sc_flags & SC_OP_TXAGGR))
2045 ath9k_ps_wakeup(sc);
2046 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2048 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2049 ath9k_ps_restore(sc);
2051 case IEEE80211_AMPDU_TX_STOP:
2052 ath9k_ps_wakeup(sc);
2053 ath_tx_aggr_stop(sc, sta, tid);
2054 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2055 ath9k_ps_restore(sc);
2057 case IEEE80211_AMPDU_TX_OPERATIONAL:
2058 ath9k_ps_wakeup(sc);
2059 ath_tx_aggr_resume(sc, sta, tid);
2060 ath9k_ps_restore(sc);
2063 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2071 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2072 struct survey_info *survey)
2074 struct ath_wiphy *aphy = hw->priv;
2075 struct ath_softc *sc = aphy->sc;
2076 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2077 struct ieee80211_supported_band *sband;
2078 struct ieee80211_channel *chan;
2079 unsigned long flags;
2082 spin_lock_irqsave(&common->cc_lock, flags);
2084 ath_update_survey_stats(sc);
2086 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2087 if (sband && idx >= sband->n_channels) {
2088 idx -= sband->n_channels;
2093 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2095 if (!sband || idx >= sband->n_channels) {
2096 spin_unlock_irqrestore(&common->cc_lock, flags);
2100 chan = &sband->channels[idx];
2101 pos = chan->hw_value;
2102 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2103 survey->channel = chan;
2104 spin_unlock_irqrestore(&common->cc_lock, flags);
2109 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2111 struct ath_wiphy *aphy = hw->priv;
2112 struct ath_softc *sc = aphy->sc;
2114 mutex_lock(&sc->mutex);
2115 if (ath9k_wiphy_scanning(sc)) {
2117 * There is a race here in mac80211 but fixing it requires
2118 * we revisit how we handle the scan complete callback.
2119 * After mac80211 fixes we will not have configured hardware
2120 * to the home channel nor would we have configured the RX
2123 mutex_unlock(&sc->mutex);
2127 aphy->state = ATH_WIPHY_SCAN;
2128 ath9k_wiphy_pause_all_forced(sc, aphy);
2129 mutex_unlock(&sc->mutex);
2133 * XXX: this requires a revisit after the driver
2134 * scan_complete gets moved to another place/removed in mac80211.
2136 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2138 struct ath_wiphy *aphy = hw->priv;
2139 struct ath_softc *sc = aphy->sc;
2141 mutex_lock(&sc->mutex);
2142 aphy->state = ATH_WIPHY_ACTIVE;
2143 mutex_unlock(&sc->mutex);
2146 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2148 struct ath_wiphy *aphy = hw->priv;
2149 struct ath_softc *sc = aphy->sc;
2150 struct ath_hw *ah = sc->sc_ah;
2152 mutex_lock(&sc->mutex);
2153 ah->coverage_class = coverage_class;
2154 ath9k_hw_init_global_settings(ah);
2155 mutex_unlock(&sc->mutex);
2158 struct ieee80211_ops ath9k_ops = {
2160 .start = ath9k_start,
2162 .add_interface = ath9k_add_interface,
2163 .change_interface = ath9k_change_interface,
2164 .remove_interface = ath9k_remove_interface,
2165 .config = ath9k_config,
2166 .configure_filter = ath9k_configure_filter,
2167 .sta_add = ath9k_sta_add,
2168 .sta_remove = ath9k_sta_remove,
2169 .conf_tx = ath9k_conf_tx,
2170 .bss_info_changed = ath9k_bss_info_changed,
2171 .set_key = ath9k_set_key,
2172 .get_tsf = ath9k_get_tsf,
2173 .set_tsf = ath9k_set_tsf,
2174 .reset_tsf = ath9k_reset_tsf,
2175 .ampdu_action = ath9k_ampdu_action,
2176 .get_survey = ath9k_get_survey,
2177 .sw_scan_start = ath9k_sw_scan_start,
2178 .sw_scan_complete = ath9k_sw_scan_complete,
2179 .rfkill_poll = ath9k_rfkill_poll_state,
2180 .set_coverage_class = ath9k_set_coverage_class,