2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
65 else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
66 pending = !list_empty(&txq->txq_fifo_pending);
68 spin_unlock_bh(&txq->axq_lock);
72 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
77 spin_lock_irqsave(&sc->sc_pm_lock, flags);
78 ret = ath9k_hw_setpower(sc->sc_ah, mode);
79 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
84 void ath9k_ps_wakeup(struct ath_softc *sc)
86 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
88 enum ath9k_power_mode power_mode;
90 spin_lock_irqsave(&sc->sc_pm_lock, flags);
91 if (++sc->ps_usecount != 1)
94 power_mode = sc->sc_ah->power_mode;
95 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
98 * While the hardware is asleep, the cycle counters contain no
99 * useful data. Better clear them now so that they don't mess up
100 * survey data results.
102 if (power_mode != ATH9K_PM_AWAKE) {
103 spin_lock(&common->cc_lock);
104 ath_hw_cycle_counters_update(common);
105 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
106 spin_unlock(&common->cc_lock);
110 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
113 void ath9k_ps_restore(struct ath_softc *sc)
115 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (--sc->ps_usecount != 0)
122 spin_lock(&common->cc_lock);
123 ath_hw_cycle_counters_update(common);
124 spin_unlock(&common->cc_lock);
127 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
128 else if (sc->ps_enabled &&
129 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
131 PS_WAIT_FOR_PSPOLL_DATA |
132 PS_WAIT_FOR_TX_ACK)))
133 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
136 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
139 static void ath_start_ani(struct ath_common *common)
141 struct ath_hw *ah = common->ah;
142 unsigned long timestamp = jiffies_to_msecs(jiffies);
143 struct ath_softc *sc = (struct ath_softc *) common->priv;
145 if (!(sc->sc_flags & SC_OP_ANI_RUN))
148 if (sc->sc_flags & SC_OP_OFFCHANNEL)
151 common->ani.longcal_timer = timestamp;
152 common->ani.shortcal_timer = timestamp;
153 common->ani.checkani_timer = timestamp;
155 mod_timer(&common->ani.timer,
157 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
160 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
162 struct ath_hw *ah = sc->sc_ah;
163 struct ath9k_channel *chan = &ah->channels[channel];
164 struct survey_info *survey = &sc->survey[channel];
166 if (chan->noisefloor) {
167 survey->filled |= SURVEY_INFO_NOISE_DBM;
168 survey->noise = chan->noisefloor;
173 * Updates the survey statistics and returns the busy time since last
174 * update in %, if the measurement duration was long enough for the
175 * result to be useful, -1 otherwise.
177 static int ath_update_survey_stats(struct ath_softc *sc)
179 struct ath_hw *ah = sc->sc_ah;
180 struct ath_common *common = ath9k_hw_common(ah);
181 int pos = ah->curchan - &ah->channels[0];
182 struct survey_info *survey = &sc->survey[pos];
183 struct ath_cycle_counters *cc = &common->cc_survey;
184 unsigned int div = common->clockrate * 1000;
190 if (ah->power_mode == ATH9K_PM_AWAKE)
191 ath_hw_cycle_counters_update(common);
193 if (cc->cycles > 0) {
194 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
195 SURVEY_INFO_CHANNEL_TIME_BUSY |
196 SURVEY_INFO_CHANNEL_TIME_RX |
197 SURVEY_INFO_CHANNEL_TIME_TX;
198 survey->channel_time += cc->cycles / div;
199 survey->channel_time_busy += cc->rx_busy / div;
200 survey->channel_time_rx += cc->rx_frame / div;
201 survey->channel_time_tx += cc->tx_frame / div;
204 if (cc->cycles < div)
208 ret = cc->rx_busy * 100 / cc->cycles;
210 memset(cc, 0, sizeof(*cc));
212 ath_update_survey_nf(sc, pos);
218 * Set/change channels. If the channel is really being changed, it's done
219 * by reseting the chip. To accomplish this we must first cleanup any pending
220 * DMA, then restart stuff.
222 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
223 struct ath9k_channel *hchan)
225 struct ath_hw *ah = sc->sc_ah;
226 struct ath_common *common = ath9k_hw_common(ah);
227 struct ieee80211_conf *conf = &common->hw->conf;
228 bool fastcc = true, stopped;
229 struct ieee80211_channel *channel = hw->conf.channel;
230 struct ath9k_hw_cal_data *caldata = NULL;
233 if (sc->sc_flags & SC_OP_INVALID)
236 sc->hw_busy_count = 0;
238 del_timer_sync(&common->ani.timer);
239 cancel_work_sync(&sc->paprd_work);
240 cancel_work_sync(&sc->hw_check_work);
241 cancel_delayed_work_sync(&sc->tx_complete_work);
242 cancel_delayed_work_sync(&sc->hw_pll_work);
246 spin_lock_bh(&sc->sc_pcu_lock);
249 * This is only performed if the channel settings have
252 * To switch channels clear any pending DMA operations;
253 * wait long enough for the RX fifo to drain, reset the
254 * hardware at the new frequency, and then re-enable
255 * the relevant bits of the h/w.
257 ath9k_hw_disable_interrupts(ah);
258 stopped = ath_drain_all_txq(sc, false);
260 if (!ath_stoprecv(sc))
263 if (!ath9k_hw_check_alive(ah))
266 /* XXX: do not flush receive queue here. We don't want
267 * to flush data frames already in queue because of
268 * changing channel. */
270 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
273 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
274 caldata = &sc->caldata;
276 ath_dbg(common, ATH_DBG_CONFIG,
277 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
278 sc->sc_ah->curchan->channel,
279 channel->center_freq, conf_is_ht40(conf),
282 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
285 "Unable to reset channel (%u MHz), reset status %d\n",
286 channel->center_freq, r);
290 if (ath_startrecv(sc) != 0) {
291 ath_err(common, "Unable to restart recv logic\n");
296 ath9k_cmn_update_txpow(ah, sc->curtxpow,
297 sc->config.txpowlimit, &sc->curtxpow);
298 ath9k_hw_set_interrupts(ah, ah->imask);
300 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
301 if (sc->sc_flags & SC_OP_BEACONS)
303 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
304 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
305 ath_start_ani(common);
309 ieee80211_wake_queues(hw);
311 spin_unlock_bh(&sc->sc_pcu_lock);
313 ath9k_ps_restore(sc);
317 static void ath_paprd_activate(struct ath_softc *sc)
319 struct ath_hw *ah = sc->sc_ah;
320 struct ath9k_hw_cal_data *caldata = ah->caldata;
321 struct ath_common *common = ath9k_hw_common(ah);
324 if (!caldata || !caldata->paprd_done)
328 ar9003_paprd_enable(ah, false);
329 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330 if (!(common->tx_chainmask & BIT(chain)))
333 ar9003_paprd_populate_single_table(ah, caldata, chain);
336 ar9003_paprd_enable(ah, true);
337 ath9k_ps_restore(sc);
340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
342 struct ieee80211_hw *hw = sc->hw;
343 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
344 struct ath_hw *ah = sc->sc_ah;
345 struct ath_common *common = ath9k_hw_common(ah);
346 struct ath_tx_control txctl;
349 memset(&txctl, 0, sizeof(txctl));
350 txctl.txq = sc->tx.txq_map[WME_AC_BE];
352 memset(tx_info, 0, sizeof(*tx_info));
353 tx_info->band = hw->conf.channel->band;
354 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
355 tx_info->control.rates[0].idx = 0;
356 tx_info->control.rates[0].count = 1;
357 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
358 tx_info->control.rates[1].idx = -1;
360 init_completion(&sc->paprd_complete);
361 txctl.paprd = BIT(chain);
363 if (ath_tx_start(hw, skb, &txctl) != 0) {
364 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
365 dev_kfree_skb_any(skb);
369 time_left = wait_for_completion_timeout(&sc->paprd_complete,
370 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
373 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
374 "Timeout waiting for paprd training on TX chain %d\n",
380 void ath_paprd_calibrate(struct work_struct *work)
382 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
383 struct ieee80211_hw *hw = sc->hw;
384 struct ath_hw *ah = sc->sc_ah;
385 struct ieee80211_hdr *hdr;
386 struct sk_buff *skb = NULL;
387 struct ath9k_hw_cal_data *caldata = ah->caldata;
388 struct ath_common *common = ath9k_hw_common(ah);
397 if (ar9003_paprd_init_table(ah) < 0)
400 skb = alloc_skb(len, GFP_KERNEL);
405 memset(skb->data, 0, len);
406 hdr = (struct ieee80211_hdr *)skb->data;
407 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
408 hdr->frame_control = cpu_to_le16(ftype);
409 hdr->duration_id = cpu_to_le16(10);
410 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
411 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
412 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
415 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
416 if (!(common->tx_chainmask & BIT(chain)))
421 ath_dbg(common, ATH_DBG_CALIBRATE,
422 "Sending PAPRD frame for thermal measurement "
423 "on chain %d\n", chain);
424 if (!ath_paprd_send_frame(sc, skb, chain))
427 ar9003_paprd_setup_gain_table(ah, chain);
429 ath_dbg(common, ATH_DBG_CALIBRATE,
430 "Sending PAPRD training frame on chain %d\n", chain);
431 if (!ath_paprd_send_frame(sc, skb, chain))
434 if (!ar9003_paprd_is_done(ah))
437 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
445 caldata->paprd_done = true;
446 ath_paprd_activate(sc);
450 ath9k_ps_restore(sc);
454 * This routine performs the periodic noise floor calibration function
455 * that is used to adjust and optimize the chip performance. This
456 * takes environmental changes (location, temperature) into account.
457 * When the task is complete, it reschedules itself depending on the
458 * appropriate interval that was calculated.
460 void ath_ani_calibrate(unsigned long data)
462 struct ath_softc *sc = (struct ath_softc *)data;
463 struct ath_hw *ah = sc->sc_ah;
464 struct ath_common *common = ath9k_hw_common(ah);
465 bool longcal = false;
466 bool shortcal = false;
467 bool aniflag = false;
468 unsigned int timestamp = jiffies_to_msecs(jiffies);
469 u32 cal_interval, short_cal_interval, long_cal_interval;
472 if (ah->caldata && ah->caldata->nfcal_interference)
473 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
475 long_cal_interval = ATH_LONG_CALINTERVAL;
477 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
478 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
480 /* Only calibrate if awake */
481 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
486 /* Long calibration runs independently of short calibration. */
487 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
489 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
490 common->ani.longcal_timer = timestamp;
493 /* Short calibration applies only while caldone is false */
494 if (!common->ani.caldone) {
495 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
497 ath_dbg(common, ATH_DBG_ANI,
498 "shortcal @%lu\n", jiffies);
499 common->ani.shortcal_timer = timestamp;
500 common->ani.resetcal_timer = timestamp;
503 if ((timestamp - common->ani.resetcal_timer) >=
504 ATH_RESTART_CALINTERVAL) {
505 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
506 if (common->ani.caldone)
507 common->ani.resetcal_timer = timestamp;
511 /* Verify whether we must check ANI */
512 if ((timestamp - common->ani.checkani_timer) >=
513 ah->config.ani_poll_interval) {
515 common->ani.checkani_timer = timestamp;
518 /* Skip all processing if there's nothing to do. */
519 if (longcal || shortcal || aniflag) {
520 /* Call ANI routine if necessary */
522 spin_lock_irqsave(&common->cc_lock, flags);
523 ath9k_hw_ani_monitor(ah, ah->curchan);
524 ath_update_survey_stats(sc);
525 spin_unlock_irqrestore(&common->cc_lock, flags);
528 /* Perform calibration if necessary */
529 if (longcal || shortcal) {
530 common->ani.caldone =
531 ath9k_hw_calibrate(ah,
533 common->rx_chainmask,
538 ath9k_ps_restore(sc);
542 * Set timer interval based on previous results.
543 * The interval must be the shortest necessary to satisfy ANI,
544 * short calibration and long calibration.
546 cal_interval = ATH_LONG_CALINTERVAL;
547 if (sc->sc_ah->config.enable_ani)
548 cal_interval = min(cal_interval,
549 (u32)ah->config.ani_poll_interval);
550 if (!common->ani.caldone)
551 cal_interval = min(cal_interval, (u32)short_cal_interval);
553 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
554 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
555 if (!ah->caldata->paprd_done)
556 ieee80211_queue_work(sc->hw, &sc->paprd_work);
557 else if (!ah->paprd_table_write_done)
558 ath_paprd_activate(sc);
562 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
565 struct ath_hw *ah = sc->sc_ah;
566 an = (struct ath_node *)sta->drv_priv;
568 #ifdef CONFIG_ATH9K_DEBUGFS
569 spin_lock(&sc->nodes_lock);
570 list_add(&an->list, &sc->nodes);
571 spin_unlock(&sc->nodes_lock);
574 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
575 sc->sc_flags |= SC_OP_ENABLE_APM;
577 if (sc->sc_flags & SC_OP_TXAGGR) {
578 ath_tx_node_init(sc, an);
579 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
580 sta->ht_cap.ampdu_factor);
581 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
587 struct ath_node *an = (struct ath_node *)sta->drv_priv;
589 #ifdef CONFIG_ATH9K_DEBUGFS
590 spin_lock(&sc->nodes_lock);
592 spin_unlock(&sc->nodes_lock);
596 if (sc->sc_flags & SC_OP_TXAGGR)
597 ath_tx_node_cleanup(sc, an);
600 void ath_hw_check(struct work_struct *work)
602 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
608 if (ath9k_hw_check_alive(sc->sc_ah))
611 spin_lock_irqsave(&common->cc_lock, flags);
612 busy = ath_update_survey_stats(sc);
613 spin_unlock_irqrestore(&common->cc_lock, flags);
615 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
616 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
618 if (++sc->hw_busy_count >= 3)
620 } else if (busy >= 0)
621 sc->hw_busy_count = 0;
624 ath9k_ps_restore(sc);
627 void ath9k_tasklet(unsigned long data)
629 struct ath_softc *sc = (struct ath_softc *)data;
630 struct ath_hw *ah = sc->sc_ah;
631 struct ath_common *common = ath9k_hw_common(ah);
633 u32 status = sc->intrstatus;
636 if (status & ATH9K_INT_FATAL) {
642 spin_lock(&sc->sc_pcu_lock);
645 * Only run the baseband hang check if beacons stop working in AP or
646 * IBSS mode, because it has a high false positive rate. For station
647 * mode it should not be necessary, since the upper layers will detect
648 * this through a beacon miss automatically and the following channel
649 * change will trigger a hardware reset anyway
651 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
652 !ath9k_hw_check_alive(ah))
653 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
655 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
656 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
659 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
661 if (status & rxmask) {
662 /* Check for high priority Rx first */
663 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
664 (status & ATH9K_INT_RXHP))
665 ath_rx_tasklet(sc, 0, true);
667 ath_rx_tasklet(sc, 0, false);
670 if (status & ATH9K_INT_TX) {
671 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
672 ath_tx_edma_tasklet(sc);
677 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
679 * TSF sync does not look correct; remain awake to sync with
682 ath_dbg(common, ATH_DBG_PS,
683 "TSFOOR - Sync with next Beacon\n");
684 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
687 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
688 if (status & ATH9K_INT_GENTIMER)
689 ath_gen_timer_isr(sc->sc_ah);
691 /* re-enable hardware interrupt */
692 ath9k_hw_enable_interrupts(ah);
694 spin_unlock(&sc->sc_pcu_lock);
695 ath9k_ps_restore(sc);
698 irqreturn_t ath_isr(int irq, void *dev)
700 #define SCHED_INTR ( \
713 struct ath_softc *sc = dev;
714 struct ath_hw *ah = sc->sc_ah;
715 struct ath_common *common = ath9k_hw_common(ah);
716 enum ath9k_int status;
720 * The hardware is not ready/present, don't
721 * touch anything. Note this can happen early
722 * on if the IRQ is shared.
724 if (sc->sc_flags & SC_OP_INVALID)
728 /* shared irq, not for us */
730 if (!ath9k_hw_intrpend(ah))
734 * Figure out the reason(s) for the interrupt. Note
735 * that the hal returns a pseudo-ISR that may include
736 * bits we haven't explicitly enabled so we mask the
737 * value to insure we only process bits we requested.
739 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
740 status &= ah->imask; /* discard unasked-for bits */
743 * If there are no status bits set, then this interrupt was not
744 * for me (should have been caught above).
749 /* Cache the status */
750 sc->intrstatus = status;
752 if (status & SCHED_INTR)
756 * If a FATAL or RXORN interrupt is received, we have to reset the
759 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
760 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
763 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
764 (status & ATH9K_INT_BB_WATCHDOG)) {
766 spin_lock(&common->cc_lock);
767 ath_hw_cycle_counters_update(common);
768 ar9003_hw_bb_watchdog_dbg_info(ah);
769 spin_unlock(&common->cc_lock);
774 if (status & ATH9K_INT_SWBA)
775 tasklet_schedule(&sc->bcon_tasklet);
777 if (status & ATH9K_INT_TXURN)
778 ath9k_hw_updatetxtriglevel(ah, true);
780 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
781 if (status & ATH9K_INT_RXEOL) {
782 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
783 ath9k_hw_set_interrupts(ah, ah->imask);
787 if (status & ATH9K_INT_MIB) {
789 * Disable interrupts until we service the MIB
790 * interrupt; otherwise it will continue to
793 ath9k_hw_disable_interrupts(ah);
795 * Let the hal handle the event. We assume
796 * it will clear whatever condition caused
799 spin_lock(&common->cc_lock);
800 ath9k_hw_proc_mib_event(ah);
801 spin_unlock(&common->cc_lock);
802 ath9k_hw_enable_interrupts(ah);
805 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
806 if (status & ATH9K_INT_TIM_TIMER) {
807 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
809 /* Clear RxAbort bit so that we can
811 ath9k_setpower(sc, ATH9K_PM_AWAKE);
812 ath9k_hw_setrxabort(sc->sc_ah, 0);
813 sc->ps_flags |= PS_WAIT_FOR_BEACON;
818 ath_debug_stat_interrupt(sc, status);
821 /* turn off every interrupt */
822 ath9k_hw_disable_interrupts(ah);
823 tasklet_schedule(&sc->intr_tq);
831 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
833 struct ath_hw *ah = sc->sc_ah;
834 struct ath_common *common = ath9k_hw_common(ah);
835 struct ieee80211_channel *channel = hw->conf.channel;
839 spin_lock_bh(&sc->sc_pcu_lock);
841 ath9k_hw_configpcipowersave(ah, 0, 0);
844 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
846 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
849 "Unable to reset channel (%u MHz), reset status %d\n",
850 channel->center_freq, r);
853 ath9k_cmn_update_txpow(ah, sc->curtxpow,
854 sc->config.txpowlimit, &sc->curtxpow);
855 if (ath_startrecv(sc) != 0) {
856 ath_err(common, "Unable to restart recv logic\n");
859 if (sc->sc_flags & SC_OP_BEACONS)
860 ath_set_beacon(sc); /* restart beacons */
862 /* Re-Enable interrupts */
863 ath9k_hw_set_interrupts(ah, ah->imask);
866 ath9k_hw_cfg_output(ah, ah->led_pin,
867 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
868 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
870 ieee80211_wake_queues(hw);
871 ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
874 spin_unlock_bh(&sc->sc_pcu_lock);
876 ath9k_ps_restore(sc);
879 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
881 struct ath_hw *ah = sc->sc_ah;
882 struct ieee80211_channel *channel = hw->conf.channel;
886 cancel_delayed_work_sync(&sc->hw_pll_work);
888 spin_lock_bh(&sc->sc_pcu_lock);
890 ieee80211_stop_queues(hw);
893 * Keep the LED on when the radio is disabled
894 * during idle unassociated state.
897 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
898 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
901 /* Disable interrupts */
902 ath9k_hw_disable_interrupts(ah);
904 ath_drain_all_txq(sc, false); /* clear pending tx frames */
906 ath_stoprecv(sc); /* turn off frame recv */
907 ath_flushrecv(sc); /* flush recv queue */
910 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
912 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
914 ath_err(ath9k_hw_common(sc->sc_ah),
915 "Unable to reset channel (%u MHz), reset status %d\n",
916 channel->center_freq, r);
919 ath9k_hw_phy_disable(ah);
921 ath9k_hw_configpcipowersave(ah, 1, 1);
923 spin_unlock_bh(&sc->sc_pcu_lock);
924 ath9k_ps_restore(sc);
927 int ath_reset(struct ath_softc *sc, bool retry_tx)
929 struct ath_hw *ah = sc->sc_ah;
930 struct ath_common *common = ath9k_hw_common(ah);
931 struct ieee80211_hw *hw = sc->hw;
934 sc->hw_busy_count = 0;
937 del_timer_sync(&common->ani.timer);
940 spin_lock_bh(&sc->sc_pcu_lock);
942 ieee80211_stop_queues(hw);
944 ath9k_hw_disable_interrupts(ah);
945 ath_drain_all_txq(sc, retry_tx);
950 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
953 "Unable to reset hardware; reset status %d\n", r);
955 if (ath_startrecv(sc) != 0)
956 ath_err(common, "Unable to start recv logic\n");
959 * We may be doing a reset in response to a request
960 * that changes the channel so update any state that
961 * might change as a result.
963 ath9k_cmn_update_txpow(ah, sc->curtxpow,
964 sc->config.txpowlimit, &sc->curtxpow);
966 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
967 ath_set_beacon(sc); /* restart beacons */
969 ath9k_hw_set_interrupts(ah, ah->imask);
973 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
974 if (ATH_TXQ_SETUP(sc, i)) {
975 spin_lock_bh(&sc->tx.txq[i].axq_lock);
976 ath_txq_schedule(sc, &sc->tx.txq[i]);
977 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
982 ieee80211_wake_queues(hw);
983 spin_unlock_bh(&sc->sc_pcu_lock);
986 ath_start_ani(common);
987 ath9k_ps_restore(sc);
992 /**********************/
993 /* mac80211 callbacks */
994 /**********************/
996 static int ath9k_start(struct ieee80211_hw *hw)
998 struct ath_softc *sc = hw->priv;
999 struct ath_hw *ah = sc->sc_ah;
1000 struct ath_common *common = ath9k_hw_common(ah);
1001 struct ieee80211_channel *curchan = hw->conf.channel;
1002 struct ath9k_channel *init_channel;
1005 ath_dbg(common, ATH_DBG_CONFIG,
1006 "Starting driver with initial channel: %d MHz\n",
1007 curchan->center_freq);
1009 ath9k_ps_wakeup(sc);
1011 mutex_lock(&sc->mutex);
1013 /* setup initial channel */
1014 sc->chan_idx = curchan->hw_value;
1016 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1018 /* Reset SERDES registers */
1019 ath9k_hw_configpcipowersave(ah, 0, 0);
1022 * The basic interface to setting the hardware in a good
1023 * state is ``reset''. On return the hardware is known to
1024 * be powered up and with interrupts disabled. This must
1025 * be followed by initialization of the appropriate bits
1026 * and then setup of the interrupt mask.
1028 spin_lock_bh(&sc->sc_pcu_lock);
1029 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1032 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1033 r, curchan->center_freq);
1034 spin_unlock_bh(&sc->sc_pcu_lock);
1039 * This is needed only to setup initial state
1040 * but it's best done after a reset.
1042 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1043 sc->config.txpowlimit, &sc->curtxpow);
1046 * Setup the hardware after reset:
1047 * The receive engine is set going.
1048 * Frame transmit is handled entirely
1049 * in the frame output path; there's nothing to do
1050 * here except setup the interrupt mask.
1052 if (ath_startrecv(sc) != 0) {
1053 ath_err(common, "Unable to start recv logic\n");
1055 spin_unlock_bh(&sc->sc_pcu_lock);
1058 spin_unlock_bh(&sc->sc_pcu_lock);
1060 /* Setup our intr mask. */
1061 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1062 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1065 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1066 ah->imask |= ATH9K_INT_RXHP |
1068 ATH9K_INT_BB_WATCHDOG;
1070 ah->imask |= ATH9K_INT_RX;
1072 ah->imask |= ATH9K_INT_GTT;
1074 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1075 ah->imask |= ATH9K_INT_CST;
1077 sc->sc_flags &= ~SC_OP_INVALID;
1078 sc->sc_ah->is_monitoring = false;
1080 /* Disable BMISS interrupt when we're not associated */
1081 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1082 ath9k_hw_set_interrupts(ah, ah->imask);
1084 ieee80211_wake_queues(hw);
1086 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1088 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1089 !ah->btcoex_hw.enabled) {
1090 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1091 AR_STOMP_LOW_WLAN_WGHT);
1092 ath9k_hw_btcoex_enable(ah);
1094 if (common->bus_ops->bt_coex_prep)
1095 common->bus_ops->bt_coex_prep(common);
1096 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1097 ath9k_btcoex_timer_resume(sc);
1100 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1101 common->bus_ops->extn_synch_en(common);
1104 mutex_unlock(&sc->mutex);
1106 ath9k_ps_restore(sc);
1111 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1113 struct ath_softc *sc = hw->priv;
1114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1115 struct ath_tx_control txctl;
1116 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1118 if (sc->ps_enabled) {
1120 * mac80211 does not set PM field for normal data frames, so we
1121 * need to update that based on the current PS mode.
1123 if (ieee80211_is_data(hdr->frame_control) &&
1124 !ieee80211_is_nullfunc(hdr->frame_control) &&
1125 !ieee80211_has_pm(hdr->frame_control)) {
1126 ath_dbg(common, ATH_DBG_PS,
1127 "Add PM=1 for a TX frame while in PS mode\n");
1128 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1132 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1134 * We are using PS-Poll and mac80211 can request TX while in
1135 * power save mode. Need to wake up hardware for the TX to be
1136 * completed and if needed, also for RX of buffered frames.
1138 ath9k_ps_wakeup(sc);
1139 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1140 ath9k_hw_setrxabort(sc->sc_ah, 0);
1141 if (ieee80211_is_pspoll(hdr->frame_control)) {
1142 ath_dbg(common, ATH_DBG_PS,
1143 "Sending PS-Poll to pick a buffered frame\n");
1144 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1146 ath_dbg(common, ATH_DBG_PS,
1147 "Wake up to complete TX\n");
1148 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1151 * The actual restore operation will happen only after
1152 * the sc_flags bit is cleared. We are just dropping
1153 * the ps_usecount here.
1155 ath9k_ps_restore(sc);
1158 memset(&txctl, 0, sizeof(struct ath_tx_control));
1159 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1161 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1163 if (ath_tx_start(hw, skb, &txctl) != 0) {
1164 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1170 dev_kfree_skb_any(skb);
1173 static void ath9k_stop(struct ieee80211_hw *hw)
1175 struct ath_softc *sc = hw->priv;
1176 struct ath_hw *ah = sc->sc_ah;
1177 struct ath_common *common = ath9k_hw_common(ah);
1179 mutex_lock(&sc->mutex);
1181 cancel_delayed_work_sync(&sc->tx_complete_work);
1182 cancel_delayed_work_sync(&sc->hw_pll_work);
1183 cancel_work_sync(&sc->paprd_work);
1184 cancel_work_sync(&sc->hw_check_work);
1186 if (sc->sc_flags & SC_OP_INVALID) {
1187 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1188 mutex_unlock(&sc->mutex);
1192 /* Ensure HW is awake when we try to shut it down. */
1193 ath9k_ps_wakeup(sc);
1195 if (ah->btcoex_hw.enabled) {
1196 ath9k_hw_btcoex_disable(ah);
1197 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1198 ath9k_btcoex_timer_pause(sc);
1201 spin_lock_bh(&sc->sc_pcu_lock);
1203 /* prevent tasklets to enable interrupts once we disable them */
1204 ah->imask &= ~ATH9K_INT_GLOBAL;
1206 /* make sure h/w will not generate any interrupt
1207 * before setting the invalid flag. */
1208 ath9k_hw_disable_interrupts(ah);
1210 if (!(sc->sc_flags & SC_OP_INVALID)) {
1211 ath_drain_all_txq(sc, false);
1213 ath9k_hw_phy_disable(ah);
1215 sc->rx.rxlink = NULL;
1218 dev_kfree_skb_any(sc->rx.frag);
1222 /* disable HAL and put h/w to sleep */
1223 ath9k_hw_disable(ah);
1224 ath9k_hw_configpcipowersave(ah, 1, 1);
1226 spin_unlock_bh(&sc->sc_pcu_lock);
1228 /* we can now sync irq and kill any running tasklets, since we already
1229 * disabled interrupts and not holding a spin lock */
1230 synchronize_irq(sc->irq);
1231 tasklet_kill(&sc->intr_tq);
1232 tasklet_kill(&sc->bcon_tasklet);
1234 ath9k_ps_restore(sc);
1237 ath_radio_disable(sc, hw);
1239 sc->sc_flags |= SC_OP_INVALID;
1241 mutex_unlock(&sc->mutex);
1243 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1246 bool ath9k_uses_beacons(int type)
1249 case NL80211_IFTYPE_AP:
1250 case NL80211_IFTYPE_ADHOC:
1251 case NL80211_IFTYPE_MESH_POINT:
1258 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1259 struct ieee80211_vif *vif)
1261 struct ath_vif *avp = (void *)vif->drv_priv;
1263 ath9k_set_beaconing_status(sc, false);
1264 ath_beacon_return(sc, avp);
1265 ath9k_set_beaconing_status(sc, true);
1266 sc->sc_flags &= ~SC_OP_BEACONS;
1269 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1271 struct ath9k_vif_iter_data *iter_data = data;
1274 if (iter_data->hw_macaddr)
1275 for (i = 0; i < ETH_ALEN; i++)
1276 iter_data->mask[i] &=
1277 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1279 switch (vif->type) {
1280 case NL80211_IFTYPE_AP:
1283 case NL80211_IFTYPE_STATION:
1284 iter_data->nstations++;
1286 case NL80211_IFTYPE_ADHOC:
1287 iter_data->nadhocs++;
1289 case NL80211_IFTYPE_MESH_POINT:
1290 iter_data->nmeshes++;
1292 case NL80211_IFTYPE_WDS:
1296 iter_data->nothers++;
1301 /* Called with sc->mutex held. */
1302 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1303 struct ieee80211_vif *vif,
1304 struct ath9k_vif_iter_data *iter_data)
1306 struct ath_softc *sc = hw->priv;
1307 struct ath_hw *ah = sc->sc_ah;
1308 struct ath_common *common = ath9k_hw_common(ah);
1311 * Use the hardware MAC address as reference, the hardware uses it
1312 * together with the BSSID mask when matching addresses.
1314 memset(iter_data, 0, sizeof(*iter_data));
1315 iter_data->hw_macaddr = common->macaddr;
1316 memset(&iter_data->mask, 0xff, ETH_ALEN);
1319 ath9k_vif_iter(iter_data, vif->addr, vif);
1321 /* Get list of all active MAC addresses */
1322 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1326 /* Called with sc->mutex held. */
1327 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1328 struct ieee80211_vif *vif)
1330 struct ath_softc *sc = hw->priv;
1331 struct ath_hw *ah = sc->sc_ah;
1332 struct ath_common *common = ath9k_hw_common(ah);
1333 struct ath9k_vif_iter_data iter_data;
1335 ath9k_calculate_iter_data(hw, vif, &iter_data);
1337 ath9k_ps_wakeup(sc);
1338 /* Set BSSID mask. */
1339 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1340 ath_hw_setbssidmask(common);
1342 /* Set op-mode & TSF */
1343 if (iter_data.naps > 0) {
1344 ath9k_hw_set_tsfadjust(ah, 1);
1345 sc->sc_flags |= SC_OP_TSF_RESET;
1346 ah->opmode = NL80211_IFTYPE_AP;
1348 ath9k_hw_set_tsfadjust(ah, 0);
1349 sc->sc_flags &= ~SC_OP_TSF_RESET;
1351 if (iter_data.nwds + iter_data.nmeshes)
1352 ah->opmode = NL80211_IFTYPE_AP;
1353 else if (iter_data.nadhocs)
1354 ah->opmode = NL80211_IFTYPE_ADHOC;
1356 ah->opmode = NL80211_IFTYPE_STATION;
1360 * Enable MIB interrupts when there are hardware phy counters.
1362 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1363 if (ah->config.enable_ani)
1364 ah->imask |= ATH9K_INT_MIB;
1365 ah->imask |= ATH9K_INT_TSFOOR;
1367 ah->imask &= ~ATH9K_INT_MIB;
1368 ah->imask &= ~ATH9K_INT_TSFOOR;
1371 ath9k_hw_set_interrupts(ah, ah->imask);
1372 ath9k_ps_restore(sc);
1375 if ((iter_data.naps + iter_data.nadhocs) > 0) {
1376 sc->sc_flags |= SC_OP_ANI_RUN;
1377 ath_start_ani(common);
1379 sc->sc_flags &= ~SC_OP_ANI_RUN;
1380 del_timer_sync(&common->ani.timer);
1384 /* Called with sc->mutex held, vif counts set up properly. */
1385 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1386 struct ieee80211_vif *vif)
1388 struct ath_softc *sc = hw->priv;
1390 ath9k_calculate_summary_state(hw, vif);
1392 if (ath9k_uses_beacons(vif->type)) {
1394 /* This may fail because upper levels do not have beacons
1395 * properly configured yet. That's OK, we assume it
1396 * will be properly configured and then we will be notified
1397 * in the info_changed method and set up beacons properly
1400 ath9k_set_beaconing_status(sc, false);
1401 error = ath_beacon_alloc(sc, vif);
1403 ath_beacon_config(sc, vif);
1404 ath9k_set_beaconing_status(sc, true);
1409 static int ath9k_add_interface(struct ieee80211_hw *hw,
1410 struct ieee80211_vif *vif)
1412 struct ath_softc *sc = hw->priv;
1413 struct ath_hw *ah = sc->sc_ah;
1414 struct ath_common *common = ath9k_hw_common(ah);
1417 mutex_lock(&sc->mutex);
1419 switch (vif->type) {
1420 case NL80211_IFTYPE_STATION:
1421 case NL80211_IFTYPE_WDS:
1422 case NL80211_IFTYPE_ADHOC:
1423 case NL80211_IFTYPE_AP:
1424 case NL80211_IFTYPE_MESH_POINT:
1427 ath_err(common, "Interface type %d not yet supported\n",
1433 if (ath9k_uses_beacons(vif->type)) {
1434 if (sc->nbcnvifs >= ATH_BCBUF) {
1435 ath_err(common, "Not enough beacon buffers when adding"
1436 " new interface of type: %i\n",
1443 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1444 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1446 ath_err(common, "Cannot create ADHOC interface when other"
1447 " interfaces already exist.\n");
1452 ath_dbg(common, ATH_DBG_CONFIG,
1453 "Attach a VIF of type: %d\n", vif->type);
1457 ath9k_do_vif_add_setup(hw, vif);
1459 mutex_unlock(&sc->mutex);
1463 static int ath9k_change_interface(struct ieee80211_hw *hw,
1464 struct ieee80211_vif *vif,
1465 enum nl80211_iftype new_type,
1468 struct ath_softc *sc = hw->priv;
1469 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1472 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1473 mutex_lock(&sc->mutex);
1475 /* See if new interface type is valid. */
1476 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1478 ath_err(common, "When using ADHOC, it must be the only"
1484 if (ath9k_uses_beacons(new_type) &&
1485 !ath9k_uses_beacons(vif->type)) {
1486 if (sc->nbcnvifs >= ATH_BCBUF) {
1487 ath_err(common, "No beacon slot available\n");
1493 /* Clean up old vif stuff */
1494 if (ath9k_uses_beacons(vif->type))
1495 ath9k_reclaim_beacon(sc, vif);
1497 /* Add new settings */
1498 vif->type = new_type;
1501 ath9k_do_vif_add_setup(hw, vif);
1503 mutex_unlock(&sc->mutex);
1507 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1508 struct ieee80211_vif *vif)
1510 struct ath_softc *sc = hw->priv;
1511 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1513 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1515 mutex_lock(&sc->mutex);
1519 /* Reclaim beacon resources */
1520 if (ath9k_uses_beacons(vif->type))
1521 ath9k_reclaim_beacon(sc, vif);
1523 ath9k_calculate_summary_state(hw, NULL);
1525 mutex_unlock(&sc->mutex);
1528 static void ath9k_enable_ps(struct ath_softc *sc)
1530 struct ath_hw *ah = sc->sc_ah;
1532 sc->ps_enabled = true;
1533 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1534 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1535 ah->imask |= ATH9K_INT_TIM_TIMER;
1536 ath9k_hw_set_interrupts(ah, ah->imask);
1538 ath9k_hw_setrxabort(ah, 1);
1542 static void ath9k_disable_ps(struct ath_softc *sc)
1544 struct ath_hw *ah = sc->sc_ah;
1546 sc->ps_enabled = false;
1547 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1548 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1549 ath9k_hw_setrxabort(ah, 0);
1550 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1552 PS_WAIT_FOR_PSPOLL_DATA |
1553 PS_WAIT_FOR_TX_ACK);
1554 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1555 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1556 ath9k_hw_set_interrupts(ah, ah->imask);
1562 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1564 struct ath_softc *sc = hw->priv;
1565 struct ath_hw *ah = sc->sc_ah;
1566 struct ath_common *common = ath9k_hw_common(ah);
1567 struct ieee80211_conf *conf = &hw->conf;
1568 bool disable_radio = false;
1570 mutex_lock(&sc->mutex);
1573 * Leave this as the first check because we need to turn on the
1574 * radio if it was disabled before prior to processing the rest
1575 * of the changes. Likewise we must only disable the radio towards
1578 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1579 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1581 ath_radio_enable(sc, hw);
1582 ath_dbg(common, ATH_DBG_CONFIG,
1583 "not-idle: enabling radio\n");
1585 disable_radio = true;
1590 * We just prepare to enable PS. We have to wait until our AP has
1591 * ACK'd our null data frame to disable RX otherwise we'll ignore
1592 * those ACKs and end up retransmitting the same null data frames.
1593 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1595 if (changed & IEEE80211_CONF_CHANGE_PS) {
1596 unsigned long flags;
1597 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1598 if (conf->flags & IEEE80211_CONF_PS)
1599 ath9k_enable_ps(sc);
1601 ath9k_disable_ps(sc);
1602 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1605 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1606 if (conf->flags & IEEE80211_CONF_MONITOR) {
1607 ath_dbg(common, ATH_DBG_CONFIG,
1608 "Monitor mode is enabled\n");
1609 sc->sc_ah->is_monitoring = true;
1611 ath_dbg(common, ATH_DBG_CONFIG,
1612 "Monitor mode is disabled\n");
1613 sc->sc_ah->is_monitoring = false;
1617 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1618 struct ieee80211_channel *curchan = hw->conf.channel;
1619 int pos = curchan->hw_value;
1621 unsigned long flags;
1624 old_pos = ah->curchan - &ah->channels[0];
1626 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1627 sc->sc_flags |= SC_OP_OFFCHANNEL;
1629 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1631 ath_dbg(common, ATH_DBG_CONFIG,
1632 "Set channel: %d MHz type: %d\n",
1633 curchan->center_freq, conf->channel_type);
1635 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1636 curchan, conf->channel_type);
1638 /* update survey stats for the old channel before switching */
1639 spin_lock_irqsave(&common->cc_lock, flags);
1640 ath_update_survey_stats(sc);
1641 spin_unlock_irqrestore(&common->cc_lock, flags);
1644 * If the operating channel changes, change the survey in-use flags
1646 * Reset the survey data for the new channel, unless we're switching
1647 * back to the operating channel from an off-channel operation.
1649 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1650 sc->cur_survey != &sc->survey[pos]) {
1653 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1655 sc->cur_survey = &sc->survey[pos];
1657 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1658 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1659 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1660 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1663 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1664 ath_err(common, "Unable to set channel\n");
1665 mutex_unlock(&sc->mutex);
1670 * The most recent snapshot of channel->noisefloor for the old
1671 * channel is only available after the hardware reset. Copy it to
1672 * the survey stats now.
1675 ath_update_survey_nf(sc, old_pos);
1678 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1679 ath_dbg(common, ATH_DBG_CONFIG,
1680 "Set power: %d\n", conf->power_level);
1681 sc->config.txpowlimit = 2 * conf->power_level;
1682 ath9k_ps_wakeup(sc);
1683 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1684 sc->config.txpowlimit, &sc->curtxpow);
1685 ath9k_ps_restore(sc);
1688 if (disable_radio) {
1689 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1690 ath_radio_disable(sc, hw);
1693 mutex_unlock(&sc->mutex);
1698 #define SUPPORTED_FILTERS \
1699 (FIF_PROMISC_IN_BSS | \
1704 FIF_BCN_PRBRESP_PROMISC | \
1708 /* FIXME: sc->sc_full_reset ? */
1709 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1710 unsigned int changed_flags,
1711 unsigned int *total_flags,
1714 struct ath_softc *sc = hw->priv;
1717 changed_flags &= SUPPORTED_FILTERS;
1718 *total_flags &= SUPPORTED_FILTERS;
1720 sc->rx.rxfilter = *total_flags;
1721 ath9k_ps_wakeup(sc);
1722 rfilt = ath_calcrxfilter(sc);
1723 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1724 ath9k_ps_restore(sc);
1726 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1727 "Set HW RX filter: 0x%x\n", rfilt);
1730 static int ath9k_sta_add(struct ieee80211_hw *hw,
1731 struct ieee80211_vif *vif,
1732 struct ieee80211_sta *sta)
1734 struct ath_softc *sc = hw->priv;
1736 ath_node_attach(sc, sta);
1741 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1742 struct ieee80211_vif *vif,
1743 struct ieee80211_sta *sta)
1745 struct ath_softc *sc = hw->priv;
1747 ath_node_detach(sc, sta);
1752 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1753 const struct ieee80211_tx_queue_params *params)
1755 struct ath_softc *sc = hw->priv;
1756 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1757 struct ath_txq *txq;
1758 struct ath9k_tx_queue_info qi;
1761 if (queue >= WME_NUM_AC)
1764 txq = sc->tx.txq_map[queue];
1766 mutex_lock(&sc->mutex);
1768 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1770 qi.tqi_aifs = params->aifs;
1771 qi.tqi_cwmin = params->cw_min;
1772 qi.tqi_cwmax = params->cw_max;
1773 qi.tqi_burstTime = params->txop;
1775 ath_dbg(common, ATH_DBG_CONFIG,
1776 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1777 queue, txq->axq_qnum, params->aifs, params->cw_min,
1778 params->cw_max, params->txop);
1780 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1782 ath_err(common, "TXQ Update failed\n");
1784 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1785 if (queue == WME_AC_BE && !ret)
1786 ath_beaconq_config(sc);
1788 mutex_unlock(&sc->mutex);
1793 static int ath9k_set_key(struct ieee80211_hw *hw,
1794 enum set_key_cmd cmd,
1795 struct ieee80211_vif *vif,
1796 struct ieee80211_sta *sta,
1797 struct ieee80211_key_conf *key)
1799 struct ath_softc *sc = hw->priv;
1800 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1803 if (ath9k_modparam_nohwcrypt)
1806 if (vif->type == NL80211_IFTYPE_ADHOC &&
1807 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1808 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1809 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1811 * For now, disable hw crypto for the RSN IBSS group keys. This
1812 * could be optimized in the future to use a modified key cache
1813 * design to support per-STA RX GTK, but until that gets
1814 * implemented, use of software crypto for group addressed
1815 * frames is a acceptable to allow RSN IBSS to be used.
1820 mutex_lock(&sc->mutex);
1821 ath9k_ps_wakeup(sc);
1822 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1826 ret = ath_key_config(common, vif, sta, key);
1828 key->hw_key_idx = ret;
1829 /* push IV and Michael MIC generation to stack */
1830 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1831 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1832 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1833 if (sc->sc_ah->sw_mgmt_crypto &&
1834 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1835 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1840 ath_key_delete(common, key);
1846 ath9k_ps_restore(sc);
1847 mutex_unlock(&sc->mutex);
1851 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1853 struct ath_softc *sc = data;
1854 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1855 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1856 struct ath_vif *avp = (void *)vif->drv_priv;
1858 switch (sc->sc_ah->opmode) {
1859 case NL80211_IFTYPE_ADHOC:
1860 /* There can be only one vif available */
1861 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1862 common->curaid = bss_conf->aid;
1863 ath9k_hw_write_associd(sc->sc_ah);
1864 /* configure beacon */
1865 if (bss_conf->enable_beacon)
1866 ath_beacon_config(sc, vif);
1868 case NL80211_IFTYPE_STATION:
1870 * Skip iteration if primary station vif's bss info
1873 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1876 if (bss_conf->assoc) {
1877 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1878 avp->primary_sta_vif = true;
1879 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1880 common->curaid = bss_conf->aid;
1881 ath9k_hw_write_associd(sc->sc_ah);
1882 ath_dbg(common, ATH_DBG_CONFIG,
1883 "Bss Info ASSOC %d, bssid: %pM\n",
1884 bss_conf->aid, common->curbssid);
1885 ath_beacon_config(sc, vif);
1886 /* Reset rssi stats */
1887 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1888 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1890 sc->sc_flags |= SC_OP_ANI_RUN;
1891 ath_start_ani(common);
1899 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1901 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1902 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1903 struct ath_vif *avp = (void *)vif->drv_priv;
1905 /* Reconfigure bss info */
1906 if (avp->primary_sta_vif && !bss_conf->assoc) {
1907 ath_dbg(common, ATH_DBG_CONFIG,
1908 "Bss Info DISASSOC %d, bssid %pM\n",
1909 common->curaid, common->curbssid);
1910 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1911 avp->primary_sta_vif = false;
1912 memset(common->curbssid, 0, ETH_ALEN);
1916 ieee80211_iterate_active_interfaces_atomic(
1917 sc->hw, ath9k_bss_iter, sc);
1920 * None of station vifs are associated.
1923 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
1924 !(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1925 ath9k_hw_write_associd(sc->sc_ah);
1927 sc->sc_flags &= ~SC_OP_ANI_RUN;
1928 del_timer_sync(&common->ani.timer);
1932 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1933 struct ieee80211_vif *vif,
1934 struct ieee80211_bss_conf *bss_conf,
1937 struct ath_softc *sc = hw->priv;
1938 struct ath_hw *ah = sc->sc_ah;
1939 struct ath_common *common = ath9k_hw_common(ah);
1940 struct ath_vif *avp = (void *)vif->drv_priv;
1944 mutex_lock(&sc->mutex);
1946 if (changed & BSS_CHANGED_BSSID) {
1947 ath9k_config_bss(sc, vif);
1949 /* Set aggregation protection mode parameters */
1950 sc->config.ath_aggr_prot = 0;
1952 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1953 common->curbssid, common->curaid);
1956 /* Enable transmission of beacons (AP, IBSS, MESH) */
1957 if ((changed & BSS_CHANGED_BEACON) ||
1958 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1959 ath9k_set_beaconing_status(sc, false);
1960 error = ath_beacon_alloc(sc, vif);
1962 ath_beacon_config(sc, vif);
1963 ath9k_set_beaconing_status(sc, true);
1966 if (changed & BSS_CHANGED_ERP_SLOT) {
1967 if (bss_conf->use_short_slot)
1971 if (vif->type == NL80211_IFTYPE_AP) {
1973 * Defer update, so that connected stations can adjust
1974 * their settings at the same time.
1975 * See beacon.c for more details
1977 sc->beacon.slottime = slottime;
1978 sc->beacon.updateslot = UPDATE;
1980 ah->slottime = slottime;
1981 ath9k_hw_init_global_settings(ah);
1985 /* Disable transmission of beacons */
1986 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
1987 !bss_conf->enable_beacon) {
1988 ath9k_set_beaconing_status(sc, false);
1989 avp->is_bslot_active = false;
1990 ath9k_set_beaconing_status(sc, true);
1993 if (changed & BSS_CHANGED_BEACON_INT) {
1995 * In case of AP mode, the HW TSF has to be reset
1996 * when the beacon interval changes.
1998 if (vif->type == NL80211_IFTYPE_AP) {
1999 sc->sc_flags |= SC_OP_TSF_RESET;
2000 ath9k_set_beaconing_status(sc, false);
2001 error = ath_beacon_alloc(sc, vif);
2003 ath_beacon_config(sc, vif);
2004 ath9k_set_beaconing_status(sc, true);
2006 ath_beacon_config(sc, vif);
2009 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2010 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2011 bss_conf->use_short_preamble);
2012 if (bss_conf->use_short_preamble)
2013 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2015 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2018 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2019 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2020 bss_conf->use_cts_prot);
2021 if (bss_conf->use_cts_prot &&
2022 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2023 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2025 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2028 mutex_unlock(&sc->mutex);
2031 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2033 struct ath_softc *sc = hw->priv;
2036 mutex_lock(&sc->mutex);
2037 ath9k_ps_wakeup(sc);
2038 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2039 ath9k_ps_restore(sc);
2040 mutex_unlock(&sc->mutex);
2045 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2047 struct ath_softc *sc = hw->priv;
2049 mutex_lock(&sc->mutex);
2050 ath9k_ps_wakeup(sc);
2051 ath9k_hw_settsf64(sc->sc_ah, tsf);
2052 ath9k_ps_restore(sc);
2053 mutex_unlock(&sc->mutex);
2056 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2058 struct ath_softc *sc = hw->priv;
2060 mutex_lock(&sc->mutex);
2062 ath9k_ps_wakeup(sc);
2063 ath9k_hw_reset_tsf(sc->sc_ah);
2064 ath9k_ps_restore(sc);
2066 mutex_unlock(&sc->mutex);
2069 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2070 struct ieee80211_vif *vif,
2071 enum ieee80211_ampdu_mlme_action action,
2072 struct ieee80211_sta *sta,
2073 u16 tid, u16 *ssn, u8 buf_size)
2075 struct ath_softc *sc = hw->priv;
2081 case IEEE80211_AMPDU_RX_START:
2082 if (!(sc->sc_flags & SC_OP_RXAGGR))
2085 case IEEE80211_AMPDU_RX_STOP:
2087 case IEEE80211_AMPDU_TX_START:
2088 if (!(sc->sc_flags & SC_OP_TXAGGR))
2091 ath9k_ps_wakeup(sc);
2092 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2094 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2095 ath9k_ps_restore(sc);
2097 case IEEE80211_AMPDU_TX_STOP:
2098 ath9k_ps_wakeup(sc);
2099 ath_tx_aggr_stop(sc, sta, tid);
2100 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2101 ath9k_ps_restore(sc);
2103 case IEEE80211_AMPDU_TX_OPERATIONAL:
2104 ath9k_ps_wakeup(sc);
2105 ath_tx_aggr_resume(sc, sta, tid);
2106 ath9k_ps_restore(sc);
2109 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2117 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2118 struct survey_info *survey)
2120 struct ath_softc *sc = hw->priv;
2121 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2122 struct ieee80211_supported_band *sband;
2123 struct ieee80211_channel *chan;
2124 unsigned long flags;
2127 spin_lock_irqsave(&common->cc_lock, flags);
2129 ath_update_survey_stats(sc);
2131 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2132 if (sband && idx >= sband->n_channels) {
2133 idx -= sband->n_channels;
2138 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2140 if (!sband || idx >= sband->n_channels) {
2141 spin_unlock_irqrestore(&common->cc_lock, flags);
2145 chan = &sband->channels[idx];
2146 pos = chan->hw_value;
2147 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2148 survey->channel = chan;
2149 spin_unlock_irqrestore(&common->cc_lock, flags);
2154 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2156 struct ath_softc *sc = hw->priv;
2157 struct ath_hw *ah = sc->sc_ah;
2159 mutex_lock(&sc->mutex);
2160 ah->coverage_class = coverage_class;
2161 ath9k_hw_init_global_settings(ah);
2162 mutex_unlock(&sc->mutex);
2165 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2167 struct ath_softc *sc = hw->priv;
2168 int timeout = 200; /* ms */
2171 ath9k_ps_wakeup(sc);
2172 mutex_lock(&sc->mutex);
2174 cancel_delayed_work_sync(&sc->tx_complete_work);
2179 for (j = 0; j < timeout; j++) {
2183 usleep_range(1000, 2000);
2185 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2186 if (!ATH_TXQ_SETUP(sc, i))
2189 npend += ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2196 if (!ath_drain_all_txq(sc, false))
2197 ath_reset(sc, false);
2199 ieee80211_wake_queues(hw);
2202 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2203 mutex_unlock(&sc->mutex);
2204 ath9k_ps_restore(sc);
2207 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2209 struct ath_softc *sc = hw->priv;
2212 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2213 if (!ATH_TXQ_SETUP(sc, i))
2216 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2222 struct ieee80211_ops ath9k_ops = {
2224 .start = ath9k_start,
2226 .add_interface = ath9k_add_interface,
2227 .change_interface = ath9k_change_interface,
2228 .remove_interface = ath9k_remove_interface,
2229 .config = ath9k_config,
2230 .configure_filter = ath9k_configure_filter,
2231 .sta_add = ath9k_sta_add,
2232 .sta_remove = ath9k_sta_remove,
2233 .conf_tx = ath9k_conf_tx,
2234 .bss_info_changed = ath9k_bss_info_changed,
2235 .set_key = ath9k_set_key,
2236 .get_tsf = ath9k_get_tsf,
2237 .set_tsf = ath9k_set_tsf,
2238 .reset_tsf = ath9k_reset_tsf,
2239 .ampdu_action = ath9k_ampdu_action,
2240 .get_survey = ath9k_get_survey,
2241 .rfkill_poll = ath9k_rfkill_poll_state,
2242 .set_coverage_class = ath9k_set_coverage_class,
2243 .flush = ath9k_flush,
2244 .tx_frames_pending = ath9k_tx_frames_pending,