drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         ath_drain_all_txq(sc, false);
 250
 251         stopped = ath_stoprecv(sc);
 252
 253         /* XXX: do not flush receive queue here. We don't want
 254          * to flush data frames already in queue because of
 255          * changing channel. */
 256
 257         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 fastcc = false;
 259
 260         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 caldata = &aphy->caldata;
 262
 263         ath_dbg(common, ATH_DBG_CONFIG,
 264                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 265                 sc->sc_ah->curchan->channel,
 266                 channel->center_freq, conf_is_ht40(conf),
 267                 fastcc);
 268
 269         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 270         if (r) {
 271                 ath_err(common,
 272                         "Unable to reset channel (%u MHz), reset status %d\n",
 273                         channel->center_freq, r);
 274                 goto ps_restore;
 275         }
 276
 277         if (ath_startrecv(sc) != 0) {
 278                 ath_err(common, "Unable to restart recv logic\n");
 279                 r = -EIO;
 280                 goto ps_restore;
 281         }
 282
 283         ath_update_txpow(sc);
 284         ath9k_hw_set_interrupts(ah, ah->imask);
 285
 286         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 287                 ath_beacon_config(sc, NULL);
 288                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 289                 ath_start_ani(common);
 290         }
 291
 292  ps_restore:
 293         spin_unlock_bh(&sc->sc_pcu_lock);
 294
 295         ath9k_ps_restore(sc);
 296         return r;
 297 }
 298
 299 static void ath_paprd_activate(struct ath_softc *sc)
 300 {
 301         struct ath_hw *ah = sc->sc_ah;
 302         struct ath9k_hw_cal_data *caldata = ah->caldata;
 303         struct ath_common *common = ath9k_hw_common(ah);
 304         int chain;
 305
 306         if (!caldata || !caldata->paprd_done)
 307                 return;
 308
 309         ath9k_ps_wakeup(sc);
 310         ar9003_paprd_enable(ah, false);
 311         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 312                 if (!(common->tx_chainmask & BIT(chain)))
 313                         continue;
 314
 315                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 316         }
 317
 318         ar9003_paprd_enable(ah, true);
 319         ath9k_ps_restore(sc);
 320 }
 321
 322 void ath_paprd_calibrate(struct work_struct *work)
 323 {
 324         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 325         struct ieee80211_hw *hw = sc->hw;
 326         struct ath_hw *ah = sc->sc_ah;
 327         struct ieee80211_hdr *hdr;
 328         struct sk_buff *skb = NULL;
 329         struct ieee80211_tx_info *tx_info;
 330         int band = hw->conf.channel->band;
 331         struct ieee80211_supported_band *sband = &sc->sbands[band];
 332         struct ath_tx_control txctl;
 333         struct ath9k_hw_cal_data *caldata = ah->caldata;
 334         struct ath_common *common = ath9k_hw_common(ah);
 335         int ftype;
 336         int chain_ok = 0;
 337         int chain;
 338         int len = 1800;
 339         int time_left;
 340         int i;
 341
 342         if (!caldata)
 343                 return;
 344
 345         skb = alloc_skb(len, GFP_KERNEL);
 346         if (!skb)
 347                 return;
 348
 349         tx_info = IEEE80211_SKB_CB(skb);
 350
 351         skb_put(skb, len);
 352         memset(skb->data, 0, len);
 353         hdr = (struct ieee80211_hdr *)skb->data;
 354         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 355         hdr->frame_control = cpu_to_le16(ftype);
 356         hdr->duration_id = cpu_to_le16(10);
 357         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 358         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 359         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 360
 361         memset(&txctl, 0, sizeof(txctl));
 362         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 363
 364         ath9k_ps_wakeup(sc);
 365         ar9003_paprd_init_table(ah);
 366         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 367                 if (!(common->tx_chainmask & BIT(chain)))
 368                         continue;
 369
 370                 chain_ok = 0;
 371                 memset(tx_info, 0, sizeof(*tx_info));
 372                 tx_info->band = band;
 373
 374                 for (i = 0; i < 4; i++) {
 375                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 376                         tx_info->control.rates[i].count = 6;
 377                 }
 378
 379                 init_completion(&sc->paprd_complete);
 380                 sc->paprd_pending = true;
 381                 ar9003_paprd_setup_gain_table(ah, chain);
 382                 txctl.paprd = BIT(chain);
 383                 if (ath_tx_start(hw, skb, &txctl) != 0)
 384                         break;
 385
 386                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 387                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 388                 sc->paprd_pending = false;
 389                 if (!time_left) {
 390                         ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 391                                 "Timeout waiting for paprd training on TX chain %d\n",
 392                                 chain);
 393                         goto fail_paprd;
 394                 }
 395
 396                 if (!ar9003_paprd_is_done(ah))
 397                         break;
 398
 399                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 400                         break;
 401
 402                 chain_ok = 1;
 403         }
 404         kfree_skb(skb);
 405
 406         if (chain_ok) {
 407                 caldata->paprd_done = true;
 408                 ath_paprd_activate(sc);
 409         }
 410
 411 fail_paprd:
 412         ath9k_ps_restore(sc);
 413 }
 414
 415 /*
 416  *  This routine performs the periodic noise floor calibration function
 417  *  that is used to adjust and optimize the chip performance.  This
 418  *  takes environmental changes (location, temperature) into account.
 419  *  When the task is complete, it reschedules itself depending on the
 420  *  appropriate interval that was calculated.
 421  */
 422 void ath_ani_calibrate(unsigned long data)
 423 {
 424         struct ath_softc *sc = (struct ath_softc *)data;
 425         struct ath_hw *ah = sc->sc_ah;
 426         struct ath_common *common = ath9k_hw_common(ah);
 427         bool longcal = false;
 428         bool shortcal = false;
 429         bool aniflag = false;
 430         unsigned int timestamp = jiffies_to_msecs(jiffies);
 431         u32 cal_interval, short_cal_interval, long_cal_interval;
 432         unsigned long flags;
 433
 434         if (ah->caldata && ah->caldata->nfcal_interference)
 435                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 436         else
 437                 long_cal_interval = ATH_LONG_CALINTERVAL;
 438
 439         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 440                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 441
 442         /* Only calibrate if awake */
 443         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 444                 goto set_timer;
 445
 446         ath9k_ps_wakeup(sc);
 447
 448         /* Long calibration runs independently of short calibration. */
 449         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 450                 longcal = true;
 451                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 452                 common->ani.longcal_timer = timestamp;
 453         }
 454
 455         /* Short calibration applies only while caldone is false */
 456         if (!common->ani.caldone) {
 457                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 458                         shortcal = true;
 459                         ath_dbg(common, ATH_DBG_ANI,
 460                                 "shortcal @%lu\n", jiffies);
 461                         common->ani.shortcal_timer = timestamp;
 462                         common->ani.resetcal_timer = timestamp;
 463                 }
 464         } else {
 465                 if ((timestamp - common->ani.resetcal_timer) >=
 466                     ATH_RESTART_CALINTERVAL) {
 467                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 468                         if (common->ani.caldone)
 469                                 common->ani.resetcal_timer = timestamp;
 470                 }
 471         }
 472
 473         /* Verify whether we must check ANI */
 474         if ((timestamp - common->ani.checkani_timer) >=
 475              ah->config.ani_poll_interval) {
 476                 aniflag = true;
 477                 common->ani.checkani_timer = timestamp;
 478         }
 479
 480         /* Skip all processing if there's nothing to do. */
 481         if (longcal || shortcal || aniflag) {
 482                 /* Call ANI routine if necessary */
 483                 if (aniflag) {
 484                         spin_lock_irqsave(&common->cc_lock, flags);
 485                         ath9k_hw_ani_monitor(ah, ah->curchan);
 486                         ath_update_survey_stats(sc);
 487                         spin_unlock_irqrestore(&common->cc_lock, flags);
 488                 }
 489
 490                 /* Perform calibration if necessary */
 491                 if (longcal || shortcal) {
 492                         common->ani.caldone =
 493                                 ath9k_hw_calibrate(ah,
 494                                                    ah->curchan,
 495                                                    common->rx_chainmask,
 496                                                    longcal);
 497                 }
 498         }
 499
 500         ath9k_ps_restore(sc);
 501
 502 set_timer:
 503         /*
 504         * Set timer interval based on previous results.
 505         * The interval must be the shortest necessary to satisfy ANI,
 506         * short calibration and long calibration.
 507         */
 508         cal_interval = ATH_LONG_CALINTERVAL;
 509         if (sc->sc_ah->config.enable_ani)
 510                 cal_interval = min(cal_interval,
 511                                    (u32)ah->config.ani_poll_interval);
 512         if (!common->ani.caldone)
 513                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 514
 515         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 516         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 517                 if (!ah->caldata->paprd_done)
 518                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 519                 else
 520                         ath_paprd_activate(sc);
 521         }
 522 }
 523
 524 /*
 525  * Update tx/rx chainmask. For legacy association,
 526  * hard code chainmask to 1x1, for 11n association, use
 527  * the chainmask configuration, for bt coexistence, use
 528  * the chainmask configuration even in legacy mode.
 529  */
 530 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 531 {
 532         struct ath_hw *ah = sc->sc_ah;
 533         struct ath_common *common = ath9k_hw_common(ah);
 534
 535         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 536             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 537                 common->tx_chainmask = ah->caps.tx_chainmask;
 538                 common->rx_chainmask = ah->caps.rx_chainmask;
 539         } else {
 540                 common->tx_chainmask = 1;
 541                 common->rx_chainmask = 1;
 542         }
 543
 544         ath_dbg(common, ATH_DBG_CONFIG,
 545                 "tx chmask: %d, rx chmask: %d\n",
 546                 common->tx_chainmask,
 547                 common->rx_chainmask);
 548 }
 549
 550 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 551 {
 552         struct ath_node *an;
 553         struct ath_hw *ah = sc->sc_ah;
 554         an = (struct ath_node *)sta->drv_priv;
 555
 556         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 557                 sc->sc_flags |= SC_OP_ENABLE_APM;
 558
 559         if (sc->sc_flags & SC_OP_TXAGGR) {
 560                 ath_tx_node_init(sc, an);
 561                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 562                                      sta->ht_cap.ampdu_factor);
 563                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 564         }
 565 }
 566
 567 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 568 {
 569         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 570
 571         if (sc->sc_flags & SC_OP_TXAGGR)
 572                 ath_tx_node_cleanup(sc, an);
 573 }
 574
 575 void ath_hw_check(struct work_struct *work)
 576 {
 577         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 578         int i;
 579
 580         ath9k_ps_wakeup(sc);
 581
 582         for (i = 0; i < 3; i++) {
 583                 if (ath9k_hw_check_alive(sc->sc_ah))
 584                         goto out;
 585
 586                 msleep(1);
 587         }
 588         ath_reset(sc, true);
 589
 590 out:
 591         ath9k_ps_restore(sc);
 592 }
 593
 594 void ath9k_tasklet(unsigned long data)
 595 {
 596         struct ath_softc *sc = (struct ath_softc *)data;
 597         struct ath_hw *ah = sc->sc_ah;
 598         struct ath_common *common = ath9k_hw_common(ah);
 599
 600         u32 status = sc->intrstatus;
 601         u32 rxmask;
 602
 603         ath9k_ps_wakeup(sc);
 604
 605         if (status & ATH9K_INT_FATAL) {
 606                 ath_reset(sc, true);
 607                 ath9k_ps_restore(sc);
 608                 return;
 609         }
 610
 611         spin_lock_bh(&sc->sc_pcu_lock);
 612
 613         if (!ath9k_hw_check_alive(ah))
 614                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 615
 616         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 617                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 618                           ATH9K_INT_RXORN);
 619         else
 620                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 621
 622         if (status & rxmask) {
 623                 /* Check for high priority Rx first */
 624                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 625                     (status & ATH9K_INT_RXHP))
 626                         ath_rx_tasklet(sc, 0, true);
 627
 628                 ath_rx_tasklet(sc, 0, false);
 629         }
 630
 631         if (status & ATH9K_INT_TX) {
 632                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 633                         ath_tx_edma_tasklet(sc);
 634                 else
 635                         ath_tx_tasklet(sc);
 636         }
 637
 638         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 639                 /*
 640                  * TSF sync does not look correct; remain awake to sync with
 641                  * the next Beacon.
 642                  */
 643                 ath_dbg(common, ATH_DBG_PS,
 644                         "TSFOOR - Sync with next Beacon\n");
 645                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 646         }
 647
 648         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 649                 if (status & ATH9K_INT_GENTIMER)
 650                         ath_gen_timer_isr(sc->sc_ah);
 651
 652         /* re-enable hardware interrupt */
 653         ath9k_hw_enable_interrupts(ah);
 654
 655         spin_unlock_bh(&sc->sc_pcu_lock);
 656         ath9k_ps_restore(sc);
 657 }
 658
 659 irqreturn_t ath_isr(int irq, void *dev)
 660 {
 661 #define SCHED_INTR (                            \
 662                 ATH9K_INT_FATAL |               \
 663                 ATH9K_INT_RXORN |               \
 664                 ATH9K_INT_RXEOL |               \
 665                 ATH9K_INT_RX |                  \
 666                 ATH9K_INT_RXLP |                \
 667                 ATH9K_INT_RXHP |                \
 668                 ATH9K_INT_TX |                  \
 669                 ATH9K_INT_BMISS |               \
 670                 ATH9K_INT_CST |                 \
 671                 ATH9K_INT_TSFOOR |              \
 672                 ATH9K_INT_GENTIMER)
 673
 674         struct ath_softc *sc = dev;
 675         struct ath_hw *ah = sc->sc_ah;
 676         struct ath_common *common = ath9k_hw_common(ah);
 677         enum ath9k_int status;
 678         bool sched = false;
 679
 680         /*
 681          * The hardware is not ready/present, don't
 682          * touch anything. Note this can happen early
 683          * on if the IRQ is shared.
 684          */
 685         if (sc->sc_flags & SC_OP_INVALID)
 686                 return IRQ_NONE;
 687
 688
 689         /* shared irq, not for us */
 690
 691         if (!ath9k_hw_intrpend(ah))
 692                 return IRQ_NONE;
 693
 694         /*
 695          * Figure out the reason(s) for the interrupt.  Note
 696          * that the hal returns a pseudo-ISR that may include
 697          * bits we haven't explicitly enabled so we mask the
 698          * value to insure we only process bits we requested.
 699          */
 700         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 701         status &= ah->imask;    /* discard unasked-for bits */
 702
 703         /*
 704          * If there are no status bits set, then this interrupt was not
 705          * for me (should have been caught above).
 706          */
 707         if (!status)
 708                 return IRQ_NONE;
 709
 710         /* Cache the status */
 711         sc->intrstatus = status;
 712
 713         if (status & SCHED_INTR)
 714                 sched = true;
 715
 716         /*
 717          * If a FATAL or RXORN interrupt is received, we have to reset the
 718          * chip immediately.
 719          */
 720         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 721             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 722                 goto chip_reset;
 723
 724         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 725             (status & ATH9K_INT_BB_WATCHDOG)) {
 726
 727                 spin_lock(&common->cc_lock);
 728                 ath_hw_cycle_counters_update(common);
 729                 ar9003_hw_bb_watchdog_dbg_info(ah);
 730                 spin_unlock(&common->cc_lock);
 731
 732                 goto chip_reset;
 733         }
 734
 735         if (status & ATH9K_INT_SWBA)
 736                 tasklet_schedule(&sc->bcon_tasklet);
 737
 738         if (status & ATH9K_INT_TXURN)
 739                 ath9k_hw_updatetxtriglevel(ah, true);
 740
 741         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 742                 if (status & ATH9K_INT_RXEOL) {
 743                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 744                         ath9k_hw_set_interrupts(ah, ah->imask);
 745                 }
 746         }
 747
 748         if (status & ATH9K_INT_MIB) {
 749                 /*
 750                  * Disable interrupts until we service the MIB
 751                  * interrupt; otherwise it will continue to
 752                  * fire.
 753                  */
 754                 ath9k_hw_disable_interrupts(ah);
 755                 /*
 756                  * Let the hal handle the event. We assume
 757                  * it will clear whatever condition caused
 758                  * the interrupt.
 759                  */
 760                 spin_lock(&common->cc_lock);
 761                 ath9k_hw_proc_mib_event(ah);
 762                 spin_unlock(&common->cc_lock);
 763                 ath9k_hw_enable_interrupts(ah);
 764         }
 765
 766         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 767                 if (status & ATH9K_INT_TIM_TIMER) {
 768                         /* Clear RxAbort bit so that we can
 769                          * receive frames */
 770                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 771                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 772                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 773                 }
 774
 775 chip_reset:
 776
 777         ath_debug_stat_interrupt(sc, status);
 778
 779         if (sched) {
 780                 /* turn off every interrupt */
 781                 ath9k_hw_disable_interrupts(ah);
 782                 tasklet_schedule(&sc->intr_tq);
 783         }
 784
 785         return IRQ_HANDLED;
 786
 787 #undef SCHED_INTR
 788 }
 789
 790 static u32 ath_get_extchanmode(struct ath_softc *sc,
 791                                struct ieee80211_channel *chan,
 792                                enum nl80211_channel_type channel_type)
 793 {
 794         u32 chanmode = 0;
 795
 796         switch (chan->band) {
 797         case IEEE80211_BAND_2GHZ:
 798                 switch(channel_type) {
 799                 case NL80211_CHAN_NO_HT:
 800                 case NL80211_CHAN_HT20:
 801                         chanmode = CHANNEL_G_HT20;
 802                         break;
 803                 case NL80211_CHAN_HT40PLUS:
 804                         chanmode = CHANNEL_G_HT40PLUS;
 805                         break;
 806                 case NL80211_CHAN_HT40MINUS:
 807                         chanmode = CHANNEL_G_HT40MINUS;
 808                         break;
 809                 }
 810                 break;
 811         case IEEE80211_BAND_5GHZ:
 812                 switch(channel_type) {
 813                 case NL80211_CHAN_NO_HT:
 814                 case NL80211_CHAN_HT20:
 815                         chanmode = CHANNEL_A_HT20;
 816                         break;
 817                 case NL80211_CHAN_HT40PLUS:
 818                         chanmode = CHANNEL_A_HT40PLUS;
 819                         break;
 820                 case NL80211_CHAN_HT40MINUS:
 821                         chanmode = CHANNEL_A_HT40MINUS;
 822                         break;
 823                 }
 824                 break;
 825         default:
 826                 break;
 827         }
 828
 829         return chanmode;
 830 }
 831
 832 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 833                                  struct ieee80211_hw *hw,
 834                                  struct ieee80211_vif *vif,
 835                                  struct ieee80211_bss_conf *bss_conf)
 836 {
 837         struct ath_wiphy *aphy = hw->priv;
 838         struct ath_hw *ah = sc->sc_ah;
 839         struct ath_common *common = ath9k_hw_common(ah);
 840
 841         if (bss_conf->assoc) {
 842                 ath_dbg(common, ATH_DBG_CONFIG,
 843                         "Bss Info ASSOC %d, bssid: %pM\n",
 844                         bss_conf->aid, common->curbssid);
 845
 846                 /* New association, store aid */
 847                 common->curaid = bss_conf->aid;
 848                 ath9k_hw_write_associd(ah);
 849
 850                 /*
 851                  * Request a re-configuration of Beacon related timers
 852                  * on the receipt of the first Beacon frame (i.e.,
 853                  * after time sync with the AP).
 854                  */
 855                 sc->ps_flags |= PS_BEACON_SYNC;
 856
 857                 /* Configure the beacon */
 858                 ath_beacon_config(sc, vif);
 859
 860                 /* Reset rssi stats */
 861                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 862                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 863
 864                 sc->sc_flags |= SC_OP_ANI_RUN;
 865                 ath_start_ani(common);
 866         } else {
 867                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 868                 common->curaid = 0;
 869                 /* Stop ANI */
 870                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 871                 del_timer_sync(&common->ani.timer);
 872         }
 873 }
 874
 875 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 876 {
 877         struct ath_hw *ah = sc->sc_ah;
 878         struct ath_common *common = ath9k_hw_common(ah);
 879         struct ieee80211_channel *channel = hw->conf.channel;
 880         int r;
 881
 882         ath9k_ps_wakeup(sc);
 883         spin_lock_bh(&sc->sc_pcu_lock);
 884
 885         ath9k_hw_configpcipowersave(ah, 0, 0);
 886
 887         if (!ah->curchan)
 888                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 889
 890         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 891         if (r) {
 892                 ath_err(common,
 893                         "Unable to reset channel (%u MHz), reset status %d\n",
 894                         channel->center_freq, r);
 895         }
 896
 897         ath_update_txpow(sc);
 898         if (ath_startrecv(sc) != 0) {
 899                 ath_err(common, "Unable to restart recv logic\n");
 900                 spin_unlock_bh(&sc->sc_pcu_lock);
 901                 return;
 902         }
 903         if (sc->sc_flags & SC_OP_BEACONS)
 904                 ath_beacon_config(sc, NULL);    /* restart beacons */
 905
 906         /* Re-Enable  interrupts */
 907         ath9k_hw_set_interrupts(ah, ah->imask);
 908
 909         /* Enable LED */
 910         ath9k_hw_cfg_output(ah, ah->led_pin,
 911                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 912         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 913
 914         ieee80211_wake_queues(hw);
 915         spin_unlock_bh(&sc->sc_pcu_lock);
 916
 917         ath9k_ps_restore(sc);
 918 }
 919
 920 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 921 {
 922         struct ath_hw *ah = sc->sc_ah;
 923         struct ieee80211_channel *channel = hw->conf.channel;
 924         int r;
 925
 926         ath9k_ps_wakeup(sc);
 927         spin_lock_bh(&sc->sc_pcu_lock);
 928
 929         ieee80211_stop_queues(hw);
 930
 931         /*
 932          * Keep the LED on when the radio is disabled
 933          * during idle unassociated state.
 934          */
 935         if (!sc->ps_idle) {
 936                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 937                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 938         }
 939
 940         /* Disable interrupts */
 941         ath9k_hw_disable_interrupts(ah);
 942
 943         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 944
 945         ath_stoprecv(sc);               /* turn off frame recv */
 946         ath_flushrecv(sc);              /* flush recv queue */
 947
 948         if (!ah->curchan)
 949                 ah->curchan = ath_get_curchannel(sc, hw);
 950
 951         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 952         if (r) {
 953                 ath_err(ath9k_hw_common(sc->sc_ah),
 954                         "Unable to reset channel (%u MHz), reset status %d\n",
 955                         channel->center_freq, r);
 956         }
 957
 958         ath9k_hw_phy_disable(ah);
 959
 960         ath9k_hw_configpcipowersave(ah, 1, 1);
 961
 962         spin_unlock_bh(&sc->sc_pcu_lock);
 963         ath9k_ps_restore(sc);
 964
 965         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 966 }
 967
 968 int ath_reset(struct ath_softc *sc, bool retry_tx)
 969 {
 970         struct ath_hw *ah = sc->sc_ah;
 971         struct ath_common *common = ath9k_hw_common(ah);
 972         struct ieee80211_hw *hw = sc->hw;
 973         int r;
 974
 975         /* Stop ANI */
 976         del_timer_sync(&common->ani.timer);
 977
 978         spin_lock_bh(&sc->sc_pcu_lock);
 979
 980         ieee80211_stop_queues(hw);
 981
 982         ath9k_hw_disable_interrupts(ah);
 983         ath_drain_all_txq(sc, retry_tx);
 984
 985         ath_stoprecv(sc);
 986         ath_flushrecv(sc);
 987
 988         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 989         if (r)
 990                 ath_err(common,
 991                         "Unable to reset hardware; reset status %d\n", r);
 992
 993         if (ath_startrecv(sc) != 0)
 994                 ath_err(common, "Unable to start recv logic\n");
 995
 996         /*
 997          * We may be doing a reset in response to a request
 998          * that changes the channel so update any state that
 999          * might change as a result.
1000          */
1001         ath_update_txpow(sc);
1002
1003         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1004                 ath_beacon_config(sc, NULL);    /* restart beacons */
1005
1006         ath9k_hw_set_interrupts(ah, ah->imask);
1007
1008         if (retry_tx) {
1009                 int i;
1010                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1011                         if (ATH_TXQ_SETUP(sc, i)) {
1012                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1013                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1014                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1015                         }
1016                 }
1017         }
1018
1019         ieee80211_wake_queues(hw);
1020         spin_unlock_bh(&sc->sc_pcu_lock);
1021
1022         /* Start ANI */
1023         ath_start_ani(common);
1024
1025         return r;
1026 }
1027
1028 /* XXX: Remove me once we don't depend on ath9k_channel for all
1029  * this redundant data */
1030 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1031                            struct ath9k_channel *ichan)
1032 {
1033         struct ieee80211_channel *chan = hw->conf.channel;
1034         struct ieee80211_conf *conf = &hw->conf;
1035
1036         ichan->channel = chan->center_freq;
1037         ichan->chan = chan;
1038
1039         if (chan->band == IEEE80211_BAND_2GHZ) {
1040                 ichan->chanmode = CHANNEL_G;
1041                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1042         } else {
1043                 ichan->chanmode = CHANNEL_A;
1044                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1045         }
1046
1047         if (conf_is_ht(conf))
1048                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1049                                             conf->channel_type);
1050 }
1051
1052 /**********************/
1053 /* mac80211 callbacks */
1054 /**********************/
1055
1056 static int ath9k_start(struct ieee80211_hw *hw)
1057 {
1058         struct ath_wiphy *aphy = hw->priv;
1059         struct ath_softc *sc = aphy->sc;
1060         struct ath_hw *ah = sc->sc_ah;
1061         struct ath_common *common = ath9k_hw_common(ah);
1062         struct ieee80211_channel *curchan = hw->conf.channel;
1063         struct ath9k_channel *init_channel;
1064         int r;
1065
1066         ath_dbg(common, ATH_DBG_CONFIG,
1067                 "Starting driver with initial channel: %d MHz\n",
1068                 curchan->center_freq);
1069
1070         mutex_lock(&sc->mutex);
1071
1072         if (ath9k_wiphy_started(sc)) {
1073                 if (sc->chan_idx == curchan->hw_value) {
1074                         /*
1075                          * Already on the operational channel, the new wiphy
1076                          * can be marked active.
1077                          */
1078                         aphy->state = ATH_WIPHY_ACTIVE;
1079                         ieee80211_wake_queues(hw);
1080                 } else {
1081                         /*
1082                          * Another wiphy is on another channel, start the new
1083                          * wiphy in paused state.
1084                          */
1085                         aphy->state = ATH_WIPHY_PAUSED;
1086                         ieee80211_stop_queues(hw);
1087                 }
1088                 mutex_unlock(&sc->mutex);
1089                 return 0;
1090         }
1091         aphy->state = ATH_WIPHY_ACTIVE;
1092
1093         /* setup initial channel */
1094
1095         sc->chan_idx = curchan->hw_value;
1096
1097         init_channel = ath_get_curchannel(sc, hw);
1098
1099         /* Reset SERDES registers */
1100         ath9k_hw_configpcipowersave(ah, 0, 0);
1101
1102         /*
1103          * The basic interface to setting the hardware in a good
1104          * state is ``reset''.  On return the hardware is known to
1105          * be powered up and with interrupts disabled.  This must
1106          * be followed by initialization of the appropriate bits
1107          * and then setup of the interrupt mask.
1108          */
1109         spin_lock_bh(&sc->sc_pcu_lock);
1110         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1111         if (r) {
1112                 ath_err(common,
1113                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1114                         r, curchan->center_freq);
1115                 spin_unlock_bh(&sc->sc_pcu_lock);
1116                 goto mutex_unlock;
1117         }
1118
1119         /*
1120          * This is needed only to setup initial state
1121          * but it's best done after a reset.
1122          */
1123         ath_update_txpow(sc);
1124
1125         /*
1126          * Setup the hardware after reset:
1127          * The receive engine is set going.
1128          * Frame transmit is handled entirely
1129          * in the frame output path; there's nothing to do
1130          * here except setup the interrupt mask.
1131          */
1132         if (ath_startrecv(sc) != 0) {
1133                 ath_err(common, "Unable to start recv logic\n");
1134                 r = -EIO;
1135                 spin_unlock_bh(&sc->sc_pcu_lock);
1136                 goto mutex_unlock;
1137         }
1138         spin_unlock_bh(&sc->sc_pcu_lock);
1139
1140         /* Setup our intr mask. */
1141         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1142                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1143                     ATH9K_INT_GLOBAL;
1144
1145         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1146                 ah->imask |= ATH9K_INT_RXHP |
1147                              ATH9K_INT_RXLP |
1148                              ATH9K_INT_BB_WATCHDOG;
1149         else
1150                 ah->imask |= ATH9K_INT_RX;
1151
1152         ah->imask |= ATH9K_INT_GTT;
1153
1154         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1155                 ah->imask |= ATH9K_INT_CST;
1156
1157         sc->sc_flags &= ~SC_OP_INVALID;
1158         sc->sc_ah->is_monitoring = false;
1159
1160         /* Disable BMISS interrupt when we're not associated */
1161         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1162         ath9k_hw_set_interrupts(ah, ah->imask);
1163
1164         ieee80211_wake_queues(hw);
1165
1166         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1167
1168         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1169             !ah->btcoex_hw.enabled) {
1170                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1171                                            AR_STOMP_LOW_WLAN_WGHT);
1172                 ath9k_hw_btcoex_enable(ah);
1173
1174                 if (common->bus_ops->bt_coex_prep)
1175                         common->bus_ops->bt_coex_prep(common);
1176                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1177                         ath9k_btcoex_timer_resume(sc);
1178         }
1179
1180         pm_qos_update_request(&sc->pm_qos_req, 55);
1181
1182 mutex_unlock:
1183         mutex_unlock(&sc->mutex);
1184
1185         return r;
1186 }
1187
1188 static int ath9k_tx(struct ieee80211_hw *hw,
1189                     struct sk_buff *skb)
1190 {
1191         struct ath_wiphy *aphy = hw->priv;
1192         struct ath_softc *sc = aphy->sc;
1193         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1194         struct ath_tx_control txctl;
1195         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1196
1197         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1198                 ath_dbg(common, ATH_DBG_XMIT,
1199                         "ath9k: %s: TX in unexpected wiphy state %d\n",
1200                         wiphy_name(hw->wiphy), aphy->state);
1201                 goto exit;
1202         }
1203
1204         if (sc->ps_enabled) {
1205                 /*
1206                  * mac80211 does not set PM field for normal data frames, so we
1207                  * need to update that based on the current PS mode.
1208                  */
1209                 if (ieee80211_is_data(hdr->frame_control) &&
1210                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1211                     !ieee80211_has_pm(hdr->frame_control)) {
1212                         ath_dbg(common, ATH_DBG_PS,
1213                                 "Add PM=1 for a TX frame while in PS mode\n");
1214                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1215                 }
1216         }
1217
1218         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1219                 /*
1220                  * We are using PS-Poll and mac80211 can request TX while in
1221                  * power save mode. Need to wake up hardware for the TX to be
1222                  * completed and if needed, also for RX of buffered frames.
1223                  */
1224                 ath9k_ps_wakeup(sc);
1225                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1226                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1227                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1228                         ath_dbg(common, ATH_DBG_PS,
1229                                 "Sending PS-Poll to pick a buffered frame\n");
1230                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1231                 } else {
1232                         ath_dbg(common, ATH_DBG_PS,
1233                                 "Wake up to complete TX\n");
1234                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1235                 }
1236                 /*
1237                  * The actual restore operation will happen only after
1238                  * the sc_flags bit is cleared. We are just dropping
1239                  * the ps_usecount here.
1240                  */
1241                 ath9k_ps_restore(sc);
1242         }
1243
1244         memset(&txctl, 0, sizeof(struct ath_tx_control));
1245         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1246
1247         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1248
1249         if (ath_tx_start(hw, skb, &txctl) != 0) {
1250                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1251                 goto exit;
1252         }
1253
1254         return 0;
1255 exit:
1256         dev_kfree_skb_any(skb);
1257         return 0;
1258 }
1259
1260 static void ath9k_stop(struct ieee80211_hw *hw)
1261 {
1262         struct ath_wiphy *aphy = hw->priv;
1263         struct ath_softc *sc = aphy->sc;
1264         struct ath_hw *ah = sc->sc_ah;
1265         struct ath_common *common = ath9k_hw_common(ah);
1266         int i;
1267
1268         mutex_lock(&sc->mutex);
1269
1270         aphy->state = ATH_WIPHY_INACTIVE;
1271
1272         if (led_blink)
1273                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1274
1275         cancel_delayed_work_sync(&sc->tx_complete_work);
1276         cancel_work_sync(&sc->paprd_work);
1277         cancel_work_sync(&sc->hw_check_work);
1278
1279         for (i = 0; i < sc->num_sec_wiphy; i++) {
1280                 if (sc->sec_wiphy[i])
1281                         break;
1282         }
1283
1284         if (i == sc->num_sec_wiphy) {
1285                 cancel_delayed_work_sync(&sc->wiphy_work);
1286                 cancel_work_sync(&sc->chan_work);
1287         }
1288
1289         if (sc->sc_flags & SC_OP_INVALID) {
1290                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1291                 mutex_unlock(&sc->mutex);
1292                 return;
1293         }
1294
1295         if (ath9k_wiphy_started(sc)) {
1296                 mutex_unlock(&sc->mutex);
1297                 return; /* another wiphy still in use */
1298         }
1299
1300         /* Ensure HW is awake when we try to shut it down. */
1301         ath9k_ps_wakeup(sc);
1302
1303         if (ah->btcoex_hw.enabled) {
1304                 ath9k_hw_btcoex_disable(ah);
1305                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1306                         ath9k_btcoex_timer_pause(sc);
1307         }
1308
1309         spin_lock_bh(&sc->sc_pcu_lock);
1310
1311         /* make sure h/w will not generate any interrupt
1312          * before setting the invalid flag. */
1313         ath9k_hw_disable_interrupts(ah);
1314
1315         if (!(sc->sc_flags & SC_OP_INVALID)) {
1316                 ath_drain_all_txq(sc, false);
1317                 ath_stoprecv(sc);
1318                 ath9k_hw_phy_disable(ah);
1319         } else
1320                 sc->rx.rxlink = NULL;
1321
1322         /* disable HAL and put h/w to sleep */
1323         ath9k_hw_disable(ah);
1324         ath9k_hw_configpcipowersave(ah, 1, 1);
1325
1326         spin_unlock_bh(&sc->sc_pcu_lock);
1327
1328         ath9k_ps_restore(sc);
1329
1330         /* Finally, put the chip in FULL SLEEP mode */
1331         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1332
1333         sc->sc_flags |= SC_OP_INVALID;
1334
1335         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1336
1337         mutex_unlock(&sc->mutex);
1338
1339         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1340 }
1341
1342 static int ath9k_add_interface(struct ieee80211_hw *hw,
1343                                struct ieee80211_vif *vif)
1344 {
1345         struct ath_wiphy *aphy = hw->priv;
1346         struct ath_softc *sc = aphy->sc;
1347         struct ath_hw *ah = sc->sc_ah;
1348         struct ath_common *common = ath9k_hw_common(ah);
1349         struct ath_vif *avp = (void *)vif->drv_priv;
1350         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1351         int ret = 0;
1352
1353         mutex_lock(&sc->mutex);
1354
1355         switch (vif->type) {
1356         case NL80211_IFTYPE_STATION:
1357                 ic_opmode = NL80211_IFTYPE_STATION;
1358                 break;
1359         case NL80211_IFTYPE_WDS:
1360                 ic_opmode = NL80211_IFTYPE_WDS;
1361                 break;
1362         case NL80211_IFTYPE_ADHOC:
1363         case NL80211_IFTYPE_AP:
1364         case NL80211_IFTYPE_MESH_POINT:
1365                 if (sc->nbcnvifs >= ATH_BCBUF) {
1366                         ret = -ENOBUFS;
1367                         goto out;
1368                 }
1369                 ic_opmode = vif->type;
1370                 break;
1371         default:
1372                 ath_err(common, "Interface type %d not yet supported\n",
1373                         vif->type);
1374                 ret = -EOPNOTSUPP;
1375                 goto out;
1376         }
1377
1378         ath_dbg(common, ATH_DBG_CONFIG,
1379                 "Attach a VIF of type: %d\n", ic_opmode);
1380
1381         /* Set the VIF opmode */
1382         avp->av_opmode = ic_opmode;
1383         avp->av_bslot = -1;
1384
1385         sc->nvifs++;
1386
1387         ath9k_set_bssid_mask(hw, vif);
1388
1389         if (sc->nvifs > 1)
1390                 goto out; /* skip global settings for secondary vif */
1391
1392         if (ic_opmode == NL80211_IFTYPE_AP) {
1393                 ath9k_hw_set_tsfadjust(ah, 1);
1394                 sc->sc_flags |= SC_OP_TSF_RESET;
1395         }
1396
1397         /* Set the device opmode */
1398         ah->opmode = ic_opmode;
1399
1400         /*
1401          * Enable MIB interrupts when there are hardware phy counters.
1402          * Note we only do this (at the moment) for station mode.
1403          */
1404         if ((vif->type == NL80211_IFTYPE_STATION) ||
1405             (vif->type == NL80211_IFTYPE_ADHOC) ||
1406             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1407                 if (ah->config.enable_ani)
1408                         ah->imask |= ATH9K_INT_MIB;
1409                 ah->imask |= ATH9K_INT_TSFOOR;
1410         }
1411
1412         ath9k_hw_set_interrupts(ah, ah->imask);
1413
1414         if (vif->type == NL80211_IFTYPE_AP    ||
1415             vif->type == NL80211_IFTYPE_ADHOC) {
1416                 sc->sc_flags |= SC_OP_ANI_RUN;
1417                 ath_start_ani(common);
1418         }
1419
1420 out:
1421         mutex_unlock(&sc->mutex);
1422         return ret;
1423 }
1424
1425 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1426                                    struct ieee80211_vif *vif)
1427 {
1428         struct ath_wiphy *aphy = hw->priv;
1429         struct ath_softc *sc = aphy->sc;
1430         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1431         struct ath_vif *avp = (void *)vif->drv_priv;
1432         bool bs_valid = false;
1433         int i;
1434
1435         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1436
1437         mutex_lock(&sc->mutex);
1438
1439         /* Stop ANI */
1440         sc->sc_flags &= ~SC_OP_ANI_RUN;
1441         del_timer_sync(&common->ani.timer);
1442
1443         /* Reclaim beacon resources */
1444         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1445             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1446             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1447                 ath9k_ps_wakeup(sc);
1448                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1449                 ath9k_ps_restore(sc);
1450         }
1451
1452         ath_beacon_return(sc, avp);
1453         sc->sc_flags &= ~SC_OP_BEACONS;
1454
1455         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1456                 if (sc->beacon.bslot[i] == vif) {
1457                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1458                                "slot\n", __func__);
1459                         sc->beacon.bslot[i] = NULL;
1460                         sc->beacon.bslot_aphy[i] = NULL;
1461                 } else if (sc->beacon.bslot[i])
1462                         bs_valid = true;
1463         }
1464         if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1465                 /* Disable SWBA interrupt */
1466                 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1467                 ath9k_ps_wakeup(sc);
1468                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1469                 ath9k_ps_restore(sc);
1470         }
1471
1472         sc->nvifs--;
1473
1474         mutex_unlock(&sc->mutex);
1475 }
1476
1477 static void ath9k_enable_ps(struct ath_softc *sc)
1478 {
1479         struct ath_hw *ah = sc->sc_ah;
1480
1481         sc->ps_enabled = true;
1482         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1483                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1484                         ah->imask |= ATH9K_INT_TIM_TIMER;
1485                         ath9k_hw_set_interrupts(ah, ah->imask);
1486                 }
1487                 ath9k_hw_setrxabort(ah, 1);
1488         }
1489 }
1490
1491 static void ath9k_disable_ps(struct ath_softc *sc)
1492 {
1493         struct ath_hw *ah = sc->sc_ah;
1494
1495         sc->ps_enabled = false;
1496         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1497         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1498                 ath9k_hw_setrxabort(ah, 0);
1499                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1500                                   PS_WAIT_FOR_CAB |
1501                                   PS_WAIT_FOR_PSPOLL_DATA |
1502                                   PS_WAIT_FOR_TX_ACK);
1503                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1504                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1505                         ath9k_hw_set_interrupts(ah, ah->imask);
1506                 }
1507         }
1508
1509 }
1510
1511 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1512 {
1513         struct ath_wiphy *aphy = hw->priv;
1514         struct ath_softc *sc = aphy->sc;
1515         struct ath_hw *ah = sc->sc_ah;
1516         struct ath_common *common = ath9k_hw_common(ah);
1517         struct ieee80211_conf *conf = &hw->conf;
1518         bool disable_radio;
1519
1520         mutex_lock(&sc->mutex);
1521
1522         /*
1523          * Leave this as the first check because we need to turn on the
1524          * radio if it was disabled before prior to processing the rest
1525          * of the changes. Likewise we must only disable the radio towards
1526          * the end.
1527          */
1528         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1529                 bool enable_radio;
1530                 bool all_wiphys_idle;
1531                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1532
1533                 spin_lock_bh(&sc->wiphy_lock);
1534                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1535                 ath9k_set_wiphy_idle(aphy, idle);
1536
1537                 enable_radio = (!idle && all_wiphys_idle);
1538
1539                 /*
1540                  * After we unlock here its possible another wiphy
1541                  * can be re-renabled so to account for that we will
1542                  * only disable the radio toward the end of this routine
1543                  * if by then all wiphys are still idle.
1544                  */
1545                 spin_unlock_bh(&sc->wiphy_lock);
1546
1547                 if (enable_radio) {
1548                         sc->ps_idle = false;
1549                         ath_radio_enable(sc, hw);
1550                         ath_dbg(common, ATH_DBG_CONFIG,
1551                                 "not-idle: enabling radio\n");
1552                 }
1553         }
1554
1555         /*
1556          * We just prepare to enable PS. We have to wait until our AP has
1557          * ACK'd our null data frame to disable RX otherwise we'll ignore
1558          * those ACKs and end up retransmitting the same null data frames.
1559          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1560          */
1561         if (changed & IEEE80211_CONF_CHANGE_PS) {
1562                 unsigned long flags;
1563                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1564                 if (conf->flags & IEEE80211_CONF_PS)
1565                         ath9k_enable_ps(sc);
1566                 else
1567                         ath9k_disable_ps(sc);
1568                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1569         }
1570
1571         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1572                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1573                         ath_dbg(common, ATH_DBG_CONFIG,
1574                                 "Monitor mode is enabled\n");
1575                         sc->sc_ah->is_monitoring = true;
1576                 } else {
1577                         ath_dbg(common, ATH_DBG_CONFIG,
1578                                 "Monitor mode is disabled\n");
1579                         sc->sc_ah->is_monitoring = false;
1580                 }
1581         }
1582
1583         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1584                 struct ieee80211_channel *curchan = hw->conf.channel;
1585                 int pos = curchan->hw_value;
1586                 int old_pos = -1;
1587                 unsigned long flags;
1588
1589                 if (ah->curchan)
1590                         old_pos = ah->curchan - &ah->channels[0];
1591
1592                 aphy->chan_idx = pos;
1593                 aphy->chan_is_ht = conf_is_ht(conf);
1594                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1595                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1596                 else
1597                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1598
1599                 if (aphy->state == ATH_WIPHY_SCAN ||
1600                     aphy->state == ATH_WIPHY_ACTIVE)
1601                         ath9k_wiphy_pause_all_forced(sc, aphy);
1602                 else {
1603                         /*
1604                          * Do not change operational channel based on a paused
1605                          * wiphy changes.
1606                          */
1607                         goto skip_chan_change;
1608                 }
1609
1610                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1611                         curchan->center_freq);
1612
1613                 /* XXX: remove me eventualy */
1614                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1615
1616                 ath_update_chainmask(sc, conf_is_ht(conf));
1617
1618                 /* update survey stats for the old channel before switching */
1619                 spin_lock_irqsave(&common->cc_lock, flags);
1620                 ath_update_survey_stats(sc);
1621                 spin_unlock_irqrestore(&common->cc_lock, flags);
1622
1623                 /*
1624                  * If the operating channel changes, change the survey in-use flags
1625                  * along with it.
1626                  * Reset the survey data for the new channel, unless we're switching
1627                  * back to the operating channel from an off-channel operation.
1628                  */
1629                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1630                     sc->cur_survey != &sc->survey[pos]) {
1631
1632                         if (sc->cur_survey)
1633                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1634
1635                         sc->cur_survey = &sc->survey[pos];
1636
1637                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1638                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1639                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1640                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1641                 }
1642
1643                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1644                         ath_err(common, "Unable to set channel\n");
1645                         mutex_unlock(&sc->mutex);
1646                         return -EINVAL;
1647                 }
1648
1649                 /*
1650                  * The most recent snapshot of channel->noisefloor for the old
1651                  * channel is only available after the hardware reset. Copy it to
1652                  * the survey stats now.
1653                  */
1654                 if (old_pos >= 0)
1655                         ath_update_survey_nf(sc, old_pos);
1656         }
1657
1658 skip_chan_change:
1659         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1660                 sc->config.txpowlimit = 2 * conf->power_level;
1661                 ath_update_txpow(sc);
1662         }
1663
1664         spin_lock_bh(&sc->wiphy_lock);
1665         disable_radio = ath9k_all_wiphys_idle(sc);
1666         spin_unlock_bh(&sc->wiphy_lock);
1667
1668         if (disable_radio) {
1669                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1670                 sc->ps_idle = true;
1671                 ath_radio_disable(sc, hw);
1672         }
1673
1674         mutex_unlock(&sc->mutex);
1675
1676         return 0;
1677 }
1678
1679 #define SUPPORTED_FILTERS                       \
1680         (FIF_PROMISC_IN_BSS |                   \
1681         FIF_ALLMULTI |                          \
1682         FIF_CONTROL |                           \
1683         FIF_PSPOLL |                            \
1684         FIF_OTHER_BSS |                         \
1685         FIF_BCN_PRBRESP_PROMISC |               \
1686         FIF_PROBE_REQ |                         \
1687         FIF_FCSFAIL)
1688
1689 /* FIXME: sc->sc_full_reset ? */
1690 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1691                                    unsigned int changed_flags,
1692                                    unsigned int *total_flags,
1693                                    u64 multicast)
1694 {
1695         struct ath_wiphy *aphy = hw->priv;
1696         struct ath_softc *sc = aphy->sc;
1697         u32 rfilt;
1698
1699         changed_flags &= SUPPORTED_FILTERS;
1700         *total_flags &= SUPPORTED_FILTERS;
1701
1702         sc->rx.rxfilter = *total_flags;
1703         ath9k_ps_wakeup(sc);
1704         rfilt = ath_calcrxfilter(sc);
1705         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1706         ath9k_ps_restore(sc);
1707
1708         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1709                 "Set HW RX filter: 0x%x\n", rfilt);
1710 }
1711
1712 static int ath9k_sta_add(struct ieee80211_hw *hw,
1713                          struct ieee80211_vif *vif,
1714                          struct ieee80211_sta *sta)
1715 {
1716         struct ath_wiphy *aphy = hw->priv;
1717         struct ath_softc *sc = aphy->sc;
1718
1719         ath_node_attach(sc, sta);
1720
1721         return 0;
1722 }
1723
1724 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1725                             struct ieee80211_vif *vif,
1726                             struct ieee80211_sta *sta)
1727 {
1728         struct ath_wiphy *aphy = hw->priv;
1729         struct ath_softc *sc = aphy->sc;
1730
1731         ath_node_detach(sc, sta);
1732
1733         return 0;
1734 }
1735
1736 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1737                          const struct ieee80211_tx_queue_params *params)
1738 {
1739         struct ath_wiphy *aphy = hw->priv;
1740         struct ath_softc *sc = aphy->sc;
1741         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1742         struct ath_txq *txq;
1743         struct ath9k_tx_queue_info qi;
1744         int ret = 0;
1745
1746         if (queue >= WME_NUM_AC)
1747                 return 0;
1748
1749         txq = sc->tx.txq_map[queue];
1750
1751         mutex_lock(&sc->mutex);
1752
1753         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1754
1755         qi.tqi_aifs = params->aifs;
1756         qi.tqi_cwmin = params->cw_min;
1757         qi.tqi_cwmax = params->cw_max;
1758         qi.tqi_burstTime = params->txop;
1759
1760         ath_dbg(common, ATH_DBG_CONFIG,
1761                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1762                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1763                 params->cw_max, params->txop);
1764
1765         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1766         if (ret)
1767                 ath_err(common, "TXQ Update failed\n");
1768
1769         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1770                 if (queue == WME_AC_BE && !ret)
1771                         ath_beaconq_config(sc);
1772
1773         mutex_unlock(&sc->mutex);
1774
1775         return ret;
1776 }
1777
1778 static int ath9k_set_key(struct ieee80211_hw *hw,
1779                          enum set_key_cmd cmd,
1780                          struct ieee80211_vif *vif,
1781                          struct ieee80211_sta *sta,
1782                          struct ieee80211_key_conf *key)
1783 {
1784         struct ath_wiphy *aphy = hw->priv;
1785         struct ath_softc *sc = aphy->sc;
1786         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1787         int ret = 0;
1788
1789         if (modparam_nohwcrypt)
1790                 return -ENOSPC;
1791
1792         mutex_lock(&sc->mutex);
1793         ath9k_ps_wakeup(sc);
1794         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1795
1796         switch (cmd) {
1797         case SET_KEY:
1798                 ret = ath_key_config(common, vif, sta, key);
1799                 if (ret >= 0) {
1800                         key->hw_key_idx = ret;
1801                         /* push IV and Michael MIC generation to stack */
1802                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1803                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1804                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1805                         if (sc->sc_ah->sw_mgmt_crypto &&
1806                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1807                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1808                         ret = 0;
1809                 }
1810                 break;
1811         case DISABLE_KEY:
1812                 ath_key_delete(common, key);
1813                 break;
1814         default:
1815                 ret = -EINVAL;
1816         }
1817
1818         ath9k_ps_restore(sc);
1819         mutex_unlock(&sc->mutex);
1820
1821         return ret;
1822 }
1823
1824 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1825                                    struct ieee80211_vif *vif,
1826                                    struct ieee80211_bss_conf *bss_conf,
1827                                    u32 changed)
1828 {
1829         struct ath_wiphy *aphy = hw->priv;
1830         struct ath_softc *sc = aphy->sc;
1831         struct ath_hw *ah = sc->sc_ah;
1832         struct ath_common *common = ath9k_hw_common(ah);
1833         struct ath_vif *avp = (void *)vif->drv_priv;
1834         int slottime;
1835         int error;
1836
1837         mutex_lock(&sc->mutex);
1838
1839         if (changed & BSS_CHANGED_BSSID) {
1840                 /* Set BSSID */
1841                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1842                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1843                 common->curaid = 0;
1844                 ath9k_hw_write_associd(ah);
1845
1846                 /* Set aggregation protection mode parameters */
1847                 sc->config.ath_aggr_prot = 0;
1848
1849                 /* Only legacy IBSS for now */
1850                 if (vif->type == NL80211_IFTYPE_ADHOC)
1851                         ath_update_chainmask(sc, 0);
1852
1853                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1854                         common->curbssid, common->curaid);
1855
1856                 /* need to reconfigure the beacon */
1857                 sc->sc_flags &= ~SC_OP_BEACONS ;
1858         }
1859
1860         /* Enable transmission of beacons (AP, IBSS, MESH) */
1861         if ((changed & BSS_CHANGED_BEACON) ||
1862             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1863                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1864                 error = ath_beacon_alloc(aphy, vif);
1865                 if (!error)
1866                         ath_beacon_config(sc, vif);
1867         }
1868
1869         if (changed & BSS_CHANGED_ERP_SLOT) {
1870                 if (bss_conf->use_short_slot)
1871                         slottime = 9;
1872                 else
1873                         slottime = 20;
1874                 if (vif->type == NL80211_IFTYPE_AP) {
1875                         /*
1876                          * Defer update, so that connected stations can adjust
1877                          * their settings at the same time.
1878                          * See beacon.c for more details
1879                          */
1880                         sc->beacon.slottime = slottime;
1881                         sc->beacon.updateslot = UPDATE;
1882                 } else {
1883                         ah->slottime = slottime;
1884                         ath9k_hw_init_global_settings(ah);
1885                 }
1886         }
1887
1888         /* Disable transmission of beacons */
1889         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1890                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1891
1892         if (changed & BSS_CHANGED_BEACON_INT) {
1893                 sc->beacon_interval = bss_conf->beacon_int;
1894                 /*
1895                  * In case of AP mode, the HW TSF has to be reset
1896                  * when the beacon interval changes.
1897                  */
1898                 if (vif->type == NL80211_IFTYPE_AP) {
1899                         sc->sc_flags |= SC_OP_TSF_RESET;
1900                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1901                         error = ath_beacon_alloc(aphy, vif);
1902                         if (!error)
1903                                 ath_beacon_config(sc, vif);
1904                 } else {
1905                         ath_beacon_config(sc, vif);
1906                 }
1907         }
1908
1909         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1910                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1911                         bss_conf->use_short_preamble);
1912                 if (bss_conf->use_short_preamble)
1913                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1914                 else
1915                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1916         }
1917
1918         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1919                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1920                         bss_conf->use_cts_prot);
1921                 if (bss_conf->use_cts_prot &&
1922                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1923                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1924                 else
1925                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1926         }
1927
1928         if (changed & BSS_CHANGED_ASSOC) {
1929                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1930                         bss_conf->assoc);
1931                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1932         }
1933
1934         mutex_unlock(&sc->mutex);
1935 }
1936
1937 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1938 {
1939         u64 tsf;
1940         struct ath_wiphy *aphy = hw->priv;
1941         struct ath_softc *sc = aphy->sc;
1942
1943         mutex_lock(&sc->mutex);
1944         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1945         mutex_unlock(&sc->mutex);
1946
1947         return tsf;
1948 }
1949
1950 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1951 {
1952         struct ath_wiphy *aphy = hw->priv;
1953         struct ath_softc *sc = aphy->sc;
1954
1955         mutex_lock(&sc->mutex);
1956         ath9k_hw_settsf64(sc->sc_ah, tsf);
1957         mutex_unlock(&sc->mutex);
1958 }
1959
1960 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1961 {
1962         struct ath_wiphy *aphy = hw->priv;
1963         struct ath_softc *sc = aphy->sc;
1964
1965         mutex_lock(&sc->mutex);
1966
1967         ath9k_ps_wakeup(sc);
1968         ath9k_hw_reset_tsf(sc->sc_ah);
1969         ath9k_ps_restore(sc);
1970
1971         mutex_unlock(&sc->mutex);
1972 }
1973
1974 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1975                               struct ieee80211_vif *vif,
1976                               enum ieee80211_ampdu_mlme_action action,
1977                               struct ieee80211_sta *sta,
1978                               u16 tid, u16 *ssn)
1979 {
1980         struct ath_wiphy *aphy = hw->priv;
1981         struct ath_softc *sc = aphy->sc;
1982         int ret = 0;
1983
1984         local_bh_disable();
1985
1986         switch (action) {
1987         case IEEE80211_AMPDU_RX_START:
1988                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1989                         ret = -ENOTSUPP;
1990                 break;
1991         case IEEE80211_AMPDU_RX_STOP:
1992                 break;
1993         case IEEE80211_AMPDU_TX_START:
1994                 if (!(sc->sc_flags & SC_OP_TXAGGR))
1995                         return -EOPNOTSUPP;
1996
1997                 ath9k_ps_wakeup(sc);
1998                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1999                 if (!ret)
2000                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2001                 ath9k_ps_restore(sc);
2002                 break;
2003         case IEEE80211_AMPDU_TX_STOP:
2004                 ath9k_ps_wakeup(sc);
2005                 ath_tx_aggr_stop(sc, sta, tid);
2006                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2007                 ath9k_ps_restore(sc);
2008                 break;
2009         case IEEE80211_AMPDU_TX_OPERATIONAL:
2010                 ath9k_ps_wakeup(sc);
2011                 ath_tx_aggr_resume(sc, sta, tid);
2012                 ath9k_ps_restore(sc);
2013                 break;
2014         default:
2015                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2016         }
2017
2018         local_bh_enable();
2019
2020         return ret;
2021 }
2022
2023 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2024                              struct survey_info *survey)
2025 {
2026         struct ath_wiphy *aphy = hw->priv;
2027         struct ath_softc *sc = aphy->sc;
2028         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2029         struct ieee80211_supported_band *sband;
2030         struct ieee80211_channel *chan;
2031         unsigned long flags;
2032         int pos;
2033
2034         spin_lock_irqsave(&common->cc_lock, flags);
2035         if (idx == 0)
2036                 ath_update_survey_stats(sc);
2037
2038         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2039         if (sband && idx >= sband->n_channels) {
2040                 idx -= sband->n_channels;
2041                 sband = NULL;
2042         }
2043
2044         if (!sband)
2045                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2046
2047         if (!sband || idx >= sband->n_channels) {
2048                 spin_unlock_irqrestore(&common->cc_lock, flags);
2049                 return -ENOENT;
2050         }
2051
2052         chan = &sband->channels[idx];
2053         pos = chan->hw_value;
2054         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2055         survey->channel = chan;
2056         spin_unlock_irqrestore(&common->cc_lock, flags);
2057
2058         return 0;
2059 }
2060
2061 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2062 {
2063         struct ath_wiphy *aphy = hw->priv;
2064         struct ath_softc *sc = aphy->sc;
2065
2066         mutex_lock(&sc->mutex);
2067         if (ath9k_wiphy_scanning(sc)) {
2068                 /*
2069                  * There is a race here in mac80211 but fixing it requires
2070                  * we revisit how we handle the scan complete callback.
2071                  * After mac80211 fixes we will not have configured hardware
2072                  * to the home channel nor would we have configured the RX
2073                  * filter yet.
2074                  */
2075                 mutex_unlock(&sc->mutex);
2076                 return;
2077         }
2078
2079         aphy->state = ATH_WIPHY_SCAN;
2080         ath9k_wiphy_pause_all_forced(sc, aphy);
2081         mutex_unlock(&sc->mutex);
2082 }
2083
2084 /*
2085  * XXX: this requires a revisit after the driver
2086  * scan_complete gets moved to another place/removed in mac80211.
2087  */
2088 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2089 {
2090         struct ath_wiphy *aphy = hw->priv;
2091         struct ath_softc *sc = aphy->sc;
2092
2093         mutex_lock(&sc->mutex);
2094         aphy->state = ATH_WIPHY_ACTIVE;
2095         mutex_unlock(&sc->mutex);
2096 }
2097
2098 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2099 {
2100         struct ath_wiphy *aphy = hw->priv;
2101         struct ath_softc *sc = aphy->sc;
2102         struct ath_hw *ah = sc->sc_ah;
2103
2104         mutex_lock(&sc->mutex);
2105         ah->coverage_class = coverage_class;
2106         ath9k_hw_init_global_settings(ah);
2107         mutex_unlock(&sc->mutex);
2108 }
2109
2110 struct ieee80211_ops ath9k_ops = {
2111         .tx                 = ath9k_tx,
2112         .start              = ath9k_start,
2113         .stop               = ath9k_stop,
2114         .add_interface      = ath9k_add_interface,
2115         .remove_interface   = ath9k_remove_interface,
2116         .config             = ath9k_config,
2117         .configure_filter   = ath9k_configure_filter,
2118         .sta_add            = ath9k_sta_add,
2119         .sta_remove         = ath9k_sta_remove,
2120         .conf_tx            = ath9k_conf_tx,
2121         .bss_info_changed   = ath9k_bss_info_changed,
2122         .set_key            = ath9k_set_key,
2123         .get_tsf            = ath9k_get_tsf,
2124         .set_tsf            = ath9k_set_tsf,
2125         .reset_tsf          = ath9k_reset_tsf,
2126         .ampdu_action       = ath9k_ampdu_action,
2127         .get_survey         = ath9k_get_survey,
2128         .sw_scan_start      = ath9k_sw_scan_start,
2129         .sw_scan_complete   = ath9k_sw_scan_complete,
2130         .rfkill_poll        = ath9k_rfkill_poll_state,
2131         .set_coverage_class = ath9k_set_coverage_class,
2132 };