2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
227 if (sc->sc_flags & SC_OP_INVALID)
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
238 * This is only performed if the channel settings have
241 * To switch channels clear any pending DMA operations;
242 * wait long enough for the RX fifo to drain, reset the
243 * hardware at the new frequency, and then re-enable
244 * the relevant bits of the h/w.
246 ath9k_hw_set_interrupts(ah, 0);
247 stopped = ath_drain_all_txq(sc, false);
249 spin_lock_bh(&sc->rx.pcu_lock);
251 if (!ath_stoprecv(sc))
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
264 ath_print(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
270 spin_lock_bh(&sc->sc_resetlock);
272 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
274 ath_print(common, ATH_DBG_FATAL,
275 "Unable to reset channel (%u MHz), "
277 channel->center_freq, r);
278 spin_unlock_bh(&sc->sc_resetlock);
279 spin_unlock_bh(&sc->rx.pcu_lock);
282 spin_unlock_bh(&sc->sc_resetlock);
284 if (ath_startrecv(sc) != 0) {
285 ath_print(common, ATH_DBG_FATAL,
286 "Unable to restart recv logic\n");
288 spin_unlock_bh(&sc->rx.pcu_lock);
292 spin_unlock_bh(&sc->rx.pcu_lock);
294 ath_update_txpow(sc);
295 ath9k_hw_set_interrupts(ah, ah->imask);
297 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
298 ath_beacon_config(sc, NULL);
299 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
300 ath_start_ani(common);
304 ath9k_ps_restore(sc);
308 static void ath_paprd_activate(struct ath_softc *sc)
310 struct ath_hw *ah = sc->sc_ah;
311 struct ath9k_hw_cal_data *caldata = ah->caldata;
312 struct ath_common *common = ath9k_hw_common(ah);
315 if (!caldata || !caldata->paprd_done)
319 ar9003_paprd_enable(ah, false);
320 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
321 if (!(common->tx_chainmask & BIT(chain)))
324 ar9003_paprd_populate_single_table(ah, caldata, chain);
327 ar9003_paprd_enable(ah, true);
328 ath9k_ps_restore(sc);
331 void ath_paprd_calibrate(struct work_struct *work)
333 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
334 struct ieee80211_hw *hw = sc->hw;
335 struct ath_hw *ah = sc->sc_ah;
336 struct ieee80211_hdr *hdr;
337 struct sk_buff *skb = NULL;
338 struct ieee80211_tx_info *tx_info;
339 int band = hw->conf.channel->band;
340 struct ieee80211_supported_band *sband = &sc->sbands[band];
341 struct ath_tx_control txctl;
342 struct ath9k_hw_cal_data *caldata = ah->caldata;
343 struct ath_common *common = ath9k_hw_common(ah);
354 skb = alloc_skb(len, GFP_KERNEL);
358 tx_info = IEEE80211_SKB_CB(skb);
361 memset(skb->data, 0, len);
362 hdr = (struct ieee80211_hdr *)skb->data;
363 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
364 hdr->frame_control = cpu_to_le16(ftype);
365 hdr->duration_id = cpu_to_le16(10);
366 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
367 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
368 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
370 memset(&txctl, 0, sizeof(txctl));
371 qnum = sc->tx.hwq_map[WME_AC_BE];
372 txctl.txq = &sc->tx.txq[qnum];
375 ar9003_paprd_init_table(ah);
376 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
377 if (!(common->tx_chainmask & BIT(chain)))
381 memset(tx_info, 0, sizeof(*tx_info));
382 tx_info->band = band;
384 for (i = 0; i < 4; i++) {
385 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
386 tx_info->control.rates[i].count = 6;
389 init_completion(&sc->paprd_complete);
390 ar9003_paprd_setup_gain_table(ah, chain);
391 txctl.paprd = BIT(chain);
392 if (ath_tx_start(hw, skb, &txctl) != 0)
395 time_left = wait_for_completion_timeout(&sc->paprd_complete,
396 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
398 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
399 "Timeout waiting for paprd training on "
405 if (!ar9003_paprd_is_done(ah))
408 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
416 caldata->paprd_done = true;
417 ath_paprd_activate(sc);
421 ath9k_ps_restore(sc);
425 * This routine performs the periodic noise floor calibration function
426 * that is used to adjust and optimize the chip performance. This
427 * takes environmental changes (location, temperature) into account.
428 * When the task is complete, it reschedules itself depending on the
429 * appropriate interval that was calculated.
431 void ath_ani_calibrate(unsigned long data)
433 struct ath_softc *sc = (struct ath_softc *)data;
434 struct ath_hw *ah = sc->sc_ah;
435 struct ath_common *common = ath9k_hw_common(ah);
436 bool longcal = false;
437 bool shortcal = false;
438 bool aniflag = false;
439 unsigned int timestamp = jiffies_to_msecs(jiffies);
440 u32 cal_interval, short_cal_interval, long_cal_interval;
443 if (ah->caldata && ah->caldata->nfcal_interference)
444 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
446 long_cal_interval = ATH_LONG_CALINTERVAL;
448 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
449 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
451 /* Only calibrate if awake */
452 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
457 /* Long calibration runs independently of short calibration. */
458 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
460 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
461 common->ani.longcal_timer = timestamp;
464 /* Short calibration applies only while caldone is false */
465 if (!common->ani.caldone) {
466 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
468 ath_print(common, ATH_DBG_ANI,
469 "shortcal @%lu\n", jiffies);
470 common->ani.shortcal_timer = timestamp;
471 common->ani.resetcal_timer = timestamp;
474 if ((timestamp - common->ani.resetcal_timer) >=
475 ATH_RESTART_CALINTERVAL) {
476 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
477 if (common->ani.caldone)
478 common->ani.resetcal_timer = timestamp;
482 /* Verify whether we must check ANI */
483 if ((timestamp - common->ani.checkani_timer) >=
484 ah->config.ani_poll_interval) {
486 common->ani.checkani_timer = timestamp;
489 /* Skip all processing if there's nothing to do. */
490 if (longcal || shortcal || aniflag) {
491 /* Call ANI routine if necessary */
493 spin_lock_irqsave(&common->cc_lock, flags);
494 ath9k_hw_ani_monitor(ah, ah->curchan);
495 ath_update_survey_stats(sc);
496 spin_unlock_irqrestore(&common->cc_lock, flags);
499 /* Perform calibration if necessary */
500 if (longcal || shortcal) {
501 common->ani.caldone =
502 ath9k_hw_calibrate(ah,
504 common->rx_chainmask,
509 ath9k_ps_restore(sc);
513 * Set timer interval based on previous results.
514 * The interval must be the shortest necessary to satisfy ANI,
515 * short calibration and long calibration.
517 cal_interval = ATH_LONG_CALINTERVAL;
518 if (sc->sc_ah->config.enable_ani)
519 cal_interval = min(cal_interval,
520 (u32)ah->config.ani_poll_interval);
521 if (!common->ani.caldone)
522 cal_interval = min(cal_interval, (u32)short_cal_interval);
524 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
525 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
526 if (!ah->caldata->paprd_done)
527 ieee80211_queue_work(sc->hw, &sc->paprd_work);
529 ath_paprd_activate(sc);
534 * Update tx/rx chainmask. For legacy association,
535 * hard code chainmask to 1x1, for 11n association, use
536 * the chainmask configuration, for bt coexistence, use
537 * the chainmask configuration even in legacy mode.
539 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
541 struct ath_hw *ah = sc->sc_ah;
542 struct ath_common *common = ath9k_hw_common(ah);
544 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
545 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
546 common->tx_chainmask = ah->caps.tx_chainmask;
547 common->rx_chainmask = ah->caps.rx_chainmask;
549 common->tx_chainmask = 1;
550 common->rx_chainmask = 1;
553 ath_print(common, ATH_DBG_CONFIG,
554 "tx chmask: %d, rx chmask: %d\n",
555 common->tx_chainmask,
556 common->rx_chainmask);
559 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
563 an = (struct ath_node *)sta->drv_priv;
565 if (sc->sc_flags & SC_OP_TXAGGR) {
566 ath_tx_node_init(sc, an);
567 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
568 sta->ht_cap.ampdu_factor);
569 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
570 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
574 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
576 struct ath_node *an = (struct ath_node *)sta->drv_priv;
578 if (sc->sc_flags & SC_OP_TXAGGR)
579 ath_tx_node_cleanup(sc, an);
582 void ath_hw_check(struct work_struct *work)
584 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
589 for (i = 0; i < 3; i++) {
590 if (ath9k_hw_check_alive(sc->sc_ah))
598 ath9k_ps_restore(sc);
601 void ath9k_tasklet(unsigned long data)
603 struct ath_softc *sc = (struct ath_softc *)data;
604 struct ath_hw *ah = sc->sc_ah;
605 struct ath_common *common = ath9k_hw_common(ah);
607 u32 status = sc->intrstatus;
612 if (status & ATH9K_INT_FATAL) {
614 ath9k_ps_restore(sc);
618 if (!ath9k_hw_check_alive(ah))
619 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
621 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
622 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
625 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
627 if (status & rxmask) {
628 spin_lock_bh(&sc->rx.pcu_lock);
630 /* Check for high priority Rx first */
631 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
632 (status & ATH9K_INT_RXHP))
633 ath_rx_tasklet(sc, 0, true);
635 ath_rx_tasklet(sc, 0, false);
636 spin_unlock_bh(&sc->rx.pcu_lock);
639 if (status & ATH9K_INT_TX) {
640 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
641 ath_tx_edma_tasklet(sc);
646 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
648 * TSF sync does not look correct; remain awake to sync with
651 ath_print(common, ATH_DBG_PS,
652 "TSFOOR - Sync with next Beacon\n");
653 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
656 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
657 if (status & ATH9K_INT_GENTIMER)
658 ath_gen_timer_isr(sc->sc_ah);
660 /* re-enable hardware interrupt */
661 ath9k_hw_set_interrupts(ah, ah->imask);
662 ath9k_ps_restore(sc);
665 irqreturn_t ath_isr(int irq, void *dev)
667 #define SCHED_INTR ( \
680 struct ath_softc *sc = dev;
681 struct ath_hw *ah = sc->sc_ah;
682 struct ath_common *common = ath9k_hw_common(ah);
683 enum ath9k_int status;
687 * The hardware is not ready/present, don't
688 * touch anything. Note this can happen early
689 * on if the IRQ is shared.
691 if (sc->sc_flags & SC_OP_INVALID)
695 /* shared irq, not for us */
697 if (!ath9k_hw_intrpend(ah))
701 * Figure out the reason(s) for the interrupt. Note
702 * that the hal returns a pseudo-ISR that may include
703 * bits we haven't explicitly enabled so we mask the
704 * value to insure we only process bits we requested.
706 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
707 status &= ah->imask; /* discard unasked-for bits */
710 * If there are no status bits set, then this interrupt was not
711 * for me (should have been caught above).
716 /* Cache the status */
717 sc->intrstatus = status;
719 if (status & SCHED_INTR)
723 * If a FATAL or RXORN interrupt is received, we have to reset the
726 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
727 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
730 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
731 (status & ATH9K_INT_BB_WATCHDOG)) {
733 spin_lock(&common->cc_lock);
734 ath_hw_cycle_counters_update(common);
735 ar9003_hw_bb_watchdog_dbg_info(ah);
736 spin_unlock(&common->cc_lock);
741 if (status & ATH9K_INT_SWBA)
742 tasklet_schedule(&sc->bcon_tasklet);
744 if (status & ATH9K_INT_TXURN)
745 ath9k_hw_updatetxtriglevel(ah, true);
747 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
748 if (status & ATH9K_INT_RXEOL) {
749 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
750 ath9k_hw_set_interrupts(ah, ah->imask);
754 if (status & ATH9K_INT_MIB) {
756 * Disable interrupts until we service the MIB
757 * interrupt; otherwise it will continue to
760 ath9k_hw_set_interrupts(ah, 0);
762 * Let the hal handle the event. We assume
763 * it will clear whatever condition caused
766 spin_lock(&common->cc_lock);
767 ath9k_hw_proc_mib_event(ah);
768 spin_unlock(&common->cc_lock);
769 ath9k_hw_set_interrupts(ah, ah->imask);
772 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
773 if (status & ATH9K_INT_TIM_TIMER) {
774 /* Clear RxAbort bit so that we can
776 ath9k_setpower(sc, ATH9K_PM_AWAKE);
777 ath9k_hw_setrxabort(sc->sc_ah, 0);
778 sc->ps_flags |= PS_WAIT_FOR_BEACON;
783 ath_debug_stat_interrupt(sc, status);
786 /* turn off every interrupt except SWBA */
787 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
788 tasklet_schedule(&sc->intr_tq);
796 static u32 ath_get_extchanmode(struct ath_softc *sc,
797 struct ieee80211_channel *chan,
798 enum nl80211_channel_type channel_type)
802 switch (chan->band) {
803 case IEEE80211_BAND_2GHZ:
804 switch(channel_type) {
805 case NL80211_CHAN_NO_HT:
806 case NL80211_CHAN_HT20:
807 chanmode = CHANNEL_G_HT20;
809 case NL80211_CHAN_HT40PLUS:
810 chanmode = CHANNEL_G_HT40PLUS;
812 case NL80211_CHAN_HT40MINUS:
813 chanmode = CHANNEL_G_HT40MINUS;
817 case IEEE80211_BAND_5GHZ:
818 switch(channel_type) {
819 case NL80211_CHAN_NO_HT:
820 case NL80211_CHAN_HT20:
821 chanmode = CHANNEL_A_HT20;
823 case NL80211_CHAN_HT40PLUS:
824 chanmode = CHANNEL_A_HT40PLUS;
826 case NL80211_CHAN_HT40MINUS:
827 chanmode = CHANNEL_A_HT40MINUS;
838 static void ath9k_bss_assoc_info(struct ath_softc *sc,
839 struct ieee80211_vif *vif,
840 struct ieee80211_bss_conf *bss_conf)
842 struct ath_hw *ah = sc->sc_ah;
843 struct ath_common *common = ath9k_hw_common(ah);
845 if (bss_conf->assoc) {
846 ath_print(common, ATH_DBG_CONFIG,
847 "Bss Info ASSOC %d, bssid: %pM\n",
848 bss_conf->aid, common->curbssid);
850 /* New association, store aid */
851 common->curaid = bss_conf->aid;
852 ath9k_hw_write_associd(ah);
855 * Request a re-configuration of Beacon related timers
856 * on the receipt of the first Beacon frame (i.e.,
857 * after time sync with the AP).
859 sc->ps_flags |= PS_BEACON_SYNC;
861 /* Configure the beacon */
862 ath_beacon_config(sc, vif);
864 /* Reset rssi stats */
865 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
867 sc->sc_flags |= SC_OP_ANI_RUN;
868 ath_start_ani(common);
870 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
873 sc->sc_flags &= ~SC_OP_ANI_RUN;
874 del_timer_sync(&common->ani.timer);
878 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
880 struct ath_hw *ah = sc->sc_ah;
881 struct ath_common *common = ath9k_hw_common(ah);
882 struct ieee80211_channel *channel = hw->conf.channel;
886 ath9k_hw_configpcipowersave(ah, 0, 0);
889 ah->curchan = ath_get_curchannel(sc, sc->hw);
891 spin_lock_bh(&sc->rx.pcu_lock);
892 spin_lock_bh(&sc->sc_resetlock);
893 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
895 ath_print(common, ATH_DBG_FATAL,
896 "Unable to reset channel (%u MHz), "
898 channel->center_freq, r);
900 spin_unlock_bh(&sc->sc_resetlock);
902 ath_update_txpow(sc);
903 if (ath_startrecv(sc) != 0) {
904 ath_print(common, ATH_DBG_FATAL,
905 "Unable to restart recv logic\n");
906 spin_unlock_bh(&sc->rx.pcu_lock);
909 spin_unlock_bh(&sc->rx.pcu_lock);
911 if (sc->sc_flags & SC_OP_BEACONS)
912 ath_beacon_config(sc, NULL); /* restart beacons */
914 /* Re-Enable interrupts */
915 ath9k_hw_set_interrupts(ah, ah->imask);
918 ath9k_hw_cfg_output(ah, ah->led_pin,
919 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
920 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
922 ieee80211_wake_queues(hw);
923 ath9k_ps_restore(sc);
926 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
928 struct ath_hw *ah = sc->sc_ah;
929 struct ieee80211_channel *channel = hw->conf.channel;
933 ieee80211_stop_queues(hw);
936 * Keep the LED on when the radio is disabled
937 * during idle unassociated state.
940 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
941 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
944 /* Disable interrupts */
945 ath9k_hw_set_interrupts(ah, 0);
947 ath_drain_all_txq(sc, false); /* clear pending tx frames */
949 spin_lock_bh(&sc->rx.pcu_lock);
951 ath_stoprecv(sc); /* turn off frame recv */
952 ath_flushrecv(sc); /* flush recv queue */
955 ah->curchan = ath_get_curchannel(sc, hw);
957 spin_lock_bh(&sc->sc_resetlock);
958 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
960 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
961 "Unable to reset channel (%u MHz), "
963 channel->center_freq, r);
965 spin_unlock_bh(&sc->sc_resetlock);
967 ath9k_hw_phy_disable(ah);
969 spin_unlock_bh(&sc->rx.pcu_lock);
971 ath9k_hw_configpcipowersave(ah, 1, 1);
972 ath9k_ps_restore(sc);
973 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
976 int ath_reset(struct ath_softc *sc, bool retry_tx)
978 struct ath_hw *ah = sc->sc_ah;
979 struct ath_common *common = ath9k_hw_common(ah);
980 struct ieee80211_hw *hw = sc->hw;
984 del_timer_sync(&common->ani.timer);
986 ieee80211_stop_queues(hw);
988 ath9k_hw_set_interrupts(ah, 0);
989 ath_drain_all_txq(sc, retry_tx);
991 spin_lock_bh(&sc->rx.pcu_lock);
996 spin_lock_bh(&sc->sc_resetlock);
997 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
999 ath_print(common, ATH_DBG_FATAL,
1000 "Unable to reset hardware; reset status %d\n", r);
1001 spin_unlock_bh(&sc->sc_resetlock);
1003 if (ath_startrecv(sc) != 0)
1004 ath_print(common, ATH_DBG_FATAL,
1005 "Unable to start recv logic\n");
1007 spin_unlock_bh(&sc->rx.pcu_lock);
1010 * We may be doing a reset in response to a request
1011 * that changes the channel so update any state that
1012 * might change as a result.
1014 ath_update_txpow(sc);
1016 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1017 ath_beacon_config(sc, NULL); /* restart beacons */
1019 ath9k_hw_set_interrupts(ah, ah->imask);
1023 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1024 if (ATH_TXQ_SETUP(sc, i)) {
1025 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1026 ath_txq_schedule(sc, &sc->tx.txq[i]);
1027 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1032 ieee80211_wake_queues(hw);
1035 ath_start_ani(common);
1040 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1046 qnum = sc->tx.hwq_map[WME_AC_VO];
1049 qnum = sc->tx.hwq_map[WME_AC_VI];
1052 qnum = sc->tx.hwq_map[WME_AC_BE];
1055 qnum = sc->tx.hwq_map[WME_AC_BK];
1058 qnum = sc->tx.hwq_map[WME_AC_BE];
1065 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1090 /* XXX: Remove me once we don't depend on ath9k_channel for all
1091 * this redundant data */
1092 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1093 struct ath9k_channel *ichan)
1095 struct ieee80211_channel *chan = hw->conf.channel;
1096 struct ieee80211_conf *conf = &hw->conf;
1098 ichan->channel = chan->center_freq;
1101 if (chan->band == IEEE80211_BAND_2GHZ) {
1102 ichan->chanmode = CHANNEL_G;
1103 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1105 ichan->chanmode = CHANNEL_A;
1106 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1109 if (conf_is_ht(conf))
1110 ichan->chanmode = ath_get_extchanmode(sc, chan,
1111 conf->channel_type);
1114 /**********************/
1115 /* mac80211 callbacks */
1116 /**********************/
1118 static int ath9k_start(struct ieee80211_hw *hw)
1120 struct ath_wiphy *aphy = hw->priv;
1121 struct ath_softc *sc = aphy->sc;
1122 struct ath_hw *ah = sc->sc_ah;
1123 struct ath_common *common = ath9k_hw_common(ah);
1124 struct ieee80211_channel *curchan = hw->conf.channel;
1125 struct ath9k_channel *init_channel;
1128 ath_print(common, ATH_DBG_CONFIG,
1129 "Starting driver with initial channel: %d MHz\n",
1130 curchan->center_freq);
1132 mutex_lock(&sc->mutex);
1134 if (ath9k_wiphy_started(sc)) {
1135 if (sc->chan_idx == curchan->hw_value) {
1137 * Already on the operational channel, the new wiphy
1138 * can be marked active.
1140 aphy->state = ATH_WIPHY_ACTIVE;
1141 ieee80211_wake_queues(hw);
1144 * Another wiphy is on another channel, start the new
1145 * wiphy in paused state.
1147 aphy->state = ATH_WIPHY_PAUSED;
1148 ieee80211_stop_queues(hw);
1150 mutex_unlock(&sc->mutex);
1153 aphy->state = ATH_WIPHY_ACTIVE;
1155 /* setup initial channel */
1157 sc->chan_idx = curchan->hw_value;
1159 init_channel = ath_get_curchannel(sc, hw);
1161 /* Reset SERDES registers */
1162 ath9k_hw_configpcipowersave(ah, 0, 0);
1165 * The basic interface to setting the hardware in a good
1166 * state is ``reset''. On return the hardware is known to
1167 * be powered up and with interrupts disabled. This must
1168 * be followed by initialization of the appropriate bits
1169 * and then setup of the interrupt mask.
1171 spin_lock_bh(&sc->rx.pcu_lock);
1172 spin_lock_bh(&sc->sc_resetlock);
1173 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1175 ath_print(common, ATH_DBG_FATAL,
1176 "Unable to reset hardware; reset status %d "
1177 "(freq %u MHz)\n", r,
1178 curchan->center_freq);
1179 spin_unlock_bh(&sc->sc_resetlock);
1180 spin_unlock_bh(&sc->rx.pcu_lock);
1183 spin_unlock_bh(&sc->sc_resetlock);
1186 * This is needed only to setup initial state
1187 * but it's best done after a reset.
1189 ath_update_txpow(sc);
1192 * Setup the hardware after reset:
1193 * The receive engine is set going.
1194 * Frame transmit is handled entirely
1195 * in the frame output path; there's nothing to do
1196 * here except setup the interrupt mask.
1198 if (ath_startrecv(sc) != 0) {
1199 ath_print(common, ATH_DBG_FATAL,
1200 "Unable to start recv logic\n");
1202 spin_unlock_bh(&sc->rx.pcu_lock);
1205 spin_unlock_bh(&sc->rx.pcu_lock);
1207 /* Setup our intr mask. */
1208 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1209 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1212 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1213 ah->imask |= ATH9K_INT_RXHP |
1215 ATH9K_INT_BB_WATCHDOG;
1217 ah->imask |= ATH9K_INT_RX;
1219 ah->imask |= ATH9K_INT_GTT;
1221 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1222 ah->imask |= ATH9K_INT_CST;
1224 sc->sc_flags &= ~SC_OP_INVALID;
1225 sc->sc_ah->is_monitoring = false;
1227 /* Disable BMISS interrupt when we're not associated */
1228 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1229 ath9k_hw_set_interrupts(ah, ah->imask);
1231 ieee80211_wake_queues(hw);
1233 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1235 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1236 !ah->btcoex_hw.enabled) {
1237 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1238 AR_STOMP_LOW_WLAN_WGHT);
1239 ath9k_hw_btcoex_enable(ah);
1241 if (common->bus_ops->bt_coex_prep)
1242 common->bus_ops->bt_coex_prep(common);
1243 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1244 ath9k_btcoex_timer_resume(sc);
1247 pm_qos_update_request(&sc->pm_qos_req, 55);
1250 mutex_unlock(&sc->mutex);
1255 static int ath9k_tx(struct ieee80211_hw *hw,
1256 struct sk_buff *skb)
1258 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1259 struct ath_wiphy *aphy = hw->priv;
1260 struct ath_softc *sc = aphy->sc;
1261 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1262 struct ath_tx_control txctl;
1263 int padpos, padsize;
1264 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1267 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1268 ath_print(common, ATH_DBG_XMIT,
1269 "ath9k: %s: TX in unexpected wiphy state "
1270 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1274 if (sc->ps_enabled) {
1276 * mac80211 does not set PM field for normal data frames, so we
1277 * need to update that based on the current PS mode.
1279 if (ieee80211_is_data(hdr->frame_control) &&
1280 !ieee80211_is_nullfunc(hdr->frame_control) &&
1281 !ieee80211_has_pm(hdr->frame_control)) {
1282 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1283 "while in PS mode\n");
1284 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1288 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1290 * We are using PS-Poll and mac80211 can request TX while in
1291 * power save mode. Need to wake up hardware for the TX to be
1292 * completed and if needed, also for RX of buffered frames.
1294 ath9k_ps_wakeup(sc);
1295 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1296 ath9k_hw_setrxabort(sc->sc_ah, 0);
1297 if (ieee80211_is_pspoll(hdr->frame_control)) {
1298 ath_print(common, ATH_DBG_PS,
1299 "Sending PS-Poll to pick a buffered frame\n");
1300 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1302 ath_print(common, ATH_DBG_PS,
1303 "Wake up to complete TX\n");
1304 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1307 * The actual restore operation will happen only after
1308 * the sc_flags bit is cleared. We are just dropping
1309 * the ps_usecount here.
1311 ath9k_ps_restore(sc);
1314 memset(&txctl, 0, sizeof(struct ath_tx_control));
1317 * As a temporary workaround, assign seq# here; this will likely need
1318 * to be cleaned up to work better with Beacon transmission and virtual
1321 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1322 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1323 sc->tx.seq_no += 0x10;
1324 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1325 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1328 /* Add the padding after the header if this is not already done */
1329 padpos = ath9k_cmn_padpos(hdr->frame_control);
1330 padsize = padpos & 3;
1331 if (padsize && skb->len>padpos) {
1332 if (skb_headroom(skb) < padsize)
1334 skb_push(skb, padsize);
1335 memmove(skb->data, skb->data + padsize, padpos);
1338 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1339 txctl.txq = &sc->tx.txq[qnum];
1341 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1343 if (ath_tx_start(hw, skb, &txctl) != 0) {
1344 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1350 dev_kfree_skb_any(skb);
1354 static void ath9k_stop(struct ieee80211_hw *hw)
1356 struct ath_wiphy *aphy = hw->priv;
1357 struct ath_softc *sc = aphy->sc;
1358 struct ath_hw *ah = sc->sc_ah;
1359 struct ath_common *common = ath9k_hw_common(ah);
1362 mutex_lock(&sc->mutex);
1364 aphy->state = ATH_WIPHY_INACTIVE;
1367 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1369 cancel_delayed_work_sync(&sc->tx_complete_work);
1370 cancel_work_sync(&sc->paprd_work);
1371 cancel_work_sync(&sc->hw_check_work);
1373 for (i = 0; i < sc->num_sec_wiphy; i++) {
1374 if (sc->sec_wiphy[i])
1378 if (i == sc->num_sec_wiphy) {
1379 cancel_delayed_work_sync(&sc->wiphy_work);
1380 cancel_work_sync(&sc->chan_work);
1383 if (sc->sc_flags & SC_OP_INVALID) {
1384 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1385 mutex_unlock(&sc->mutex);
1389 if (ath9k_wiphy_started(sc)) {
1390 mutex_unlock(&sc->mutex);
1391 return; /* another wiphy still in use */
1394 /* Ensure HW is awake when we try to shut it down. */
1395 ath9k_ps_wakeup(sc);
1397 if (ah->btcoex_hw.enabled) {
1398 ath9k_hw_btcoex_disable(ah);
1399 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1400 ath9k_btcoex_timer_pause(sc);
1403 /* make sure h/w will not generate any interrupt
1404 * before setting the invalid flag. */
1405 ath9k_hw_set_interrupts(ah, 0);
1407 spin_lock_bh(&sc->rx.pcu_lock);
1408 if (!(sc->sc_flags & SC_OP_INVALID)) {
1409 ath_drain_all_txq(sc, false);
1411 ath9k_hw_phy_disable(ah);
1413 sc->rx.rxlink = NULL;
1414 spin_unlock_bh(&sc->rx.pcu_lock);
1416 /* disable HAL and put h/w to sleep */
1417 ath9k_hw_disable(ah);
1418 ath9k_hw_configpcipowersave(ah, 1, 1);
1419 ath9k_ps_restore(sc);
1421 /* Finally, put the chip in FULL SLEEP mode */
1422 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1424 sc->sc_flags |= SC_OP_INVALID;
1426 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1428 mutex_unlock(&sc->mutex);
1430 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1433 static int ath9k_add_interface(struct ieee80211_hw *hw,
1434 struct ieee80211_vif *vif)
1436 struct ath_wiphy *aphy = hw->priv;
1437 struct ath_softc *sc = aphy->sc;
1438 struct ath_hw *ah = sc->sc_ah;
1439 struct ath_common *common = ath9k_hw_common(ah);
1440 struct ath_vif *avp = (void *)vif->drv_priv;
1441 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1444 mutex_lock(&sc->mutex);
1446 switch (vif->type) {
1447 case NL80211_IFTYPE_STATION:
1448 ic_opmode = NL80211_IFTYPE_STATION;
1450 case NL80211_IFTYPE_WDS:
1451 ic_opmode = NL80211_IFTYPE_WDS;
1453 case NL80211_IFTYPE_ADHOC:
1454 case NL80211_IFTYPE_AP:
1455 case NL80211_IFTYPE_MESH_POINT:
1456 if (sc->nbcnvifs >= ATH_BCBUF) {
1460 ic_opmode = vif->type;
1463 ath_print(common, ATH_DBG_FATAL,
1464 "Interface type %d not yet supported\n", vif->type);
1469 ath_print(common, ATH_DBG_CONFIG,
1470 "Attach a VIF of type: %d\n", ic_opmode);
1472 /* Set the VIF opmode */
1473 avp->av_opmode = ic_opmode;
1478 ath9k_set_bssid_mask(hw, vif);
1481 goto out; /* skip global settings for secondary vif */
1483 if (ic_opmode == NL80211_IFTYPE_AP) {
1484 ath9k_hw_set_tsfadjust(ah, 1);
1485 sc->sc_flags |= SC_OP_TSF_RESET;
1488 /* Set the device opmode */
1489 ah->opmode = ic_opmode;
1492 * Enable MIB interrupts when there are hardware phy counters.
1493 * Note we only do this (at the moment) for station mode.
1495 if ((vif->type == NL80211_IFTYPE_STATION) ||
1496 (vif->type == NL80211_IFTYPE_ADHOC) ||
1497 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1498 if (ah->config.enable_ani)
1499 ah->imask |= ATH9K_INT_MIB;
1500 ah->imask |= ATH9K_INT_TSFOOR;
1503 ath9k_hw_set_interrupts(ah, ah->imask);
1505 if (vif->type == NL80211_IFTYPE_AP ||
1506 vif->type == NL80211_IFTYPE_ADHOC) {
1507 sc->sc_flags |= SC_OP_ANI_RUN;
1508 ath_start_ani(common);
1512 mutex_unlock(&sc->mutex);
1516 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1517 struct ieee80211_vif *vif)
1519 struct ath_wiphy *aphy = hw->priv;
1520 struct ath_softc *sc = aphy->sc;
1521 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1522 struct ath_vif *avp = (void *)vif->drv_priv;
1524 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1526 mutex_lock(&sc->mutex);
1529 sc->sc_flags &= ~SC_OP_ANI_RUN;
1530 del_timer_sync(&common->ani.timer);
1532 /* Reclaim beacon resources */
1533 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1534 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1535 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1536 /* Disable SWBA interrupt */
1537 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1538 ath9k_ps_wakeup(sc);
1539 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1540 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1541 ath9k_ps_restore(sc);
1542 tasklet_kill(&sc->bcon_tasklet);
1545 ath_beacon_return(sc, avp);
1546 sc->sc_flags &= ~SC_OP_BEACONS;
1549 /* Re-enable SWBA interrupt */
1550 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1551 ath9k_ps_wakeup(sc);
1552 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1553 ath9k_ps_restore(sc);
1558 mutex_unlock(&sc->mutex);
1561 static void ath9k_enable_ps(struct ath_softc *sc)
1563 struct ath_hw *ah = sc->sc_ah;
1565 sc->ps_enabled = true;
1566 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1567 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1568 ah->imask |= ATH9K_INT_TIM_TIMER;
1569 ath9k_hw_set_interrupts(ah, ah->imask);
1571 ath9k_hw_setrxabort(ah, 1);
1575 static void ath9k_disable_ps(struct ath_softc *sc)
1577 struct ath_hw *ah = sc->sc_ah;
1579 sc->ps_enabled = false;
1580 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1581 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1582 ath9k_hw_setrxabort(ah, 0);
1583 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1585 PS_WAIT_FOR_PSPOLL_DATA |
1586 PS_WAIT_FOR_TX_ACK);
1587 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1588 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1589 ath9k_hw_set_interrupts(ah, ah->imask);
1595 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1597 struct ath_wiphy *aphy = hw->priv;
1598 struct ath_softc *sc = aphy->sc;
1599 struct ath_hw *ah = sc->sc_ah;
1600 struct ath_common *common = ath9k_hw_common(ah);
1601 struct ieee80211_conf *conf = &hw->conf;
1604 mutex_lock(&sc->mutex);
1607 * Leave this as the first check because we need to turn on the
1608 * radio if it was disabled before prior to processing the rest
1609 * of the changes. Likewise we must only disable the radio towards
1612 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1614 bool all_wiphys_idle;
1615 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1617 spin_lock_bh(&sc->wiphy_lock);
1618 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1619 ath9k_set_wiphy_idle(aphy, idle);
1621 enable_radio = (!idle && all_wiphys_idle);
1624 * After we unlock here its possible another wiphy
1625 * can be re-renabled so to account for that we will
1626 * only disable the radio toward the end of this routine
1627 * if by then all wiphys are still idle.
1629 spin_unlock_bh(&sc->wiphy_lock);
1632 sc->ps_idle = false;
1633 ath_radio_enable(sc, hw);
1634 ath_print(common, ATH_DBG_CONFIG,
1635 "not-idle: enabling radio\n");
1640 * We just prepare to enable PS. We have to wait until our AP has
1641 * ACK'd our null data frame to disable RX otherwise we'll ignore
1642 * those ACKs and end up retransmitting the same null data frames.
1643 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1645 if (changed & IEEE80211_CONF_CHANGE_PS) {
1646 unsigned long flags;
1647 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1648 if (conf->flags & IEEE80211_CONF_PS)
1649 ath9k_enable_ps(sc);
1651 ath9k_disable_ps(sc);
1652 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1655 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1656 if (conf->flags & IEEE80211_CONF_MONITOR) {
1657 ath_print(common, ATH_DBG_CONFIG,
1658 "Monitor mode is enabled\n");
1659 sc->sc_ah->is_monitoring = true;
1661 ath_print(common, ATH_DBG_CONFIG,
1662 "Monitor mode is disabled\n");
1663 sc->sc_ah->is_monitoring = false;
1667 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1668 struct ieee80211_channel *curchan = hw->conf.channel;
1669 int pos = curchan->hw_value;
1671 unsigned long flags;
1674 old_pos = ah->curchan - &ah->channels[0];
1676 aphy->chan_idx = pos;
1677 aphy->chan_is_ht = conf_is_ht(conf);
1678 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1679 sc->sc_flags |= SC_OP_OFFCHANNEL;
1681 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1683 if (aphy->state == ATH_WIPHY_SCAN ||
1684 aphy->state == ATH_WIPHY_ACTIVE)
1685 ath9k_wiphy_pause_all_forced(sc, aphy);
1688 * Do not change operational channel based on a paused
1691 goto skip_chan_change;
1694 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1695 curchan->center_freq);
1697 /* XXX: remove me eventualy */
1698 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1700 ath_update_chainmask(sc, conf_is_ht(conf));
1702 /* update survey stats for the old channel before switching */
1703 spin_lock_irqsave(&common->cc_lock, flags);
1704 ath_update_survey_stats(sc);
1705 spin_unlock_irqrestore(&common->cc_lock, flags);
1708 * If the operating channel changes, change the survey in-use flags
1710 * Reset the survey data for the new channel, unless we're switching
1711 * back to the operating channel from an off-channel operation.
1713 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1714 sc->cur_survey != &sc->survey[pos]) {
1717 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1719 sc->cur_survey = &sc->survey[pos];
1721 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1722 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1723 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1724 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1727 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1728 ath_print(common, ATH_DBG_FATAL,
1729 "Unable to set channel\n");
1730 mutex_unlock(&sc->mutex);
1735 * The most recent snapshot of channel->noisefloor for the old
1736 * channel is only available after the hardware reset. Copy it to
1737 * the survey stats now.
1740 ath_update_survey_nf(sc, old_pos);
1744 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1745 sc->config.txpowlimit = 2 * conf->power_level;
1746 ath_update_txpow(sc);
1749 spin_lock_bh(&sc->wiphy_lock);
1750 disable_radio = ath9k_all_wiphys_idle(sc);
1751 spin_unlock_bh(&sc->wiphy_lock);
1753 if (disable_radio) {
1754 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1756 ath_radio_disable(sc, hw);
1759 mutex_unlock(&sc->mutex);
1764 #define SUPPORTED_FILTERS \
1765 (FIF_PROMISC_IN_BSS | \
1770 FIF_BCN_PRBRESP_PROMISC | \
1774 /* FIXME: sc->sc_full_reset ? */
1775 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1776 unsigned int changed_flags,
1777 unsigned int *total_flags,
1780 struct ath_wiphy *aphy = hw->priv;
1781 struct ath_softc *sc = aphy->sc;
1784 changed_flags &= SUPPORTED_FILTERS;
1785 *total_flags &= SUPPORTED_FILTERS;
1787 sc->rx.rxfilter = *total_flags;
1788 ath9k_ps_wakeup(sc);
1789 rfilt = ath_calcrxfilter(sc);
1790 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1791 ath9k_ps_restore(sc);
1793 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1794 "Set HW RX filter: 0x%x\n", rfilt);
1797 static int ath9k_sta_add(struct ieee80211_hw *hw,
1798 struct ieee80211_vif *vif,
1799 struct ieee80211_sta *sta)
1801 struct ath_wiphy *aphy = hw->priv;
1802 struct ath_softc *sc = aphy->sc;
1804 ath_node_attach(sc, sta);
1809 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1810 struct ieee80211_vif *vif,
1811 struct ieee80211_sta *sta)
1813 struct ath_wiphy *aphy = hw->priv;
1814 struct ath_softc *sc = aphy->sc;
1816 ath_node_detach(sc, sta);
1821 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1822 const struct ieee80211_tx_queue_params *params)
1824 struct ath_wiphy *aphy = hw->priv;
1825 struct ath_softc *sc = aphy->sc;
1826 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1827 struct ath9k_tx_queue_info qi;
1830 if (queue >= WME_NUM_AC)
1833 mutex_lock(&sc->mutex);
1835 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1837 qi.tqi_aifs = params->aifs;
1838 qi.tqi_cwmin = params->cw_min;
1839 qi.tqi_cwmax = params->cw_max;
1840 qi.tqi_burstTime = params->txop;
1841 qnum = ath_get_hal_qnum(queue, sc);
1843 ath_print(common, ATH_DBG_CONFIG,
1844 "Configure tx [queue/halq] [%d/%d], "
1845 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1846 queue, qnum, params->aifs, params->cw_min,
1847 params->cw_max, params->txop);
1849 ret = ath_txq_update(sc, qnum, &qi);
1851 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1853 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1854 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1855 ath_beaconq_config(sc);
1857 mutex_unlock(&sc->mutex);
1862 static int ath9k_set_key(struct ieee80211_hw *hw,
1863 enum set_key_cmd cmd,
1864 struct ieee80211_vif *vif,
1865 struct ieee80211_sta *sta,
1866 struct ieee80211_key_conf *key)
1868 struct ath_wiphy *aphy = hw->priv;
1869 struct ath_softc *sc = aphy->sc;
1870 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1873 if (modparam_nohwcrypt)
1876 mutex_lock(&sc->mutex);
1877 ath9k_ps_wakeup(sc);
1878 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1882 ret = ath_key_config(common, vif, sta, key);
1884 key->hw_key_idx = ret;
1885 /* push IV and Michael MIC generation to stack */
1886 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1887 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1888 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1889 if (sc->sc_ah->sw_mgmt_crypto &&
1890 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1891 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1896 ath_key_delete(common, key);
1902 ath9k_ps_restore(sc);
1903 mutex_unlock(&sc->mutex);
1908 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1909 struct ieee80211_vif *vif,
1910 struct ieee80211_bss_conf *bss_conf,
1913 struct ath_wiphy *aphy = hw->priv;
1914 struct ath_softc *sc = aphy->sc;
1915 struct ath_hw *ah = sc->sc_ah;
1916 struct ath_common *common = ath9k_hw_common(ah);
1917 struct ath_vif *avp = (void *)vif->drv_priv;
1921 mutex_lock(&sc->mutex);
1923 if (changed & BSS_CHANGED_BSSID) {
1925 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1926 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1928 ath9k_hw_write_associd(ah);
1930 /* Set aggregation protection mode parameters */
1931 sc->config.ath_aggr_prot = 0;
1933 /* Only legacy IBSS for now */
1934 if (vif->type == NL80211_IFTYPE_ADHOC)
1935 ath_update_chainmask(sc, 0);
1937 ath_print(common, ATH_DBG_CONFIG,
1938 "BSSID: %pM aid: 0x%x\n",
1939 common->curbssid, common->curaid);
1941 /* need to reconfigure the beacon */
1942 sc->sc_flags &= ~SC_OP_BEACONS ;
1945 /* Enable transmission of beacons (AP, IBSS, MESH) */
1946 if ((changed & BSS_CHANGED_BEACON) ||
1947 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1948 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1949 error = ath_beacon_alloc(aphy, vif);
1951 ath_beacon_config(sc, vif);
1954 if (changed & BSS_CHANGED_ERP_SLOT) {
1955 if (bss_conf->use_short_slot)
1959 if (vif->type == NL80211_IFTYPE_AP) {
1961 * Defer update, so that connected stations can adjust
1962 * their settings at the same time.
1963 * See beacon.c for more details
1965 sc->beacon.slottime = slottime;
1966 sc->beacon.updateslot = UPDATE;
1968 ah->slottime = slottime;
1969 ath9k_hw_init_global_settings(ah);
1973 /* Disable transmission of beacons */
1974 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1975 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1977 if (changed & BSS_CHANGED_BEACON_INT) {
1978 sc->beacon_interval = bss_conf->beacon_int;
1980 * In case of AP mode, the HW TSF has to be reset
1981 * when the beacon interval changes.
1983 if (vif->type == NL80211_IFTYPE_AP) {
1984 sc->sc_flags |= SC_OP_TSF_RESET;
1985 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1986 error = ath_beacon_alloc(aphy, vif);
1988 ath_beacon_config(sc, vif);
1990 ath_beacon_config(sc, vif);
1994 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1995 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1996 bss_conf->use_short_preamble);
1997 if (bss_conf->use_short_preamble)
1998 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2000 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2003 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2004 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2005 bss_conf->use_cts_prot);
2006 if (bss_conf->use_cts_prot &&
2007 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2008 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2010 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2013 if (changed & BSS_CHANGED_ASSOC) {
2014 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2016 ath9k_bss_assoc_info(sc, vif, bss_conf);
2019 mutex_unlock(&sc->mutex);
2022 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2025 struct ath_wiphy *aphy = hw->priv;
2026 struct ath_softc *sc = aphy->sc;
2028 mutex_lock(&sc->mutex);
2029 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2030 mutex_unlock(&sc->mutex);
2035 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2037 struct ath_wiphy *aphy = hw->priv;
2038 struct ath_softc *sc = aphy->sc;
2040 mutex_lock(&sc->mutex);
2041 ath9k_hw_settsf64(sc->sc_ah, tsf);
2042 mutex_unlock(&sc->mutex);
2045 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2047 struct ath_wiphy *aphy = hw->priv;
2048 struct ath_softc *sc = aphy->sc;
2050 mutex_lock(&sc->mutex);
2052 ath9k_ps_wakeup(sc);
2053 ath9k_hw_reset_tsf(sc->sc_ah);
2054 ath9k_ps_restore(sc);
2056 mutex_unlock(&sc->mutex);
2059 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2060 struct ieee80211_vif *vif,
2061 enum ieee80211_ampdu_mlme_action action,
2062 struct ieee80211_sta *sta,
2065 struct ath_wiphy *aphy = hw->priv;
2066 struct ath_softc *sc = aphy->sc;
2072 case IEEE80211_AMPDU_RX_START:
2073 if (!(sc->sc_flags & SC_OP_RXAGGR))
2076 case IEEE80211_AMPDU_RX_STOP:
2078 case IEEE80211_AMPDU_TX_START:
2079 ath9k_ps_wakeup(sc);
2080 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2082 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2083 ath9k_ps_restore(sc);
2085 case IEEE80211_AMPDU_TX_STOP:
2086 ath9k_ps_wakeup(sc);
2087 ath_tx_aggr_stop(sc, sta, tid);
2088 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2089 ath9k_ps_restore(sc);
2091 case IEEE80211_AMPDU_TX_OPERATIONAL:
2092 ath9k_ps_wakeup(sc);
2093 ath_tx_aggr_resume(sc, sta, tid);
2094 ath9k_ps_restore(sc);
2097 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2098 "Unknown AMPDU action\n");
2106 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2107 struct survey_info *survey)
2109 struct ath_wiphy *aphy = hw->priv;
2110 struct ath_softc *sc = aphy->sc;
2111 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2112 struct ieee80211_supported_band *sband;
2113 struct ieee80211_channel *chan;
2114 unsigned long flags;
2117 spin_lock_irqsave(&common->cc_lock, flags);
2119 ath_update_survey_stats(sc);
2121 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2122 if (sband && idx >= sband->n_channels) {
2123 idx -= sband->n_channels;
2128 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2130 if (!sband || idx >= sband->n_channels) {
2131 spin_unlock_irqrestore(&common->cc_lock, flags);
2135 chan = &sband->channels[idx];
2136 pos = chan->hw_value;
2137 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2138 survey->channel = chan;
2139 spin_unlock_irqrestore(&common->cc_lock, flags);
2144 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2146 struct ath_wiphy *aphy = hw->priv;
2147 struct ath_softc *sc = aphy->sc;
2149 mutex_lock(&sc->mutex);
2150 if (ath9k_wiphy_scanning(sc)) {
2152 * There is a race here in mac80211 but fixing it requires
2153 * we revisit how we handle the scan complete callback.
2154 * After mac80211 fixes we will not have configured hardware
2155 * to the home channel nor would we have configured the RX
2158 mutex_unlock(&sc->mutex);
2162 aphy->state = ATH_WIPHY_SCAN;
2163 ath9k_wiphy_pause_all_forced(sc, aphy);
2164 mutex_unlock(&sc->mutex);
2168 * XXX: this requires a revisit after the driver
2169 * scan_complete gets moved to another place/removed in mac80211.
2171 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2173 struct ath_wiphy *aphy = hw->priv;
2174 struct ath_softc *sc = aphy->sc;
2176 mutex_lock(&sc->mutex);
2177 aphy->state = ATH_WIPHY_ACTIVE;
2178 mutex_unlock(&sc->mutex);
2181 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2183 struct ath_wiphy *aphy = hw->priv;
2184 struct ath_softc *sc = aphy->sc;
2185 struct ath_hw *ah = sc->sc_ah;
2187 mutex_lock(&sc->mutex);
2188 ah->coverage_class = coverage_class;
2189 ath9k_hw_init_global_settings(ah);
2190 mutex_unlock(&sc->mutex);
2193 struct ieee80211_ops ath9k_ops = {
2195 .start = ath9k_start,
2197 .add_interface = ath9k_add_interface,
2198 .remove_interface = ath9k_remove_interface,
2199 .config = ath9k_config,
2200 .configure_filter = ath9k_configure_filter,
2201 .sta_add = ath9k_sta_add,
2202 .sta_remove = ath9k_sta_remove,
2203 .conf_tx = ath9k_conf_tx,
2204 .bss_info_changed = ath9k_bss_info_changed,
2205 .set_key = ath9k_set_key,
2206 .get_tsf = ath9k_get_tsf,
2207 .set_tsf = ath9k_set_tsf,
2208 .reset_tsf = ath9k_reset_tsf,
2209 .ampdu_action = ath9k_ampdu_action,
2210 .get_survey = ath9k_get_survey,
2211 .sw_scan_start = ath9k_sw_scan_start,
2212 .sw_scan_complete = ath9k_sw_scan_complete,
2213 .rfkill_poll = ath9k_rfkill_poll_state,
2214 .set_coverage_class = ath9k_set_coverage_class,