2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
62 spin_lock_bh(&txq->axq_lock);
72 if (txq->mac80211_qnum >= 0) {
73 struct list_head *list;
75 list = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(list))
80 spin_unlock_bh(&txq->axq_lock);
84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
96 void ath_ps_full_sleep(unsigned long data)
98 struct ath_softc *sc = (struct ath_softc *) data;
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
102 spin_lock(&common->cc_lock);
103 ath_hw_cycle_counters_update(common);
104 spin_unlock(&common->cc_lock);
106 ath9k_hw_setrxabort(sc->sc_ah, 1);
107 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
109 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
112 void ath9k_ps_wakeup(struct ath_softc *sc)
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116 enum ath9k_power_mode power_mode;
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (++sc->ps_usecount != 1)
122 del_timer_sync(&sc->sleep_timer);
123 power_mode = sc->sc_ah->power_mode;
124 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode != ATH9K_PM_AWAKE) {
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
135 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
136 spin_unlock(&common->cc_lock);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 void ath9k_ps_restore(struct ath_softc *sc)
145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
146 enum ath9k_power_mode mode;
149 spin_lock_irqsave(&sc->sc_pm_lock, flags);
150 if (--sc->ps_usecount != 0)
154 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
158 if (sc->ps_enabled &&
159 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
161 PS_WAIT_FOR_PSPOLL_DATA |
164 mode = ATH9K_PM_NETWORK_SLEEP;
165 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
166 ath9k_btcoex_stop_gen_timer(sc);
171 spin_lock(&common->cc_lock);
172 ath_hw_cycle_counters_update(common);
173 spin_unlock(&common->cc_lock);
175 ath9k_hw_setpower(sc->sc_ah, mode);
178 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
181 static void __ath_cancel_work(struct ath_softc *sc)
183 cancel_work_sync(&sc->paprd_work);
184 cancel_delayed_work_sync(&sc->tx_complete_work);
185 cancel_delayed_work_sync(&sc->hw_pll_work);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
189 cancel_work_sync(&sc->mci_work);
193 void ath_cancel_work(struct ath_softc *sc)
195 __ath_cancel_work(sc);
196 cancel_work_sync(&sc->hw_reset_work);
199 void ath_restart_work(struct ath_softc *sc)
201 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
203 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
204 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
210 static bool ath_prepare_reset(struct ath_softc *sc)
212 struct ath_hw *ah = sc->sc_ah;
215 ieee80211_stop_queues(sc->hw);
217 ath9k_hw_disable_interrupts(ah);
219 if (AR_SREV_9300_20_OR_LATER(ah)) {
220 ret &= ath_stoprecv(sc);
221 ret &= ath_drain_all_txq(sc);
223 ret &= ath_drain_all_txq(sc);
224 ret &= ath_stoprecv(sc);
230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
232 struct ath_hw *ah = sc->sc_ah;
233 struct ath_common *common = ath9k_hw_common(ah);
236 ath9k_calculate_summary_state(sc, sc->cur_chan);
238 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
239 sc->cur_chan->txpower,
240 &sc->cur_chan->cur_txpower);
241 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
243 if (!sc->cur_chan->offchannel && start) {
244 /* restore per chanctx TSF timer */
245 if (sc->cur_chan->tsf_val) {
248 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
250 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
254 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
257 if (ah->opmode == NL80211_IFTYPE_STATION &&
258 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
259 spin_lock_irqsave(&sc->sc_pm_lock, flags);
260 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
261 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
263 ath9k_set_beacon(sc);
266 ath_restart_work(sc);
267 ath_txq_schedule_all(sc);
272 ath9k_hw_set_interrupts(ah);
273 ath9k_hw_enable_interrupts(ah);
274 ieee80211_wake_queues(sc->hw);
275 ath9k_p2p_ps_timer(sc);
280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
282 struct ath_hw *ah = sc->sc_ah;
283 struct ath_common *common = ath9k_hw_common(ah);
284 struct ath9k_hw_cal_data *caldata = NULL;
288 __ath_cancel_work(sc);
290 disable_irq(sc->irq);
291 tasklet_disable(&sc->intr_tq);
292 tasklet_disable(&sc->bcon_tasklet);
293 spin_lock_bh(&sc->sc_pcu_lock);
295 if (!sc->cur_chan->offchannel) {
297 caldata = &sc->cur_chan->caldata;
305 if (!ath_prepare_reset(sc))
308 if (ath9k_is_chanctx_enabled())
311 spin_lock_bh(&sc->chan_lock);
312 sc->cur_chandef = sc->cur_chan->chandef;
313 spin_unlock_bh(&sc->chan_lock);
315 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
316 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
318 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
321 "Unable to reset channel, reset status %d\n", r);
323 ath9k_hw_enable_interrupts(ah);
324 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
329 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
330 sc->cur_chan->offchannel)
331 ath9k_mci_set_txpower(sc, true, false);
333 if (!ath_complete_reset(sc, true))
338 spin_unlock_bh(&sc->sc_pcu_lock);
339 tasklet_enable(&sc->bcon_tasklet);
340 tasklet_enable(&sc->intr_tq);
345 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
346 struct ieee80211_vif *vif)
349 an = (struct ath_node *)sta->drv_priv;
354 memset(&an->key_idx, 0, sizeof(an->key_idx));
356 ath_tx_node_init(sc, an);
358 ath_dynack_node_init(sc->sc_ah, an);
361 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
363 struct ath_node *an = (struct ath_node *)sta->drv_priv;
364 ath_tx_node_cleanup(sc, an);
366 ath_dynack_node_deinit(sc->sc_ah, an);
369 void ath9k_tasklet(unsigned long data)
371 struct ath_softc *sc = (struct ath_softc *)data;
372 struct ath_hw *ah = sc->sc_ah;
373 struct ath_common *common = ath9k_hw_common(ah);
374 enum ath_reset_type type;
376 u32 status = sc->intrstatus;
380 spin_lock(&sc->sc_pcu_lock);
382 if (status & ATH9K_INT_FATAL) {
383 type = RESET_TYPE_FATAL_INT;
384 ath9k_queue_reset(sc, type);
387 * Increment the ref. counter here so that
388 * interrupts are enabled in the reset routine.
390 atomic_inc(&ah->intr_ref_cnt);
391 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
395 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
396 (status & ATH9K_INT_BB_WATCHDOG)) {
397 spin_lock(&common->cc_lock);
398 ath_hw_cycle_counters_update(common);
399 ar9003_hw_bb_watchdog_dbg_info(ah);
400 spin_unlock(&common->cc_lock);
402 if (ar9003_hw_bb_watchdog_check(ah)) {
403 type = RESET_TYPE_BB_WATCHDOG;
404 ath9k_queue_reset(sc, type);
407 * Increment the ref. counter here so that
408 * interrupts are enabled in the reset routine.
410 atomic_inc(&ah->intr_ref_cnt);
411 ath_dbg(common, RESET,
412 "BB_WATCHDOG: Skipping interrupts\n");
417 if (status & ATH9K_INT_GTT) {
420 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
421 type = RESET_TYPE_TX_GTT;
422 ath9k_queue_reset(sc, type);
423 atomic_inc(&ah->intr_ref_cnt);
424 ath_dbg(common, RESET,
425 "GTT: Skipping interrupts\n");
430 spin_lock_irqsave(&sc->sc_pm_lock, flags);
431 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
433 * TSF sync does not look correct; remain awake to sync with
436 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
437 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
439 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
441 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
442 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
445 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
447 if (status & rxmask) {
448 /* Check for high priority Rx first */
449 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
450 (status & ATH9K_INT_RXHP))
451 ath_rx_tasklet(sc, 0, true);
453 ath_rx_tasklet(sc, 0, false);
456 if (status & ATH9K_INT_TX) {
457 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
459 * For EDMA chips, TX completion is enabled for the
460 * beacon queue, so if a beacon has been transmitted
461 * successfully after a GTT interrupt, the GTT counter
462 * gets reset to zero here.
466 ath_tx_edma_tasklet(sc);
471 wake_up(&sc->tx_wait);
474 if (status & ATH9K_INT_GENTIMER)
475 ath_gen_timer_isr(sc->sc_ah);
477 ath9k_btcoex_handle_interrupt(sc, status);
479 /* re-enable hardware interrupt */
480 ath9k_hw_enable_interrupts(ah);
482 spin_unlock(&sc->sc_pcu_lock);
483 ath9k_ps_restore(sc);
486 irqreturn_t ath_isr(int irq, void *dev)
488 #define SCHED_INTR ( \
490 ATH9K_INT_BB_WATCHDOG | \
501 ATH9K_INT_GENTIMER | \
504 struct ath_softc *sc = dev;
505 struct ath_hw *ah = sc->sc_ah;
506 struct ath_common *common = ath9k_hw_common(ah);
507 enum ath9k_int status;
512 * The hardware is not ready/present, don't
513 * touch anything. Note this can happen early
514 * on if the IRQ is shared.
516 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
519 /* shared irq, not for us */
520 if (!ath9k_hw_intrpend(ah))
524 * Figure out the reason(s) for the interrupt. Note
525 * that the hal returns a pseudo-ISR that may include
526 * bits we haven't explicitly enabled so we mask the
527 * value to insure we only process bits we requested.
529 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
530 ath9k_debug_sync_cause(sc, sync_cause);
531 status &= ah->imask; /* discard unasked-for bits */
533 if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
537 * If there are no status bits set, then this interrupt was not
538 * for me (should have been caught above).
543 /* Cache the status */
544 sc->intrstatus = status;
546 if (status & SCHED_INTR)
550 * If a FATAL interrupt is received, we have to reset the chip
553 if (status & ATH9K_INT_FATAL)
556 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
557 (status & ATH9K_INT_BB_WATCHDOG))
560 if (status & ATH9K_INT_SWBA)
561 tasklet_schedule(&sc->bcon_tasklet);
563 if (status & ATH9K_INT_TXURN)
564 ath9k_hw_updatetxtriglevel(ah, true);
566 if (status & ATH9K_INT_RXEOL) {
567 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
568 ath9k_hw_set_interrupts(ah);
571 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
572 if (status & ATH9K_INT_TIM_TIMER) {
573 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
575 /* Clear RxAbort bit so that we can
577 ath9k_setpower(sc, ATH9K_PM_AWAKE);
578 spin_lock(&sc->sc_pm_lock);
579 ath9k_hw_setrxabort(sc->sc_ah, 0);
580 sc->ps_flags |= PS_WAIT_FOR_BEACON;
581 spin_unlock(&sc->sc_pm_lock);
586 ath_debug_stat_interrupt(sc, status);
589 /* turn off every interrupt */
590 ath9k_hw_disable_interrupts(ah);
591 tasklet_schedule(&sc->intr_tq);
600 * This function is called when a HW reset cannot be deferred
601 * and has to be immediate.
603 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
605 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
608 ath9k_hw_kill_interrupts(sc->sc_ah);
609 set_bit(ATH_OP_HW_RESET, &common->op_flags);
612 r = ath_reset_internal(sc, hchan);
613 ath9k_ps_restore(sc);
619 * When a HW reset can be deferred, it is added to the
620 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
623 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
625 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
626 #ifdef CONFIG_ATH9K_DEBUGFS
627 RESET_STAT_INC(sc, type);
629 ath9k_hw_kill_interrupts(sc->sc_ah);
630 set_bit(ATH_OP_HW_RESET, &common->op_flags);
631 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
634 void ath_reset_work(struct work_struct *work)
636 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
639 ath_reset_internal(sc, NULL);
640 ath9k_ps_restore(sc);
643 /**********************/
644 /* mac80211 callbacks */
645 /**********************/
647 static int ath9k_start(struct ieee80211_hw *hw)
649 struct ath_softc *sc = hw->priv;
650 struct ath_hw *ah = sc->sc_ah;
651 struct ath_common *common = ath9k_hw_common(ah);
652 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
653 struct ath_chanctx *ctx = sc->cur_chan;
654 struct ath9k_channel *init_channel;
657 ath_dbg(common, CONFIG,
658 "Starting driver with initial channel: %d MHz\n",
659 curchan->center_freq);
662 mutex_lock(&sc->mutex);
664 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
665 sc->cur_chandef = hw->conf.chandef;
667 /* Reset SERDES registers */
668 ath9k_hw_configpcipowersave(ah, false);
671 * The basic interface to setting the hardware in a good
672 * state is ``reset''. On return the hardware is known to
673 * be powered up and with interrupts disabled. This must
674 * be followed by initialization of the appropriate bits
675 * and then setup of the interrupt mask.
677 spin_lock_bh(&sc->sc_pcu_lock);
679 atomic_set(&ah->intr_ref_cnt, -1);
681 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
684 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
685 r, curchan->center_freq);
686 ah->reset_power_on = false;
689 /* Setup our intr mask. */
690 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
691 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
694 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
695 ah->imask |= ATH9K_INT_RXHP |
698 ah->imask |= ATH9K_INT_RX;
700 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
701 ah->imask |= ATH9K_INT_BB_WATCHDOG;
704 * Enable GTT interrupts only for AR9003/AR9004 chips
707 if (AR_SREV_9300_20_OR_LATER(ah))
708 ah->imask |= ATH9K_INT_GTT;
710 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
711 ah->imask |= ATH9K_INT_CST;
715 clear_bit(ATH_OP_INVALID, &common->op_flags);
716 sc->sc_ah->is_monitoring = false;
718 if (!ath_complete_reset(sc, false))
719 ah->reset_power_on = false;
721 if (ah->led_pin >= 0) {
722 ath9k_hw_cfg_output(ah, ah->led_pin,
723 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
724 ath9k_hw_set_gpio(ah, ah->led_pin,
725 (ah->config.led_active_high) ? 1 : 0);
729 * Reset key cache to sane defaults (all entries cleared) instead of
730 * semi-random values after suspend/resume.
732 ath9k_cmn_init_crypto(sc->sc_ah);
734 ath9k_hw_reset_tsf(ah);
736 spin_unlock_bh(&sc->sc_pcu_lock);
738 mutex_unlock(&sc->mutex);
740 ath9k_ps_restore(sc);
747 static void ath9k_tx(struct ieee80211_hw *hw,
748 struct ieee80211_tx_control *control,
751 struct ath_softc *sc = hw->priv;
752 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
753 struct ath_tx_control txctl;
754 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
757 if (sc->ps_enabled) {
759 * mac80211 does not set PM field for normal data frames, so we
760 * need to update that based on the current PS mode.
762 if (ieee80211_is_data(hdr->frame_control) &&
763 !ieee80211_is_nullfunc(hdr->frame_control) &&
764 !ieee80211_has_pm(hdr->frame_control)) {
766 "Add PM=1 for a TX frame while in PS mode\n");
767 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
771 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
773 * We are using PS-Poll and mac80211 can request TX while in
774 * power save mode. Need to wake up hardware for the TX to be
775 * completed and if needed, also for RX of buffered frames.
778 spin_lock_irqsave(&sc->sc_pm_lock, flags);
779 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
780 ath9k_hw_setrxabort(sc->sc_ah, 0);
781 if (ieee80211_is_pspoll(hdr->frame_control)) {
783 "Sending PS-Poll to pick a buffered frame\n");
784 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
786 ath_dbg(common, PS, "Wake up to complete TX\n");
787 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
790 * The actual restore operation will happen only after
791 * the ps_flags bit is cleared. We are just dropping
792 * the ps_usecount here.
794 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
795 ath9k_ps_restore(sc);
799 * Cannot tx while the hardware is in full sleep, it first needs a full
800 * chip reset to recover from that
802 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
803 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
807 memset(&txctl, 0, sizeof(struct ath_tx_control));
808 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
809 txctl.sta = control->sta;
811 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
813 if (ath_tx_start(hw, skb, &txctl) != 0) {
814 ath_dbg(common, XMIT, "TX failed\n");
815 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
821 ieee80211_free_txskb(hw, skb);
824 static void ath9k_stop(struct ieee80211_hw *hw)
826 struct ath_softc *sc = hw->priv;
827 struct ath_hw *ah = sc->sc_ah;
828 struct ath_common *common = ath9k_hw_common(ah);
831 ath9k_deinit_channel_context(sc);
835 mutex_lock(&sc->mutex);
839 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
840 ath_dbg(common, ANY, "Device not present\n");
841 mutex_unlock(&sc->mutex);
845 /* Ensure HW is awake when we try to shut it down. */
848 spin_lock_bh(&sc->sc_pcu_lock);
850 /* prevent tasklets to enable interrupts once we disable them */
851 ah->imask &= ~ATH9K_INT_GLOBAL;
853 /* make sure h/w will not generate any interrupt
854 * before setting the invalid flag. */
855 ath9k_hw_disable_interrupts(ah);
857 spin_unlock_bh(&sc->sc_pcu_lock);
859 /* we can now sync irq and kill any running tasklets, since we already
860 * disabled interrupts and not holding a spin lock */
861 synchronize_irq(sc->irq);
862 tasklet_kill(&sc->intr_tq);
863 tasklet_kill(&sc->bcon_tasklet);
865 prev_idle = sc->ps_idle;
868 spin_lock_bh(&sc->sc_pcu_lock);
870 if (ah->led_pin >= 0) {
871 ath9k_hw_set_gpio(ah, ah->led_pin,
872 (ah->config.led_active_high) ? 0 : 1);
873 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
876 ath_prepare_reset(sc);
879 dev_kfree_skb_any(sc->rx.frag);
884 ah->curchan = ath9k_cmn_get_channel(hw, ah,
885 &sc->cur_chan->chandef);
887 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
889 set_bit(ATH_OP_INVALID, &common->op_flags);
891 ath9k_hw_phy_disable(ah);
893 ath9k_hw_configpcipowersave(ah, true);
895 spin_unlock_bh(&sc->sc_pcu_lock);
897 ath9k_ps_restore(sc);
899 sc->ps_idle = prev_idle;
901 mutex_unlock(&sc->mutex);
903 ath_dbg(common, CONFIG, "Driver halt\n");
906 static bool ath9k_uses_beacons(int type)
909 case NL80211_IFTYPE_AP:
910 case NL80211_IFTYPE_ADHOC:
911 case NL80211_IFTYPE_MESH_POINT:
918 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
919 u8 *mac, struct ieee80211_vif *vif)
921 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
924 if (iter_data->has_hw_macaddr) {
925 for (i = 0; i < ETH_ALEN; i++)
926 iter_data->mask[i] &=
927 ~(iter_data->hw_macaddr[i] ^ mac[i]);
929 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
930 iter_data->has_hw_macaddr = true;
933 if (!vif->bss_conf.use_short_slot)
934 iter_data->slottime = ATH9K_SLOT_TIME_20;
937 case NL80211_IFTYPE_AP:
940 case NL80211_IFTYPE_STATION:
941 iter_data->nstations++;
942 if (avp->assoc && !iter_data->primary_sta)
943 iter_data->primary_sta = vif;
945 case NL80211_IFTYPE_OCB:
948 case NL80211_IFTYPE_ADHOC:
949 iter_data->nadhocs++;
950 if (vif->bss_conf.enable_beacon)
951 iter_data->beacons = true;
953 case NL80211_IFTYPE_MESH_POINT:
954 iter_data->nmeshes++;
955 if (vif->bss_conf.enable_beacon)
956 iter_data->beacons = true;
958 case NL80211_IFTYPE_WDS:
966 static void ath9k_update_bssid_mask(struct ath_softc *sc,
967 struct ath_chanctx *ctx,
968 struct ath9k_vif_iter_data *iter_data)
970 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
974 if (!ath9k_is_chanctx_enabled())
977 list_for_each_entry(avp, &ctx->vifs, list) {
978 if (ctx->nvifs_assigned != 1)
981 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
984 ether_addr_copy(common->curbssid, avp->bssid);
986 /* perm_addr will be used as the p2p device address. */
987 for (i = 0; i < ETH_ALEN; i++)
988 iter_data->mask[i] &=
989 ~(iter_data->hw_macaddr[i] ^
990 sc->hw->wiphy->perm_addr[i]);
994 /* Called with sc->mutex held. */
995 void ath9k_calculate_iter_data(struct ath_softc *sc,
996 struct ath_chanctx *ctx,
997 struct ath9k_vif_iter_data *iter_data)
1002 * The hardware will use primary station addr together with the
1003 * BSSID mask when matching addresses.
1005 memset(iter_data, 0, sizeof(*iter_data));
1006 eth_broadcast_addr(iter_data->mask);
1007 iter_data->slottime = ATH9K_SLOT_TIME_9;
1009 list_for_each_entry(avp, &ctx->vifs, list)
1010 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1012 ath9k_update_bssid_mask(sc, ctx, iter_data);
1015 static void ath9k_set_assoc_state(struct ath_softc *sc,
1016 struct ieee80211_vif *vif, bool changed)
1018 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1019 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1020 unsigned long flags;
1022 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1024 ether_addr_copy(common->curbssid, avp->bssid);
1025 common->curaid = avp->aid;
1026 ath9k_hw_write_associd(sc->sc_ah);
1029 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1030 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1032 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1033 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1034 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1037 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1038 ath9k_mci_update_wlan_channels(sc, false);
1040 ath_dbg(common, CONFIG,
1041 "Primary Station interface: %pM, BSSID: %pM\n",
1042 vif->addr, common->curbssid);
1045 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1046 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1048 struct ath_hw *ah = sc->sc_ah;
1049 struct ath_common *common = ath9k_hw_common(ah);
1050 struct ieee80211_vif *vif = NULL;
1052 ath9k_ps_wakeup(sc);
1054 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1055 vif = sc->offchannel.scan_vif;
1057 vif = sc->offchannel.roc_vif;
1062 eth_zero_addr(common->curbssid);
1063 eth_broadcast_addr(common->bssidmask);
1064 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1066 ah->opmode = vif->type;
1067 ah->imask &= ~ATH9K_INT_SWBA;
1068 ah->imask &= ~ATH9K_INT_TSFOOR;
1069 ah->slottime = ATH9K_SLOT_TIME_9;
1071 ath_hw_setbssidmask(common);
1072 ath9k_hw_setopmode(ah);
1073 ath9k_hw_write_associd(sc->sc_ah);
1074 ath9k_hw_set_interrupts(ah);
1075 ath9k_hw_init_global_settings(ah);
1078 ath9k_ps_restore(sc);
1082 /* Called with sc->mutex held. */
1083 void ath9k_calculate_summary_state(struct ath_softc *sc,
1084 struct ath_chanctx *ctx)
1086 struct ath_hw *ah = sc->sc_ah;
1087 struct ath_common *common = ath9k_hw_common(ah);
1088 struct ath9k_vif_iter_data iter_data;
1089 struct ath_beacon_config *cur_conf;
1091 ath_chanctx_check_active(sc, ctx);
1093 if (ctx != sc->cur_chan)
1096 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1097 if (ctx == &sc->offchannel.chan)
1098 return ath9k_set_offchannel_state(sc);
1101 ath9k_ps_wakeup(sc);
1102 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1104 if (iter_data.has_hw_macaddr)
1105 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1107 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1108 ath_hw_setbssidmask(common);
1110 if (iter_data.naps > 0) {
1111 cur_conf = &ctx->beacon;
1112 ath9k_hw_set_tsfadjust(ah, true);
1113 ah->opmode = NL80211_IFTYPE_AP;
1114 if (cur_conf->enable_beacon)
1115 iter_data.beacons = true;
1117 ath9k_hw_set_tsfadjust(ah, false);
1119 if (iter_data.nmeshes)
1120 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1121 else if (iter_data.nocbs)
1122 ah->opmode = NL80211_IFTYPE_OCB;
1123 else if (iter_data.nwds)
1124 ah->opmode = NL80211_IFTYPE_AP;
1125 else if (iter_data.nadhocs)
1126 ah->opmode = NL80211_IFTYPE_ADHOC;
1128 ah->opmode = NL80211_IFTYPE_STATION;
1131 ath9k_hw_setopmode(ah);
1133 ctx->switch_after_beacon = false;
1134 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1135 ah->imask |= ATH9K_INT_TSFOOR;
1137 ah->imask &= ~ATH9K_INT_TSFOOR;
1138 if (iter_data.naps == 1 && iter_data.beacons)
1139 ctx->switch_after_beacon = true;
1142 ah->imask &= ~ATH9K_INT_SWBA;
1143 if (ah->opmode == NL80211_IFTYPE_STATION) {
1144 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1146 if (iter_data.primary_sta) {
1147 iter_data.beacons = true;
1148 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1150 ctx->primary_sta = iter_data.primary_sta;
1152 ctx->primary_sta = NULL;
1153 eth_zero_addr(common->curbssid);
1155 ath9k_hw_write_associd(sc->sc_ah);
1156 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1157 ath9k_mci_update_wlan_channels(sc, true);
1159 } else if (iter_data.beacons) {
1160 ah->imask |= ATH9K_INT_SWBA;
1162 ath9k_hw_set_interrupts(ah);
1164 if (iter_data.beacons)
1165 set_bit(ATH_OP_BEACONS, &common->op_flags);
1167 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1169 if (ah->slottime != iter_data.slottime) {
1170 ah->slottime = iter_data.slottime;
1171 ath9k_hw_init_global_settings(ah);
1174 if (iter_data.primary_sta)
1175 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1177 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1179 ath_dbg(common, CONFIG,
1180 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1181 common->macaddr, common->curbssid, common->bssidmask);
1183 ath9k_ps_restore(sc);
1186 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1188 int *power = (int *)data;
1190 if (*power < vif->bss_conf.txpower)
1191 *power = vif->bss_conf.txpower;
1194 /* Called with sc->mutex held. */
1195 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1198 struct ath_hw *ah = sc->sc_ah;
1199 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1201 ath9k_ps_wakeup(sc);
1202 if (ah->tpc_enabled) {
1203 power = (vif) ? vif->bss_conf.txpower : -1;
1204 ieee80211_iterate_active_interfaces_atomic(
1205 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1206 ath9k_tpc_vif_iter, &power);
1208 power = sc->hw->conf.power_level;
1210 power = sc->hw->conf.power_level;
1212 sc->cur_chan->txpower = 2 * power;
1213 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1214 sc->cur_chan->cur_txpower = reg->max_power_level;
1215 ath9k_ps_restore(sc);
1218 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1219 struct ieee80211_vif *vif)
1223 if (!ath9k_is_chanctx_enabled())
1226 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1227 vif->hw_queue[i] = i;
1229 if (vif->type == NL80211_IFTYPE_AP ||
1230 vif->type == NL80211_IFTYPE_MESH_POINT)
1231 vif->cab_queue = hw->queues - 2;
1233 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1236 static int ath9k_add_interface(struct ieee80211_hw *hw,
1237 struct ieee80211_vif *vif)
1239 struct ath_softc *sc = hw->priv;
1240 struct ath_hw *ah = sc->sc_ah;
1241 struct ath_common *common = ath9k_hw_common(ah);
1242 struct ath_vif *avp = (void *)vif->drv_priv;
1243 struct ath_node *an = &avp->mcast_node;
1245 mutex_lock(&sc->mutex);
1247 if (config_enabled(CONFIG_ATH9K_TX99)) {
1248 if (sc->cur_chan->nvifs >= 1) {
1249 mutex_unlock(&sc->mutex);
1255 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1256 sc->cur_chan->nvifs++;
1258 if (ath9k_uses_beacons(vif->type))
1259 ath9k_beacon_assign_slot(sc, vif);
1262 if (!ath9k_is_chanctx_enabled()) {
1263 avp->chanctx = sc->cur_chan;
1264 list_add_tail(&avp->list, &avp->chanctx->vifs);
1267 ath9k_calculate_summary_state(sc, avp->chanctx);
1269 ath9k_assign_hw_queues(hw, vif);
1271 ath9k_set_txpower(sc, vif);
1276 an->no_ps_filter = true;
1277 ath_tx_node_init(sc, an);
1279 mutex_unlock(&sc->mutex);
1283 static int ath9k_change_interface(struct ieee80211_hw *hw,
1284 struct ieee80211_vif *vif,
1285 enum nl80211_iftype new_type,
1288 struct ath_softc *sc = hw->priv;
1289 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1290 struct ath_vif *avp = (void *)vif->drv_priv;
1292 mutex_lock(&sc->mutex);
1294 if (config_enabled(CONFIG_ATH9K_TX99)) {
1295 mutex_unlock(&sc->mutex);
1299 ath_dbg(common, CONFIG, "Change Interface\n");
1301 if (ath9k_uses_beacons(vif->type))
1302 ath9k_beacon_remove_slot(sc, vif);
1304 vif->type = new_type;
1307 if (ath9k_uses_beacons(vif->type))
1308 ath9k_beacon_assign_slot(sc, vif);
1310 ath9k_assign_hw_queues(hw, vif);
1311 ath9k_calculate_summary_state(sc, avp->chanctx);
1313 ath9k_set_txpower(sc, vif);
1315 mutex_unlock(&sc->mutex);
1319 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1320 struct ieee80211_vif *vif)
1322 struct ath_softc *sc = hw->priv;
1323 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1324 struct ath_vif *avp = (void *)vif->drv_priv;
1326 ath_dbg(common, CONFIG, "Detach Interface\n");
1328 mutex_lock(&sc->mutex);
1330 ath9k_p2p_remove_vif(sc, vif);
1332 sc->cur_chan->nvifs--;
1333 sc->tx99_vif = NULL;
1334 if (!ath9k_is_chanctx_enabled())
1335 list_del(&avp->list);
1337 if (ath9k_uses_beacons(vif->type))
1338 ath9k_beacon_remove_slot(sc, vif);
1340 ath_tx_node_cleanup(sc, &avp->mcast_node);
1342 ath9k_calculate_summary_state(sc, avp->chanctx);
1344 ath9k_set_txpower(sc, NULL);
1346 mutex_unlock(&sc->mutex);
1349 static void ath9k_enable_ps(struct ath_softc *sc)
1351 struct ath_hw *ah = sc->sc_ah;
1352 struct ath_common *common = ath9k_hw_common(ah);
1354 if (config_enabled(CONFIG_ATH9K_TX99))
1357 sc->ps_enabled = true;
1358 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1359 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1360 ah->imask |= ATH9K_INT_TIM_TIMER;
1361 ath9k_hw_set_interrupts(ah);
1363 ath9k_hw_setrxabort(ah, 1);
1365 ath_dbg(common, PS, "PowerSave enabled\n");
1368 static void ath9k_disable_ps(struct ath_softc *sc)
1370 struct ath_hw *ah = sc->sc_ah;
1371 struct ath_common *common = ath9k_hw_common(ah);
1373 if (config_enabled(CONFIG_ATH9K_TX99))
1376 sc->ps_enabled = false;
1377 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1378 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1379 ath9k_hw_setrxabort(ah, 0);
1380 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1382 PS_WAIT_FOR_PSPOLL_DATA |
1383 PS_WAIT_FOR_TX_ACK);
1384 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1385 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1386 ath9k_hw_set_interrupts(ah);
1389 ath_dbg(common, PS, "PowerSave disabled\n");
1392 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1394 struct ath_softc *sc = hw->priv;
1395 struct ath_hw *ah = sc->sc_ah;
1396 struct ath_common *common = ath9k_hw_common(ah);
1397 struct ieee80211_conf *conf = &hw->conf;
1398 struct ath_chanctx *ctx = sc->cur_chan;
1400 ath9k_ps_wakeup(sc);
1401 mutex_lock(&sc->mutex);
1403 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1404 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1406 ath_cancel_work(sc);
1407 ath9k_stop_btcoex(sc);
1409 ath9k_start_btcoex(sc);
1411 * The chip needs a reset to properly wake up from
1414 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1419 * We just prepare to enable PS. We have to wait until our AP has
1420 * ACK'd our null data frame to disable RX otherwise we'll ignore
1421 * those ACKs and end up retransmitting the same null data frames.
1422 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1424 if (changed & IEEE80211_CONF_CHANGE_PS) {
1425 unsigned long flags;
1426 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1427 if (conf->flags & IEEE80211_CONF_PS)
1428 ath9k_enable_ps(sc);
1430 ath9k_disable_ps(sc);
1431 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1434 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1435 if (conf->flags & IEEE80211_CONF_MONITOR) {
1436 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1437 sc->sc_ah->is_monitoring = true;
1439 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1440 sc->sc_ah->is_monitoring = false;
1444 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1445 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1446 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1449 mutex_unlock(&sc->mutex);
1450 ath9k_ps_restore(sc);
1455 #define SUPPORTED_FILTERS \
1460 FIF_BCN_PRBRESP_PROMISC | \
1464 /* FIXME: sc->sc_full_reset ? */
1465 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1466 unsigned int changed_flags,
1467 unsigned int *total_flags,
1470 struct ath_softc *sc = hw->priv;
1471 struct ath_chanctx *ctx;
1474 changed_flags &= SUPPORTED_FILTERS;
1475 *total_flags &= SUPPORTED_FILTERS;
1477 spin_lock_bh(&sc->chan_lock);
1478 ath_for_each_chanctx(sc, ctx)
1479 ctx->rxfilter = *total_flags;
1480 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1481 sc->offchannel.chan.rxfilter = *total_flags;
1483 spin_unlock_bh(&sc->chan_lock);
1485 ath9k_ps_wakeup(sc);
1486 rfilt = ath_calcrxfilter(sc);
1487 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1488 ath9k_ps_restore(sc);
1490 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1494 static int ath9k_sta_add(struct ieee80211_hw *hw,
1495 struct ieee80211_vif *vif,
1496 struct ieee80211_sta *sta)
1498 struct ath_softc *sc = hw->priv;
1499 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1500 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1501 struct ieee80211_key_conf ps_key = { };
1504 ath_node_attach(sc, sta, vif);
1506 if (vif->type != NL80211_IFTYPE_AP &&
1507 vif->type != NL80211_IFTYPE_AP_VLAN)
1510 key = ath_key_config(common, vif, sta, &ps_key);
1513 an->key_idx[0] = key;
1519 static void ath9k_del_ps_key(struct ath_softc *sc,
1520 struct ieee80211_vif *vif,
1521 struct ieee80211_sta *sta)
1523 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1524 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1525 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1530 ath_key_delete(common, &ps_key);
1535 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1536 struct ieee80211_vif *vif,
1537 struct ieee80211_sta *sta)
1539 struct ath_softc *sc = hw->priv;
1541 ath9k_del_ps_key(sc, vif, sta);
1542 ath_node_detach(sc, sta);
1547 static int ath9k_sta_state(struct ieee80211_hw *hw,
1548 struct ieee80211_vif *vif,
1549 struct ieee80211_sta *sta,
1550 enum ieee80211_sta_state old_state,
1551 enum ieee80211_sta_state new_state)
1553 struct ath_softc *sc = hw->priv;
1554 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1557 if (old_state == IEEE80211_STA_AUTH &&
1558 new_state == IEEE80211_STA_ASSOC) {
1559 ret = ath9k_sta_add(hw, vif, sta);
1560 ath_dbg(common, CONFIG,
1561 "Add station: %pM\n", sta->addr);
1562 } else if (old_state == IEEE80211_STA_ASSOC &&
1563 new_state == IEEE80211_STA_AUTH) {
1564 ret = ath9k_sta_remove(hw, vif, sta);
1565 ath_dbg(common, CONFIG,
1566 "Remove station: %pM\n", sta->addr);
1569 if (ath9k_is_chanctx_enabled()) {
1570 if (vif->type == NL80211_IFTYPE_STATION) {
1571 if (old_state == IEEE80211_STA_ASSOC &&
1572 new_state == IEEE80211_STA_AUTHORIZED)
1573 ath_chanctx_event(sc, vif,
1574 ATH_CHANCTX_EVENT_AUTHORIZED);
1581 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1582 struct ath_node *an,
1587 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1588 if (!an->key_idx[i])
1590 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1594 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1595 struct ieee80211_vif *vif,
1596 enum sta_notify_cmd cmd,
1597 struct ieee80211_sta *sta)
1599 struct ath_softc *sc = hw->priv;
1600 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1603 case STA_NOTIFY_SLEEP:
1604 an->sleeping = true;
1605 ath_tx_aggr_sleep(sta, sc, an);
1606 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1608 case STA_NOTIFY_AWAKE:
1609 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1610 an->sleeping = false;
1611 ath_tx_aggr_wakeup(sc, an);
1616 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1617 struct ieee80211_vif *vif, u16 queue,
1618 const struct ieee80211_tx_queue_params *params)
1620 struct ath_softc *sc = hw->priv;
1621 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1622 struct ath_txq *txq;
1623 struct ath9k_tx_queue_info qi;
1626 if (queue >= IEEE80211_NUM_ACS)
1629 txq = sc->tx.txq_map[queue];
1631 ath9k_ps_wakeup(sc);
1632 mutex_lock(&sc->mutex);
1634 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1636 qi.tqi_aifs = params->aifs;
1637 qi.tqi_cwmin = params->cw_min;
1638 qi.tqi_cwmax = params->cw_max;
1639 qi.tqi_burstTime = params->txop * 32;
1641 ath_dbg(common, CONFIG,
1642 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1643 queue, txq->axq_qnum, params->aifs, params->cw_min,
1644 params->cw_max, params->txop);
1646 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1647 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1649 ath_err(common, "TXQ Update failed\n");
1651 mutex_unlock(&sc->mutex);
1652 ath9k_ps_restore(sc);
1657 static int ath9k_set_key(struct ieee80211_hw *hw,
1658 enum set_key_cmd cmd,
1659 struct ieee80211_vif *vif,
1660 struct ieee80211_sta *sta,
1661 struct ieee80211_key_conf *key)
1663 struct ath_softc *sc = hw->priv;
1664 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1665 struct ath_node *an = NULL;
1668 if (ath9k_modparam_nohwcrypt)
1671 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1672 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1673 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1674 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1675 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1677 * For now, disable hw crypto for the RSN IBSS group keys. This
1678 * could be optimized in the future to use a modified key cache
1679 * design to support per-STA RX GTK, but until that gets
1680 * implemented, use of software crypto for group addressed
1681 * frames is a acceptable to allow RSN IBSS to be used.
1686 mutex_lock(&sc->mutex);
1687 ath9k_ps_wakeup(sc);
1688 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1690 an = (struct ath_node *)sta->drv_priv;
1695 ath9k_del_ps_key(sc, vif, sta);
1697 key->hw_key_idx = 0;
1698 ret = ath_key_config(common, vif, sta, key);
1700 key->hw_key_idx = ret;
1701 /* push IV and Michael MIC generation to stack */
1702 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1703 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1704 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1705 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1706 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1707 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1710 if (an && key->hw_key_idx) {
1711 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1714 an->key_idx[i] = key->hw_key_idx;
1717 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1721 ath_key_delete(common, key);
1723 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1724 if (an->key_idx[i] != key->hw_key_idx)
1730 key->hw_key_idx = 0;
1736 ath9k_ps_restore(sc);
1737 mutex_unlock(&sc->mutex);
1742 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1743 struct ieee80211_vif *vif,
1744 struct ieee80211_bss_conf *bss_conf,
1748 (BSS_CHANGED_ASSOC | \
1749 BSS_CHANGED_IBSS | \
1750 BSS_CHANGED_BEACON_ENABLED)
1752 struct ath_softc *sc = hw->priv;
1753 struct ath_hw *ah = sc->sc_ah;
1754 struct ath_common *common = ath9k_hw_common(ah);
1755 struct ath_vif *avp = (void *)vif->drv_priv;
1758 ath9k_ps_wakeup(sc);
1759 mutex_lock(&sc->mutex);
1761 if (changed & BSS_CHANGED_ASSOC) {
1762 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1763 bss_conf->bssid, bss_conf->assoc);
1765 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1766 avp->aid = bss_conf->aid;
1767 avp->assoc = bss_conf->assoc;
1769 ath9k_calculate_summary_state(sc, avp->chanctx);
1772 if ((changed & BSS_CHANGED_IBSS) ||
1773 (changed & BSS_CHANGED_OCB)) {
1774 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1775 common->curaid = bss_conf->aid;
1776 ath9k_hw_write_associd(sc->sc_ah);
1779 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1780 (changed & BSS_CHANGED_BEACON_INT) ||
1781 (changed & BSS_CHANGED_BEACON_INFO)) {
1782 ath9k_beacon_config(sc, vif, changed);
1783 if (changed & BSS_CHANGED_BEACON_ENABLED)
1784 ath9k_calculate_summary_state(sc, avp->chanctx);
1787 if ((avp->chanctx == sc->cur_chan) &&
1788 (changed & BSS_CHANGED_ERP_SLOT)) {
1789 if (bss_conf->use_short_slot)
1793 if (vif->type == NL80211_IFTYPE_AP) {
1795 * Defer update, so that connected stations can adjust
1796 * their settings at the same time.
1797 * See beacon.c for more details
1799 sc->beacon.slottime = slottime;
1800 sc->beacon.updateslot = UPDATE;
1802 ah->slottime = slottime;
1803 ath9k_hw_init_global_settings(ah);
1807 if (changed & BSS_CHANGED_P2P_PS)
1808 ath9k_p2p_bss_info_changed(sc, vif);
1810 if (changed & CHECK_ANI)
1813 if (changed & BSS_CHANGED_TXPOWER) {
1814 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1815 vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1816 ath9k_set_txpower(sc, vif);
1819 mutex_unlock(&sc->mutex);
1820 ath9k_ps_restore(sc);
1825 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1827 struct ath_softc *sc = hw->priv;
1830 mutex_lock(&sc->mutex);
1831 ath9k_ps_wakeup(sc);
1832 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1833 ath9k_ps_restore(sc);
1834 mutex_unlock(&sc->mutex);
1839 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1840 struct ieee80211_vif *vif,
1843 struct ath_softc *sc = hw->priv;
1845 mutex_lock(&sc->mutex);
1846 ath9k_ps_wakeup(sc);
1847 ath9k_hw_settsf64(sc->sc_ah, tsf);
1848 ath9k_ps_restore(sc);
1849 mutex_unlock(&sc->mutex);
1852 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1854 struct ath_softc *sc = hw->priv;
1856 mutex_lock(&sc->mutex);
1858 ath9k_ps_wakeup(sc);
1859 ath9k_hw_reset_tsf(sc->sc_ah);
1860 ath9k_ps_restore(sc);
1862 mutex_unlock(&sc->mutex);
1865 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1866 struct ieee80211_vif *vif,
1867 struct ieee80211_ampdu_params *params)
1869 struct ath_softc *sc = hw->priv;
1870 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1873 struct ieee80211_sta *sta = params->sta;
1874 enum ieee80211_ampdu_mlme_action action = params->action;
1875 u16 tid = params->tid;
1876 u16 *ssn = ¶ms->ssn;
1878 mutex_lock(&sc->mutex);
1881 case IEEE80211_AMPDU_RX_START:
1883 case IEEE80211_AMPDU_RX_STOP:
1885 case IEEE80211_AMPDU_TX_START:
1886 if (ath9k_is_chanctx_enabled()) {
1887 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1892 ath9k_ps_wakeup(sc);
1893 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1895 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1896 ath9k_ps_restore(sc);
1898 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1899 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1901 case IEEE80211_AMPDU_TX_STOP_CONT:
1902 ath9k_ps_wakeup(sc);
1903 ath_tx_aggr_stop(sc, sta, tid);
1905 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1906 ath9k_ps_restore(sc);
1908 case IEEE80211_AMPDU_TX_OPERATIONAL:
1909 ath9k_ps_wakeup(sc);
1910 ath_tx_aggr_resume(sc, sta, tid);
1911 ath9k_ps_restore(sc);
1914 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1917 mutex_unlock(&sc->mutex);
1922 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1923 struct survey_info *survey)
1925 struct ath_softc *sc = hw->priv;
1926 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1927 struct ieee80211_supported_band *sband;
1928 struct ieee80211_channel *chan;
1931 if (config_enabled(CONFIG_ATH9K_TX99))
1934 spin_lock_bh(&common->cc_lock);
1936 ath_update_survey_stats(sc);
1938 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1939 if (sband && idx >= sband->n_channels) {
1940 idx -= sband->n_channels;
1945 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1947 if (!sband || idx >= sband->n_channels) {
1948 spin_unlock_bh(&common->cc_lock);
1952 chan = &sband->channels[idx];
1953 pos = chan->hw_value;
1954 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1955 survey->channel = chan;
1956 spin_unlock_bh(&common->cc_lock);
1961 static void ath9k_enable_dynack(struct ath_softc *sc)
1963 #ifdef CONFIG_ATH9K_DYNACK
1965 struct ath_hw *ah = sc->sc_ah;
1967 ath_dynack_reset(ah);
1969 ah->dynack.enabled = true;
1970 rfilt = ath_calcrxfilter(sc);
1971 ath9k_hw_setrxfilter(ah, rfilt);
1975 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1978 struct ath_softc *sc = hw->priv;
1979 struct ath_hw *ah = sc->sc_ah;
1981 if (config_enabled(CONFIG_ATH9K_TX99))
1984 mutex_lock(&sc->mutex);
1986 if (coverage_class >= 0) {
1987 ah->coverage_class = coverage_class;
1988 if (ah->dynack.enabled) {
1991 ah->dynack.enabled = false;
1992 rfilt = ath_calcrxfilter(sc);
1993 ath9k_hw_setrxfilter(ah, rfilt);
1995 ath9k_ps_wakeup(sc);
1996 ath9k_hw_init_global_settings(ah);
1997 ath9k_ps_restore(sc);
1998 } else if (!ah->dynack.enabled) {
1999 ath9k_enable_dynack(sc);
2002 mutex_unlock(&sc->mutex);
2005 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2010 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2011 if (!ATH_TXQ_SETUP(sc, i))
2014 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2023 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2024 u32 queues, bool drop)
2026 struct ath_softc *sc = hw->priv;
2027 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2029 if (ath9k_is_chanctx_enabled()) {
2030 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2034 * If MCC is active, extend the flush timeout
2035 * and wait for the HW/SW queues to become
2036 * empty. This needs to be done outside the
2037 * sc->mutex lock to allow the channel scheduler
2038 * to switch channel contexts.
2040 * The vif queues have been stopped in mac80211,
2041 * so there won't be any incoming frames.
2043 __ath9k_flush(hw, queues, drop, true, true);
2047 mutex_lock(&sc->mutex);
2048 __ath9k_flush(hw, queues, drop, true, false);
2049 mutex_unlock(&sc->mutex);
2052 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2053 bool sw_pending, bool timeout_override)
2055 struct ath_softc *sc = hw->priv;
2056 struct ath_hw *ah = sc->sc_ah;
2057 struct ath_common *common = ath9k_hw_common(ah);
2061 cancel_delayed_work_sync(&sc->tx_complete_work);
2063 if (ah->ah_flags & AH_UNPLUGGED) {
2064 ath_dbg(common, ANY, "Device has been unplugged!\n");
2068 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2069 ath_dbg(common, ANY, "Device not present\n");
2073 spin_lock_bh(&sc->chan_lock);
2074 if (timeout_override)
2077 timeout = sc->cur_chan->flush_timeout;
2078 spin_unlock_bh(&sc->chan_lock);
2080 ath_dbg(common, CHAN_CTX,
2081 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2083 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2088 ath9k_ps_wakeup(sc);
2089 spin_lock_bh(&sc->sc_pcu_lock);
2090 drain_txq = ath_drain_all_txq(sc);
2091 spin_unlock_bh(&sc->sc_pcu_lock);
2094 ath_reset(sc, NULL);
2096 ath9k_ps_restore(sc);
2099 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2102 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2104 struct ath_softc *sc = hw->priv;
2106 return ath9k_has_tx_pending(sc, true);
2109 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2111 struct ath_softc *sc = hw->priv;
2112 struct ath_hw *ah = sc->sc_ah;
2113 struct ieee80211_vif *vif;
2114 struct ath_vif *avp;
2116 struct ath_tx_status ts;
2117 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2120 vif = sc->beacon.bslot[0];
2124 if (!vif->bss_conf.enable_beacon)
2127 avp = (void *)vif->drv_priv;
2129 if (!sc->beacon.tx_processed && !edma) {
2130 tasklet_disable(&sc->bcon_tasklet);
2133 if (!bf || !bf->bf_mpdu)
2136 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2137 if (status == -EINPROGRESS)
2140 sc->beacon.tx_processed = true;
2141 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2144 tasklet_enable(&sc->bcon_tasklet);
2147 return sc->beacon.tx_last;
2150 static int ath9k_get_stats(struct ieee80211_hw *hw,
2151 struct ieee80211_low_level_stats *stats)
2153 struct ath_softc *sc = hw->priv;
2154 struct ath_hw *ah = sc->sc_ah;
2155 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2157 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2158 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2159 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2160 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2164 static u32 fill_chainmask(u32 cap, u32 new)
2169 for (i = 0; cap && new; i++, cap >>= 1) {
2170 if (!(cap & BIT(0)))
2182 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2184 if (AR_SREV_9300_20_OR_LATER(ah))
2187 switch (val & 0x7) {
2193 return (ah->caps.rx_chainmask == 1);
2199 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2201 struct ath_softc *sc = hw->priv;
2202 struct ath_hw *ah = sc->sc_ah;
2204 if (ah->caps.rx_chainmask != 1)
2207 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2210 sc->ant_rx = rx_ant;
2211 sc->ant_tx = tx_ant;
2213 if (ah->caps.rx_chainmask == 1)
2216 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2217 if (AR_SREV_9100(ah))
2218 ah->rxchainmask = 0x7;
2220 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2222 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2223 ath9k_cmn_reload_chainmask(ah);
2228 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2230 struct ath_softc *sc = hw->priv;
2232 *tx_ant = sc->ant_tx;
2233 *rx_ant = sc->ant_rx;
2237 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2238 struct ieee80211_vif *vif,
2241 struct ath_softc *sc = hw->priv;
2242 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2243 set_bit(ATH_OP_SCANNING, &common->op_flags);
2246 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2247 struct ieee80211_vif *vif)
2249 struct ath_softc *sc = hw->priv;
2250 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2251 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2254 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2256 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2258 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2260 if (sc->offchannel.roc_vif) {
2261 ath_dbg(common, CHAN_CTX,
2262 "%s: Aborting RoC\n", __func__);
2264 del_timer_sync(&sc->offchannel.timer);
2265 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2266 ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2269 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2270 ath_dbg(common, CHAN_CTX,
2271 "%s: Aborting HW scan\n", __func__);
2273 del_timer_sync(&sc->offchannel.timer);
2274 ath_scan_complete(sc, true);
2278 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2279 struct ieee80211_scan_request *hw_req)
2281 struct cfg80211_scan_request *req = &hw_req->req;
2282 struct ath_softc *sc = hw->priv;
2283 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2286 mutex_lock(&sc->mutex);
2288 if (WARN_ON(sc->offchannel.scan_req)) {
2293 ath9k_ps_wakeup(sc);
2294 set_bit(ATH_OP_SCANNING, &common->op_flags);
2295 sc->offchannel.scan_vif = vif;
2296 sc->offchannel.scan_req = req;
2297 sc->offchannel.scan_idx = 0;
2299 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2302 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2303 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2304 ath_offchannel_next(sc);
2308 mutex_unlock(&sc->mutex);
2313 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2314 struct ieee80211_vif *vif)
2316 struct ath_softc *sc = hw->priv;
2317 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2319 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2321 mutex_lock(&sc->mutex);
2322 del_timer_sync(&sc->offchannel.timer);
2323 ath_scan_complete(sc, true);
2324 mutex_unlock(&sc->mutex);
2327 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2328 struct ieee80211_vif *vif,
2329 struct ieee80211_channel *chan, int duration,
2330 enum ieee80211_roc_type type)
2332 struct ath_softc *sc = hw->priv;
2333 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2336 mutex_lock(&sc->mutex);
2338 if (WARN_ON(sc->offchannel.roc_vif)) {
2343 ath9k_ps_wakeup(sc);
2344 sc->offchannel.roc_vif = vif;
2345 sc->offchannel.roc_chan = chan;
2346 sc->offchannel.roc_duration = duration;
2348 ath_dbg(common, CHAN_CTX,
2349 "RoC request on vif: %pM, type: %d duration: %d\n",
2350 vif->addr, type, duration);
2352 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2353 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2354 ath_offchannel_next(sc);
2358 mutex_unlock(&sc->mutex);
2363 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2365 struct ath_softc *sc = hw->priv;
2366 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2368 mutex_lock(&sc->mutex);
2370 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2371 del_timer_sync(&sc->offchannel.timer);
2373 if (sc->offchannel.roc_vif) {
2374 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2375 ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2378 mutex_unlock(&sc->mutex);
2383 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2384 struct ieee80211_chanctx_conf *conf)
2386 struct ath_softc *sc = hw->priv;
2387 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2388 struct ath_chanctx *ctx, **ptr;
2391 mutex_lock(&sc->mutex);
2393 ath_for_each_chanctx(sc, ctx) {
2397 ptr = (void *) conf->drv_priv;
2399 ctx->assigned = true;
2400 pos = ctx - &sc->chanctx[0];
2401 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2403 ath_dbg(common, CHAN_CTX,
2404 "Add channel context: %d MHz\n",
2405 conf->def.chan->center_freq);
2407 ath_chanctx_set_channel(sc, ctx, &conf->def);
2409 mutex_unlock(&sc->mutex);
2413 mutex_unlock(&sc->mutex);
2418 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2419 struct ieee80211_chanctx_conf *conf)
2421 struct ath_softc *sc = hw->priv;
2422 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2423 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2425 mutex_lock(&sc->mutex);
2427 ath_dbg(common, CHAN_CTX,
2428 "Remove channel context: %d MHz\n",
2429 conf->def.chan->center_freq);
2431 ctx->assigned = false;
2432 ctx->hw_queue_base = 0;
2433 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2435 mutex_unlock(&sc->mutex);
2438 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2439 struct ieee80211_chanctx_conf *conf,
2442 struct ath_softc *sc = hw->priv;
2443 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2444 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2446 mutex_lock(&sc->mutex);
2447 ath_dbg(common, CHAN_CTX,
2448 "Change channel context: %d MHz\n",
2449 conf->def.chan->center_freq);
2450 ath_chanctx_set_channel(sc, ctx, &conf->def);
2451 mutex_unlock(&sc->mutex);
2454 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2455 struct ieee80211_vif *vif,
2456 struct ieee80211_chanctx_conf *conf)
2458 struct ath_softc *sc = hw->priv;
2459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2460 struct ath_vif *avp = (void *)vif->drv_priv;
2461 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2464 ath9k_cancel_pending_offchannel(sc);
2466 mutex_lock(&sc->mutex);
2468 ath_dbg(common, CHAN_CTX,
2469 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2470 vif->addr, vif->type, vif->p2p,
2471 conf->def.chan->center_freq);
2474 ctx->nvifs_assigned++;
2475 list_add_tail(&avp->list, &ctx->vifs);
2476 ath9k_calculate_summary_state(sc, ctx);
2477 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2478 vif->hw_queue[i] = ctx->hw_queue_base + i;
2480 mutex_unlock(&sc->mutex);
2485 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2486 struct ieee80211_vif *vif,
2487 struct ieee80211_chanctx_conf *conf)
2489 struct ath_softc *sc = hw->priv;
2490 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2491 struct ath_vif *avp = (void *)vif->drv_priv;
2492 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2495 ath9k_cancel_pending_offchannel(sc);
2497 mutex_lock(&sc->mutex);
2499 ath_dbg(common, CHAN_CTX,
2500 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2501 vif->addr, vif->type, vif->p2p,
2502 conf->def.chan->center_freq);
2504 avp->chanctx = NULL;
2505 ctx->nvifs_assigned--;
2506 list_del(&avp->list);
2507 ath9k_calculate_summary_state(sc, ctx);
2508 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2509 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2511 mutex_unlock(&sc->mutex);
2514 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2515 struct ieee80211_vif *vif)
2517 struct ath_softc *sc = hw->priv;
2518 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2519 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2520 struct ath_beacon_config *cur_conf;
2521 struct ath_chanctx *go_ctx;
2522 unsigned long timeout;
2523 bool changed = false;
2526 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2532 mutex_lock(&sc->mutex);
2534 spin_lock_bh(&sc->chan_lock);
2535 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2537 spin_unlock_bh(&sc->chan_lock);
2542 ath9k_cancel_pending_offchannel(sc);
2544 go_ctx = ath_is_go_chanctx_present(sc);
2548 * Wait till the GO interface gets a chance
2549 * to send out an NoA.
2551 spin_lock_bh(&sc->chan_lock);
2552 sc->sched.mgd_prepare_tx = true;
2553 cur_conf = &go_ctx->beacon;
2554 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2555 spin_unlock_bh(&sc->chan_lock);
2557 timeout = usecs_to_jiffies(beacon_int * 2);
2558 init_completion(&sc->go_beacon);
2560 mutex_unlock(&sc->mutex);
2562 if (wait_for_completion_timeout(&sc->go_beacon,
2564 ath_dbg(common, CHAN_CTX,
2565 "Failed to send new NoA\n");
2567 spin_lock_bh(&sc->chan_lock);
2568 sc->sched.mgd_prepare_tx = false;
2569 spin_unlock_bh(&sc->chan_lock);
2572 mutex_lock(&sc->mutex);
2575 ath_dbg(common, CHAN_CTX,
2576 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2577 __func__, vif->addr);
2579 spin_lock_bh(&sc->chan_lock);
2580 sc->next_chan = avp->chanctx;
2581 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2582 spin_unlock_bh(&sc->chan_lock);
2584 ath_chanctx_set_next(sc, true);
2586 mutex_unlock(&sc->mutex);
2589 void ath9k_fill_chanctx_ops(void)
2591 if (!ath9k_is_chanctx_enabled())
2594 ath9k_ops.hw_scan = ath9k_hw_scan;
2595 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2596 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2597 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2598 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2599 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2600 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2601 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2602 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2603 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2608 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2611 struct ath_softc *sc = hw->priv;
2612 struct ath_vif *avp = (void *)vif->drv_priv;
2614 mutex_lock(&sc->mutex);
2616 *dbm = avp->chanctx->cur_txpower;
2618 *dbm = sc->cur_chan->cur_txpower;
2619 mutex_unlock(&sc->mutex);
2626 struct ieee80211_ops ath9k_ops = {
2628 .start = ath9k_start,
2630 .add_interface = ath9k_add_interface,
2631 .change_interface = ath9k_change_interface,
2632 .remove_interface = ath9k_remove_interface,
2633 .config = ath9k_config,
2634 .configure_filter = ath9k_configure_filter,
2635 .sta_state = ath9k_sta_state,
2636 .sta_notify = ath9k_sta_notify,
2637 .conf_tx = ath9k_conf_tx,
2638 .bss_info_changed = ath9k_bss_info_changed,
2639 .set_key = ath9k_set_key,
2640 .get_tsf = ath9k_get_tsf,
2641 .set_tsf = ath9k_set_tsf,
2642 .reset_tsf = ath9k_reset_tsf,
2643 .ampdu_action = ath9k_ampdu_action,
2644 .get_survey = ath9k_get_survey,
2645 .rfkill_poll = ath9k_rfkill_poll_state,
2646 .set_coverage_class = ath9k_set_coverage_class,
2647 .flush = ath9k_flush,
2648 .tx_frames_pending = ath9k_tx_frames_pending,
2649 .tx_last_beacon = ath9k_tx_last_beacon,
2650 .release_buffered_frames = ath9k_release_buffered_frames,
2651 .get_stats = ath9k_get_stats,
2652 .set_antenna = ath9k_set_antenna,
2653 .get_antenna = ath9k_get_antenna,
2655 #ifdef CONFIG_ATH9K_WOW
2656 .suspend = ath9k_suspend,
2657 .resume = ath9k_resume,
2658 .set_wakeup = ath9k_set_wakeup,
2661 #ifdef CONFIG_ATH9K_DEBUGFS
2662 .get_et_sset_count = ath9k_get_et_sset_count,
2663 .get_et_stats = ath9k_get_et_stats,
2664 .get_et_strings = ath9k_get_et_strings,
2667 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2668 .sta_add_debugfs = ath9k_sta_add_debugfs,
2670 .sw_scan_start = ath9k_sw_scan_start,
2671 .sw_scan_complete = ath9k_sw_scan_complete,
2672 .get_txpower = ath9k_get_txpower,