2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
227 if (sc->sc_flags & SC_OP_INVALID)
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
238 * This is only performed if the channel settings have
241 * To switch channels clear any pending DMA operations;
242 * wait long enough for the RX fifo to drain, reset the
243 * hardware at the new frequency, and then re-enable
244 * the relevant bits of the h/w.
246 ath9k_hw_set_interrupts(ah, 0);
247 ath_drain_all_txq(sc, false);
249 spin_lock_bh(&sc->rx.pcu_lock);
251 stopped = ath_stoprecv(sc);
253 /* XXX: do not flush receive queue here. We don't want
254 * to flush data frames already in queue because of
255 * changing channel. */
257 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
260 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
261 caldata = &aphy->caldata;
263 ath_print(common, ATH_DBG_CONFIG,
264 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
265 sc->sc_ah->curchan->channel,
266 channel->center_freq, conf_is_ht40(conf),
269 spin_lock_bh(&sc->sc_resetlock);
271 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
273 ath_print(common, ATH_DBG_FATAL,
274 "Unable to reset channel (%u MHz), "
276 channel->center_freq, r);
277 spin_unlock_bh(&sc->sc_resetlock);
278 spin_unlock_bh(&sc->rx.pcu_lock);
281 spin_unlock_bh(&sc->sc_resetlock);
283 if (ath_startrecv(sc) != 0) {
284 ath_print(common, ATH_DBG_FATAL,
285 "Unable to restart recv logic\n");
287 spin_unlock_bh(&sc->rx.pcu_lock);
291 spin_unlock_bh(&sc->rx.pcu_lock);
293 ath_update_txpow(sc);
294 ath9k_hw_set_interrupts(ah, ah->imask);
296 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
297 ath_beacon_config(sc, NULL);
298 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
299 ath_start_ani(common);
303 ath9k_ps_restore(sc);
307 static void ath_paprd_activate(struct ath_softc *sc)
309 struct ath_hw *ah = sc->sc_ah;
310 struct ath9k_hw_cal_data *caldata = ah->caldata;
311 struct ath_common *common = ath9k_hw_common(ah);
314 if (!caldata || !caldata->paprd_done)
318 ar9003_paprd_enable(ah, false);
319 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
320 if (!(common->tx_chainmask & BIT(chain)))
323 ar9003_paprd_populate_single_table(ah, caldata, chain);
326 ar9003_paprd_enable(ah, true);
327 ath9k_ps_restore(sc);
330 void ath_paprd_calibrate(struct work_struct *work)
332 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
333 struct ieee80211_hw *hw = sc->hw;
334 struct ath_hw *ah = sc->sc_ah;
335 struct ieee80211_hdr *hdr;
336 struct sk_buff *skb = NULL;
337 struct ieee80211_tx_info *tx_info;
338 int band = hw->conf.channel->band;
339 struct ieee80211_supported_band *sband = &sc->sbands[band];
340 struct ath_tx_control txctl;
341 struct ath9k_hw_cal_data *caldata = ah->caldata;
342 struct ath_common *common = ath9k_hw_common(ah);
353 skb = alloc_skb(len, GFP_KERNEL);
357 tx_info = IEEE80211_SKB_CB(skb);
360 memset(skb->data, 0, len);
361 hdr = (struct ieee80211_hdr *)skb->data;
362 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
363 hdr->frame_control = cpu_to_le16(ftype);
364 hdr->duration_id = cpu_to_le16(10);
365 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
366 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
367 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
369 memset(&txctl, 0, sizeof(txctl));
370 qnum = sc->tx.hwq_map[WME_AC_BE];
371 txctl.txq = &sc->tx.txq[qnum];
374 ar9003_paprd_init_table(ah);
375 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
376 if (!(common->tx_chainmask & BIT(chain)))
380 memset(tx_info, 0, sizeof(*tx_info));
381 tx_info->band = band;
383 for (i = 0; i < 4; i++) {
384 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
385 tx_info->control.rates[i].count = 6;
388 init_completion(&sc->paprd_complete);
389 ar9003_paprd_setup_gain_table(ah, chain);
390 txctl.paprd = BIT(chain);
391 if (ath_tx_start(hw, skb, &txctl) != 0)
394 time_left = wait_for_completion_timeout(&sc->paprd_complete,
395 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
397 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
398 "Timeout waiting for paprd training on "
404 if (!ar9003_paprd_is_done(ah))
407 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
415 caldata->paprd_done = true;
416 ath_paprd_activate(sc);
420 ath9k_ps_restore(sc);
424 * This routine performs the periodic noise floor calibration function
425 * that is used to adjust and optimize the chip performance. This
426 * takes environmental changes (location, temperature) into account.
427 * When the task is complete, it reschedules itself depending on the
428 * appropriate interval that was calculated.
430 void ath_ani_calibrate(unsigned long data)
432 struct ath_softc *sc = (struct ath_softc *)data;
433 struct ath_hw *ah = sc->sc_ah;
434 struct ath_common *common = ath9k_hw_common(ah);
435 bool longcal = false;
436 bool shortcal = false;
437 bool aniflag = false;
438 unsigned int timestamp = jiffies_to_msecs(jiffies);
439 u32 cal_interval, short_cal_interval, long_cal_interval;
442 if (ah->caldata && ah->caldata->nfcal_interference)
443 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
445 long_cal_interval = ATH_LONG_CALINTERVAL;
447 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
448 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
450 /* Only calibrate if awake */
451 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
456 /* Long calibration runs independently of short calibration. */
457 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
459 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
460 common->ani.longcal_timer = timestamp;
463 /* Short calibration applies only while caldone is false */
464 if (!common->ani.caldone) {
465 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
467 ath_print(common, ATH_DBG_ANI,
468 "shortcal @%lu\n", jiffies);
469 common->ani.shortcal_timer = timestamp;
470 common->ani.resetcal_timer = timestamp;
473 if ((timestamp - common->ani.resetcal_timer) >=
474 ATH_RESTART_CALINTERVAL) {
475 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
476 if (common->ani.caldone)
477 common->ani.resetcal_timer = timestamp;
481 /* Verify whether we must check ANI */
482 if ((timestamp - common->ani.checkani_timer) >=
483 ah->config.ani_poll_interval) {
485 common->ani.checkani_timer = timestamp;
488 /* Skip all processing if there's nothing to do. */
489 if (longcal || shortcal || aniflag) {
490 /* Call ANI routine if necessary */
492 spin_lock_irqsave(&common->cc_lock, flags);
493 ath9k_hw_ani_monitor(ah, ah->curchan);
494 ath_update_survey_stats(sc);
495 spin_unlock_irqrestore(&common->cc_lock, flags);
498 /* Perform calibration if necessary */
499 if (longcal || shortcal) {
500 common->ani.caldone =
501 ath9k_hw_calibrate(ah,
503 common->rx_chainmask,
508 ath9k_ps_restore(sc);
512 * Set timer interval based on previous results.
513 * The interval must be the shortest necessary to satisfy ANI,
514 * short calibration and long calibration.
516 cal_interval = ATH_LONG_CALINTERVAL;
517 if (sc->sc_ah->config.enable_ani)
518 cal_interval = min(cal_interval,
519 (u32)ah->config.ani_poll_interval);
520 if (!common->ani.caldone)
521 cal_interval = min(cal_interval, (u32)short_cal_interval);
523 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
524 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
525 if (!ah->caldata->paprd_done)
526 ieee80211_queue_work(sc->hw, &sc->paprd_work);
528 ath_paprd_activate(sc);
533 * Update tx/rx chainmask. For legacy association,
534 * hard code chainmask to 1x1, for 11n association, use
535 * the chainmask configuration, for bt coexistence, use
536 * the chainmask configuration even in legacy mode.
538 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
540 struct ath_hw *ah = sc->sc_ah;
541 struct ath_common *common = ath9k_hw_common(ah);
543 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
544 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
545 common->tx_chainmask = ah->caps.tx_chainmask;
546 common->rx_chainmask = ah->caps.rx_chainmask;
548 common->tx_chainmask = 1;
549 common->rx_chainmask = 1;
552 ath_print(common, ATH_DBG_CONFIG,
553 "tx chmask: %d, rx chmask: %d\n",
554 common->tx_chainmask,
555 common->rx_chainmask);
558 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
562 an = (struct ath_node *)sta->drv_priv;
564 if (sc->sc_flags & SC_OP_TXAGGR) {
565 ath_tx_node_init(sc, an);
566 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
567 sta->ht_cap.ampdu_factor);
568 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
569 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
573 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
575 struct ath_node *an = (struct ath_node *)sta->drv_priv;
577 if (sc->sc_flags & SC_OP_TXAGGR)
578 ath_tx_node_cleanup(sc, an);
581 void ath_hw_check(struct work_struct *work)
583 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
588 for (i = 0; i < 3; i++) {
589 if (ath9k_hw_check_alive(sc->sc_ah))
597 ath9k_ps_restore(sc);
600 void ath9k_tasklet(unsigned long data)
602 struct ath_softc *sc = (struct ath_softc *)data;
603 struct ath_hw *ah = sc->sc_ah;
604 struct ath_common *common = ath9k_hw_common(ah);
606 u32 status = sc->intrstatus;
611 if (status & ATH9K_INT_FATAL) {
613 ath9k_ps_restore(sc);
617 if (!ath9k_hw_check_alive(ah))
618 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
620 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
621 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
624 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
626 if (status & rxmask) {
627 spin_lock_bh(&sc->rx.pcu_lock);
629 /* Check for high priority Rx first */
630 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
631 (status & ATH9K_INT_RXHP))
632 ath_rx_tasklet(sc, 0, true);
634 ath_rx_tasklet(sc, 0, false);
635 spin_unlock_bh(&sc->rx.pcu_lock);
638 if (status & ATH9K_INT_TX) {
639 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
640 ath_tx_edma_tasklet(sc);
645 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
647 * TSF sync does not look correct; remain awake to sync with
650 ath_print(common, ATH_DBG_PS,
651 "TSFOOR - Sync with next Beacon\n");
652 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
655 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
656 if (status & ATH9K_INT_GENTIMER)
657 ath_gen_timer_isr(sc->sc_ah);
659 /* re-enable hardware interrupt */
660 ath9k_hw_set_interrupts(ah, ah->imask);
661 ath9k_ps_restore(sc);
664 irqreturn_t ath_isr(int irq, void *dev)
666 #define SCHED_INTR ( \
679 struct ath_softc *sc = dev;
680 struct ath_hw *ah = sc->sc_ah;
681 struct ath_common *common = ath9k_hw_common(ah);
682 enum ath9k_int status;
686 * The hardware is not ready/present, don't
687 * touch anything. Note this can happen early
688 * on if the IRQ is shared.
690 if (sc->sc_flags & SC_OP_INVALID)
694 /* shared irq, not for us */
696 if (!ath9k_hw_intrpend(ah))
700 * Figure out the reason(s) for the interrupt. Note
701 * that the hal returns a pseudo-ISR that may include
702 * bits we haven't explicitly enabled so we mask the
703 * value to insure we only process bits we requested.
705 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
706 status &= ah->imask; /* discard unasked-for bits */
709 * If there are no status bits set, then this interrupt was not
710 * for me (should have been caught above).
715 /* Cache the status */
716 sc->intrstatus = status;
718 if (status & SCHED_INTR)
722 * If a FATAL or RXORN interrupt is received, we have to reset the
725 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
726 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
729 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
730 (status & ATH9K_INT_BB_WATCHDOG)) {
732 spin_lock(&common->cc_lock);
733 ath_hw_cycle_counters_update(common);
734 ar9003_hw_bb_watchdog_dbg_info(ah);
735 spin_unlock(&common->cc_lock);
740 if (status & ATH9K_INT_SWBA)
741 tasklet_schedule(&sc->bcon_tasklet);
743 if (status & ATH9K_INT_TXURN)
744 ath9k_hw_updatetxtriglevel(ah, true);
746 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
747 if (status & ATH9K_INT_RXEOL) {
748 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
749 ath9k_hw_set_interrupts(ah, ah->imask);
753 if (status & ATH9K_INT_MIB) {
755 * Disable interrupts until we service the MIB
756 * interrupt; otherwise it will continue to
759 ath9k_hw_set_interrupts(ah, 0);
761 * Let the hal handle the event. We assume
762 * it will clear whatever condition caused
765 spin_lock(&common->cc_lock);
766 ath9k_hw_proc_mib_event(ah);
767 spin_unlock(&common->cc_lock);
768 ath9k_hw_set_interrupts(ah, ah->imask);
771 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
772 if (status & ATH9K_INT_TIM_TIMER) {
773 /* Clear RxAbort bit so that we can
775 ath9k_setpower(sc, ATH9K_PM_AWAKE);
776 ath9k_hw_setrxabort(sc->sc_ah, 0);
777 sc->ps_flags |= PS_WAIT_FOR_BEACON;
782 ath_debug_stat_interrupt(sc, status);
785 /* turn off every interrupt except SWBA */
786 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
787 tasklet_schedule(&sc->intr_tq);
795 static u32 ath_get_extchanmode(struct ath_softc *sc,
796 struct ieee80211_channel *chan,
797 enum nl80211_channel_type channel_type)
801 switch (chan->band) {
802 case IEEE80211_BAND_2GHZ:
803 switch(channel_type) {
804 case NL80211_CHAN_NO_HT:
805 case NL80211_CHAN_HT20:
806 chanmode = CHANNEL_G_HT20;
808 case NL80211_CHAN_HT40PLUS:
809 chanmode = CHANNEL_G_HT40PLUS;
811 case NL80211_CHAN_HT40MINUS:
812 chanmode = CHANNEL_G_HT40MINUS;
816 case IEEE80211_BAND_5GHZ:
817 switch(channel_type) {
818 case NL80211_CHAN_NO_HT:
819 case NL80211_CHAN_HT20:
820 chanmode = CHANNEL_A_HT20;
822 case NL80211_CHAN_HT40PLUS:
823 chanmode = CHANNEL_A_HT40PLUS;
825 case NL80211_CHAN_HT40MINUS:
826 chanmode = CHANNEL_A_HT40MINUS;
837 static void ath9k_bss_assoc_info(struct ath_softc *sc,
838 struct ieee80211_vif *vif,
839 struct ieee80211_bss_conf *bss_conf)
841 struct ath_hw *ah = sc->sc_ah;
842 struct ath_common *common = ath9k_hw_common(ah);
844 if (bss_conf->assoc) {
845 ath_print(common, ATH_DBG_CONFIG,
846 "Bss Info ASSOC %d, bssid: %pM\n",
847 bss_conf->aid, common->curbssid);
849 /* New association, store aid */
850 common->curaid = bss_conf->aid;
851 ath9k_hw_write_associd(ah);
854 * Request a re-configuration of Beacon related timers
855 * on the receipt of the first Beacon frame (i.e.,
856 * after time sync with the AP).
858 sc->ps_flags |= PS_BEACON_SYNC;
860 /* Configure the beacon */
861 ath_beacon_config(sc, vif);
863 /* Reset rssi stats */
864 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
866 sc->sc_flags |= SC_OP_ANI_RUN;
867 ath_start_ani(common);
869 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
872 sc->sc_flags &= ~SC_OP_ANI_RUN;
873 del_timer_sync(&common->ani.timer);
877 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
879 struct ath_hw *ah = sc->sc_ah;
880 struct ath_common *common = ath9k_hw_common(ah);
881 struct ieee80211_channel *channel = hw->conf.channel;
885 ath9k_hw_configpcipowersave(ah, 0, 0);
888 ah->curchan = ath_get_curchannel(sc, sc->hw);
890 spin_lock_bh(&sc->rx.pcu_lock);
891 spin_lock_bh(&sc->sc_resetlock);
892 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
894 ath_print(common, ATH_DBG_FATAL,
895 "Unable to reset channel (%u MHz), "
897 channel->center_freq, r);
899 spin_unlock_bh(&sc->sc_resetlock);
901 ath_update_txpow(sc);
902 if (ath_startrecv(sc) != 0) {
903 ath_print(common, ATH_DBG_FATAL,
904 "Unable to restart recv logic\n");
905 spin_unlock_bh(&sc->rx.pcu_lock);
908 spin_unlock_bh(&sc->rx.pcu_lock);
910 if (sc->sc_flags & SC_OP_BEACONS)
911 ath_beacon_config(sc, NULL); /* restart beacons */
913 /* Re-Enable interrupts */
914 ath9k_hw_set_interrupts(ah, ah->imask);
917 ath9k_hw_cfg_output(ah, ah->led_pin,
918 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
919 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
921 ieee80211_wake_queues(hw);
922 ath9k_ps_restore(sc);
925 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
927 struct ath_hw *ah = sc->sc_ah;
928 struct ieee80211_channel *channel = hw->conf.channel;
932 ieee80211_stop_queues(hw);
935 * Keep the LED on when the radio is disabled
936 * during idle unassociated state.
939 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
940 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
943 /* Disable interrupts */
944 ath9k_hw_set_interrupts(ah, 0);
946 ath_drain_all_txq(sc, false); /* clear pending tx frames */
948 spin_lock_bh(&sc->rx.pcu_lock);
950 ath_stoprecv(sc); /* turn off frame recv */
951 ath_flushrecv(sc); /* flush recv queue */
954 ah->curchan = ath_get_curchannel(sc, hw);
956 spin_lock_bh(&sc->sc_resetlock);
957 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
959 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
960 "Unable to reset channel (%u MHz), "
962 channel->center_freq, r);
964 spin_unlock_bh(&sc->sc_resetlock);
966 ath9k_hw_phy_disable(ah);
968 spin_unlock_bh(&sc->rx.pcu_lock);
970 ath9k_hw_configpcipowersave(ah, 1, 1);
971 ath9k_ps_restore(sc);
972 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
975 int ath_reset(struct ath_softc *sc, bool retry_tx)
977 struct ath_hw *ah = sc->sc_ah;
978 struct ath_common *common = ath9k_hw_common(ah);
979 struct ieee80211_hw *hw = sc->hw;
983 del_timer_sync(&common->ani.timer);
985 ieee80211_stop_queues(hw);
987 ath9k_hw_set_interrupts(ah, 0);
988 ath_drain_all_txq(sc, retry_tx);
990 spin_lock_bh(&sc->rx.pcu_lock);
995 spin_lock_bh(&sc->sc_resetlock);
996 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
998 ath_print(common, ATH_DBG_FATAL,
999 "Unable to reset hardware; reset status %d\n", r);
1000 spin_unlock_bh(&sc->sc_resetlock);
1002 if (ath_startrecv(sc) != 0)
1003 ath_print(common, ATH_DBG_FATAL,
1004 "Unable to start recv logic\n");
1006 spin_unlock_bh(&sc->rx.pcu_lock);
1009 * We may be doing a reset in response to a request
1010 * that changes the channel so update any state that
1011 * might change as a result.
1013 ath_update_txpow(sc);
1015 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1016 ath_beacon_config(sc, NULL); /* restart beacons */
1018 ath9k_hw_set_interrupts(ah, ah->imask);
1022 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1023 if (ATH_TXQ_SETUP(sc, i)) {
1024 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1025 ath_txq_schedule(sc, &sc->tx.txq[i]);
1026 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1031 ieee80211_wake_queues(hw);
1034 ath_start_ani(common);
1039 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1045 qnum = sc->tx.hwq_map[WME_AC_VO];
1048 qnum = sc->tx.hwq_map[WME_AC_VI];
1051 qnum = sc->tx.hwq_map[WME_AC_BE];
1054 qnum = sc->tx.hwq_map[WME_AC_BK];
1057 qnum = sc->tx.hwq_map[WME_AC_BE];
1064 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1089 /* XXX: Remove me once we don't depend on ath9k_channel for all
1090 * this redundant data */
1091 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1092 struct ath9k_channel *ichan)
1094 struct ieee80211_channel *chan = hw->conf.channel;
1095 struct ieee80211_conf *conf = &hw->conf;
1097 ichan->channel = chan->center_freq;
1100 if (chan->band == IEEE80211_BAND_2GHZ) {
1101 ichan->chanmode = CHANNEL_G;
1102 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1104 ichan->chanmode = CHANNEL_A;
1105 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1108 if (conf_is_ht(conf))
1109 ichan->chanmode = ath_get_extchanmode(sc, chan,
1110 conf->channel_type);
1113 /**********************/
1114 /* mac80211 callbacks */
1115 /**********************/
1117 static int ath9k_start(struct ieee80211_hw *hw)
1119 struct ath_wiphy *aphy = hw->priv;
1120 struct ath_softc *sc = aphy->sc;
1121 struct ath_hw *ah = sc->sc_ah;
1122 struct ath_common *common = ath9k_hw_common(ah);
1123 struct ieee80211_channel *curchan = hw->conf.channel;
1124 struct ath9k_channel *init_channel;
1127 ath_print(common, ATH_DBG_CONFIG,
1128 "Starting driver with initial channel: %d MHz\n",
1129 curchan->center_freq);
1131 mutex_lock(&sc->mutex);
1133 if (ath9k_wiphy_started(sc)) {
1134 if (sc->chan_idx == curchan->hw_value) {
1136 * Already on the operational channel, the new wiphy
1137 * can be marked active.
1139 aphy->state = ATH_WIPHY_ACTIVE;
1140 ieee80211_wake_queues(hw);
1143 * Another wiphy is on another channel, start the new
1144 * wiphy in paused state.
1146 aphy->state = ATH_WIPHY_PAUSED;
1147 ieee80211_stop_queues(hw);
1149 mutex_unlock(&sc->mutex);
1152 aphy->state = ATH_WIPHY_ACTIVE;
1154 /* setup initial channel */
1156 sc->chan_idx = curchan->hw_value;
1158 init_channel = ath_get_curchannel(sc, hw);
1160 /* Reset SERDES registers */
1161 ath9k_hw_configpcipowersave(ah, 0, 0);
1164 * The basic interface to setting the hardware in a good
1165 * state is ``reset''. On return the hardware is known to
1166 * be powered up and with interrupts disabled. This must
1167 * be followed by initialization of the appropriate bits
1168 * and then setup of the interrupt mask.
1170 spin_lock_bh(&sc->rx.pcu_lock);
1171 spin_lock_bh(&sc->sc_resetlock);
1172 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1174 ath_print(common, ATH_DBG_FATAL,
1175 "Unable to reset hardware; reset status %d "
1176 "(freq %u MHz)\n", r,
1177 curchan->center_freq);
1178 spin_unlock_bh(&sc->sc_resetlock);
1179 spin_unlock_bh(&sc->rx.pcu_lock);
1182 spin_unlock_bh(&sc->sc_resetlock);
1185 * This is needed only to setup initial state
1186 * but it's best done after a reset.
1188 ath_update_txpow(sc);
1191 * Setup the hardware after reset:
1192 * The receive engine is set going.
1193 * Frame transmit is handled entirely
1194 * in the frame output path; there's nothing to do
1195 * here except setup the interrupt mask.
1197 if (ath_startrecv(sc) != 0) {
1198 ath_print(common, ATH_DBG_FATAL,
1199 "Unable to start recv logic\n");
1201 spin_unlock_bh(&sc->rx.pcu_lock);
1204 spin_unlock_bh(&sc->rx.pcu_lock);
1206 /* Setup our intr mask. */
1207 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1208 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1211 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1212 ah->imask |= ATH9K_INT_RXHP |
1214 ATH9K_INT_BB_WATCHDOG;
1216 ah->imask |= ATH9K_INT_RX;
1218 ah->imask |= ATH9K_INT_GTT;
1220 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1221 ah->imask |= ATH9K_INT_CST;
1223 sc->sc_flags &= ~SC_OP_INVALID;
1224 sc->sc_ah->is_monitoring = false;
1226 /* Disable BMISS interrupt when we're not associated */
1227 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1228 ath9k_hw_set_interrupts(ah, ah->imask);
1230 ieee80211_wake_queues(hw);
1232 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1234 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1235 !ah->btcoex_hw.enabled) {
1236 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1237 AR_STOMP_LOW_WLAN_WGHT);
1238 ath9k_hw_btcoex_enable(ah);
1240 if (common->bus_ops->bt_coex_prep)
1241 common->bus_ops->bt_coex_prep(common);
1242 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1243 ath9k_btcoex_timer_resume(sc);
1246 pm_qos_update_request(&sc->pm_qos_req, 55);
1249 mutex_unlock(&sc->mutex);
1254 static int ath9k_tx(struct ieee80211_hw *hw,
1255 struct sk_buff *skb)
1257 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1258 struct ath_wiphy *aphy = hw->priv;
1259 struct ath_softc *sc = aphy->sc;
1260 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1261 struct ath_tx_control txctl;
1262 int padpos, padsize;
1263 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1266 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1267 ath_print(common, ATH_DBG_XMIT,
1268 "ath9k: %s: TX in unexpected wiphy state "
1269 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1273 if (sc->ps_enabled) {
1275 * mac80211 does not set PM field for normal data frames, so we
1276 * need to update that based on the current PS mode.
1278 if (ieee80211_is_data(hdr->frame_control) &&
1279 !ieee80211_is_nullfunc(hdr->frame_control) &&
1280 !ieee80211_has_pm(hdr->frame_control)) {
1281 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1282 "while in PS mode\n");
1283 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1287 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1289 * We are using PS-Poll and mac80211 can request TX while in
1290 * power save mode. Need to wake up hardware for the TX to be
1291 * completed and if needed, also for RX of buffered frames.
1293 ath9k_ps_wakeup(sc);
1294 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1295 ath9k_hw_setrxabort(sc->sc_ah, 0);
1296 if (ieee80211_is_pspoll(hdr->frame_control)) {
1297 ath_print(common, ATH_DBG_PS,
1298 "Sending PS-Poll to pick a buffered frame\n");
1299 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1301 ath_print(common, ATH_DBG_PS,
1302 "Wake up to complete TX\n");
1303 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1306 * The actual restore operation will happen only after
1307 * the sc_flags bit is cleared. We are just dropping
1308 * the ps_usecount here.
1310 ath9k_ps_restore(sc);
1313 memset(&txctl, 0, sizeof(struct ath_tx_control));
1316 * As a temporary workaround, assign seq# here; this will likely need
1317 * to be cleaned up to work better with Beacon transmission and virtual
1320 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1321 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1322 sc->tx.seq_no += 0x10;
1323 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1324 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1327 /* Add the padding after the header if this is not already done */
1328 padpos = ath9k_cmn_padpos(hdr->frame_control);
1329 padsize = padpos & 3;
1330 if (padsize && skb->len>padpos) {
1331 if (skb_headroom(skb) < padsize)
1333 skb_push(skb, padsize);
1334 memmove(skb->data, skb->data + padsize, padpos);
1337 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1338 txctl.txq = &sc->tx.txq[qnum];
1340 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1342 if (ath_tx_start(hw, skb, &txctl) != 0) {
1343 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1349 dev_kfree_skb_any(skb);
1353 static void ath9k_stop(struct ieee80211_hw *hw)
1355 struct ath_wiphy *aphy = hw->priv;
1356 struct ath_softc *sc = aphy->sc;
1357 struct ath_hw *ah = sc->sc_ah;
1358 struct ath_common *common = ath9k_hw_common(ah);
1361 mutex_lock(&sc->mutex);
1363 aphy->state = ATH_WIPHY_INACTIVE;
1366 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1368 cancel_delayed_work_sync(&sc->tx_complete_work);
1369 cancel_work_sync(&sc->paprd_work);
1370 cancel_work_sync(&sc->hw_check_work);
1372 for (i = 0; i < sc->num_sec_wiphy; i++) {
1373 if (sc->sec_wiphy[i])
1377 if (i == sc->num_sec_wiphy) {
1378 cancel_delayed_work_sync(&sc->wiphy_work);
1379 cancel_work_sync(&sc->chan_work);
1382 if (sc->sc_flags & SC_OP_INVALID) {
1383 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1384 mutex_unlock(&sc->mutex);
1388 if (ath9k_wiphy_started(sc)) {
1389 mutex_unlock(&sc->mutex);
1390 return; /* another wiphy still in use */
1393 /* Ensure HW is awake when we try to shut it down. */
1394 ath9k_ps_wakeup(sc);
1396 if (ah->btcoex_hw.enabled) {
1397 ath9k_hw_btcoex_disable(ah);
1398 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1399 ath9k_btcoex_timer_pause(sc);
1402 /* make sure h/w will not generate any interrupt
1403 * before setting the invalid flag. */
1404 ath9k_hw_set_interrupts(ah, 0);
1406 spin_lock_bh(&sc->rx.pcu_lock);
1407 if (!(sc->sc_flags & SC_OP_INVALID)) {
1408 ath_drain_all_txq(sc, false);
1410 ath9k_hw_phy_disable(ah);
1412 sc->rx.rxlink = NULL;
1413 spin_unlock_bh(&sc->rx.pcu_lock);
1415 /* disable HAL and put h/w to sleep */
1416 ath9k_hw_disable(ah);
1417 ath9k_hw_configpcipowersave(ah, 1, 1);
1418 ath9k_ps_restore(sc);
1420 /* Finally, put the chip in FULL SLEEP mode */
1421 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1423 sc->sc_flags |= SC_OP_INVALID;
1425 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1427 mutex_unlock(&sc->mutex);
1429 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1432 static int ath9k_add_interface(struct ieee80211_hw *hw,
1433 struct ieee80211_vif *vif)
1435 struct ath_wiphy *aphy = hw->priv;
1436 struct ath_softc *sc = aphy->sc;
1437 struct ath_hw *ah = sc->sc_ah;
1438 struct ath_common *common = ath9k_hw_common(ah);
1439 struct ath_vif *avp = (void *)vif->drv_priv;
1440 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1443 mutex_lock(&sc->mutex);
1445 switch (vif->type) {
1446 case NL80211_IFTYPE_STATION:
1447 ic_opmode = NL80211_IFTYPE_STATION;
1449 case NL80211_IFTYPE_WDS:
1450 ic_opmode = NL80211_IFTYPE_WDS;
1452 case NL80211_IFTYPE_ADHOC:
1453 case NL80211_IFTYPE_AP:
1454 case NL80211_IFTYPE_MESH_POINT:
1455 if (sc->nbcnvifs >= ATH_BCBUF) {
1459 ic_opmode = vif->type;
1462 ath_print(common, ATH_DBG_FATAL,
1463 "Interface type %d not yet supported\n", vif->type);
1468 ath_print(common, ATH_DBG_CONFIG,
1469 "Attach a VIF of type: %d\n", ic_opmode);
1471 /* Set the VIF opmode */
1472 avp->av_opmode = ic_opmode;
1477 ath9k_set_bssid_mask(hw, vif);
1480 goto out; /* skip global settings for secondary vif */
1482 if (ic_opmode == NL80211_IFTYPE_AP) {
1483 ath9k_hw_set_tsfadjust(ah, 1);
1484 sc->sc_flags |= SC_OP_TSF_RESET;
1487 /* Set the device opmode */
1488 ah->opmode = ic_opmode;
1491 * Enable MIB interrupts when there are hardware phy counters.
1492 * Note we only do this (at the moment) for station mode.
1494 if ((vif->type == NL80211_IFTYPE_STATION) ||
1495 (vif->type == NL80211_IFTYPE_ADHOC) ||
1496 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1497 if (ah->config.enable_ani)
1498 ah->imask |= ATH9K_INT_MIB;
1499 ah->imask |= ATH9K_INT_TSFOOR;
1502 ath9k_hw_set_interrupts(ah, ah->imask);
1504 if (vif->type == NL80211_IFTYPE_AP ||
1505 vif->type == NL80211_IFTYPE_ADHOC) {
1506 sc->sc_flags |= SC_OP_ANI_RUN;
1507 ath_start_ani(common);
1511 mutex_unlock(&sc->mutex);
1515 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1516 struct ieee80211_vif *vif)
1518 struct ath_wiphy *aphy = hw->priv;
1519 struct ath_softc *sc = aphy->sc;
1520 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1521 struct ath_vif *avp = (void *)vif->drv_priv;
1522 bool bs_valid = false;
1525 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1527 mutex_lock(&sc->mutex);
1530 sc->sc_flags &= ~SC_OP_ANI_RUN;
1531 del_timer_sync(&common->ani.timer);
1533 /* Reclaim beacon resources */
1534 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1535 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1536 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1537 ath9k_ps_wakeup(sc);
1538 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1539 ath9k_ps_restore(sc);
1542 ath_beacon_return(sc, avp);
1543 sc->sc_flags &= ~SC_OP_BEACONS;
1545 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1546 if (sc->beacon.bslot[i] == vif) {
1547 printk(KERN_DEBUG "%s: vif had allocated beacon "
1548 "slot\n", __func__);
1549 sc->beacon.bslot[i] = NULL;
1550 sc->beacon.bslot_aphy[i] = NULL;
1551 } else if (sc->beacon.bslot[i])
1554 if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1555 /* Disable SWBA interrupt */
1556 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1557 ath9k_ps_wakeup(sc);
1558 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1559 ath9k_ps_restore(sc);
1564 mutex_unlock(&sc->mutex);
1567 static void ath9k_enable_ps(struct ath_softc *sc)
1569 struct ath_hw *ah = sc->sc_ah;
1571 sc->ps_enabled = true;
1572 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1573 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1574 ah->imask |= ATH9K_INT_TIM_TIMER;
1575 ath9k_hw_set_interrupts(ah, ah->imask);
1577 ath9k_hw_setrxabort(ah, 1);
1581 static void ath9k_disable_ps(struct ath_softc *sc)
1583 struct ath_hw *ah = sc->sc_ah;
1585 sc->ps_enabled = false;
1586 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1587 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1588 ath9k_hw_setrxabort(ah, 0);
1589 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1591 PS_WAIT_FOR_PSPOLL_DATA |
1592 PS_WAIT_FOR_TX_ACK);
1593 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1594 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1595 ath9k_hw_set_interrupts(ah, ah->imask);
1601 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1603 struct ath_wiphy *aphy = hw->priv;
1604 struct ath_softc *sc = aphy->sc;
1605 struct ath_hw *ah = sc->sc_ah;
1606 struct ath_common *common = ath9k_hw_common(ah);
1607 struct ieee80211_conf *conf = &hw->conf;
1610 mutex_lock(&sc->mutex);
1613 * Leave this as the first check because we need to turn on the
1614 * radio if it was disabled before prior to processing the rest
1615 * of the changes. Likewise we must only disable the radio towards
1618 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1620 bool all_wiphys_idle;
1621 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1623 spin_lock_bh(&sc->wiphy_lock);
1624 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1625 ath9k_set_wiphy_idle(aphy, idle);
1627 enable_radio = (!idle && all_wiphys_idle);
1630 * After we unlock here its possible another wiphy
1631 * can be re-renabled so to account for that we will
1632 * only disable the radio toward the end of this routine
1633 * if by then all wiphys are still idle.
1635 spin_unlock_bh(&sc->wiphy_lock);
1638 sc->ps_idle = false;
1639 ath_radio_enable(sc, hw);
1640 ath_print(common, ATH_DBG_CONFIG,
1641 "not-idle: enabling radio\n");
1646 * We just prepare to enable PS. We have to wait until our AP has
1647 * ACK'd our null data frame to disable RX otherwise we'll ignore
1648 * those ACKs and end up retransmitting the same null data frames.
1649 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1651 if (changed & IEEE80211_CONF_CHANGE_PS) {
1652 unsigned long flags;
1653 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1654 if (conf->flags & IEEE80211_CONF_PS)
1655 ath9k_enable_ps(sc);
1657 ath9k_disable_ps(sc);
1658 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1661 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1662 if (conf->flags & IEEE80211_CONF_MONITOR) {
1663 ath_print(common, ATH_DBG_CONFIG,
1664 "Monitor mode is enabled\n");
1665 sc->sc_ah->is_monitoring = true;
1667 ath_print(common, ATH_DBG_CONFIG,
1668 "Monitor mode is disabled\n");
1669 sc->sc_ah->is_monitoring = false;
1673 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1674 struct ieee80211_channel *curchan = hw->conf.channel;
1675 int pos = curchan->hw_value;
1677 unsigned long flags;
1680 old_pos = ah->curchan - &ah->channels[0];
1682 aphy->chan_idx = pos;
1683 aphy->chan_is_ht = conf_is_ht(conf);
1684 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1685 sc->sc_flags |= SC_OP_OFFCHANNEL;
1687 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1689 if (aphy->state == ATH_WIPHY_SCAN ||
1690 aphy->state == ATH_WIPHY_ACTIVE)
1691 ath9k_wiphy_pause_all_forced(sc, aphy);
1694 * Do not change operational channel based on a paused
1697 goto skip_chan_change;
1700 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1701 curchan->center_freq);
1703 /* XXX: remove me eventualy */
1704 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1706 ath_update_chainmask(sc, conf_is_ht(conf));
1708 /* update survey stats for the old channel before switching */
1709 spin_lock_irqsave(&common->cc_lock, flags);
1710 ath_update_survey_stats(sc);
1711 spin_unlock_irqrestore(&common->cc_lock, flags);
1714 * If the operating channel changes, change the survey in-use flags
1716 * Reset the survey data for the new channel, unless we're switching
1717 * back to the operating channel from an off-channel operation.
1719 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1720 sc->cur_survey != &sc->survey[pos]) {
1723 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1725 sc->cur_survey = &sc->survey[pos];
1727 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1728 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1729 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1730 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1733 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1734 ath_print(common, ATH_DBG_FATAL,
1735 "Unable to set channel\n");
1736 mutex_unlock(&sc->mutex);
1741 * The most recent snapshot of channel->noisefloor for the old
1742 * channel is only available after the hardware reset. Copy it to
1743 * the survey stats now.
1746 ath_update_survey_nf(sc, old_pos);
1750 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1751 sc->config.txpowlimit = 2 * conf->power_level;
1752 ath_update_txpow(sc);
1755 spin_lock_bh(&sc->wiphy_lock);
1756 disable_radio = ath9k_all_wiphys_idle(sc);
1757 spin_unlock_bh(&sc->wiphy_lock);
1759 if (disable_radio) {
1760 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1762 ath_radio_disable(sc, hw);
1765 mutex_unlock(&sc->mutex);
1770 #define SUPPORTED_FILTERS \
1771 (FIF_PROMISC_IN_BSS | \
1776 FIF_BCN_PRBRESP_PROMISC | \
1780 /* FIXME: sc->sc_full_reset ? */
1781 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1782 unsigned int changed_flags,
1783 unsigned int *total_flags,
1786 struct ath_wiphy *aphy = hw->priv;
1787 struct ath_softc *sc = aphy->sc;
1790 changed_flags &= SUPPORTED_FILTERS;
1791 *total_flags &= SUPPORTED_FILTERS;
1793 sc->rx.rxfilter = *total_flags;
1794 ath9k_ps_wakeup(sc);
1795 rfilt = ath_calcrxfilter(sc);
1796 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1797 ath9k_ps_restore(sc);
1799 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1800 "Set HW RX filter: 0x%x\n", rfilt);
1803 static int ath9k_sta_add(struct ieee80211_hw *hw,
1804 struct ieee80211_vif *vif,
1805 struct ieee80211_sta *sta)
1807 struct ath_wiphy *aphy = hw->priv;
1808 struct ath_softc *sc = aphy->sc;
1810 ath_node_attach(sc, sta);
1815 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1816 struct ieee80211_vif *vif,
1817 struct ieee80211_sta *sta)
1819 struct ath_wiphy *aphy = hw->priv;
1820 struct ath_softc *sc = aphy->sc;
1822 ath_node_detach(sc, sta);
1827 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1828 const struct ieee80211_tx_queue_params *params)
1830 struct ath_wiphy *aphy = hw->priv;
1831 struct ath_softc *sc = aphy->sc;
1832 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1833 struct ath9k_tx_queue_info qi;
1836 if (queue >= WME_NUM_AC)
1839 mutex_lock(&sc->mutex);
1841 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1843 qi.tqi_aifs = params->aifs;
1844 qi.tqi_cwmin = params->cw_min;
1845 qi.tqi_cwmax = params->cw_max;
1846 qi.tqi_burstTime = params->txop;
1847 qnum = ath_get_hal_qnum(queue, sc);
1849 ath_print(common, ATH_DBG_CONFIG,
1850 "Configure tx [queue/halq] [%d/%d], "
1851 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1852 queue, qnum, params->aifs, params->cw_min,
1853 params->cw_max, params->txop);
1855 ret = ath_txq_update(sc, qnum, &qi);
1857 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1859 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1860 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1861 ath_beaconq_config(sc);
1863 mutex_unlock(&sc->mutex);
1868 static int ath9k_set_key(struct ieee80211_hw *hw,
1869 enum set_key_cmd cmd,
1870 struct ieee80211_vif *vif,
1871 struct ieee80211_sta *sta,
1872 struct ieee80211_key_conf *key)
1874 struct ath_wiphy *aphy = hw->priv;
1875 struct ath_softc *sc = aphy->sc;
1876 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1879 if (modparam_nohwcrypt)
1882 mutex_lock(&sc->mutex);
1883 ath9k_ps_wakeup(sc);
1884 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1888 ret = ath_key_config(common, vif, sta, key);
1890 key->hw_key_idx = ret;
1891 /* push IV and Michael MIC generation to stack */
1892 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1893 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1894 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1895 if (sc->sc_ah->sw_mgmt_crypto &&
1896 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1897 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1902 ath_key_delete(common, key);
1908 ath9k_ps_restore(sc);
1909 mutex_unlock(&sc->mutex);
1914 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1915 struct ieee80211_vif *vif,
1916 struct ieee80211_bss_conf *bss_conf,
1919 struct ath_wiphy *aphy = hw->priv;
1920 struct ath_softc *sc = aphy->sc;
1921 struct ath_hw *ah = sc->sc_ah;
1922 struct ath_common *common = ath9k_hw_common(ah);
1923 struct ath_vif *avp = (void *)vif->drv_priv;
1927 mutex_lock(&sc->mutex);
1929 if (changed & BSS_CHANGED_BSSID) {
1931 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1932 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1934 ath9k_hw_write_associd(ah);
1936 /* Set aggregation protection mode parameters */
1937 sc->config.ath_aggr_prot = 0;
1939 /* Only legacy IBSS for now */
1940 if (vif->type == NL80211_IFTYPE_ADHOC)
1941 ath_update_chainmask(sc, 0);
1943 ath_print(common, ATH_DBG_CONFIG,
1944 "BSSID: %pM aid: 0x%x\n",
1945 common->curbssid, common->curaid);
1947 /* need to reconfigure the beacon */
1948 sc->sc_flags &= ~SC_OP_BEACONS ;
1951 /* Enable transmission of beacons (AP, IBSS, MESH) */
1952 if ((changed & BSS_CHANGED_BEACON) ||
1953 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1954 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1955 error = ath_beacon_alloc(aphy, vif);
1957 ath_beacon_config(sc, vif);
1960 if (changed & BSS_CHANGED_ERP_SLOT) {
1961 if (bss_conf->use_short_slot)
1965 if (vif->type == NL80211_IFTYPE_AP) {
1967 * Defer update, so that connected stations can adjust
1968 * their settings at the same time.
1969 * See beacon.c for more details
1971 sc->beacon.slottime = slottime;
1972 sc->beacon.updateslot = UPDATE;
1974 ah->slottime = slottime;
1975 ath9k_hw_init_global_settings(ah);
1979 /* Disable transmission of beacons */
1980 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1981 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1983 if (changed & BSS_CHANGED_BEACON_INT) {
1984 sc->beacon_interval = bss_conf->beacon_int;
1986 * In case of AP mode, the HW TSF has to be reset
1987 * when the beacon interval changes.
1989 if (vif->type == NL80211_IFTYPE_AP) {
1990 sc->sc_flags |= SC_OP_TSF_RESET;
1991 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1992 error = ath_beacon_alloc(aphy, vif);
1994 ath_beacon_config(sc, vif);
1996 ath_beacon_config(sc, vif);
2000 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2001 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2002 bss_conf->use_short_preamble);
2003 if (bss_conf->use_short_preamble)
2004 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2006 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2009 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2010 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2011 bss_conf->use_cts_prot);
2012 if (bss_conf->use_cts_prot &&
2013 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2014 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2016 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2019 if (changed & BSS_CHANGED_ASSOC) {
2020 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2022 ath9k_bss_assoc_info(sc, vif, bss_conf);
2025 mutex_unlock(&sc->mutex);
2028 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2031 struct ath_wiphy *aphy = hw->priv;
2032 struct ath_softc *sc = aphy->sc;
2034 mutex_lock(&sc->mutex);
2035 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2036 mutex_unlock(&sc->mutex);
2041 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2043 struct ath_wiphy *aphy = hw->priv;
2044 struct ath_softc *sc = aphy->sc;
2046 mutex_lock(&sc->mutex);
2047 ath9k_hw_settsf64(sc->sc_ah, tsf);
2048 mutex_unlock(&sc->mutex);
2051 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2053 struct ath_wiphy *aphy = hw->priv;
2054 struct ath_softc *sc = aphy->sc;
2056 mutex_lock(&sc->mutex);
2058 ath9k_ps_wakeup(sc);
2059 ath9k_hw_reset_tsf(sc->sc_ah);
2060 ath9k_ps_restore(sc);
2062 mutex_unlock(&sc->mutex);
2065 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2066 struct ieee80211_vif *vif,
2067 enum ieee80211_ampdu_mlme_action action,
2068 struct ieee80211_sta *sta,
2071 struct ath_wiphy *aphy = hw->priv;
2072 struct ath_softc *sc = aphy->sc;
2078 case IEEE80211_AMPDU_RX_START:
2079 if (!(sc->sc_flags & SC_OP_RXAGGR))
2082 case IEEE80211_AMPDU_RX_STOP:
2084 case IEEE80211_AMPDU_TX_START:
2085 ath9k_ps_wakeup(sc);
2086 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2088 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2089 ath9k_ps_restore(sc);
2091 case IEEE80211_AMPDU_TX_STOP:
2092 ath9k_ps_wakeup(sc);
2093 ath_tx_aggr_stop(sc, sta, tid);
2094 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2095 ath9k_ps_restore(sc);
2097 case IEEE80211_AMPDU_TX_OPERATIONAL:
2098 ath9k_ps_wakeup(sc);
2099 ath_tx_aggr_resume(sc, sta, tid);
2100 ath9k_ps_restore(sc);
2103 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2104 "Unknown AMPDU action\n");
2112 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2113 struct survey_info *survey)
2115 struct ath_wiphy *aphy = hw->priv;
2116 struct ath_softc *sc = aphy->sc;
2117 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2118 struct ieee80211_supported_band *sband;
2119 struct ieee80211_channel *chan;
2120 unsigned long flags;
2123 spin_lock_irqsave(&common->cc_lock, flags);
2125 ath_update_survey_stats(sc);
2127 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2128 if (sband && idx >= sband->n_channels) {
2129 idx -= sband->n_channels;
2134 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2136 if (!sband || idx >= sband->n_channels) {
2137 spin_unlock_irqrestore(&common->cc_lock, flags);
2141 chan = &sband->channels[idx];
2142 pos = chan->hw_value;
2143 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2144 survey->channel = chan;
2145 spin_unlock_irqrestore(&common->cc_lock, flags);
2150 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2152 struct ath_wiphy *aphy = hw->priv;
2153 struct ath_softc *sc = aphy->sc;
2155 mutex_lock(&sc->mutex);
2156 if (ath9k_wiphy_scanning(sc)) {
2158 * There is a race here in mac80211 but fixing it requires
2159 * we revisit how we handle the scan complete callback.
2160 * After mac80211 fixes we will not have configured hardware
2161 * to the home channel nor would we have configured the RX
2164 mutex_unlock(&sc->mutex);
2168 aphy->state = ATH_WIPHY_SCAN;
2169 ath9k_wiphy_pause_all_forced(sc, aphy);
2170 mutex_unlock(&sc->mutex);
2174 * XXX: this requires a revisit after the driver
2175 * scan_complete gets moved to another place/removed in mac80211.
2177 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2179 struct ath_wiphy *aphy = hw->priv;
2180 struct ath_softc *sc = aphy->sc;
2182 mutex_lock(&sc->mutex);
2183 aphy->state = ATH_WIPHY_ACTIVE;
2184 mutex_unlock(&sc->mutex);
2187 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2189 struct ath_wiphy *aphy = hw->priv;
2190 struct ath_softc *sc = aphy->sc;
2191 struct ath_hw *ah = sc->sc_ah;
2193 mutex_lock(&sc->mutex);
2194 ah->coverage_class = coverage_class;
2195 ath9k_hw_init_global_settings(ah);
2196 mutex_unlock(&sc->mutex);
2199 struct ieee80211_ops ath9k_ops = {
2201 .start = ath9k_start,
2203 .add_interface = ath9k_add_interface,
2204 .remove_interface = ath9k_remove_interface,
2205 .config = ath9k_config,
2206 .configure_filter = ath9k_configure_filter,
2207 .sta_add = ath9k_sta_add,
2208 .sta_remove = ath9k_sta_remove,
2209 .conf_tx = ath9k_conf_tx,
2210 .bss_info_changed = ath9k_bss_info_changed,
2211 .set_key = ath9k_set_key,
2212 .get_tsf = ath9k_get_tsf,
2213 .set_tsf = ath9k_set_tsf,
2214 .reset_tsf = ath9k_reset_tsf,
2215 .ampdu_action = ath9k_ampdu_action,
2216 .get_survey = ath9k_get_survey,
2217 .sw_scan_start = ath9k_sw_scan_start,
2218 .sw_scan_complete = ath9k_sw_scan_complete,
2219 .rfkill_poll = ath9k_rfkill_poll_state,
2220 .set_coverage_class = ath9k_set_coverage_class,