2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
157 static void ath_start_ani(struct ath_common *common)
159 struct ath_hw *ah = common->ah;
160 unsigned long timestamp = jiffies_to_msecs(jiffies);
161 struct ath_softc *sc = (struct ath_softc *) common->priv;
163 if (!(sc->sc_flags & SC_OP_ANI_RUN))
166 if (sc->sc_flags & SC_OP_OFFCHANNEL)
169 common->ani.longcal_timer = timestamp;
170 common->ani.shortcal_timer = timestamp;
171 common->ani.checkani_timer = timestamp;
173 mod_timer(&common->ani.timer,
175 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
179 * Set/change channels. If the channel is really being changed, it's done
180 * by reseting the chip. To accomplish this we must first cleanup any pending
181 * DMA, then restart stuff.
183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
184 struct ath9k_channel *hchan)
186 struct ath_wiphy *aphy = hw->priv;
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 bool fastcc = true, stopped;
191 struct ieee80211_channel *channel = hw->conf.channel;
192 struct ath9k_hw_cal_data *caldata = NULL;
195 if (sc->sc_flags & SC_OP_INVALID)
198 del_timer_sync(&common->ani.timer);
199 cancel_work_sync(&sc->paprd_work);
200 cancel_work_sync(&sc->hw_check_work);
201 cancel_delayed_work_sync(&sc->tx_complete_work);
206 * This is only performed if the channel settings have
209 * To switch channels clear any pending DMA operations;
210 * wait long enough for the RX fifo to drain, reset the
211 * hardware at the new frequency, and then re-enable
212 * the relevant bits of the h/w.
214 ath9k_hw_set_interrupts(ah, 0);
215 ath_drain_all_txq(sc, false);
216 stopped = ath_stoprecv(sc);
218 /* XXX: do not flush receive queue here. We don't want
219 * to flush data frames already in queue because of
220 * changing channel. */
222 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
225 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
226 caldata = &aphy->caldata;
228 ath_print(common, ATH_DBG_CONFIG,
229 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
230 sc->sc_ah->curchan->channel,
231 channel->center_freq, conf_is_ht40(conf),
234 spin_lock_bh(&sc->sc_resetlock);
236 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
238 ath_print(common, ATH_DBG_FATAL,
239 "Unable to reset channel (%u MHz), "
241 channel->center_freq, r);
242 spin_unlock_bh(&sc->sc_resetlock);
245 spin_unlock_bh(&sc->sc_resetlock);
247 if (ath_startrecv(sc) != 0) {
248 ath_print(common, ATH_DBG_FATAL,
249 "Unable to restart recv logic\n");
254 ath_cache_conf_rate(sc, &hw->conf);
255 ath_update_txpow(sc);
256 ath9k_hw_set_interrupts(ah, ah->imask);
258 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
259 ath_start_ani(common);
260 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
261 ath_beacon_config(sc, NULL);
265 ath9k_ps_restore(sc);
269 static void ath_paprd_activate(struct ath_softc *sc)
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath9k_hw_cal_data *caldata = ah->caldata;
275 if (!caldata || !caldata->paprd_done)
279 ar9003_paprd_enable(ah, false);
280 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
281 if (!(ah->caps.tx_chainmask & BIT(chain)))
284 ar9003_paprd_populate_single_table(ah, caldata, chain);
287 ar9003_paprd_enable(ah, true);
288 ath9k_ps_restore(sc);
291 void ath_paprd_calibrate(struct work_struct *work)
293 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
294 struct ieee80211_hw *hw = sc->hw;
295 struct ath_hw *ah = sc->sc_ah;
296 struct ieee80211_hdr *hdr;
297 struct sk_buff *skb = NULL;
298 struct ieee80211_tx_info *tx_info;
299 int band = hw->conf.channel->band;
300 struct ieee80211_supported_band *sband = &sc->sbands[band];
301 struct ath_tx_control txctl;
302 struct ath9k_hw_cal_data *caldata = ah->caldata;
313 skb = alloc_skb(len, GFP_KERNEL);
317 tx_info = IEEE80211_SKB_CB(skb);
320 memset(skb->data, 0, len);
321 hdr = (struct ieee80211_hdr *)skb->data;
322 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
323 hdr->frame_control = cpu_to_le16(ftype);
324 hdr->duration_id = cpu_to_le16(10);
325 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
326 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
327 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
329 memset(&txctl, 0, sizeof(txctl));
330 qnum = sc->tx.hwq_map[WME_AC_BE];
331 txctl.txq = &sc->tx.txq[qnum];
334 ar9003_paprd_init_table(ah);
335 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
336 if (!(ah->caps.tx_chainmask & BIT(chain)))
340 memset(tx_info, 0, sizeof(*tx_info));
341 tx_info->band = band;
343 for (i = 0; i < 4; i++) {
344 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
345 tx_info->control.rates[i].count = 6;
348 init_completion(&sc->paprd_complete);
349 ar9003_paprd_setup_gain_table(ah, chain);
350 txctl.paprd = BIT(chain);
351 if (ath_tx_start(hw, skb, &txctl) != 0)
354 time_left = wait_for_completion_timeout(&sc->paprd_complete,
355 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
357 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
358 "Timeout waiting for paprd training on "
364 if (!ar9003_paprd_is_done(ah))
367 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
375 caldata->paprd_done = true;
376 ath_paprd_activate(sc);
380 ath9k_ps_restore(sc);
384 * This routine performs the periodic noise floor calibration function
385 * that is used to adjust and optimize the chip performance. This
386 * takes environmental changes (location, temperature) into account.
387 * When the task is complete, it reschedules itself depending on the
388 * appropriate interval that was calculated.
390 void ath_ani_calibrate(unsigned long data)
392 struct ath_softc *sc = (struct ath_softc *)data;
393 struct ath_hw *ah = sc->sc_ah;
394 struct ath_common *common = ath9k_hw_common(ah);
395 bool longcal = false;
396 bool shortcal = false;
397 bool aniflag = false;
398 unsigned int timestamp = jiffies_to_msecs(jiffies);
399 u32 cal_interval, short_cal_interval, long_cal_interval;
401 if (ah->caldata && ah->caldata->nfcal_interference)
402 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
404 long_cal_interval = ATH_LONG_CALINTERVAL;
406 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
407 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
409 /* Only calibrate if awake */
410 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
415 /* Long calibration runs independently of short calibration. */
416 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
418 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
419 common->ani.longcal_timer = timestamp;
422 /* Short calibration applies only while caldone is false */
423 if (!common->ani.caldone) {
424 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
426 ath_print(common, ATH_DBG_ANI,
427 "shortcal @%lu\n", jiffies);
428 common->ani.shortcal_timer = timestamp;
429 common->ani.resetcal_timer = timestamp;
432 if ((timestamp - common->ani.resetcal_timer) >=
433 ATH_RESTART_CALINTERVAL) {
434 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
435 if (common->ani.caldone)
436 common->ani.resetcal_timer = timestamp;
440 /* Verify whether we must check ANI */
441 if ((timestamp - common->ani.checkani_timer) >=
442 ah->config.ani_poll_interval) {
444 common->ani.checkani_timer = timestamp;
447 /* Skip all processing if there's nothing to do. */
448 if (longcal || shortcal || aniflag) {
449 /* Call ANI routine if necessary */
451 ath9k_hw_ani_monitor(ah, ah->curchan);
453 /* Perform calibration if necessary */
454 if (longcal || shortcal) {
455 common->ani.caldone =
456 ath9k_hw_calibrate(ah,
458 common->rx_chainmask,
462 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
465 ath_print(common, ATH_DBG_ANI,
466 " calibrate chan %u/%x nf: %d\n",
467 ah->curchan->channel,
468 ah->curchan->channelFlags,
469 common->ani.noise_floor);
473 ath9k_ps_restore(sc);
477 * Set timer interval based on previous results.
478 * The interval must be the shortest necessary to satisfy ANI,
479 * short calibration and long calibration.
481 cal_interval = ATH_LONG_CALINTERVAL;
482 if (sc->sc_ah->config.enable_ani)
483 cal_interval = min(cal_interval,
484 (u32)ah->config.ani_poll_interval);
485 if (!common->ani.caldone)
486 cal_interval = min(cal_interval, (u32)short_cal_interval);
488 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
489 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
490 if (!ah->caldata->paprd_done)
491 ieee80211_queue_work(sc->hw, &sc->paprd_work);
493 ath_paprd_activate(sc);
498 * Update tx/rx chainmask. For legacy association,
499 * hard code chainmask to 1x1, for 11n association, use
500 * the chainmask configuration, for bt coexistence, use
501 * the chainmask configuration even in legacy mode.
503 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
505 struct ath_hw *ah = sc->sc_ah;
506 struct ath_common *common = ath9k_hw_common(ah);
508 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
509 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
510 common->tx_chainmask = ah->caps.tx_chainmask;
511 common->rx_chainmask = ah->caps.rx_chainmask;
513 common->tx_chainmask = 1;
514 common->rx_chainmask = 1;
517 ath_print(common, ATH_DBG_CONFIG,
518 "tx chmask: %d, rx chmask: %d\n",
519 common->tx_chainmask,
520 common->rx_chainmask);
523 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
527 an = (struct ath_node *)sta->drv_priv;
529 if (sc->sc_flags & SC_OP_TXAGGR) {
530 ath_tx_node_init(sc, an);
531 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
532 sta->ht_cap.ampdu_factor);
533 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
534 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
538 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
540 struct ath_node *an = (struct ath_node *)sta->drv_priv;
542 if (sc->sc_flags & SC_OP_TXAGGR)
543 ath_tx_node_cleanup(sc, an);
546 void ath_hw_check(struct work_struct *work)
548 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
553 for (i = 0; i < 3; i++) {
554 if (ath9k_hw_check_alive(sc->sc_ah))
559 ath_reset(sc, false);
562 ath9k_ps_restore(sc);
565 void ath9k_tasklet(unsigned long data)
567 struct ath_softc *sc = (struct ath_softc *)data;
568 struct ath_hw *ah = sc->sc_ah;
569 struct ath_common *common = ath9k_hw_common(ah);
571 u32 status = sc->intrstatus;
576 if (status & ATH9K_INT_FATAL) {
577 ath_reset(sc, false);
578 ath9k_ps_restore(sc);
582 if (!ath9k_hw_check_alive(ah))
583 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
585 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
586 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
589 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
591 if (status & rxmask) {
592 spin_lock_bh(&sc->rx.rxflushlock);
594 /* Check for high priority Rx first */
595 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
596 (status & ATH9K_INT_RXHP))
597 ath_rx_tasklet(sc, 0, true);
599 ath_rx_tasklet(sc, 0, false);
600 spin_unlock_bh(&sc->rx.rxflushlock);
603 if (status & ATH9K_INT_TX) {
604 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
605 ath_tx_edma_tasklet(sc);
610 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
612 * TSF sync does not look correct; remain awake to sync with
615 ath_print(common, ATH_DBG_PS,
616 "TSFOOR - Sync with next Beacon\n");
617 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
620 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
621 if (status & ATH9K_INT_GENTIMER)
622 ath_gen_timer_isr(sc->sc_ah);
624 /* re-enable hardware interrupt */
625 ath9k_hw_set_interrupts(ah, ah->imask);
626 ath9k_ps_restore(sc);
629 irqreturn_t ath_isr(int irq, void *dev)
631 #define SCHED_INTR ( \
644 struct ath_softc *sc = dev;
645 struct ath_hw *ah = sc->sc_ah;
646 enum ath9k_int status;
650 * The hardware is not ready/present, don't
651 * touch anything. Note this can happen early
652 * on if the IRQ is shared.
654 if (sc->sc_flags & SC_OP_INVALID)
658 /* shared irq, not for us */
660 if (!ath9k_hw_intrpend(ah))
664 * Figure out the reason(s) for the interrupt. Note
665 * that the hal returns a pseudo-ISR that may include
666 * bits we haven't explicitly enabled so we mask the
667 * value to insure we only process bits we requested.
669 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
670 status &= ah->imask; /* discard unasked-for bits */
673 * If there are no status bits set, then this interrupt was not
674 * for me (should have been caught above).
679 /* Cache the status */
680 sc->intrstatus = status;
682 if (status & SCHED_INTR)
686 * If a FATAL or RXORN interrupt is received, we have to reset the
689 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
690 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
693 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
694 (status & ATH9K_INT_BB_WATCHDOG)) {
695 ar9003_hw_bb_watchdog_dbg_info(ah);
699 if (status & ATH9K_INT_SWBA)
700 tasklet_schedule(&sc->bcon_tasklet);
702 if (status & ATH9K_INT_TXURN)
703 ath9k_hw_updatetxtriglevel(ah, true);
705 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
706 if (status & ATH9K_INT_RXEOL) {
707 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
708 ath9k_hw_set_interrupts(ah, ah->imask);
712 if (status & ATH9K_INT_MIB) {
714 * Disable interrupts until we service the MIB
715 * interrupt; otherwise it will continue to
718 ath9k_hw_set_interrupts(ah, 0);
720 * Let the hal handle the event. We assume
721 * it will clear whatever condition caused
724 ath9k_hw_procmibevent(ah);
725 ath9k_hw_set_interrupts(ah, ah->imask);
728 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
729 if (status & ATH9K_INT_TIM_TIMER) {
730 /* Clear RxAbort bit so that we can
732 ath9k_setpower(sc, ATH9K_PM_AWAKE);
733 ath9k_hw_setrxabort(sc->sc_ah, 0);
734 sc->ps_flags |= PS_WAIT_FOR_BEACON;
739 ath_debug_stat_interrupt(sc, status);
742 /* turn off every interrupt except SWBA */
743 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
744 tasklet_schedule(&sc->intr_tq);
752 static u32 ath_get_extchanmode(struct ath_softc *sc,
753 struct ieee80211_channel *chan,
754 enum nl80211_channel_type channel_type)
758 switch (chan->band) {
759 case IEEE80211_BAND_2GHZ:
760 switch(channel_type) {
761 case NL80211_CHAN_NO_HT:
762 case NL80211_CHAN_HT20:
763 chanmode = CHANNEL_G_HT20;
765 case NL80211_CHAN_HT40PLUS:
766 chanmode = CHANNEL_G_HT40PLUS;
768 case NL80211_CHAN_HT40MINUS:
769 chanmode = CHANNEL_G_HT40MINUS;
773 case IEEE80211_BAND_5GHZ:
774 switch(channel_type) {
775 case NL80211_CHAN_NO_HT:
776 case NL80211_CHAN_HT20:
777 chanmode = CHANNEL_A_HT20;
779 case NL80211_CHAN_HT40PLUS:
780 chanmode = CHANNEL_A_HT40PLUS;
782 case NL80211_CHAN_HT40MINUS:
783 chanmode = CHANNEL_A_HT40MINUS;
794 static void ath9k_bss_assoc_info(struct ath_softc *sc,
795 struct ieee80211_vif *vif,
796 struct ieee80211_bss_conf *bss_conf)
798 struct ath_hw *ah = sc->sc_ah;
799 struct ath_common *common = ath9k_hw_common(ah);
801 if (bss_conf->assoc) {
802 ath_print(common, ATH_DBG_CONFIG,
803 "Bss Info ASSOC %d, bssid: %pM\n",
804 bss_conf->aid, common->curbssid);
806 /* New association, store aid */
807 common->curaid = bss_conf->aid;
808 ath9k_hw_write_associd(ah);
811 * Request a re-configuration of Beacon related timers
812 * on the receipt of the first Beacon frame (i.e.,
813 * after time sync with the AP).
815 sc->ps_flags |= PS_BEACON_SYNC;
817 /* Configure the beacon */
818 ath_beacon_config(sc, vif);
820 /* Reset rssi stats */
821 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
823 sc->sc_flags |= SC_OP_ANI_RUN;
824 ath_start_ani(common);
826 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
829 sc->sc_flags &= ~SC_OP_ANI_RUN;
830 del_timer_sync(&common->ani.timer);
834 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
836 struct ath_hw *ah = sc->sc_ah;
837 struct ath_common *common = ath9k_hw_common(ah);
838 struct ieee80211_channel *channel = hw->conf.channel;
842 ath9k_hw_configpcipowersave(ah, 0, 0);
845 ah->curchan = ath_get_curchannel(sc, sc->hw);
847 spin_lock_bh(&sc->sc_resetlock);
848 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
850 ath_print(common, ATH_DBG_FATAL,
851 "Unable to reset channel (%u MHz), "
853 channel->center_freq, r);
855 spin_unlock_bh(&sc->sc_resetlock);
857 ath_update_txpow(sc);
858 if (ath_startrecv(sc) != 0) {
859 ath_print(common, ATH_DBG_FATAL,
860 "Unable to restart recv logic\n");
864 if (sc->sc_flags & SC_OP_BEACONS)
865 ath_beacon_config(sc, NULL); /* restart beacons */
867 /* Re-Enable interrupts */
868 ath9k_hw_set_interrupts(ah, ah->imask);
871 ath9k_hw_cfg_output(ah, ah->led_pin,
872 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
873 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
875 ieee80211_wake_queues(hw);
876 ath9k_ps_restore(sc);
879 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
881 struct ath_hw *ah = sc->sc_ah;
882 struct ieee80211_channel *channel = hw->conf.channel;
886 ieee80211_stop_queues(hw);
889 * Keep the LED on when the radio is disabled
890 * during idle unassociated state.
893 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
894 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
897 /* Disable interrupts */
898 ath9k_hw_set_interrupts(ah, 0);
900 ath_drain_all_txq(sc, false); /* clear pending tx frames */
901 ath_stoprecv(sc); /* turn off frame recv */
902 ath_flushrecv(sc); /* flush recv queue */
905 ah->curchan = ath_get_curchannel(sc, hw);
907 spin_lock_bh(&sc->sc_resetlock);
908 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
910 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
911 "Unable to reset channel (%u MHz), "
913 channel->center_freq, r);
915 spin_unlock_bh(&sc->sc_resetlock);
917 ath9k_hw_phy_disable(ah);
918 ath9k_hw_configpcipowersave(ah, 1, 1);
919 ath9k_ps_restore(sc);
920 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
923 int ath_reset(struct ath_softc *sc, bool retry_tx)
925 struct ath_hw *ah = sc->sc_ah;
926 struct ath_common *common = ath9k_hw_common(ah);
927 struct ieee80211_hw *hw = sc->hw;
931 del_timer_sync(&common->ani.timer);
933 ieee80211_stop_queues(hw);
935 ath9k_hw_set_interrupts(ah, 0);
936 ath_drain_all_txq(sc, retry_tx);
940 spin_lock_bh(&sc->sc_resetlock);
941 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
943 ath_print(common, ATH_DBG_FATAL,
944 "Unable to reset hardware; reset status %d\n", r);
945 spin_unlock_bh(&sc->sc_resetlock);
947 if (ath_startrecv(sc) != 0)
948 ath_print(common, ATH_DBG_FATAL,
949 "Unable to start recv logic\n");
952 * We may be doing a reset in response to a request
953 * that changes the channel so update any state that
954 * might change as a result.
956 ath_cache_conf_rate(sc, &hw->conf);
958 ath_update_txpow(sc);
960 if (sc->sc_flags & SC_OP_BEACONS)
961 ath_beacon_config(sc, NULL); /* restart beacons */
963 ath9k_hw_set_interrupts(ah, ah->imask);
967 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
968 if (ATH_TXQ_SETUP(sc, i)) {
969 spin_lock_bh(&sc->tx.txq[i].axq_lock);
970 ath_txq_schedule(sc, &sc->tx.txq[i]);
971 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
976 ieee80211_wake_queues(hw);
979 ath_start_ani(common);
984 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
990 qnum = sc->tx.hwq_map[WME_AC_VO];
993 qnum = sc->tx.hwq_map[WME_AC_VI];
996 qnum = sc->tx.hwq_map[WME_AC_BE];
999 qnum = sc->tx.hwq_map[WME_AC_BK];
1002 qnum = sc->tx.hwq_map[WME_AC_BE];
1009 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1034 /* XXX: Remove me once we don't depend on ath9k_channel for all
1035 * this redundant data */
1036 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1037 struct ath9k_channel *ichan)
1039 struct ieee80211_channel *chan = hw->conf.channel;
1040 struct ieee80211_conf *conf = &hw->conf;
1042 ichan->channel = chan->center_freq;
1045 if (chan->band == IEEE80211_BAND_2GHZ) {
1046 ichan->chanmode = CHANNEL_G;
1047 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1049 ichan->chanmode = CHANNEL_A;
1050 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1053 if (conf_is_ht(conf))
1054 ichan->chanmode = ath_get_extchanmode(sc, chan,
1055 conf->channel_type);
1058 /**********************/
1059 /* mac80211 callbacks */
1060 /**********************/
1062 static int ath9k_start(struct ieee80211_hw *hw)
1064 struct ath_wiphy *aphy = hw->priv;
1065 struct ath_softc *sc = aphy->sc;
1066 struct ath_hw *ah = sc->sc_ah;
1067 struct ath_common *common = ath9k_hw_common(ah);
1068 struct ieee80211_channel *curchan = hw->conf.channel;
1069 struct ath9k_channel *init_channel;
1072 ath_print(common, ATH_DBG_CONFIG,
1073 "Starting driver with initial channel: %d MHz\n",
1074 curchan->center_freq);
1076 mutex_lock(&sc->mutex);
1078 if (ath9k_wiphy_started(sc)) {
1079 if (sc->chan_idx == curchan->hw_value) {
1081 * Already on the operational channel, the new wiphy
1082 * can be marked active.
1084 aphy->state = ATH_WIPHY_ACTIVE;
1085 ieee80211_wake_queues(hw);
1088 * Another wiphy is on another channel, start the new
1089 * wiphy in paused state.
1091 aphy->state = ATH_WIPHY_PAUSED;
1092 ieee80211_stop_queues(hw);
1094 mutex_unlock(&sc->mutex);
1097 aphy->state = ATH_WIPHY_ACTIVE;
1099 /* setup initial channel */
1101 sc->chan_idx = curchan->hw_value;
1103 init_channel = ath_get_curchannel(sc, hw);
1105 /* Reset SERDES registers */
1106 ath9k_hw_configpcipowersave(ah, 0, 0);
1109 * The basic interface to setting the hardware in a good
1110 * state is ``reset''. On return the hardware is known to
1111 * be powered up and with interrupts disabled. This must
1112 * be followed by initialization of the appropriate bits
1113 * and then setup of the interrupt mask.
1115 spin_lock_bh(&sc->sc_resetlock);
1116 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1118 ath_print(common, ATH_DBG_FATAL,
1119 "Unable to reset hardware; reset status %d "
1120 "(freq %u MHz)\n", r,
1121 curchan->center_freq);
1122 spin_unlock_bh(&sc->sc_resetlock);
1125 spin_unlock_bh(&sc->sc_resetlock);
1128 * This is needed only to setup initial state
1129 * but it's best done after a reset.
1131 ath_update_txpow(sc);
1134 * Setup the hardware after reset:
1135 * The receive engine is set going.
1136 * Frame transmit is handled entirely
1137 * in the frame output path; there's nothing to do
1138 * here except setup the interrupt mask.
1140 if (ath_startrecv(sc) != 0) {
1141 ath_print(common, ATH_DBG_FATAL,
1142 "Unable to start recv logic\n");
1147 /* Setup our intr mask. */
1148 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1149 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1152 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1153 ah->imask |= ATH9K_INT_RXHP |
1155 ATH9K_INT_BB_WATCHDOG;
1157 ah->imask |= ATH9K_INT_RX;
1159 ah->imask |= ATH9K_INT_GTT;
1161 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1162 ah->imask |= ATH9K_INT_CST;
1164 ath_cache_conf_rate(sc, &hw->conf);
1166 sc->sc_flags &= ~SC_OP_INVALID;
1168 /* Disable BMISS interrupt when we're not associated */
1169 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1170 ath9k_hw_set_interrupts(ah, ah->imask);
1172 ieee80211_wake_queues(hw);
1174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1176 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1177 !ah->btcoex_hw.enabled) {
1178 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1179 AR_STOMP_LOW_WLAN_WGHT);
1180 ath9k_hw_btcoex_enable(ah);
1182 if (common->bus_ops->bt_coex_prep)
1183 common->bus_ops->bt_coex_prep(common);
1184 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1185 ath9k_btcoex_timer_resume(sc);
1189 mutex_unlock(&sc->mutex);
1194 static int ath9k_tx(struct ieee80211_hw *hw,
1195 struct sk_buff *skb)
1197 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1198 struct ath_wiphy *aphy = hw->priv;
1199 struct ath_softc *sc = aphy->sc;
1200 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1201 struct ath_tx_control txctl;
1202 int padpos, padsize;
1203 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1206 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1207 ath_print(common, ATH_DBG_XMIT,
1208 "ath9k: %s: TX in unexpected wiphy state "
1209 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1213 if (sc->ps_enabled) {
1215 * mac80211 does not set PM field for normal data frames, so we
1216 * need to update that based on the current PS mode.
1218 if (ieee80211_is_data(hdr->frame_control) &&
1219 !ieee80211_is_nullfunc(hdr->frame_control) &&
1220 !ieee80211_has_pm(hdr->frame_control)) {
1221 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1222 "while in PS mode\n");
1223 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1227 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1229 * We are using PS-Poll and mac80211 can request TX while in
1230 * power save mode. Need to wake up hardware for the TX to be
1231 * completed and if needed, also for RX of buffered frames.
1233 ath9k_ps_wakeup(sc);
1234 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1235 ath9k_hw_setrxabort(sc->sc_ah, 0);
1236 if (ieee80211_is_pspoll(hdr->frame_control)) {
1237 ath_print(common, ATH_DBG_PS,
1238 "Sending PS-Poll to pick a buffered frame\n");
1239 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1241 ath_print(common, ATH_DBG_PS,
1242 "Wake up to complete TX\n");
1243 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1246 * The actual restore operation will happen only after
1247 * the sc_flags bit is cleared. We are just dropping
1248 * the ps_usecount here.
1250 ath9k_ps_restore(sc);
1253 memset(&txctl, 0, sizeof(struct ath_tx_control));
1256 * As a temporary workaround, assign seq# here; this will likely need
1257 * to be cleaned up to work better with Beacon transmission and virtual
1260 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1261 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1262 sc->tx.seq_no += 0x10;
1263 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1264 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1267 /* Add the padding after the header if this is not already done */
1268 padpos = ath9k_cmn_padpos(hdr->frame_control);
1269 padsize = padpos & 3;
1270 if (padsize && skb->len>padpos) {
1271 if (skb_headroom(skb) < padsize)
1273 skb_push(skb, padsize);
1274 memmove(skb->data, skb->data + padsize, padpos);
1277 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1278 txctl.txq = &sc->tx.txq[qnum];
1280 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1282 if (ath_tx_start(hw, skb, &txctl) != 0) {
1283 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1289 dev_kfree_skb_any(skb);
1293 static void ath9k_stop(struct ieee80211_hw *hw)
1295 struct ath_wiphy *aphy = hw->priv;
1296 struct ath_softc *sc = aphy->sc;
1297 struct ath_hw *ah = sc->sc_ah;
1298 struct ath_common *common = ath9k_hw_common(ah);
1301 mutex_lock(&sc->mutex);
1303 aphy->state = ATH_WIPHY_INACTIVE;
1306 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1308 cancel_delayed_work_sync(&sc->tx_complete_work);
1309 cancel_work_sync(&sc->paprd_work);
1310 cancel_work_sync(&sc->hw_check_work);
1312 for (i = 0; i < sc->num_sec_wiphy; i++) {
1313 if (sc->sec_wiphy[i])
1317 if (i == sc->num_sec_wiphy) {
1318 cancel_delayed_work_sync(&sc->wiphy_work);
1319 cancel_work_sync(&sc->chan_work);
1322 if (sc->sc_flags & SC_OP_INVALID) {
1323 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1324 mutex_unlock(&sc->mutex);
1328 if (ath9k_wiphy_started(sc)) {
1329 mutex_unlock(&sc->mutex);
1330 return; /* another wiphy still in use */
1333 /* Ensure HW is awake when we try to shut it down. */
1334 ath9k_ps_wakeup(sc);
1336 if (ah->btcoex_hw.enabled) {
1337 ath9k_hw_btcoex_disable(ah);
1338 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1339 ath9k_btcoex_timer_pause(sc);
1342 /* make sure h/w will not generate any interrupt
1343 * before setting the invalid flag. */
1344 ath9k_hw_set_interrupts(ah, 0);
1346 if (!(sc->sc_flags & SC_OP_INVALID)) {
1347 ath_drain_all_txq(sc, false);
1349 ath9k_hw_phy_disable(ah);
1351 sc->rx.rxlink = NULL;
1353 /* disable HAL and put h/w to sleep */
1354 ath9k_hw_disable(ah);
1355 ath9k_hw_configpcipowersave(ah, 1, 1);
1356 ath9k_ps_restore(sc);
1358 /* Finally, put the chip in FULL SLEEP mode */
1359 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1361 sc->sc_flags |= SC_OP_INVALID;
1363 mutex_unlock(&sc->mutex);
1365 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1368 static int ath9k_add_interface(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif)
1371 struct ath_wiphy *aphy = hw->priv;
1372 struct ath_softc *sc = aphy->sc;
1373 struct ath_hw *ah = sc->sc_ah;
1374 struct ath_common *common = ath9k_hw_common(ah);
1375 struct ath_vif *avp = (void *)vif->drv_priv;
1376 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1379 mutex_lock(&sc->mutex);
1381 switch (vif->type) {
1382 case NL80211_IFTYPE_STATION:
1383 ic_opmode = NL80211_IFTYPE_STATION;
1385 case NL80211_IFTYPE_ADHOC:
1386 case NL80211_IFTYPE_AP:
1387 case NL80211_IFTYPE_MESH_POINT:
1388 if (sc->nbcnvifs >= ATH_BCBUF) {
1392 ic_opmode = vif->type;
1395 ath_print(common, ATH_DBG_FATAL,
1396 "Interface type %d not yet supported\n", vif->type);
1401 ath_print(common, ATH_DBG_CONFIG,
1402 "Attach a VIF of type: %d\n", ic_opmode);
1404 /* Set the VIF opmode */
1405 avp->av_opmode = ic_opmode;
1410 ath9k_set_bssid_mask(hw, vif);
1413 goto out; /* skip global settings for secondary vif */
1415 if (ic_opmode == NL80211_IFTYPE_AP) {
1416 ath9k_hw_set_tsfadjust(ah, 1);
1417 sc->sc_flags |= SC_OP_TSF_RESET;
1420 /* Set the device opmode */
1421 ah->opmode = ic_opmode;
1424 * Enable MIB interrupts when there are hardware phy counters.
1425 * Note we only do this (at the moment) for station mode.
1427 if ((vif->type == NL80211_IFTYPE_STATION) ||
1428 (vif->type == NL80211_IFTYPE_ADHOC) ||
1429 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1430 if (ah->config.enable_ani)
1431 ah->imask |= ATH9K_INT_MIB;
1432 ah->imask |= ATH9K_INT_TSFOOR;
1435 ath9k_hw_set_interrupts(ah, ah->imask);
1437 if (vif->type == NL80211_IFTYPE_AP ||
1438 vif->type == NL80211_IFTYPE_ADHOC ||
1439 vif->type == NL80211_IFTYPE_MONITOR) {
1440 sc->sc_flags |= SC_OP_ANI_RUN;
1441 ath_start_ani(common);
1445 mutex_unlock(&sc->mutex);
1449 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1450 struct ieee80211_vif *vif)
1452 struct ath_wiphy *aphy = hw->priv;
1453 struct ath_softc *sc = aphy->sc;
1454 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1455 struct ath_vif *avp = (void *)vif->drv_priv;
1458 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1460 mutex_lock(&sc->mutex);
1463 sc->sc_flags &= ~SC_OP_ANI_RUN;
1464 del_timer_sync(&common->ani.timer);
1466 /* Reclaim beacon resources */
1467 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1468 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1469 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1470 ath9k_ps_wakeup(sc);
1471 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1472 ath9k_ps_restore(sc);
1475 ath_beacon_return(sc, avp);
1476 sc->sc_flags &= ~SC_OP_BEACONS;
1478 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1479 if (sc->beacon.bslot[i] == vif) {
1480 printk(KERN_DEBUG "%s: vif had allocated beacon "
1481 "slot\n", __func__);
1482 sc->beacon.bslot[i] = NULL;
1483 sc->beacon.bslot_aphy[i] = NULL;
1489 mutex_unlock(&sc->mutex);
1492 void ath9k_enable_ps(struct ath_softc *sc)
1494 struct ath_hw *ah = sc->sc_ah;
1496 sc->ps_enabled = true;
1497 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1498 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1499 ah->imask |= ATH9K_INT_TIM_TIMER;
1500 ath9k_hw_set_interrupts(ah, ah->imask);
1502 ath9k_hw_setrxabort(ah, 1);
1506 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1508 struct ath_wiphy *aphy = hw->priv;
1509 struct ath_softc *sc = aphy->sc;
1510 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1511 struct ieee80211_conf *conf = &hw->conf;
1512 struct ath_hw *ah = sc->sc_ah;
1515 mutex_lock(&sc->mutex);
1518 * Leave this as the first check because we need to turn on the
1519 * radio if it was disabled before prior to processing the rest
1520 * of the changes. Likewise we must only disable the radio towards
1523 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1525 bool all_wiphys_idle;
1526 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1528 spin_lock_bh(&sc->wiphy_lock);
1529 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1530 ath9k_set_wiphy_idle(aphy, idle);
1532 enable_radio = (!idle && all_wiphys_idle);
1535 * After we unlock here its possible another wiphy
1536 * can be re-renabled so to account for that we will
1537 * only disable the radio toward the end of this routine
1538 * if by then all wiphys are still idle.
1540 spin_unlock_bh(&sc->wiphy_lock);
1543 sc->ps_idle = false;
1544 ath_radio_enable(sc, hw);
1545 ath_print(common, ATH_DBG_CONFIG,
1546 "not-idle: enabling radio\n");
1551 * We just prepare to enable PS. We have to wait until our AP has
1552 * ACK'd our null data frame to disable RX otherwise we'll ignore
1553 * those ACKs and end up retransmitting the same null data frames.
1554 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1556 if (changed & IEEE80211_CONF_CHANGE_PS) {
1557 if (conf->flags & IEEE80211_CONF_PS) {
1558 sc->ps_flags |= PS_ENABLED;
1560 * At this point we know hardware has received an ACK
1561 * of a previously sent null data frame.
1563 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1564 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1565 ath9k_enable_ps(sc);
1568 sc->ps_enabled = false;
1569 sc->ps_flags &= ~(PS_ENABLED |
1570 PS_NULLFUNC_COMPLETED);
1571 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1572 if (!(ah->caps.hw_caps &
1573 ATH9K_HW_CAP_AUTOSLEEP)) {
1574 ath9k_hw_setrxabort(sc->sc_ah, 0);
1575 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1577 PS_WAIT_FOR_PSPOLL_DATA |
1578 PS_WAIT_FOR_TX_ACK);
1579 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1580 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1581 ath9k_hw_set_interrupts(sc->sc_ah,
1588 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1589 if (conf->flags & IEEE80211_CONF_MONITOR) {
1590 ath_print(common, ATH_DBG_CONFIG,
1591 "HW opmode set to Monitor mode\n");
1592 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1596 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1597 struct ieee80211_channel *curchan = hw->conf.channel;
1598 int pos = curchan->hw_value;
1600 aphy->chan_idx = pos;
1601 aphy->chan_is_ht = conf_is_ht(conf);
1602 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1603 sc->sc_flags |= SC_OP_OFFCHANNEL;
1605 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1607 if (aphy->state == ATH_WIPHY_SCAN ||
1608 aphy->state == ATH_WIPHY_ACTIVE)
1609 ath9k_wiphy_pause_all_forced(sc, aphy);
1612 * Do not change operational channel based on a paused
1615 goto skip_chan_change;
1618 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1619 curchan->center_freq);
1621 /* XXX: remove me eventualy */
1622 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1624 ath_update_chainmask(sc, conf_is_ht(conf));
1626 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1627 ath_print(common, ATH_DBG_FATAL,
1628 "Unable to set channel\n");
1629 mutex_unlock(&sc->mutex);
1635 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1636 sc->config.txpowlimit = 2 * conf->power_level;
1637 ath_update_txpow(sc);
1640 spin_lock_bh(&sc->wiphy_lock);
1641 disable_radio = ath9k_all_wiphys_idle(sc);
1642 spin_unlock_bh(&sc->wiphy_lock);
1644 if (disable_radio) {
1645 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1647 ath_radio_disable(sc, hw);
1650 mutex_unlock(&sc->mutex);
1655 #define SUPPORTED_FILTERS \
1656 (FIF_PROMISC_IN_BSS | \
1661 FIF_BCN_PRBRESP_PROMISC | \
1664 /* FIXME: sc->sc_full_reset ? */
1665 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1666 unsigned int changed_flags,
1667 unsigned int *total_flags,
1670 struct ath_wiphy *aphy = hw->priv;
1671 struct ath_softc *sc = aphy->sc;
1674 changed_flags &= SUPPORTED_FILTERS;
1675 *total_flags &= SUPPORTED_FILTERS;
1677 sc->rx.rxfilter = *total_flags;
1678 ath9k_ps_wakeup(sc);
1679 rfilt = ath_calcrxfilter(sc);
1680 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1681 ath9k_ps_restore(sc);
1683 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1684 "Set HW RX filter: 0x%x\n", rfilt);
1687 static int ath9k_sta_add(struct ieee80211_hw *hw,
1688 struct ieee80211_vif *vif,
1689 struct ieee80211_sta *sta)
1691 struct ath_wiphy *aphy = hw->priv;
1692 struct ath_softc *sc = aphy->sc;
1694 ath_node_attach(sc, sta);
1699 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1700 struct ieee80211_vif *vif,
1701 struct ieee80211_sta *sta)
1703 struct ath_wiphy *aphy = hw->priv;
1704 struct ath_softc *sc = aphy->sc;
1706 ath_node_detach(sc, sta);
1711 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1712 const struct ieee80211_tx_queue_params *params)
1714 struct ath_wiphy *aphy = hw->priv;
1715 struct ath_softc *sc = aphy->sc;
1716 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1717 struct ath9k_tx_queue_info qi;
1720 if (queue >= WME_NUM_AC)
1723 mutex_lock(&sc->mutex);
1725 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1727 qi.tqi_aifs = params->aifs;
1728 qi.tqi_cwmin = params->cw_min;
1729 qi.tqi_cwmax = params->cw_max;
1730 qi.tqi_burstTime = params->txop;
1731 qnum = ath_get_hal_qnum(queue, sc);
1733 ath_print(common, ATH_DBG_CONFIG,
1734 "Configure tx [queue/halq] [%d/%d], "
1735 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1736 queue, qnum, params->aifs, params->cw_min,
1737 params->cw_max, params->txop);
1739 ret = ath_txq_update(sc, qnum, &qi);
1741 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1743 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1744 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1745 ath_beaconq_config(sc);
1747 mutex_unlock(&sc->mutex);
1752 static int ath9k_set_key(struct ieee80211_hw *hw,
1753 enum set_key_cmd cmd,
1754 struct ieee80211_vif *vif,
1755 struct ieee80211_sta *sta,
1756 struct ieee80211_key_conf *key)
1758 struct ath_wiphy *aphy = hw->priv;
1759 struct ath_softc *sc = aphy->sc;
1760 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1763 if (modparam_nohwcrypt)
1766 mutex_lock(&sc->mutex);
1767 ath9k_ps_wakeup(sc);
1768 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1772 ret = ath_key_config(common, vif, sta, key);
1774 key->hw_key_idx = ret;
1775 /* push IV and Michael MIC generation to stack */
1776 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1777 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1778 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1779 if (sc->sc_ah->sw_mgmt_crypto &&
1780 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1781 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1786 ath_key_delete(common, key);
1792 ath9k_ps_restore(sc);
1793 mutex_unlock(&sc->mutex);
1798 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1799 struct ieee80211_vif *vif,
1800 struct ieee80211_bss_conf *bss_conf,
1803 struct ath_wiphy *aphy = hw->priv;
1804 struct ath_softc *sc = aphy->sc;
1805 struct ath_hw *ah = sc->sc_ah;
1806 struct ath_common *common = ath9k_hw_common(ah);
1807 struct ath_vif *avp = (void *)vif->drv_priv;
1811 mutex_lock(&sc->mutex);
1813 if (changed & BSS_CHANGED_BSSID) {
1815 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1816 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1818 ath9k_hw_write_associd(ah);
1820 /* Set aggregation protection mode parameters */
1821 sc->config.ath_aggr_prot = 0;
1823 /* Only legacy IBSS for now */
1824 if (vif->type == NL80211_IFTYPE_ADHOC)
1825 ath_update_chainmask(sc, 0);
1827 ath_print(common, ATH_DBG_CONFIG,
1828 "BSSID: %pM aid: 0x%x\n",
1829 common->curbssid, common->curaid);
1831 /* need to reconfigure the beacon */
1832 sc->sc_flags &= ~SC_OP_BEACONS ;
1835 /* Enable transmission of beacons (AP, IBSS, MESH) */
1836 if ((changed & BSS_CHANGED_BEACON) ||
1837 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1838 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1839 error = ath_beacon_alloc(aphy, vif);
1841 ath_beacon_config(sc, vif);
1844 if (changed & BSS_CHANGED_ERP_SLOT) {
1845 if (bss_conf->use_short_slot)
1849 if (vif->type == NL80211_IFTYPE_AP) {
1851 * Defer update, so that connected stations can adjust
1852 * their settings at the same time.
1853 * See beacon.c for more details
1855 sc->beacon.slottime = slottime;
1856 sc->beacon.updateslot = UPDATE;
1858 ah->slottime = slottime;
1859 ath9k_hw_init_global_settings(ah);
1863 /* Disable transmission of beacons */
1864 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1865 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1867 if (changed & BSS_CHANGED_BEACON_INT) {
1868 sc->beacon_interval = bss_conf->beacon_int;
1870 * In case of AP mode, the HW TSF has to be reset
1871 * when the beacon interval changes.
1873 if (vif->type == NL80211_IFTYPE_AP) {
1874 sc->sc_flags |= SC_OP_TSF_RESET;
1875 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1876 error = ath_beacon_alloc(aphy, vif);
1878 ath_beacon_config(sc, vif);
1880 ath_beacon_config(sc, vif);
1884 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1885 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1886 bss_conf->use_short_preamble);
1887 if (bss_conf->use_short_preamble)
1888 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1890 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1893 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1894 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1895 bss_conf->use_cts_prot);
1896 if (bss_conf->use_cts_prot &&
1897 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1898 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1900 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1903 if (changed & BSS_CHANGED_ASSOC) {
1904 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1906 ath9k_bss_assoc_info(sc, vif, bss_conf);
1909 mutex_unlock(&sc->mutex);
1912 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1915 struct ath_wiphy *aphy = hw->priv;
1916 struct ath_softc *sc = aphy->sc;
1918 mutex_lock(&sc->mutex);
1919 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1920 mutex_unlock(&sc->mutex);
1925 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1927 struct ath_wiphy *aphy = hw->priv;
1928 struct ath_softc *sc = aphy->sc;
1930 mutex_lock(&sc->mutex);
1931 ath9k_hw_settsf64(sc->sc_ah, tsf);
1932 mutex_unlock(&sc->mutex);
1935 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1937 struct ath_wiphy *aphy = hw->priv;
1938 struct ath_softc *sc = aphy->sc;
1940 mutex_lock(&sc->mutex);
1942 ath9k_ps_wakeup(sc);
1943 ath9k_hw_reset_tsf(sc->sc_ah);
1944 ath9k_ps_restore(sc);
1946 mutex_unlock(&sc->mutex);
1949 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1950 struct ieee80211_vif *vif,
1951 enum ieee80211_ampdu_mlme_action action,
1952 struct ieee80211_sta *sta,
1955 struct ath_wiphy *aphy = hw->priv;
1956 struct ath_softc *sc = aphy->sc;
1962 case IEEE80211_AMPDU_RX_START:
1963 if (!(sc->sc_flags & SC_OP_RXAGGR))
1966 case IEEE80211_AMPDU_RX_STOP:
1968 case IEEE80211_AMPDU_TX_START:
1969 ath9k_ps_wakeup(sc);
1970 ath_tx_aggr_start(sc, sta, tid, ssn);
1971 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1972 ath9k_ps_restore(sc);
1974 case IEEE80211_AMPDU_TX_STOP:
1975 ath9k_ps_wakeup(sc);
1976 ath_tx_aggr_stop(sc, sta, tid);
1977 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1978 ath9k_ps_restore(sc);
1980 case IEEE80211_AMPDU_TX_OPERATIONAL:
1981 ath9k_ps_wakeup(sc);
1982 ath_tx_aggr_resume(sc, sta, tid);
1983 ath9k_ps_restore(sc);
1986 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1987 "Unknown AMPDU action\n");
1995 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1996 struct survey_info *survey)
1998 struct ath_wiphy *aphy = hw->priv;
1999 struct ath_softc *sc = aphy->sc;
2000 struct ath_hw *ah = sc->sc_ah;
2001 struct ath_common *common = ath9k_hw_common(ah);
2002 struct ieee80211_conf *conf = &hw->conf;
2007 survey->channel = conf->channel;
2008 survey->filled = SURVEY_INFO_NOISE_DBM;
2009 survey->noise = common->ani.noise_floor;
2014 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2016 struct ath_wiphy *aphy = hw->priv;
2017 struct ath_softc *sc = aphy->sc;
2019 mutex_lock(&sc->mutex);
2020 if (ath9k_wiphy_scanning(sc)) {
2022 * There is a race here in mac80211 but fixing it requires
2023 * we revisit how we handle the scan complete callback.
2024 * After mac80211 fixes we will not have configured hardware
2025 * to the home channel nor would we have configured the RX
2028 mutex_unlock(&sc->mutex);
2032 aphy->state = ATH_WIPHY_SCAN;
2033 ath9k_wiphy_pause_all_forced(sc, aphy);
2034 sc->sc_flags |= SC_OP_SCANNING;
2035 mutex_unlock(&sc->mutex);
2039 * XXX: this requires a revisit after the driver
2040 * scan_complete gets moved to another place/removed in mac80211.
2042 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2044 struct ath_wiphy *aphy = hw->priv;
2045 struct ath_softc *sc = aphy->sc;
2047 mutex_lock(&sc->mutex);
2048 aphy->state = ATH_WIPHY_ACTIVE;
2049 sc->sc_flags &= ~SC_OP_SCANNING;
2050 mutex_unlock(&sc->mutex);
2053 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2055 struct ath_wiphy *aphy = hw->priv;
2056 struct ath_softc *sc = aphy->sc;
2057 struct ath_hw *ah = sc->sc_ah;
2059 mutex_lock(&sc->mutex);
2060 ah->coverage_class = coverage_class;
2061 ath9k_hw_init_global_settings(ah);
2062 mutex_unlock(&sc->mutex);
2065 struct ieee80211_ops ath9k_ops = {
2067 .start = ath9k_start,
2069 .add_interface = ath9k_add_interface,
2070 .remove_interface = ath9k_remove_interface,
2071 .config = ath9k_config,
2072 .configure_filter = ath9k_configure_filter,
2073 .sta_add = ath9k_sta_add,
2074 .sta_remove = ath9k_sta_remove,
2075 .conf_tx = ath9k_conf_tx,
2076 .bss_info_changed = ath9k_bss_info_changed,
2077 .set_key = ath9k_set_key,
2078 .get_tsf = ath9k_get_tsf,
2079 .set_tsf = ath9k_set_tsf,
2080 .reset_tsf = ath9k_reset_tsf,
2081 .ampdu_action = ath9k_ampdu_action,
2082 .get_survey = ath9k_get_survey,
2083 .sw_scan_start = ath9k_sw_scan_start,
2084 .sw_scan_complete = ath9k_sw_scan_complete,
2085 .rfkill_poll = ath9k_rfkill_poll_state,
2086 .set_coverage_class = ath9k_set_coverage_class,