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ath9k: rework tx queue selection and fix queue stopping/waking
[karo-tx-linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23         struct ath_hw *ah = sc->sc_ah;
24
25         if (sc->curtxpow != sc->config.txpowlimit) {
26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27                 /* read back in case value is clamped */
28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29         }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34         /*
35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36          *   0 for no restriction
37          *   1 for 1/4 us
38          *   2 for 1/2 us
39          *   3 for 1 us
40          *   4 for 2 us
41          *   5 for 4 us
42          *   6 for 8 us
43          *   7 for 16 us
44          */
45         switch (mpdudensity) {
46         case 0:
47                 return 0;
48         case 1:
49         case 2:
50         case 3:
51                 /* Our lower layer calculations limit our precision to
52                    1 microsecond */
53                 return 1;
54         case 4:
55                 return 2;
56         case 5:
57                 return 4;
58         case 6:
59                 return 8;
60         case 7:
61                 return 16;
62         default:
63                 return 0;
64         }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68                                                 struct ieee80211_hw *hw)
69 {
70         struct ieee80211_channel *curchan = hw->conf.channel;
71         struct ath9k_channel *channel;
72         u8 chan_idx;
73
74         chan_idx = curchan->hw_value;
75         channel = &sc->sc_ah->channels[chan_idx];
76         ath9k_update_ichannel(sc, hw, channel);
77         return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82         unsigned long flags;
83         bool ret;
84
85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89         return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95         unsigned long flags;
96
97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
98         if (++sc->ps_usecount != 1)
99                 goto unlock;
100
101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
102
103         /*
104          * While the hardware is asleep, the cycle counters contain no
105          * useful data. Better clear them now so that they don't mess up
106          * survey data results.
107          */
108         spin_lock(&common->cc_lock);
109         ath_hw_cycle_counters_update(common);
110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
111         spin_unlock(&common->cc_lock);
112
113  unlock:
114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
115 }
116
117 void ath9k_ps_restore(struct ath_softc *sc)
118 {
119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
120         unsigned long flags;
121
122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
123         if (--sc->ps_usecount != 0)
124                 goto unlock;
125
126         spin_lock(&common->cc_lock);
127         ath_hw_cycle_counters_update(common);
128         spin_unlock(&common->cc_lock);
129
130         if (sc->ps_idle)
131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
132         else if (sc->ps_enabled &&
133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
134                               PS_WAIT_FOR_CAB |
135                               PS_WAIT_FOR_PSPOLL_DATA |
136                               PS_WAIT_FOR_TX_ACK)))
137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
138
139  unlock:
140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
141 }
142
143 static void ath_start_ani(struct ath_common *common)
144 {
145         struct ath_hw *ah = common->ah;
146         unsigned long timestamp = jiffies_to_msecs(jiffies);
147         struct ath_softc *sc = (struct ath_softc *) common->priv;
148
149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
150                 return;
151
152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
153                 return;
154
155         common->ani.longcal_timer = timestamp;
156         common->ani.shortcal_timer = timestamp;
157         common->ani.checkani_timer = timestamp;
158
159         mod_timer(&common->ani.timer,
160                   jiffies +
161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
162 }
163
164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
165 {
166         struct ath_hw *ah = sc->sc_ah;
167         struct ath9k_channel *chan = &ah->channels[channel];
168         struct survey_info *survey = &sc->survey[channel];
169
170         if (chan->noisefloor) {
171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
172                 survey->noise = chan->noisefloor;
173         }
174 }
175
176 static void ath_update_survey_stats(struct ath_softc *sc)
177 {
178         struct ath_hw *ah = sc->sc_ah;
179         struct ath_common *common = ath9k_hw_common(ah);
180         int pos = ah->curchan - &ah->channels[0];
181         struct survey_info *survey = &sc->survey[pos];
182         struct ath_cycle_counters *cc = &common->cc_survey;
183         unsigned int div = common->clockrate * 1000;
184
185         if (!ah->curchan)
186                 return;
187
188         if (ah->power_mode == ATH9K_PM_AWAKE)
189                 ath_hw_cycle_counters_update(common);
190
191         if (cc->cycles > 0) {
192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
194                         SURVEY_INFO_CHANNEL_TIME_RX |
195                         SURVEY_INFO_CHANNEL_TIME_TX;
196                 survey->channel_time += cc->cycles / div;
197                 survey->channel_time_busy += cc->rx_busy / div;
198                 survey->channel_time_rx += cc->rx_frame / div;
199                 survey->channel_time_tx += cc->tx_frame / div;
200         }
201         memset(cc, 0, sizeof(*cc));
202
203         ath_update_survey_nf(sc, pos);
204 }
205
206 /*
207  * Set/change channels.  If the channel is really being changed, it's done
208  * by reseting the chip.  To accomplish this we must first cleanup any pending
209  * DMA, then restart stuff.
210 */
211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
212                     struct ath9k_channel *hchan)
213 {
214         struct ath_wiphy *aphy = hw->priv;
215         struct ath_hw *ah = sc->sc_ah;
216         struct ath_common *common = ath9k_hw_common(ah);
217         struct ieee80211_conf *conf = &common->hw->conf;
218         bool fastcc = true, stopped;
219         struct ieee80211_channel *channel = hw->conf.channel;
220         struct ath9k_hw_cal_data *caldata = NULL;
221         int r;
222
223         if (sc->sc_flags & SC_OP_INVALID)
224                 return -EIO;
225
226         del_timer_sync(&common->ani.timer);
227         cancel_work_sync(&sc->paprd_work);
228         cancel_work_sync(&sc->hw_check_work);
229         cancel_delayed_work_sync(&sc->tx_complete_work);
230
231         ath9k_ps_wakeup(sc);
232
233         spin_lock_bh(&sc->sc_pcu_lock);
234
235         /*
236          * This is only performed if the channel settings have
237          * actually changed.
238          *
239          * To switch channels clear any pending DMA operations;
240          * wait long enough for the RX fifo to drain, reset the
241          * hardware at the new frequency, and then re-enable
242          * the relevant bits of the h/w.
243          */
244         ath9k_hw_disable_interrupts(ah);
245         ath_drain_all_txq(sc, false);
246
247         stopped = ath_stoprecv(sc);
248
249         /* XXX: do not flush receive queue here. We don't want
250          * to flush data frames already in queue because of
251          * changing channel. */
252
253         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
254                 fastcc = false;
255
256         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
257                 caldata = &aphy->caldata;
258
259         ath_print(common, ATH_DBG_CONFIG,
260                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
261                   sc->sc_ah->curchan->channel,
262                   channel->center_freq, conf_is_ht40(conf),
263                   fastcc);
264
265         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
266         if (r) {
267                 ath_print(common, ATH_DBG_FATAL,
268                           "Unable to reset channel (%u MHz), "
269                           "reset status %d\n",
270                           channel->center_freq, r);
271                 goto ps_restore;
272         }
273
274         if (ath_startrecv(sc) != 0) {
275                 ath_print(common, ATH_DBG_FATAL,
276                           "Unable to restart recv logic\n");
277                 r = -EIO;
278                 goto ps_restore;
279         }
280
281         ath_update_txpow(sc);
282         ath9k_hw_set_interrupts(ah, ah->imask);
283
284         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
285                 ath_beacon_config(sc, NULL);
286                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
287                 ath_start_ani(common);
288         }
289
290  ps_restore:
291         spin_unlock_bh(&sc->sc_pcu_lock);
292
293         ath9k_ps_restore(sc);
294         return r;
295 }
296
297 static void ath_paprd_activate(struct ath_softc *sc)
298 {
299         struct ath_hw *ah = sc->sc_ah;
300         struct ath9k_hw_cal_data *caldata = ah->caldata;
301         struct ath_common *common = ath9k_hw_common(ah);
302         int chain;
303
304         if (!caldata || !caldata->paprd_done)
305                 return;
306
307         ath9k_ps_wakeup(sc);
308         ar9003_paprd_enable(ah, false);
309         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
310                 if (!(common->tx_chainmask & BIT(chain)))
311                         continue;
312
313                 ar9003_paprd_populate_single_table(ah, caldata, chain);
314         }
315
316         ar9003_paprd_enable(ah, true);
317         ath9k_ps_restore(sc);
318 }
319
320 void ath_paprd_calibrate(struct work_struct *work)
321 {
322         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
323         struct ieee80211_hw *hw = sc->hw;
324         struct ath_hw *ah = sc->sc_ah;
325         struct ieee80211_hdr *hdr;
326         struct sk_buff *skb = NULL;
327         struct ieee80211_tx_info *tx_info;
328         int band = hw->conf.channel->band;
329         struct ieee80211_supported_band *sband = &sc->sbands[band];
330         struct ath_tx_control txctl;
331         struct ath9k_hw_cal_data *caldata = ah->caldata;
332         struct ath_common *common = ath9k_hw_common(ah);
333         int ftype;
334         int chain_ok = 0;
335         int chain;
336         int len = 1800;
337         int time_left;
338         int i;
339
340         if (!caldata)
341                 return;
342
343         skb = alloc_skb(len, GFP_KERNEL);
344         if (!skb)
345                 return;
346
347         tx_info = IEEE80211_SKB_CB(skb);
348
349         skb_put(skb, len);
350         memset(skb->data, 0, len);
351         hdr = (struct ieee80211_hdr *)skb->data;
352         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
353         hdr->frame_control = cpu_to_le16(ftype);
354         hdr->duration_id = cpu_to_le16(10);
355         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
356         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
357         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
358
359         memset(&txctl, 0, sizeof(txctl));
360         txctl.txq = sc->tx.txq_map[WME_AC_BE];
361
362         ath9k_ps_wakeup(sc);
363         ar9003_paprd_init_table(ah);
364         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
365                 if (!(common->tx_chainmask & BIT(chain)))
366                         continue;
367
368                 chain_ok = 0;
369                 memset(tx_info, 0, sizeof(*tx_info));
370                 tx_info->band = band;
371
372                 for (i = 0; i < 4; i++) {
373                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
374                         tx_info->control.rates[i].count = 6;
375                 }
376
377                 init_completion(&sc->paprd_complete);
378                 ar9003_paprd_setup_gain_table(ah, chain);
379                 txctl.paprd = BIT(chain);
380                 if (ath_tx_start(hw, skb, &txctl) != 0)
381                         break;
382
383                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
384                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
385                 if (!time_left) {
386                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
387                                   "Timeout waiting for paprd training on "
388                                   "TX chain %d\n",
389                                   chain);
390                         goto fail_paprd;
391                 }
392
393                 if (!ar9003_paprd_is_done(ah))
394                         break;
395
396                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
397                         break;
398
399                 chain_ok = 1;
400         }
401         kfree_skb(skb);
402
403         if (chain_ok) {
404                 caldata->paprd_done = true;
405                 ath_paprd_activate(sc);
406         }
407
408 fail_paprd:
409         ath9k_ps_restore(sc);
410 }
411
412 /*
413  *  This routine performs the periodic noise floor calibration function
414  *  that is used to adjust and optimize the chip performance.  This
415  *  takes environmental changes (location, temperature) into account.
416  *  When the task is complete, it reschedules itself depending on the
417  *  appropriate interval that was calculated.
418  */
419 void ath_ani_calibrate(unsigned long data)
420 {
421         struct ath_softc *sc = (struct ath_softc *)data;
422         struct ath_hw *ah = sc->sc_ah;
423         struct ath_common *common = ath9k_hw_common(ah);
424         bool longcal = false;
425         bool shortcal = false;
426         bool aniflag = false;
427         unsigned int timestamp = jiffies_to_msecs(jiffies);
428         u32 cal_interval, short_cal_interval, long_cal_interval;
429         unsigned long flags;
430
431         if (ah->caldata && ah->caldata->nfcal_interference)
432                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
433         else
434                 long_cal_interval = ATH_LONG_CALINTERVAL;
435
436         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
437                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
438
439         /* Only calibrate if awake */
440         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
441                 goto set_timer;
442
443         ath9k_ps_wakeup(sc);
444
445         /* Long calibration runs independently of short calibration. */
446         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
447                 longcal = true;
448                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
449                 common->ani.longcal_timer = timestamp;
450         }
451
452         /* Short calibration applies only while caldone is false */
453         if (!common->ani.caldone) {
454                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
455                         shortcal = true;
456                         ath_print(common, ATH_DBG_ANI,
457                                   "shortcal @%lu\n", jiffies);
458                         common->ani.shortcal_timer = timestamp;
459                         common->ani.resetcal_timer = timestamp;
460                 }
461         } else {
462                 if ((timestamp - common->ani.resetcal_timer) >=
463                     ATH_RESTART_CALINTERVAL) {
464                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
465                         if (common->ani.caldone)
466                                 common->ani.resetcal_timer = timestamp;
467                 }
468         }
469
470         /* Verify whether we must check ANI */
471         if ((timestamp - common->ani.checkani_timer) >=
472              ah->config.ani_poll_interval) {
473                 aniflag = true;
474                 common->ani.checkani_timer = timestamp;
475         }
476
477         /* Skip all processing if there's nothing to do. */
478         if (longcal || shortcal || aniflag) {
479                 /* Call ANI routine if necessary */
480                 if (aniflag) {
481                         spin_lock_irqsave(&common->cc_lock, flags);
482                         ath9k_hw_ani_monitor(ah, ah->curchan);
483                         ath_update_survey_stats(sc);
484                         spin_unlock_irqrestore(&common->cc_lock, flags);
485                 }
486
487                 /* Perform calibration if necessary */
488                 if (longcal || shortcal) {
489                         common->ani.caldone =
490                                 ath9k_hw_calibrate(ah,
491                                                    ah->curchan,
492                                                    common->rx_chainmask,
493                                                    longcal);
494                 }
495         }
496
497         ath9k_ps_restore(sc);
498
499 set_timer:
500         /*
501         * Set timer interval based on previous results.
502         * The interval must be the shortest necessary to satisfy ANI,
503         * short calibration and long calibration.
504         */
505         cal_interval = ATH_LONG_CALINTERVAL;
506         if (sc->sc_ah->config.enable_ani)
507                 cal_interval = min(cal_interval,
508                                    (u32)ah->config.ani_poll_interval);
509         if (!common->ani.caldone)
510                 cal_interval = min(cal_interval, (u32)short_cal_interval);
511
512         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
513         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
514                 if (!ah->caldata->paprd_done)
515                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
516                 else
517                         ath_paprd_activate(sc);
518         }
519 }
520
521 /*
522  * Update tx/rx chainmask. For legacy association,
523  * hard code chainmask to 1x1, for 11n association, use
524  * the chainmask configuration, for bt coexistence, use
525  * the chainmask configuration even in legacy mode.
526  */
527 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
528 {
529         struct ath_hw *ah = sc->sc_ah;
530         struct ath_common *common = ath9k_hw_common(ah);
531
532         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
533             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
534                 common->tx_chainmask = ah->caps.tx_chainmask;
535                 common->rx_chainmask = ah->caps.rx_chainmask;
536         } else {
537                 common->tx_chainmask = 1;
538                 common->rx_chainmask = 1;
539         }
540
541         ath_print(common, ATH_DBG_CONFIG,
542                   "tx chmask: %d, rx chmask: %d\n",
543                   common->tx_chainmask,
544                   common->rx_chainmask);
545 }
546
547 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
548 {
549         struct ath_node *an;
550
551         an = (struct ath_node *)sta->drv_priv;
552
553         if (sc->sc_flags & SC_OP_TXAGGR) {
554                 ath_tx_node_init(sc, an);
555                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
556                                      sta->ht_cap.ampdu_factor);
557                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
558         }
559 }
560
561 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
562 {
563         struct ath_node *an = (struct ath_node *)sta->drv_priv;
564
565         if (sc->sc_flags & SC_OP_TXAGGR)
566                 ath_tx_node_cleanup(sc, an);
567 }
568
569 void ath_hw_check(struct work_struct *work)
570 {
571         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
572         int i;
573
574         ath9k_ps_wakeup(sc);
575
576         for (i = 0; i < 3; i++) {
577                 if (ath9k_hw_check_alive(sc->sc_ah))
578                         goto out;
579
580                 msleep(1);
581         }
582         ath_reset(sc, true);
583
584 out:
585         ath9k_ps_restore(sc);
586 }
587
588 void ath9k_tasklet(unsigned long data)
589 {
590         struct ath_softc *sc = (struct ath_softc *)data;
591         struct ath_hw *ah = sc->sc_ah;
592         struct ath_common *common = ath9k_hw_common(ah);
593
594         u32 status = sc->intrstatus;
595         u32 rxmask;
596
597         ath9k_ps_wakeup(sc);
598
599         if (status & ATH9K_INT_FATAL) {
600                 ath_reset(sc, true);
601                 ath9k_ps_restore(sc);
602                 return;
603         }
604
605         spin_lock_bh(&sc->sc_pcu_lock);
606
607         if (!ath9k_hw_check_alive(ah))
608                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
609
610         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
611                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
612                           ATH9K_INT_RXORN);
613         else
614                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
615
616         if (status & rxmask) {
617                 /* Check for high priority Rx first */
618                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
619                     (status & ATH9K_INT_RXHP))
620                         ath_rx_tasklet(sc, 0, true);
621
622                 ath_rx_tasklet(sc, 0, false);
623         }
624
625         if (status & ATH9K_INT_TX) {
626                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
627                         ath_tx_edma_tasklet(sc);
628                 else
629                         ath_tx_tasklet(sc);
630         }
631
632         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
633                 /*
634                  * TSF sync does not look correct; remain awake to sync with
635                  * the next Beacon.
636                  */
637                 ath_print(common, ATH_DBG_PS,
638                           "TSFOOR - Sync with next Beacon\n");
639                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
640         }
641
642         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
643                 if (status & ATH9K_INT_GENTIMER)
644                         ath_gen_timer_isr(sc->sc_ah);
645
646         /* re-enable hardware interrupt */
647         ath9k_hw_enable_interrupts(ah);
648
649         spin_unlock_bh(&sc->sc_pcu_lock);
650         ath9k_ps_restore(sc);
651 }
652
653 irqreturn_t ath_isr(int irq, void *dev)
654 {
655 #define SCHED_INTR (                            \
656                 ATH9K_INT_FATAL |               \
657                 ATH9K_INT_RXORN |               \
658                 ATH9K_INT_RXEOL |               \
659                 ATH9K_INT_RX |                  \
660                 ATH9K_INT_RXLP |                \
661                 ATH9K_INT_RXHP |                \
662                 ATH9K_INT_TX |                  \
663                 ATH9K_INT_BMISS |               \
664                 ATH9K_INT_CST |                 \
665                 ATH9K_INT_TSFOOR |              \
666                 ATH9K_INT_GENTIMER)
667
668         struct ath_softc *sc = dev;
669         struct ath_hw *ah = sc->sc_ah;
670         struct ath_common *common = ath9k_hw_common(ah);
671         enum ath9k_int status;
672         bool sched = false;
673
674         /*
675          * The hardware is not ready/present, don't
676          * touch anything. Note this can happen early
677          * on if the IRQ is shared.
678          */
679         if (sc->sc_flags & SC_OP_INVALID)
680                 return IRQ_NONE;
681
682
683         /* shared irq, not for us */
684
685         if (!ath9k_hw_intrpend(ah))
686                 return IRQ_NONE;
687
688         /*
689          * Figure out the reason(s) for the interrupt.  Note
690          * that the hal returns a pseudo-ISR that may include
691          * bits we haven't explicitly enabled so we mask the
692          * value to insure we only process bits we requested.
693          */
694         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
695         status &= ah->imask;    /* discard unasked-for bits */
696
697         /*
698          * If there are no status bits set, then this interrupt was not
699          * for me (should have been caught above).
700          */
701         if (!status)
702                 return IRQ_NONE;
703
704         /* Cache the status */
705         sc->intrstatus = status;
706
707         if (status & SCHED_INTR)
708                 sched = true;
709
710         /*
711          * If a FATAL or RXORN interrupt is received, we have to reset the
712          * chip immediately.
713          */
714         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
715             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
716                 goto chip_reset;
717
718         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719             (status & ATH9K_INT_BB_WATCHDOG)) {
720
721                 spin_lock(&common->cc_lock);
722                 ath_hw_cycle_counters_update(common);
723                 ar9003_hw_bb_watchdog_dbg_info(ah);
724                 spin_unlock(&common->cc_lock);
725
726                 goto chip_reset;
727         }
728
729         if (status & ATH9K_INT_SWBA)
730                 tasklet_schedule(&sc->bcon_tasklet);
731
732         if (status & ATH9K_INT_TXURN)
733                 ath9k_hw_updatetxtriglevel(ah, true);
734
735         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
736                 if (status & ATH9K_INT_RXEOL) {
737                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
738                         ath9k_hw_set_interrupts(ah, ah->imask);
739                 }
740         }
741
742         if (status & ATH9K_INT_MIB) {
743                 /*
744                  * Disable interrupts until we service the MIB
745                  * interrupt; otherwise it will continue to
746                  * fire.
747                  */
748                 ath9k_hw_disable_interrupts(ah);
749                 /*
750                  * Let the hal handle the event. We assume
751                  * it will clear whatever condition caused
752                  * the interrupt.
753                  */
754                 spin_lock(&common->cc_lock);
755                 ath9k_hw_proc_mib_event(ah);
756                 spin_unlock(&common->cc_lock);
757                 ath9k_hw_enable_interrupts(ah);
758         }
759
760         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
761                 if (status & ATH9K_INT_TIM_TIMER) {
762                         /* Clear RxAbort bit so that we can
763                          * receive frames */
764                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
765                         ath9k_hw_setrxabort(sc->sc_ah, 0);
766                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
767                 }
768
769 chip_reset:
770
771         ath_debug_stat_interrupt(sc, status);
772
773         if (sched) {
774                 /* turn off every interrupt */
775                 ath9k_hw_disable_interrupts(ah);
776                 tasklet_schedule(&sc->intr_tq);
777         }
778
779         return IRQ_HANDLED;
780
781 #undef SCHED_INTR
782 }
783
784 static u32 ath_get_extchanmode(struct ath_softc *sc,
785                                struct ieee80211_channel *chan,
786                                enum nl80211_channel_type channel_type)
787 {
788         u32 chanmode = 0;
789
790         switch (chan->band) {
791         case IEEE80211_BAND_2GHZ:
792                 switch(channel_type) {
793                 case NL80211_CHAN_NO_HT:
794                 case NL80211_CHAN_HT20:
795                         chanmode = CHANNEL_G_HT20;
796                         break;
797                 case NL80211_CHAN_HT40PLUS:
798                         chanmode = CHANNEL_G_HT40PLUS;
799                         break;
800                 case NL80211_CHAN_HT40MINUS:
801                         chanmode = CHANNEL_G_HT40MINUS;
802                         break;
803                 }
804                 break;
805         case IEEE80211_BAND_5GHZ:
806                 switch(channel_type) {
807                 case NL80211_CHAN_NO_HT:
808                 case NL80211_CHAN_HT20:
809                         chanmode = CHANNEL_A_HT20;
810                         break;
811                 case NL80211_CHAN_HT40PLUS:
812                         chanmode = CHANNEL_A_HT40PLUS;
813                         break;
814                 case NL80211_CHAN_HT40MINUS:
815                         chanmode = CHANNEL_A_HT40MINUS;
816                         break;
817                 }
818                 break;
819         default:
820                 break;
821         }
822
823         return chanmode;
824 }
825
826 static void ath9k_bss_assoc_info(struct ath_softc *sc,
827                                  struct ieee80211_hw *hw,
828                                  struct ieee80211_vif *vif,
829                                  struct ieee80211_bss_conf *bss_conf)
830 {
831         struct ath_wiphy *aphy = hw->priv;
832         struct ath_hw *ah = sc->sc_ah;
833         struct ath_common *common = ath9k_hw_common(ah);
834
835         if (bss_conf->assoc) {
836                 ath_print(common, ATH_DBG_CONFIG,
837                           "Bss Info ASSOC %d, bssid: %pM\n",
838                            bss_conf->aid, common->curbssid);
839
840                 /* New association, store aid */
841                 common->curaid = bss_conf->aid;
842                 ath9k_hw_write_associd(ah);
843
844                 /*
845                  * Request a re-configuration of Beacon related timers
846                  * on the receipt of the first Beacon frame (i.e.,
847                  * after time sync with the AP).
848                  */
849                 sc->ps_flags |= PS_BEACON_SYNC;
850
851                 /* Configure the beacon */
852                 ath_beacon_config(sc, vif);
853
854                 /* Reset rssi stats */
855                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
856                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
857
858                 sc->sc_flags |= SC_OP_ANI_RUN;
859                 ath_start_ani(common);
860         } else {
861                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
862                 common->curaid = 0;
863                 /* Stop ANI */
864                 sc->sc_flags &= ~SC_OP_ANI_RUN;
865                 del_timer_sync(&common->ani.timer);
866         }
867 }
868
869 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
870 {
871         struct ath_hw *ah = sc->sc_ah;
872         struct ath_common *common = ath9k_hw_common(ah);
873         struct ieee80211_channel *channel = hw->conf.channel;
874         int r;
875
876         ath9k_ps_wakeup(sc);
877         spin_lock_bh(&sc->sc_pcu_lock);
878
879         ath9k_hw_configpcipowersave(ah, 0, 0);
880
881         if (!ah->curchan)
882                 ah->curchan = ath_get_curchannel(sc, sc->hw);
883
884         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
885         if (r) {
886                 ath_print(common, ATH_DBG_FATAL,
887                           "Unable to reset channel (%u MHz), "
888                           "reset status %d\n",
889                           channel->center_freq, r);
890         }
891
892         ath_update_txpow(sc);
893         if (ath_startrecv(sc) != 0) {
894                 ath_print(common, ATH_DBG_FATAL,
895                           "Unable to restart recv logic\n");
896                 spin_unlock_bh(&sc->sc_pcu_lock);
897                 return;
898         }
899         if (sc->sc_flags & SC_OP_BEACONS)
900                 ath_beacon_config(sc, NULL);    /* restart beacons */
901
902         /* Re-Enable  interrupts */
903         ath9k_hw_set_interrupts(ah, ah->imask);
904
905         /* Enable LED */
906         ath9k_hw_cfg_output(ah, ah->led_pin,
907                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
908         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
909
910         ieee80211_wake_queues(hw);
911         spin_unlock_bh(&sc->sc_pcu_lock);
912
913         ath9k_ps_restore(sc);
914 }
915
916 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
917 {
918         struct ath_hw *ah = sc->sc_ah;
919         struct ieee80211_channel *channel = hw->conf.channel;
920         int r;
921
922         ath9k_ps_wakeup(sc);
923         spin_lock_bh(&sc->sc_pcu_lock);
924
925         ieee80211_stop_queues(hw);
926
927         /*
928          * Keep the LED on when the radio is disabled
929          * during idle unassociated state.
930          */
931         if (!sc->ps_idle) {
932                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
933                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
934         }
935
936         /* Disable interrupts */
937         ath9k_hw_disable_interrupts(ah);
938
939         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
940
941         ath_stoprecv(sc);               /* turn off frame recv */
942         ath_flushrecv(sc);              /* flush recv queue */
943
944         if (!ah->curchan)
945                 ah->curchan = ath_get_curchannel(sc, hw);
946
947         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
948         if (r) {
949                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
950                           "Unable to reset channel (%u MHz), "
951                           "reset status %d\n",
952                           channel->center_freq, r);
953         }
954
955         ath9k_hw_phy_disable(ah);
956
957         ath9k_hw_configpcipowersave(ah, 1, 1);
958
959         spin_unlock_bh(&sc->sc_pcu_lock);
960         ath9k_ps_restore(sc);
961
962         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
963 }
964
965 int ath_reset(struct ath_softc *sc, bool retry_tx)
966 {
967         struct ath_hw *ah = sc->sc_ah;
968         struct ath_common *common = ath9k_hw_common(ah);
969         struct ieee80211_hw *hw = sc->hw;
970         int r;
971
972         /* Stop ANI */
973         del_timer_sync(&common->ani.timer);
974
975         spin_lock_bh(&sc->sc_pcu_lock);
976
977         ieee80211_stop_queues(hw);
978
979         ath9k_hw_disable_interrupts(ah);
980         ath_drain_all_txq(sc, retry_tx);
981
982         ath_stoprecv(sc);
983         ath_flushrecv(sc);
984
985         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
986         if (r)
987                 ath_print(common, ATH_DBG_FATAL,
988                           "Unable to reset hardware; reset status %d\n", r);
989
990         if (ath_startrecv(sc) != 0)
991                 ath_print(common, ATH_DBG_FATAL,
992                           "Unable to start recv logic\n");
993
994         /*
995          * We may be doing a reset in response to a request
996          * that changes the channel so update any state that
997          * might change as a result.
998          */
999         ath_update_txpow(sc);
1000
1001         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1002                 ath_beacon_config(sc, NULL);    /* restart beacons */
1003
1004         ath9k_hw_set_interrupts(ah, ah->imask);
1005
1006         if (retry_tx) {
1007                 int i;
1008                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1009                         if (ATH_TXQ_SETUP(sc, i)) {
1010                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1011                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1012                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1013                         }
1014                 }
1015         }
1016
1017         ieee80211_wake_queues(hw);
1018         spin_unlock_bh(&sc->sc_pcu_lock);
1019
1020         /* Start ANI */
1021         ath_start_ani(common);
1022
1023         return r;
1024 }
1025
1026 /* XXX: Remove me once we don't depend on ath9k_channel for all
1027  * this redundant data */
1028 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1029                            struct ath9k_channel *ichan)
1030 {
1031         struct ieee80211_channel *chan = hw->conf.channel;
1032         struct ieee80211_conf *conf = &hw->conf;
1033
1034         ichan->channel = chan->center_freq;
1035         ichan->chan = chan;
1036
1037         if (chan->band == IEEE80211_BAND_2GHZ) {
1038                 ichan->chanmode = CHANNEL_G;
1039                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1040         } else {
1041                 ichan->chanmode = CHANNEL_A;
1042                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1043         }
1044
1045         if (conf_is_ht(conf))
1046                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1047                                             conf->channel_type);
1048 }
1049
1050 /**********************/
1051 /* mac80211 callbacks */
1052 /**********************/
1053
1054 static int ath9k_start(struct ieee80211_hw *hw)
1055 {
1056         struct ath_wiphy *aphy = hw->priv;
1057         struct ath_softc *sc = aphy->sc;
1058         struct ath_hw *ah = sc->sc_ah;
1059         struct ath_common *common = ath9k_hw_common(ah);
1060         struct ieee80211_channel *curchan = hw->conf.channel;
1061         struct ath9k_channel *init_channel;
1062         int r;
1063
1064         ath_print(common, ATH_DBG_CONFIG,
1065                   "Starting driver with initial channel: %d MHz\n",
1066                   curchan->center_freq);
1067
1068         mutex_lock(&sc->mutex);
1069
1070         if (ath9k_wiphy_started(sc)) {
1071                 if (sc->chan_idx == curchan->hw_value) {
1072                         /*
1073                          * Already on the operational channel, the new wiphy
1074                          * can be marked active.
1075                          */
1076                         aphy->state = ATH_WIPHY_ACTIVE;
1077                         ieee80211_wake_queues(hw);
1078                 } else {
1079                         /*
1080                          * Another wiphy is on another channel, start the new
1081                          * wiphy in paused state.
1082                          */
1083                         aphy->state = ATH_WIPHY_PAUSED;
1084                         ieee80211_stop_queues(hw);
1085                 }
1086                 mutex_unlock(&sc->mutex);
1087                 return 0;
1088         }
1089         aphy->state = ATH_WIPHY_ACTIVE;
1090
1091         /* setup initial channel */
1092
1093         sc->chan_idx = curchan->hw_value;
1094
1095         init_channel = ath_get_curchannel(sc, hw);
1096
1097         /* Reset SERDES registers */
1098         ath9k_hw_configpcipowersave(ah, 0, 0);
1099
1100         /*
1101          * The basic interface to setting the hardware in a good
1102          * state is ``reset''.  On return the hardware is known to
1103          * be powered up and with interrupts disabled.  This must
1104          * be followed by initialization of the appropriate bits
1105          * and then setup of the interrupt mask.
1106          */
1107         spin_lock_bh(&sc->sc_pcu_lock);
1108         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1109         if (r) {
1110                 ath_print(common, ATH_DBG_FATAL,
1111                           "Unable to reset hardware; reset status %d "
1112                           "(freq %u MHz)\n", r,
1113                           curchan->center_freq);
1114                 spin_unlock_bh(&sc->sc_pcu_lock);
1115                 goto mutex_unlock;
1116         }
1117
1118         /*
1119          * This is needed only to setup initial state
1120          * but it's best done after a reset.
1121          */
1122         ath_update_txpow(sc);
1123
1124         /*
1125          * Setup the hardware after reset:
1126          * The receive engine is set going.
1127          * Frame transmit is handled entirely
1128          * in the frame output path; there's nothing to do
1129          * here except setup the interrupt mask.
1130          */
1131         if (ath_startrecv(sc) != 0) {
1132                 ath_print(common, ATH_DBG_FATAL,
1133                           "Unable to start recv logic\n");
1134                 r = -EIO;
1135                 spin_unlock_bh(&sc->sc_pcu_lock);
1136                 goto mutex_unlock;
1137         }
1138         spin_unlock_bh(&sc->sc_pcu_lock);
1139
1140         /* Setup our intr mask. */
1141         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1142                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1143                     ATH9K_INT_GLOBAL;
1144
1145         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1146                 ah->imask |= ATH9K_INT_RXHP |
1147                              ATH9K_INT_RXLP |
1148                              ATH9K_INT_BB_WATCHDOG;
1149         else
1150                 ah->imask |= ATH9K_INT_RX;
1151
1152         ah->imask |= ATH9K_INT_GTT;
1153
1154         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1155                 ah->imask |= ATH9K_INT_CST;
1156
1157         sc->sc_flags &= ~SC_OP_INVALID;
1158
1159         /* Disable BMISS interrupt when we're not associated */
1160         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1161         ath9k_hw_set_interrupts(ah, ah->imask);
1162
1163         ieee80211_wake_queues(hw);
1164
1165         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1166
1167         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1168             !ah->btcoex_hw.enabled) {
1169                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1170                                            AR_STOMP_LOW_WLAN_WGHT);
1171                 ath9k_hw_btcoex_enable(ah);
1172
1173                 if (common->bus_ops->bt_coex_prep)
1174                         common->bus_ops->bt_coex_prep(common);
1175                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1176                         ath9k_btcoex_timer_resume(sc);
1177         }
1178
1179 mutex_unlock:
1180         mutex_unlock(&sc->mutex);
1181
1182         return r;
1183 }
1184
1185 static int ath9k_tx(struct ieee80211_hw *hw,
1186                     struct sk_buff *skb)
1187 {
1188         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1189         struct ath_wiphy *aphy = hw->priv;
1190         struct ath_softc *sc = aphy->sc;
1191         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1192         struct ath_tx_control txctl;
1193         int padpos, padsize;
1194         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1195
1196         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1197                 ath_print(common, ATH_DBG_XMIT,
1198                           "ath9k: %s: TX in unexpected wiphy state "
1199                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1200                 goto exit;
1201         }
1202
1203         if (sc->ps_enabled) {
1204                 /*
1205                  * mac80211 does not set PM field for normal data frames, so we
1206                  * need to update that based on the current PS mode.
1207                  */
1208                 if (ieee80211_is_data(hdr->frame_control) &&
1209                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1210                     !ieee80211_has_pm(hdr->frame_control)) {
1211                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1212                                   "while in PS mode\n");
1213                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1214                 }
1215         }
1216
1217         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1218                 /*
1219                  * We are using PS-Poll and mac80211 can request TX while in
1220                  * power save mode. Need to wake up hardware for the TX to be
1221                  * completed and if needed, also for RX of buffered frames.
1222                  */
1223                 ath9k_ps_wakeup(sc);
1224                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1225                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1226                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1227                         ath_print(common, ATH_DBG_PS,
1228                                   "Sending PS-Poll to pick a buffered frame\n");
1229                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1230                 } else {
1231                         ath_print(common, ATH_DBG_PS,
1232                                   "Wake up to complete TX\n");
1233                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1234                 }
1235                 /*
1236                  * The actual restore operation will happen only after
1237                  * the sc_flags bit is cleared. We are just dropping
1238                  * the ps_usecount here.
1239                  */
1240                 ath9k_ps_restore(sc);
1241         }
1242
1243         memset(&txctl, 0, sizeof(struct ath_tx_control));
1244
1245         /*
1246          * As a temporary workaround, assign seq# here; this will likely need
1247          * to be cleaned up to work better with Beacon transmission and virtual
1248          * BSSes.
1249          */
1250         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1251                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1252                         sc->tx.seq_no += 0x10;
1253                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1254                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1255         }
1256
1257         /* Add the padding after the header if this is not already done */
1258         padpos = ath9k_cmn_padpos(hdr->frame_control);
1259         padsize = padpos & 3;
1260         if (padsize && skb->len>padpos) {
1261                 if (skb_headroom(skb) < padsize)
1262                         return -1;
1263                 skb_push(skb, padsize);
1264                 memmove(skb->data, skb->data + padsize, padpos);
1265         }
1266
1267         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1268
1269         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1270
1271         if (ath_tx_start(hw, skb, &txctl) != 0) {
1272                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1273                 goto exit;
1274         }
1275
1276         return 0;
1277 exit:
1278         dev_kfree_skb_any(skb);
1279         return 0;
1280 }
1281
1282 static void ath9k_stop(struct ieee80211_hw *hw)
1283 {
1284         struct ath_wiphy *aphy = hw->priv;
1285         struct ath_softc *sc = aphy->sc;
1286         struct ath_hw *ah = sc->sc_ah;
1287         struct ath_common *common = ath9k_hw_common(ah);
1288         int i;
1289
1290         mutex_lock(&sc->mutex);
1291
1292         aphy->state = ATH_WIPHY_INACTIVE;
1293
1294         if (led_blink)
1295                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1296
1297         cancel_delayed_work_sync(&sc->tx_complete_work);
1298         cancel_work_sync(&sc->paprd_work);
1299         cancel_work_sync(&sc->hw_check_work);
1300
1301         for (i = 0; i < sc->num_sec_wiphy; i++) {
1302                 if (sc->sec_wiphy[i])
1303                         break;
1304         }
1305
1306         if (i == sc->num_sec_wiphy) {
1307                 cancel_delayed_work_sync(&sc->wiphy_work);
1308                 cancel_work_sync(&sc->chan_work);
1309         }
1310
1311         if (sc->sc_flags & SC_OP_INVALID) {
1312                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1313                 mutex_unlock(&sc->mutex);
1314                 return;
1315         }
1316
1317         if (ath9k_wiphy_started(sc)) {
1318                 mutex_unlock(&sc->mutex);
1319                 return; /* another wiphy still in use */
1320         }
1321
1322         /* Ensure HW is awake when we try to shut it down. */
1323         ath9k_ps_wakeup(sc);
1324
1325         if (ah->btcoex_hw.enabled) {
1326                 ath9k_hw_btcoex_disable(ah);
1327                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1328                         ath9k_btcoex_timer_pause(sc);
1329         }
1330
1331         spin_lock_bh(&sc->sc_pcu_lock);
1332
1333         /* make sure h/w will not generate any interrupt
1334          * before setting the invalid flag. */
1335         ath9k_hw_disable_interrupts(ah);
1336
1337         if (!(sc->sc_flags & SC_OP_INVALID)) {
1338                 ath_drain_all_txq(sc, false);
1339                 ath_stoprecv(sc);
1340                 ath9k_hw_phy_disable(ah);
1341         } else
1342                 sc->rx.rxlink = NULL;
1343
1344         /* disable HAL and put h/w to sleep */
1345         ath9k_hw_disable(ah);
1346         ath9k_hw_configpcipowersave(ah, 1, 1);
1347
1348         spin_unlock_bh(&sc->sc_pcu_lock);
1349
1350         ath9k_ps_restore(sc);
1351
1352         /* Finally, put the chip in FULL SLEEP mode */
1353         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1354
1355         sc->sc_flags |= SC_OP_INVALID;
1356
1357         mutex_unlock(&sc->mutex);
1358
1359         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1360 }
1361
1362 static int ath9k_add_interface(struct ieee80211_hw *hw,
1363                                struct ieee80211_vif *vif)
1364 {
1365         struct ath_wiphy *aphy = hw->priv;
1366         struct ath_softc *sc = aphy->sc;
1367         struct ath_hw *ah = sc->sc_ah;
1368         struct ath_common *common = ath9k_hw_common(ah);
1369         struct ath_vif *avp = (void *)vif->drv_priv;
1370         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1371         int ret = 0;
1372
1373         mutex_lock(&sc->mutex);
1374
1375         switch (vif->type) {
1376         case NL80211_IFTYPE_STATION:
1377                 ic_opmode = NL80211_IFTYPE_STATION;
1378                 break;
1379         case NL80211_IFTYPE_WDS:
1380                 ic_opmode = NL80211_IFTYPE_WDS;
1381                 break;
1382         case NL80211_IFTYPE_ADHOC:
1383         case NL80211_IFTYPE_AP:
1384         case NL80211_IFTYPE_MESH_POINT:
1385                 if (sc->nbcnvifs >= ATH_BCBUF) {
1386                         ret = -ENOBUFS;
1387                         goto out;
1388                 }
1389                 ic_opmode = vif->type;
1390                 break;
1391         default:
1392                 ath_print(common, ATH_DBG_FATAL,
1393                         "Interface type %d not yet supported\n", vif->type);
1394                 ret = -EOPNOTSUPP;
1395                 goto out;
1396         }
1397
1398         ath_print(common, ATH_DBG_CONFIG,
1399                   "Attach a VIF of type: %d\n", ic_opmode);
1400
1401         /* Set the VIF opmode */
1402         avp->av_opmode = ic_opmode;
1403         avp->av_bslot = -1;
1404
1405         sc->nvifs++;
1406
1407         ath9k_set_bssid_mask(hw, vif);
1408
1409         if (sc->nvifs > 1)
1410                 goto out; /* skip global settings for secondary vif */
1411
1412         if (ic_opmode == NL80211_IFTYPE_AP) {
1413                 ath9k_hw_set_tsfadjust(ah, 1);
1414                 sc->sc_flags |= SC_OP_TSF_RESET;
1415         }
1416
1417         /* Set the device opmode */
1418         ah->opmode = ic_opmode;
1419
1420         /*
1421          * Enable MIB interrupts when there are hardware phy counters.
1422          * Note we only do this (at the moment) for station mode.
1423          */
1424         if ((vif->type == NL80211_IFTYPE_STATION) ||
1425             (vif->type == NL80211_IFTYPE_ADHOC) ||
1426             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1427                 if (ah->config.enable_ani)
1428                         ah->imask |= ATH9K_INT_MIB;
1429                 ah->imask |= ATH9K_INT_TSFOOR;
1430         }
1431
1432         ath9k_hw_set_interrupts(ah, ah->imask);
1433
1434         if (vif->type == NL80211_IFTYPE_AP    ||
1435             vif->type == NL80211_IFTYPE_ADHOC ||
1436             vif->type == NL80211_IFTYPE_MONITOR) {
1437                 sc->sc_flags |= SC_OP_ANI_RUN;
1438                 ath_start_ani(common);
1439         }
1440
1441 out:
1442         mutex_unlock(&sc->mutex);
1443         return ret;
1444 }
1445
1446 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1447                                    struct ieee80211_vif *vif)
1448 {
1449         struct ath_wiphy *aphy = hw->priv;
1450         struct ath_softc *sc = aphy->sc;
1451         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1452         struct ath_vif *avp = (void *)vif->drv_priv;
1453         int i;
1454
1455         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1456
1457         mutex_lock(&sc->mutex);
1458
1459         /* Stop ANI */
1460         sc->sc_flags &= ~SC_OP_ANI_RUN;
1461         del_timer_sync(&common->ani.timer);
1462
1463         /* Reclaim beacon resources */
1464         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1465             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1466             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1467                 ath9k_ps_wakeup(sc);
1468                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1469                 ath9k_ps_restore(sc);
1470         }
1471
1472         ath_beacon_return(sc, avp);
1473         sc->sc_flags &= ~SC_OP_BEACONS;
1474
1475         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1476                 if (sc->beacon.bslot[i] == vif) {
1477                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1478                                "slot\n", __func__);
1479                         sc->beacon.bslot[i] = NULL;
1480                         sc->beacon.bslot_aphy[i] = NULL;
1481                 }
1482         }
1483
1484         sc->nvifs--;
1485
1486         mutex_unlock(&sc->mutex);
1487 }
1488
1489 static void ath9k_enable_ps(struct ath_softc *sc)
1490 {
1491         struct ath_hw *ah = sc->sc_ah;
1492
1493         sc->ps_enabled = true;
1494         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1495                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1496                         ah->imask |= ATH9K_INT_TIM_TIMER;
1497                         ath9k_hw_set_interrupts(ah, ah->imask);
1498                 }
1499                 ath9k_hw_setrxabort(ah, 1);
1500         }
1501 }
1502
1503 static void ath9k_disable_ps(struct ath_softc *sc)
1504 {
1505         struct ath_hw *ah = sc->sc_ah;
1506
1507         sc->ps_enabled = false;
1508         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1509         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1510                 ath9k_hw_setrxabort(ah, 0);
1511                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1512                                   PS_WAIT_FOR_CAB |
1513                                   PS_WAIT_FOR_PSPOLL_DATA |
1514                                   PS_WAIT_FOR_TX_ACK);
1515                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1516                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1517                         ath9k_hw_set_interrupts(ah, ah->imask);
1518                 }
1519         }
1520
1521 }
1522
1523 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1524 {
1525         struct ath_wiphy *aphy = hw->priv;
1526         struct ath_softc *sc = aphy->sc;
1527         struct ath_hw *ah = sc->sc_ah;
1528         struct ath_common *common = ath9k_hw_common(ah);
1529         struct ieee80211_conf *conf = &hw->conf;
1530         bool disable_radio;
1531
1532         mutex_lock(&sc->mutex);
1533
1534         /*
1535          * Leave this as the first check because we need to turn on the
1536          * radio if it was disabled before prior to processing the rest
1537          * of the changes. Likewise we must only disable the radio towards
1538          * the end.
1539          */
1540         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1541                 bool enable_radio;
1542                 bool all_wiphys_idle;
1543                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1544
1545                 spin_lock_bh(&sc->wiphy_lock);
1546                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1547                 ath9k_set_wiphy_idle(aphy, idle);
1548
1549                 enable_radio = (!idle && all_wiphys_idle);
1550
1551                 /*
1552                  * After we unlock here its possible another wiphy
1553                  * can be re-renabled so to account for that we will
1554                  * only disable the radio toward the end of this routine
1555                  * if by then all wiphys are still idle.
1556                  */
1557                 spin_unlock_bh(&sc->wiphy_lock);
1558
1559                 if (enable_radio) {
1560                         sc->ps_idle = false;
1561                         ath_radio_enable(sc, hw);
1562                         ath_print(common, ATH_DBG_CONFIG,
1563                                   "not-idle: enabling radio\n");
1564                 }
1565         }
1566
1567         /*
1568          * We just prepare to enable PS. We have to wait until our AP has
1569          * ACK'd our null data frame to disable RX otherwise we'll ignore
1570          * those ACKs and end up retransmitting the same null data frames.
1571          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1572          */
1573         if (changed & IEEE80211_CONF_CHANGE_PS) {
1574                 unsigned long flags;
1575                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1576                 if (conf->flags & IEEE80211_CONF_PS)
1577                         ath9k_enable_ps(sc);
1578                 else
1579                         ath9k_disable_ps(sc);
1580                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1581         }
1582
1583         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1584                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1585                         ath_print(common, ATH_DBG_CONFIG,
1586                                   "HW opmode set to Monitor mode\n");
1587                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1588                 }
1589         }
1590
1591         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1592                 struct ieee80211_channel *curchan = hw->conf.channel;
1593                 int pos = curchan->hw_value;
1594                 int old_pos = -1;
1595                 unsigned long flags;
1596
1597                 if (ah->curchan)
1598                         old_pos = ah->curchan - &ah->channels[0];
1599
1600                 aphy->chan_idx = pos;
1601                 aphy->chan_is_ht = conf_is_ht(conf);
1602                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1603                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1604                 else
1605                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1606
1607                 if (aphy->state == ATH_WIPHY_SCAN ||
1608                     aphy->state == ATH_WIPHY_ACTIVE)
1609                         ath9k_wiphy_pause_all_forced(sc, aphy);
1610                 else {
1611                         /*
1612                          * Do not change operational channel based on a paused
1613                          * wiphy changes.
1614                          */
1615                         goto skip_chan_change;
1616                 }
1617
1618                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1619                           curchan->center_freq);
1620
1621                 /* XXX: remove me eventualy */
1622                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1623
1624                 ath_update_chainmask(sc, conf_is_ht(conf));
1625
1626                 /* update survey stats for the old channel before switching */
1627                 spin_lock_irqsave(&common->cc_lock, flags);
1628                 ath_update_survey_stats(sc);
1629                 spin_unlock_irqrestore(&common->cc_lock, flags);
1630
1631                 /*
1632                  * If the operating channel changes, change the survey in-use flags
1633                  * along with it.
1634                  * Reset the survey data for the new channel, unless we're switching
1635                  * back to the operating channel from an off-channel operation.
1636                  */
1637                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1638                     sc->cur_survey != &sc->survey[pos]) {
1639
1640                         if (sc->cur_survey)
1641                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1642
1643                         sc->cur_survey = &sc->survey[pos];
1644
1645                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1646                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1647                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1648                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1649                 }
1650
1651                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1652                         ath_print(common, ATH_DBG_FATAL,
1653                                   "Unable to set channel\n");
1654                         mutex_unlock(&sc->mutex);
1655                         return -EINVAL;
1656                 }
1657
1658                 /*
1659                  * The most recent snapshot of channel->noisefloor for the old
1660                  * channel is only available after the hardware reset. Copy it to
1661                  * the survey stats now.
1662                  */
1663                 if (old_pos >= 0)
1664                         ath_update_survey_nf(sc, old_pos);
1665         }
1666
1667 skip_chan_change:
1668         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1669                 sc->config.txpowlimit = 2 * conf->power_level;
1670                 ath_update_txpow(sc);
1671         }
1672
1673         spin_lock_bh(&sc->wiphy_lock);
1674         disable_radio = ath9k_all_wiphys_idle(sc);
1675         spin_unlock_bh(&sc->wiphy_lock);
1676
1677         if (disable_radio) {
1678                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1679                 sc->ps_idle = true;
1680                 ath_radio_disable(sc, hw);
1681         }
1682
1683         mutex_unlock(&sc->mutex);
1684
1685         return 0;
1686 }
1687
1688 #define SUPPORTED_FILTERS                       \
1689         (FIF_PROMISC_IN_BSS |                   \
1690         FIF_ALLMULTI |                          \
1691         FIF_CONTROL |                           \
1692         FIF_PSPOLL |                            \
1693         FIF_OTHER_BSS |                         \
1694         FIF_BCN_PRBRESP_PROMISC |               \
1695         FIF_PROBE_REQ |                         \
1696         FIF_FCSFAIL)
1697
1698 /* FIXME: sc->sc_full_reset ? */
1699 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1700                                    unsigned int changed_flags,
1701                                    unsigned int *total_flags,
1702                                    u64 multicast)
1703 {
1704         struct ath_wiphy *aphy = hw->priv;
1705         struct ath_softc *sc = aphy->sc;
1706         u32 rfilt;
1707
1708         changed_flags &= SUPPORTED_FILTERS;
1709         *total_flags &= SUPPORTED_FILTERS;
1710
1711         sc->rx.rxfilter = *total_flags;
1712         ath9k_ps_wakeup(sc);
1713         rfilt = ath_calcrxfilter(sc);
1714         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1715         ath9k_ps_restore(sc);
1716
1717         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1718                   "Set HW RX filter: 0x%x\n", rfilt);
1719 }
1720
1721 static int ath9k_sta_add(struct ieee80211_hw *hw,
1722                          struct ieee80211_vif *vif,
1723                          struct ieee80211_sta *sta)
1724 {
1725         struct ath_wiphy *aphy = hw->priv;
1726         struct ath_softc *sc = aphy->sc;
1727
1728         ath_node_attach(sc, sta);
1729
1730         return 0;
1731 }
1732
1733 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1734                             struct ieee80211_vif *vif,
1735                             struct ieee80211_sta *sta)
1736 {
1737         struct ath_wiphy *aphy = hw->priv;
1738         struct ath_softc *sc = aphy->sc;
1739
1740         ath_node_detach(sc, sta);
1741
1742         return 0;
1743 }
1744
1745 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1746                          const struct ieee80211_tx_queue_params *params)
1747 {
1748         struct ath_wiphy *aphy = hw->priv;
1749         struct ath_softc *sc = aphy->sc;
1750         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1751         struct ath_txq *txq;
1752         struct ath9k_tx_queue_info qi;
1753         int ret = 0;
1754
1755         if (queue >= WME_NUM_AC)
1756                 return 0;
1757
1758         txq = sc->tx.txq_map[queue];
1759
1760         mutex_lock(&sc->mutex);
1761
1762         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1763
1764         qi.tqi_aifs = params->aifs;
1765         qi.tqi_cwmin = params->cw_min;
1766         qi.tqi_cwmax = params->cw_max;
1767         qi.tqi_burstTime = params->txop;
1768
1769         ath_print(common, ATH_DBG_CONFIG,
1770                   "Configure tx [queue/halq] [%d/%d],  "
1771                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1772                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1773                   params->cw_max, params->txop);
1774
1775         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1776         if (ret)
1777                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1778
1779         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1780                 if (queue == WME_AC_BE && !ret)
1781                         ath_beaconq_config(sc);
1782
1783         mutex_unlock(&sc->mutex);
1784
1785         return ret;
1786 }
1787
1788 static int ath9k_set_key(struct ieee80211_hw *hw,
1789                          enum set_key_cmd cmd,
1790                          struct ieee80211_vif *vif,
1791                          struct ieee80211_sta *sta,
1792                          struct ieee80211_key_conf *key)
1793 {
1794         struct ath_wiphy *aphy = hw->priv;
1795         struct ath_softc *sc = aphy->sc;
1796         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1797         int ret = 0;
1798
1799         if (modparam_nohwcrypt)
1800                 return -ENOSPC;
1801
1802         mutex_lock(&sc->mutex);
1803         ath9k_ps_wakeup(sc);
1804         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1805
1806         switch (cmd) {
1807         case SET_KEY:
1808                 ret = ath_key_config(common, vif, sta, key);
1809                 if (ret >= 0) {
1810                         key->hw_key_idx = ret;
1811                         /* push IV and Michael MIC generation to stack */
1812                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1813                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1814                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1815                         if (sc->sc_ah->sw_mgmt_crypto &&
1816                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1817                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1818                         ret = 0;
1819                 }
1820                 break;
1821         case DISABLE_KEY:
1822                 ath_key_delete(common, key);
1823                 break;
1824         default:
1825                 ret = -EINVAL;
1826         }
1827
1828         ath9k_ps_restore(sc);
1829         mutex_unlock(&sc->mutex);
1830
1831         return ret;
1832 }
1833
1834 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1835                                    struct ieee80211_vif *vif,
1836                                    struct ieee80211_bss_conf *bss_conf,
1837                                    u32 changed)
1838 {
1839         struct ath_wiphy *aphy = hw->priv;
1840         struct ath_softc *sc = aphy->sc;
1841         struct ath_hw *ah = sc->sc_ah;
1842         struct ath_common *common = ath9k_hw_common(ah);
1843         struct ath_vif *avp = (void *)vif->drv_priv;
1844         int slottime;
1845         int error;
1846
1847         mutex_lock(&sc->mutex);
1848
1849         if (changed & BSS_CHANGED_BSSID) {
1850                 /* Set BSSID */
1851                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1852                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1853                 common->curaid = 0;
1854                 ath9k_hw_write_associd(ah);
1855
1856                 /* Set aggregation protection mode parameters */
1857                 sc->config.ath_aggr_prot = 0;
1858
1859                 /* Only legacy IBSS for now */
1860                 if (vif->type == NL80211_IFTYPE_ADHOC)
1861                         ath_update_chainmask(sc, 0);
1862
1863                 ath_print(common, ATH_DBG_CONFIG,
1864                           "BSSID: %pM aid: 0x%x\n",
1865                           common->curbssid, common->curaid);
1866
1867                 /* need to reconfigure the beacon */
1868                 sc->sc_flags &= ~SC_OP_BEACONS ;
1869         }
1870
1871         /* Enable transmission of beacons (AP, IBSS, MESH) */
1872         if ((changed & BSS_CHANGED_BEACON) ||
1873             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1874                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1875                 error = ath_beacon_alloc(aphy, vif);
1876                 if (!error)
1877                         ath_beacon_config(sc, vif);
1878         }
1879
1880         if (changed & BSS_CHANGED_ERP_SLOT) {
1881                 if (bss_conf->use_short_slot)
1882                         slottime = 9;
1883                 else
1884                         slottime = 20;
1885                 if (vif->type == NL80211_IFTYPE_AP) {
1886                         /*
1887                          * Defer update, so that connected stations can adjust
1888                          * their settings at the same time.
1889                          * See beacon.c for more details
1890                          */
1891                         sc->beacon.slottime = slottime;
1892                         sc->beacon.updateslot = UPDATE;
1893                 } else {
1894                         ah->slottime = slottime;
1895                         ath9k_hw_init_global_settings(ah);
1896                 }
1897         }
1898
1899         /* Disable transmission of beacons */
1900         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1901                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1902
1903         if (changed & BSS_CHANGED_BEACON_INT) {
1904                 sc->beacon_interval = bss_conf->beacon_int;
1905                 /*
1906                  * In case of AP mode, the HW TSF has to be reset
1907                  * when the beacon interval changes.
1908                  */
1909                 if (vif->type == NL80211_IFTYPE_AP) {
1910                         sc->sc_flags |= SC_OP_TSF_RESET;
1911                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1912                         error = ath_beacon_alloc(aphy, vif);
1913                         if (!error)
1914                                 ath_beacon_config(sc, vif);
1915                 } else {
1916                         ath_beacon_config(sc, vif);
1917                 }
1918         }
1919
1920         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1921                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1922                           bss_conf->use_short_preamble);
1923                 if (bss_conf->use_short_preamble)
1924                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1925                 else
1926                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1927         }
1928
1929         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1930                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1931                           bss_conf->use_cts_prot);
1932                 if (bss_conf->use_cts_prot &&
1933                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1934                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1935                 else
1936                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1937         }
1938
1939         if (changed & BSS_CHANGED_ASSOC) {
1940                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1941                         bss_conf->assoc);
1942                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1943         }
1944
1945         mutex_unlock(&sc->mutex);
1946 }
1947
1948 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1949 {
1950         u64 tsf;
1951         struct ath_wiphy *aphy = hw->priv;
1952         struct ath_softc *sc = aphy->sc;
1953
1954         mutex_lock(&sc->mutex);
1955         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1956         mutex_unlock(&sc->mutex);
1957
1958         return tsf;
1959 }
1960
1961 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1962 {
1963         struct ath_wiphy *aphy = hw->priv;
1964         struct ath_softc *sc = aphy->sc;
1965
1966         mutex_lock(&sc->mutex);
1967         ath9k_hw_settsf64(sc->sc_ah, tsf);
1968         mutex_unlock(&sc->mutex);
1969 }
1970
1971 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1972 {
1973         struct ath_wiphy *aphy = hw->priv;
1974         struct ath_softc *sc = aphy->sc;
1975
1976         mutex_lock(&sc->mutex);
1977
1978         ath9k_ps_wakeup(sc);
1979         ath9k_hw_reset_tsf(sc->sc_ah);
1980         ath9k_ps_restore(sc);
1981
1982         mutex_unlock(&sc->mutex);
1983 }
1984
1985 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1986                               struct ieee80211_vif *vif,
1987                               enum ieee80211_ampdu_mlme_action action,
1988                               struct ieee80211_sta *sta,
1989                               u16 tid, u16 *ssn)
1990 {
1991         struct ath_wiphy *aphy = hw->priv;
1992         struct ath_softc *sc = aphy->sc;
1993         int ret = 0;
1994
1995         local_bh_disable();
1996
1997         switch (action) {
1998         case IEEE80211_AMPDU_RX_START:
1999                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2000                         ret = -ENOTSUPP;
2001                 break;
2002         case IEEE80211_AMPDU_RX_STOP:
2003                 break;
2004         case IEEE80211_AMPDU_TX_START:
2005                 ath9k_ps_wakeup(sc);
2006                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2007                 if (!ret)
2008                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2009                 ath9k_ps_restore(sc);
2010                 break;
2011         case IEEE80211_AMPDU_TX_STOP:
2012                 ath9k_ps_wakeup(sc);
2013                 ath_tx_aggr_stop(sc, sta, tid);
2014                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2015                 ath9k_ps_restore(sc);
2016                 break;
2017         case IEEE80211_AMPDU_TX_OPERATIONAL:
2018                 ath9k_ps_wakeup(sc);
2019                 ath_tx_aggr_resume(sc, sta, tid);
2020                 ath9k_ps_restore(sc);
2021                 break;
2022         default:
2023                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2024                           "Unknown AMPDU action\n");
2025         }
2026
2027         local_bh_enable();
2028
2029         return ret;
2030 }
2031
2032 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2033                              struct survey_info *survey)
2034 {
2035         struct ath_wiphy *aphy = hw->priv;
2036         struct ath_softc *sc = aphy->sc;
2037         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2038         struct ieee80211_supported_band *sband;
2039         struct ieee80211_channel *chan;
2040         unsigned long flags;
2041         int pos;
2042
2043         spin_lock_irqsave(&common->cc_lock, flags);
2044         if (idx == 0)
2045                 ath_update_survey_stats(sc);
2046
2047         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2048         if (sband && idx >= sband->n_channels) {
2049                 idx -= sband->n_channels;
2050                 sband = NULL;
2051         }
2052
2053         if (!sband)
2054                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2055
2056         if (!sband || idx >= sband->n_channels) {
2057                 spin_unlock_irqrestore(&common->cc_lock, flags);
2058                 return -ENOENT;
2059         }
2060
2061         chan = &sband->channels[idx];
2062         pos = chan->hw_value;
2063         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2064         survey->channel = chan;
2065         spin_unlock_irqrestore(&common->cc_lock, flags);
2066
2067         return 0;
2068 }
2069
2070 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2071 {
2072         struct ath_wiphy *aphy = hw->priv;
2073         struct ath_softc *sc = aphy->sc;
2074
2075         mutex_lock(&sc->mutex);
2076         if (ath9k_wiphy_scanning(sc)) {
2077                 /*
2078                  * There is a race here in mac80211 but fixing it requires
2079                  * we revisit how we handle the scan complete callback.
2080                  * After mac80211 fixes we will not have configured hardware
2081                  * to the home channel nor would we have configured the RX
2082                  * filter yet.
2083                  */
2084                 mutex_unlock(&sc->mutex);
2085                 return;
2086         }
2087
2088         aphy->state = ATH_WIPHY_SCAN;
2089         ath9k_wiphy_pause_all_forced(sc, aphy);
2090         mutex_unlock(&sc->mutex);
2091 }
2092
2093 /*
2094  * XXX: this requires a revisit after the driver
2095  * scan_complete gets moved to another place/removed in mac80211.
2096  */
2097 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2098 {
2099         struct ath_wiphy *aphy = hw->priv;
2100         struct ath_softc *sc = aphy->sc;
2101
2102         mutex_lock(&sc->mutex);
2103         aphy->state = ATH_WIPHY_ACTIVE;
2104         mutex_unlock(&sc->mutex);
2105 }
2106
2107 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2108 {
2109         struct ath_wiphy *aphy = hw->priv;
2110         struct ath_softc *sc = aphy->sc;
2111         struct ath_hw *ah = sc->sc_ah;
2112
2113         mutex_lock(&sc->mutex);
2114         ah->coverage_class = coverage_class;
2115         ath9k_hw_init_global_settings(ah);
2116         mutex_unlock(&sc->mutex);
2117 }
2118
2119 struct ieee80211_ops ath9k_ops = {
2120         .tx                 = ath9k_tx,
2121         .start              = ath9k_start,
2122         .stop               = ath9k_stop,
2123         .add_interface      = ath9k_add_interface,
2124         .remove_interface   = ath9k_remove_interface,
2125         .config             = ath9k_config,
2126         .configure_filter   = ath9k_configure_filter,
2127         .sta_add            = ath9k_sta_add,
2128         .sta_remove         = ath9k_sta_remove,
2129         .conf_tx            = ath9k_conf_tx,
2130         .bss_info_changed   = ath9k_bss_info_changed,
2131         .set_key            = ath9k_set_key,
2132         .get_tsf            = ath9k_get_tsf,
2133         .set_tsf            = ath9k_set_tsf,
2134         .reset_tsf          = ath9k_reset_tsf,
2135         .ampdu_action       = ath9k_ampdu_action,
2136         .get_survey         = ath9k_get_survey,
2137         .sw_scan_start      = ath9k_sw_scan_start,
2138         .sw_scan_complete   = ath9k_sw_scan_complete,
2139         .rfkill_poll        = ath9k_rfkill_poll_state,
2140         .set_coverage_class = ath9k_set_coverage_class,
2141 };