2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
97 spin_lock_irqsave(&sc->sc_pm_lock, flags);
98 if (++sc->ps_usecount != 1)
101 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104 * While the hardware is asleep, the cycle counters contain no
105 * useful data. Better clear them now so that they don't mess up
106 * survey data results.
108 spin_lock(&common->cc_lock);
109 ath_hw_cycle_counters_update(common);
110 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
111 spin_unlock(&common->cc_lock);
114 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
117 void ath9k_ps_restore(struct ath_softc *sc)
119 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
126 spin_lock(&common->cc_lock);
127 ath_hw_cycle_counters_update(common);
128 spin_unlock(&common->cc_lock);
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
132 else if (sc->ps_enabled &&
133 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
135 PS_WAIT_FOR_PSPOLL_DATA |
136 PS_WAIT_FOR_TX_ACK)))
137 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 static void ath_start_ani(struct ath_common *common)
145 struct ath_hw *ah = common->ah;
146 unsigned long timestamp = jiffies_to_msecs(jiffies);
147 struct ath_softc *sc = (struct ath_softc *) common->priv;
149 if (!(sc->sc_flags & SC_OP_ANI_RUN))
152 if (sc->sc_flags & SC_OP_OFFCHANNEL)
155 common->ani.longcal_timer = timestamp;
156 common->ani.shortcal_timer = timestamp;
157 common->ani.checkani_timer = timestamp;
159 mod_timer(&common->ani.timer,
161 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
166 struct ath_hw *ah = sc->sc_ah;
167 struct ath9k_channel *chan = &ah->channels[channel];
168 struct survey_info *survey = &sc->survey[channel];
170 if (chan->noisefloor) {
171 survey->filled |= SURVEY_INFO_NOISE_DBM;
172 survey->noise = chan->noisefloor;
176 static void ath_update_survey_stats(struct ath_softc *sc)
178 struct ath_hw *ah = sc->sc_ah;
179 struct ath_common *common = ath9k_hw_common(ah);
180 int pos = ah->curchan - &ah->channels[0];
181 struct survey_info *survey = &sc->survey[pos];
182 struct ath_cycle_counters *cc = &common->cc_survey;
183 unsigned int div = common->clockrate * 1000;
188 if (ah->power_mode == ATH9K_PM_AWAKE)
189 ath_hw_cycle_counters_update(common);
191 if (cc->cycles > 0) {
192 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193 SURVEY_INFO_CHANNEL_TIME_BUSY |
194 SURVEY_INFO_CHANNEL_TIME_RX |
195 SURVEY_INFO_CHANNEL_TIME_TX;
196 survey->channel_time += cc->cycles / div;
197 survey->channel_time_busy += cc->rx_busy / div;
198 survey->channel_time_rx += cc->rx_frame / div;
199 survey->channel_time_tx += cc->tx_frame / div;
201 memset(cc, 0, sizeof(*cc));
203 ath_update_survey_nf(sc, pos);
207 * Set/change channels. If the channel is really being changed, it's done
208 * by reseting the chip. To accomplish this we must first cleanup any pending
209 * DMA, then restart stuff.
211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
212 struct ath9k_channel *hchan)
214 struct ath_wiphy *aphy = hw->priv;
215 struct ath_hw *ah = sc->sc_ah;
216 struct ath_common *common = ath9k_hw_common(ah);
217 struct ieee80211_conf *conf = &common->hw->conf;
218 bool fastcc = true, stopped;
219 struct ieee80211_channel *channel = hw->conf.channel;
220 struct ath9k_hw_cal_data *caldata = NULL;
223 if (sc->sc_flags & SC_OP_INVALID)
226 del_timer_sync(&common->ani.timer);
227 cancel_work_sync(&sc->paprd_work);
228 cancel_work_sync(&sc->hw_check_work);
229 cancel_delayed_work_sync(&sc->tx_complete_work);
234 * This is only performed if the channel settings have
237 * To switch channels clear any pending DMA operations;
238 * wait long enough for the RX fifo to drain, reset the
239 * hardware at the new frequency, and then re-enable
240 * the relevant bits of the h/w.
242 ath9k_hw_set_interrupts(ah, 0);
243 ath_drain_all_txq(sc, false);
244 stopped = ath_stoprecv(sc);
246 /* XXX: do not flush receive queue here. We don't want
247 * to flush data frames already in queue because of
248 * changing channel. */
250 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
253 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
254 caldata = &aphy->caldata;
256 ath_print(common, ATH_DBG_CONFIG,
257 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
258 sc->sc_ah->curchan->channel,
259 channel->center_freq, conf_is_ht40(conf),
262 spin_lock_bh(&sc->sc_resetlock);
264 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
266 ath_print(common, ATH_DBG_FATAL,
267 "Unable to reset channel (%u MHz), "
269 channel->center_freq, r);
270 spin_unlock_bh(&sc->sc_resetlock);
273 spin_unlock_bh(&sc->sc_resetlock);
275 if (ath_startrecv(sc) != 0) {
276 ath_print(common, ATH_DBG_FATAL,
277 "Unable to restart recv logic\n");
282 ath_update_txpow(sc);
283 ath9k_hw_set_interrupts(ah, ah->imask);
285 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
286 ath_beacon_config(sc, NULL);
287 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
288 ath_start_ani(common);
292 ath9k_ps_restore(sc);
296 static void ath_paprd_activate(struct ath_softc *sc)
298 struct ath_hw *ah = sc->sc_ah;
299 struct ath9k_hw_cal_data *caldata = ah->caldata;
300 struct ath_common *common = ath9k_hw_common(ah);
303 if (!caldata || !caldata->paprd_done)
307 ar9003_paprd_enable(ah, false);
308 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
309 if (!(common->tx_chainmask & BIT(chain)))
312 ar9003_paprd_populate_single_table(ah, caldata, chain);
315 ar9003_paprd_enable(ah, true);
316 ath9k_ps_restore(sc);
319 void ath_paprd_calibrate(struct work_struct *work)
321 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
322 struct ieee80211_hw *hw = sc->hw;
323 struct ath_hw *ah = sc->sc_ah;
324 struct ieee80211_hdr *hdr;
325 struct sk_buff *skb = NULL;
326 struct ieee80211_tx_info *tx_info;
327 int band = hw->conf.channel->band;
328 struct ieee80211_supported_band *sband = &sc->sbands[band];
329 struct ath_tx_control txctl;
330 struct ath9k_hw_cal_data *caldata = ah->caldata;
331 struct ath_common *common = ath9k_hw_common(ah);
342 skb = alloc_skb(len, GFP_KERNEL);
346 tx_info = IEEE80211_SKB_CB(skb);
349 memset(skb->data, 0, len);
350 hdr = (struct ieee80211_hdr *)skb->data;
351 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
352 hdr->frame_control = cpu_to_le16(ftype);
353 hdr->duration_id = cpu_to_le16(10);
354 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
355 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
356 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
358 memset(&txctl, 0, sizeof(txctl));
359 qnum = sc->tx.hwq_map[WME_AC_BE];
360 txctl.txq = &sc->tx.txq[qnum];
363 ar9003_paprd_init_table(ah);
364 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
365 if (!(common->tx_chainmask & BIT(chain)))
369 memset(tx_info, 0, sizeof(*tx_info));
370 tx_info->band = band;
372 for (i = 0; i < 4; i++) {
373 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
374 tx_info->control.rates[i].count = 6;
377 init_completion(&sc->paprd_complete);
378 ar9003_paprd_setup_gain_table(ah, chain);
379 txctl.paprd = BIT(chain);
380 if (ath_tx_start(hw, skb, &txctl) != 0)
383 time_left = wait_for_completion_timeout(&sc->paprd_complete,
384 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
386 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
387 "Timeout waiting for paprd training on "
393 if (!ar9003_paprd_is_done(ah))
396 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
404 caldata->paprd_done = true;
405 ath_paprd_activate(sc);
409 ath9k_ps_restore(sc);
413 * This routine performs the periodic noise floor calibration function
414 * that is used to adjust and optimize the chip performance. This
415 * takes environmental changes (location, temperature) into account.
416 * When the task is complete, it reschedules itself depending on the
417 * appropriate interval that was calculated.
419 void ath_ani_calibrate(unsigned long data)
421 struct ath_softc *sc = (struct ath_softc *)data;
422 struct ath_hw *ah = sc->sc_ah;
423 struct ath_common *common = ath9k_hw_common(ah);
424 bool longcal = false;
425 bool shortcal = false;
426 bool aniflag = false;
427 unsigned int timestamp = jiffies_to_msecs(jiffies);
428 u32 cal_interval, short_cal_interval, long_cal_interval;
431 if (ah->caldata && ah->caldata->nfcal_interference)
432 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
434 long_cal_interval = ATH_LONG_CALINTERVAL;
436 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
437 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
439 /* Only calibrate if awake */
440 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
445 /* Long calibration runs independently of short calibration. */
446 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
448 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
449 common->ani.longcal_timer = timestamp;
452 /* Short calibration applies only while caldone is false */
453 if (!common->ani.caldone) {
454 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
456 ath_print(common, ATH_DBG_ANI,
457 "shortcal @%lu\n", jiffies);
458 common->ani.shortcal_timer = timestamp;
459 common->ani.resetcal_timer = timestamp;
462 if ((timestamp - common->ani.resetcal_timer) >=
463 ATH_RESTART_CALINTERVAL) {
464 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
465 if (common->ani.caldone)
466 common->ani.resetcal_timer = timestamp;
470 /* Verify whether we must check ANI */
471 if ((timestamp - common->ani.checkani_timer) >=
472 ah->config.ani_poll_interval) {
474 common->ani.checkani_timer = timestamp;
477 /* Skip all processing if there's nothing to do. */
478 if (longcal || shortcal || aniflag) {
479 /* Call ANI routine if necessary */
481 spin_lock_irqsave(&common->cc_lock, flags);
482 ath9k_hw_ani_monitor(ah, ah->curchan);
483 ath_update_survey_stats(sc);
484 spin_unlock_irqrestore(&common->cc_lock, flags);
487 /* Perform calibration if necessary */
488 if (longcal || shortcal) {
489 common->ani.caldone =
490 ath9k_hw_calibrate(ah,
492 common->rx_chainmask,
497 ath9k_ps_restore(sc);
501 * Set timer interval based on previous results.
502 * The interval must be the shortest necessary to satisfy ANI,
503 * short calibration and long calibration.
505 cal_interval = ATH_LONG_CALINTERVAL;
506 if (sc->sc_ah->config.enable_ani)
507 cal_interval = min(cal_interval,
508 (u32)ah->config.ani_poll_interval);
509 if (!common->ani.caldone)
510 cal_interval = min(cal_interval, (u32)short_cal_interval);
512 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
513 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
514 if (!ah->caldata->paprd_done)
515 ieee80211_queue_work(sc->hw, &sc->paprd_work);
517 ath_paprd_activate(sc);
522 * Update tx/rx chainmask. For legacy association,
523 * hard code chainmask to 1x1, for 11n association, use
524 * the chainmask configuration, for bt coexistence, use
525 * the chainmask configuration even in legacy mode.
527 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
529 struct ath_hw *ah = sc->sc_ah;
530 struct ath_common *common = ath9k_hw_common(ah);
532 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
533 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
534 common->tx_chainmask = ah->caps.tx_chainmask;
535 common->rx_chainmask = ah->caps.rx_chainmask;
537 common->tx_chainmask = 1;
538 common->rx_chainmask = 1;
541 ath_print(common, ATH_DBG_CONFIG,
542 "tx chmask: %d, rx chmask: %d\n",
543 common->tx_chainmask,
544 common->rx_chainmask);
547 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
551 an = (struct ath_node *)sta->drv_priv;
553 if (sc->sc_flags & SC_OP_TXAGGR) {
554 ath_tx_node_init(sc, an);
555 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
556 sta->ht_cap.ampdu_factor);
557 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
558 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
562 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
564 struct ath_node *an = (struct ath_node *)sta->drv_priv;
566 if (sc->sc_flags & SC_OP_TXAGGR)
567 ath_tx_node_cleanup(sc, an);
570 void ath_hw_check(struct work_struct *work)
572 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
577 for (i = 0; i < 3; i++) {
578 if (ath9k_hw_check_alive(sc->sc_ah))
583 ath_reset(sc, false);
586 ath9k_ps_restore(sc);
589 void ath9k_tasklet(unsigned long data)
591 struct ath_softc *sc = (struct ath_softc *)data;
592 struct ath_hw *ah = sc->sc_ah;
593 struct ath_common *common = ath9k_hw_common(ah);
595 u32 status = sc->intrstatus;
600 if (status & ATH9K_INT_FATAL) {
601 ath_reset(sc, false);
602 ath9k_ps_restore(sc);
606 if (!ath9k_hw_check_alive(ah))
607 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
609 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
610 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
613 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
615 if (status & rxmask) {
616 spin_lock_bh(&sc->rx.rxflushlock);
618 /* Check for high priority Rx first */
619 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
620 (status & ATH9K_INT_RXHP))
621 ath_rx_tasklet(sc, 0, true);
623 ath_rx_tasklet(sc, 0, false);
624 spin_unlock_bh(&sc->rx.rxflushlock);
627 if (status & ATH9K_INT_TX) {
628 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
629 ath_tx_edma_tasklet(sc);
634 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
636 * TSF sync does not look correct; remain awake to sync with
639 ath_print(common, ATH_DBG_PS,
640 "TSFOOR - Sync with next Beacon\n");
641 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
644 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
645 if (status & ATH9K_INT_GENTIMER)
646 ath_gen_timer_isr(sc->sc_ah);
648 /* re-enable hardware interrupt */
649 ath9k_hw_set_interrupts(ah, ah->imask);
650 ath9k_ps_restore(sc);
653 irqreturn_t ath_isr(int irq, void *dev)
655 #define SCHED_INTR ( \
668 struct ath_softc *sc = dev;
669 struct ath_hw *ah = sc->sc_ah;
670 struct ath_common *common = ath9k_hw_common(ah);
671 enum ath9k_int status;
675 * The hardware is not ready/present, don't
676 * touch anything. Note this can happen early
677 * on if the IRQ is shared.
679 if (sc->sc_flags & SC_OP_INVALID)
683 /* shared irq, not for us */
685 if (!ath9k_hw_intrpend(ah))
689 * Figure out the reason(s) for the interrupt. Note
690 * that the hal returns a pseudo-ISR that may include
691 * bits we haven't explicitly enabled so we mask the
692 * value to insure we only process bits we requested.
694 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
695 status &= ah->imask; /* discard unasked-for bits */
698 * If there are no status bits set, then this interrupt was not
699 * for me (should have been caught above).
704 /* Cache the status */
705 sc->intrstatus = status;
707 if (status & SCHED_INTR)
711 * If a FATAL or RXORN interrupt is received, we have to reset the
714 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
715 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
718 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719 (status & ATH9K_INT_BB_WATCHDOG)) {
721 spin_lock(&common->cc_lock);
722 ath_hw_cycle_counters_update(common);
723 ar9003_hw_bb_watchdog_dbg_info(ah);
724 spin_unlock(&common->cc_lock);
729 if (status & ATH9K_INT_SWBA)
730 tasklet_schedule(&sc->bcon_tasklet);
732 if (status & ATH9K_INT_TXURN)
733 ath9k_hw_updatetxtriglevel(ah, true);
735 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
736 if (status & ATH9K_INT_RXEOL) {
737 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
738 ath9k_hw_set_interrupts(ah, ah->imask);
742 if (status & ATH9K_INT_MIB) {
744 * Disable interrupts until we service the MIB
745 * interrupt; otherwise it will continue to
748 ath9k_hw_set_interrupts(ah, 0);
750 * Let the hal handle the event. We assume
751 * it will clear whatever condition caused
754 spin_lock(&common->cc_lock);
755 ath9k_hw_proc_mib_event(ah);
756 spin_unlock(&common->cc_lock);
757 ath9k_hw_set_interrupts(ah, ah->imask);
760 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
761 if (status & ATH9K_INT_TIM_TIMER) {
762 /* Clear RxAbort bit so that we can
764 ath9k_setpower(sc, ATH9K_PM_AWAKE);
765 ath9k_hw_setrxabort(sc->sc_ah, 0);
766 sc->ps_flags |= PS_WAIT_FOR_BEACON;
771 ath_debug_stat_interrupt(sc, status);
774 /* turn off every interrupt except SWBA */
775 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
776 tasklet_schedule(&sc->intr_tq);
784 static u32 ath_get_extchanmode(struct ath_softc *sc,
785 struct ieee80211_channel *chan,
786 enum nl80211_channel_type channel_type)
790 switch (chan->band) {
791 case IEEE80211_BAND_2GHZ:
792 switch(channel_type) {
793 case NL80211_CHAN_NO_HT:
794 case NL80211_CHAN_HT20:
795 chanmode = CHANNEL_G_HT20;
797 case NL80211_CHAN_HT40PLUS:
798 chanmode = CHANNEL_G_HT40PLUS;
800 case NL80211_CHAN_HT40MINUS:
801 chanmode = CHANNEL_G_HT40MINUS;
805 case IEEE80211_BAND_5GHZ:
806 switch(channel_type) {
807 case NL80211_CHAN_NO_HT:
808 case NL80211_CHAN_HT20:
809 chanmode = CHANNEL_A_HT20;
811 case NL80211_CHAN_HT40PLUS:
812 chanmode = CHANNEL_A_HT40PLUS;
814 case NL80211_CHAN_HT40MINUS:
815 chanmode = CHANNEL_A_HT40MINUS;
826 static void ath9k_bss_assoc_info(struct ath_softc *sc,
827 struct ieee80211_vif *vif,
828 struct ieee80211_bss_conf *bss_conf)
830 struct ath_hw *ah = sc->sc_ah;
831 struct ath_common *common = ath9k_hw_common(ah);
833 if (bss_conf->assoc) {
834 ath_print(common, ATH_DBG_CONFIG,
835 "Bss Info ASSOC %d, bssid: %pM\n",
836 bss_conf->aid, common->curbssid);
838 /* New association, store aid */
839 common->curaid = bss_conf->aid;
840 ath9k_hw_write_associd(ah);
843 * Request a re-configuration of Beacon related timers
844 * on the receipt of the first Beacon frame (i.e.,
845 * after time sync with the AP).
847 sc->ps_flags |= PS_BEACON_SYNC;
849 /* Configure the beacon */
850 ath_beacon_config(sc, vif);
852 /* Reset rssi stats */
853 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
855 sc->sc_flags |= SC_OP_ANI_RUN;
856 ath_start_ani(common);
858 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
861 sc->sc_flags &= ~SC_OP_ANI_RUN;
862 del_timer_sync(&common->ani.timer);
866 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
868 struct ath_hw *ah = sc->sc_ah;
869 struct ath_common *common = ath9k_hw_common(ah);
870 struct ieee80211_channel *channel = hw->conf.channel;
874 ath9k_hw_configpcipowersave(ah, 0, 0);
877 ah->curchan = ath_get_curchannel(sc, sc->hw);
879 spin_lock_bh(&sc->sc_resetlock);
880 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
882 ath_print(common, ATH_DBG_FATAL,
883 "Unable to reset channel (%u MHz), "
885 channel->center_freq, r);
887 spin_unlock_bh(&sc->sc_resetlock);
889 ath_update_txpow(sc);
890 if (ath_startrecv(sc) != 0) {
891 ath_print(common, ATH_DBG_FATAL,
892 "Unable to restart recv logic\n");
896 if (sc->sc_flags & SC_OP_BEACONS)
897 ath_beacon_config(sc, NULL); /* restart beacons */
899 /* Re-Enable interrupts */
900 ath9k_hw_set_interrupts(ah, ah->imask);
903 ath9k_hw_cfg_output(ah, ah->led_pin,
904 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
905 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
907 ieee80211_wake_queues(hw);
908 ath9k_ps_restore(sc);
911 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
913 struct ath_hw *ah = sc->sc_ah;
914 struct ieee80211_channel *channel = hw->conf.channel;
918 ieee80211_stop_queues(hw);
921 * Keep the LED on when the radio is disabled
922 * during idle unassociated state.
925 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
926 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
929 /* Disable interrupts */
930 ath9k_hw_set_interrupts(ah, 0);
932 ath_drain_all_txq(sc, false); /* clear pending tx frames */
933 ath_stoprecv(sc); /* turn off frame recv */
934 ath_flushrecv(sc); /* flush recv queue */
937 ah->curchan = ath_get_curchannel(sc, hw);
939 spin_lock_bh(&sc->sc_resetlock);
940 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
942 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
943 "Unable to reset channel (%u MHz), "
945 channel->center_freq, r);
947 spin_unlock_bh(&sc->sc_resetlock);
949 ath9k_hw_phy_disable(ah);
950 ath9k_hw_configpcipowersave(ah, 1, 1);
951 ath9k_ps_restore(sc);
952 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
955 int ath_reset(struct ath_softc *sc, bool retry_tx)
957 struct ath_hw *ah = sc->sc_ah;
958 struct ath_common *common = ath9k_hw_common(ah);
959 struct ieee80211_hw *hw = sc->hw;
963 del_timer_sync(&common->ani.timer);
965 ieee80211_stop_queues(hw);
967 ath9k_hw_set_interrupts(ah, 0);
968 ath_drain_all_txq(sc, retry_tx);
972 spin_lock_bh(&sc->sc_resetlock);
973 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
975 ath_print(common, ATH_DBG_FATAL,
976 "Unable to reset hardware; reset status %d\n", r);
977 spin_unlock_bh(&sc->sc_resetlock);
979 if (ath_startrecv(sc) != 0)
980 ath_print(common, ATH_DBG_FATAL,
981 "Unable to start recv logic\n");
984 * We may be doing a reset in response to a request
985 * that changes the channel so update any state that
986 * might change as a result.
988 ath_update_txpow(sc);
990 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
991 ath_beacon_config(sc, NULL); /* restart beacons */
993 ath9k_hw_set_interrupts(ah, ah->imask);
997 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
998 if (ATH_TXQ_SETUP(sc, i)) {
999 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1000 ath_txq_schedule(sc, &sc->tx.txq[i]);
1001 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1006 ieee80211_wake_queues(hw);
1009 ath_start_ani(common);
1014 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1020 qnum = sc->tx.hwq_map[WME_AC_VO];
1023 qnum = sc->tx.hwq_map[WME_AC_VI];
1026 qnum = sc->tx.hwq_map[WME_AC_BE];
1029 qnum = sc->tx.hwq_map[WME_AC_BK];
1032 qnum = sc->tx.hwq_map[WME_AC_BE];
1039 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1064 /* XXX: Remove me once we don't depend on ath9k_channel for all
1065 * this redundant data */
1066 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1067 struct ath9k_channel *ichan)
1069 struct ieee80211_channel *chan = hw->conf.channel;
1070 struct ieee80211_conf *conf = &hw->conf;
1072 ichan->channel = chan->center_freq;
1075 if (chan->band == IEEE80211_BAND_2GHZ) {
1076 ichan->chanmode = CHANNEL_G;
1077 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1079 ichan->chanmode = CHANNEL_A;
1080 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1083 if (conf_is_ht(conf))
1084 ichan->chanmode = ath_get_extchanmode(sc, chan,
1085 conf->channel_type);
1088 /**********************/
1089 /* mac80211 callbacks */
1090 /**********************/
1092 static int ath9k_start(struct ieee80211_hw *hw)
1094 struct ath_wiphy *aphy = hw->priv;
1095 struct ath_softc *sc = aphy->sc;
1096 struct ath_hw *ah = sc->sc_ah;
1097 struct ath_common *common = ath9k_hw_common(ah);
1098 struct ieee80211_channel *curchan = hw->conf.channel;
1099 struct ath9k_channel *init_channel;
1102 ath_print(common, ATH_DBG_CONFIG,
1103 "Starting driver with initial channel: %d MHz\n",
1104 curchan->center_freq);
1106 mutex_lock(&sc->mutex);
1108 if (ath9k_wiphy_started(sc)) {
1109 if (sc->chan_idx == curchan->hw_value) {
1111 * Already on the operational channel, the new wiphy
1112 * can be marked active.
1114 aphy->state = ATH_WIPHY_ACTIVE;
1115 ieee80211_wake_queues(hw);
1118 * Another wiphy is on another channel, start the new
1119 * wiphy in paused state.
1121 aphy->state = ATH_WIPHY_PAUSED;
1122 ieee80211_stop_queues(hw);
1124 mutex_unlock(&sc->mutex);
1127 aphy->state = ATH_WIPHY_ACTIVE;
1129 /* setup initial channel */
1131 sc->chan_idx = curchan->hw_value;
1133 init_channel = ath_get_curchannel(sc, hw);
1135 /* Reset SERDES registers */
1136 ath9k_hw_configpcipowersave(ah, 0, 0);
1139 * The basic interface to setting the hardware in a good
1140 * state is ``reset''. On return the hardware is known to
1141 * be powered up and with interrupts disabled. This must
1142 * be followed by initialization of the appropriate bits
1143 * and then setup of the interrupt mask.
1145 spin_lock_bh(&sc->sc_resetlock);
1146 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1148 ath_print(common, ATH_DBG_FATAL,
1149 "Unable to reset hardware; reset status %d "
1150 "(freq %u MHz)\n", r,
1151 curchan->center_freq);
1152 spin_unlock_bh(&sc->sc_resetlock);
1155 spin_unlock_bh(&sc->sc_resetlock);
1158 * This is needed only to setup initial state
1159 * but it's best done after a reset.
1161 ath_update_txpow(sc);
1164 * Setup the hardware after reset:
1165 * The receive engine is set going.
1166 * Frame transmit is handled entirely
1167 * in the frame output path; there's nothing to do
1168 * here except setup the interrupt mask.
1170 if (ath_startrecv(sc) != 0) {
1171 ath_print(common, ATH_DBG_FATAL,
1172 "Unable to start recv logic\n");
1177 /* Setup our intr mask. */
1178 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1179 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1182 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1183 ah->imask |= ATH9K_INT_RXHP |
1185 ATH9K_INT_BB_WATCHDOG;
1187 ah->imask |= ATH9K_INT_RX;
1189 ah->imask |= ATH9K_INT_GTT;
1191 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1192 ah->imask |= ATH9K_INT_CST;
1194 sc->sc_flags &= ~SC_OP_INVALID;
1196 /* Disable BMISS interrupt when we're not associated */
1197 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1198 ath9k_hw_set_interrupts(ah, ah->imask);
1200 ieee80211_wake_queues(hw);
1202 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1204 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1205 !ah->btcoex_hw.enabled) {
1206 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1207 AR_STOMP_LOW_WLAN_WGHT);
1208 ath9k_hw_btcoex_enable(ah);
1210 if (common->bus_ops->bt_coex_prep)
1211 common->bus_ops->bt_coex_prep(common);
1212 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1213 ath9k_btcoex_timer_resume(sc);
1217 mutex_unlock(&sc->mutex);
1222 static int ath9k_tx(struct ieee80211_hw *hw,
1223 struct sk_buff *skb)
1225 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1226 struct ath_wiphy *aphy = hw->priv;
1227 struct ath_softc *sc = aphy->sc;
1228 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1229 struct ath_tx_control txctl;
1230 int padpos, padsize;
1231 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1234 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1235 ath_print(common, ATH_DBG_XMIT,
1236 "ath9k: %s: TX in unexpected wiphy state "
1237 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1241 if (sc->ps_enabled) {
1243 * mac80211 does not set PM field for normal data frames, so we
1244 * need to update that based on the current PS mode.
1246 if (ieee80211_is_data(hdr->frame_control) &&
1247 !ieee80211_is_nullfunc(hdr->frame_control) &&
1248 !ieee80211_has_pm(hdr->frame_control)) {
1249 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1250 "while in PS mode\n");
1251 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1255 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1257 * We are using PS-Poll and mac80211 can request TX while in
1258 * power save mode. Need to wake up hardware for the TX to be
1259 * completed and if needed, also for RX of buffered frames.
1261 ath9k_ps_wakeup(sc);
1262 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1263 ath9k_hw_setrxabort(sc->sc_ah, 0);
1264 if (ieee80211_is_pspoll(hdr->frame_control)) {
1265 ath_print(common, ATH_DBG_PS,
1266 "Sending PS-Poll to pick a buffered frame\n");
1267 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1269 ath_print(common, ATH_DBG_PS,
1270 "Wake up to complete TX\n");
1271 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1274 * The actual restore operation will happen only after
1275 * the sc_flags bit is cleared. We are just dropping
1276 * the ps_usecount here.
1278 ath9k_ps_restore(sc);
1281 memset(&txctl, 0, sizeof(struct ath_tx_control));
1284 * As a temporary workaround, assign seq# here; this will likely need
1285 * to be cleaned up to work better with Beacon transmission and virtual
1288 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1289 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1290 sc->tx.seq_no += 0x10;
1291 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1292 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1295 /* Add the padding after the header if this is not already done */
1296 padpos = ath9k_cmn_padpos(hdr->frame_control);
1297 padsize = padpos & 3;
1298 if (padsize && skb->len>padpos) {
1299 if (skb_headroom(skb) < padsize)
1301 skb_push(skb, padsize);
1302 memmove(skb->data, skb->data + padsize, padpos);
1305 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1306 txctl.txq = &sc->tx.txq[qnum];
1308 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1310 if (ath_tx_start(hw, skb, &txctl) != 0) {
1311 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1317 dev_kfree_skb_any(skb);
1321 static void ath9k_stop(struct ieee80211_hw *hw)
1323 struct ath_wiphy *aphy = hw->priv;
1324 struct ath_softc *sc = aphy->sc;
1325 struct ath_hw *ah = sc->sc_ah;
1326 struct ath_common *common = ath9k_hw_common(ah);
1329 mutex_lock(&sc->mutex);
1331 aphy->state = ATH_WIPHY_INACTIVE;
1334 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1336 cancel_delayed_work_sync(&sc->tx_complete_work);
1337 cancel_work_sync(&sc->paprd_work);
1338 cancel_work_sync(&sc->hw_check_work);
1340 for (i = 0; i < sc->num_sec_wiphy; i++) {
1341 if (sc->sec_wiphy[i])
1345 if (i == sc->num_sec_wiphy) {
1346 cancel_delayed_work_sync(&sc->wiphy_work);
1347 cancel_work_sync(&sc->chan_work);
1350 if (sc->sc_flags & SC_OP_INVALID) {
1351 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1352 mutex_unlock(&sc->mutex);
1356 if (ath9k_wiphy_started(sc)) {
1357 mutex_unlock(&sc->mutex);
1358 return; /* another wiphy still in use */
1361 /* Ensure HW is awake when we try to shut it down. */
1362 ath9k_ps_wakeup(sc);
1364 if (ah->btcoex_hw.enabled) {
1365 ath9k_hw_btcoex_disable(ah);
1366 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1367 ath9k_btcoex_timer_pause(sc);
1370 /* make sure h/w will not generate any interrupt
1371 * before setting the invalid flag. */
1372 ath9k_hw_set_interrupts(ah, 0);
1374 if (!(sc->sc_flags & SC_OP_INVALID)) {
1375 ath_drain_all_txq(sc, false);
1377 ath9k_hw_phy_disable(ah);
1379 sc->rx.rxlink = NULL;
1381 /* disable HAL and put h/w to sleep */
1382 ath9k_hw_disable(ah);
1383 ath9k_hw_configpcipowersave(ah, 1, 1);
1384 ath9k_ps_restore(sc);
1386 /* Finally, put the chip in FULL SLEEP mode */
1387 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1389 sc->sc_flags |= SC_OP_INVALID;
1391 mutex_unlock(&sc->mutex);
1393 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1396 static int ath9k_add_interface(struct ieee80211_hw *hw,
1397 struct ieee80211_vif *vif)
1399 struct ath_wiphy *aphy = hw->priv;
1400 struct ath_softc *sc = aphy->sc;
1401 struct ath_hw *ah = sc->sc_ah;
1402 struct ath_common *common = ath9k_hw_common(ah);
1403 struct ath_vif *avp = (void *)vif->drv_priv;
1404 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1407 mutex_lock(&sc->mutex);
1409 switch (vif->type) {
1410 case NL80211_IFTYPE_STATION:
1411 ic_opmode = NL80211_IFTYPE_STATION;
1413 case NL80211_IFTYPE_WDS:
1414 ic_opmode = NL80211_IFTYPE_WDS;
1416 case NL80211_IFTYPE_ADHOC:
1417 case NL80211_IFTYPE_AP:
1418 case NL80211_IFTYPE_MESH_POINT:
1419 if (sc->nbcnvifs >= ATH_BCBUF) {
1423 ic_opmode = vif->type;
1426 ath_print(common, ATH_DBG_FATAL,
1427 "Interface type %d not yet supported\n", vif->type);
1432 ath_print(common, ATH_DBG_CONFIG,
1433 "Attach a VIF of type: %d\n", ic_opmode);
1435 /* Set the VIF opmode */
1436 avp->av_opmode = ic_opmode;
1441 ath9k_set_bssid_mask(hw, vif);
1444 goto out; /* skip global settings for secondary vif */
1446 if (ic_opmode == NL80211_IFTYPE_AP) {
1447 ath9k_hw_set_tsfadjust(ah, 1);
1448 sc->sc_flags |= SC_OP_TSF_RESET;
1451 /* Set the device opmode */
1452 ah->opmode = ic_opmode;
1455 * Enable MIB interrupts when there are hardware phy counters.
1456 * Note we only do this (at the moment) for station mode.
1458 if ((vif->type == NL80211_IFTYPE_STATION) ||
1459 (vif->type == NL80211_IFTYPE_ADHOC) ||
1460 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1461 if (ah->config.enable_ani)
1462 ah->imask |= ATH9K_INT_MIB;
1463 ah->imask |= ATH9K_INT_TSFOOR;
1466 ath9k_hw_set_interrupts(ah, ah->imask);
1468 if (vif->type == NL80211_IFTYPE_AP ||
1469 vif->type == NL80211_IFTYPE_ADHOC ||
1470 vif->type == NL80211_IFTYPE_MONITOR) {
1471 sc->sc_flags |= SC_OP_ANI_RUN;
1472 ath_start_ani(common);
1476 mutex_unlock(&sc->mutex);
1480 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1481 struct ieee80211_vif *vif)
1483 struct ath_wiphy *aphy = hw->priv;
1484 struct ath_softc *sc = aphy->sc;
1485 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1486 struct ath_vif *avp = (void *)vif->drv_priv;
1489 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1491 mutex_lock(&sc->mutex);
1494 sc->sc_flags &= ~SC_OP_ANI_RUN;
1495 del_timer_sync(&common->ani.timer);
1497 /* Reclaim beacon resources */
1498 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1499 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1500 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1501 ath9k_ps_wakeup(sc);
1502 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1503 ath9k_ps_restore(sc);
1506 ath_beacon_return(sc, avp);
1507 sc->sc_flags &= ~SC_OP_BEACONS;
1509 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1510 if (sc->beacon.bslot[i] == vif) {
1511 printk(KERN_DEBUG "%s: vif had allocated beacon "
1512 "slot\n", __func__);
1513 sc->beacon.bslot[i] = NULL;
1514 sc->beacon.bslot_aphy[i] = NULL;
1520 mutex_unlock(&sc->mutex);
1523 static void ath9k_enable_ps(struct ath_softc *sc)
1525 struct ath_hw *ah = sc->sc_ah;
1527 sc->ps_enabled = true;
1528 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1529 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1530 ah->imask |= ATH9K_INT_TIM_TIMER;
1531 ath9k_hw_set_interrupts(ah, ah->imask);
1533 ath9k_hw_setrxabort(ah, 1);
1537 static void ath9k_disable_ps(struct ath_softc *sc)
1539 struct ath_hw *ah = sc->sc_ah;
1541 sc->ps_enabled = false;
1542 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1543 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1544 ath9k_hw_setrxabort(ah, 0);
1545 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1547 PS_WAIT_FOR_PSPOLL_DATA |
1548 PS_WAIT_FOR_TX_ACK);
1549 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1550 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1551 ath9k_hw_set_interrupts(ah, ah->imask);
1557 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1559 struct ath_wiphy *aphy = hw->priv;
1560 struct ath_softc *sc = aphy->sc;
1561 struct ath_hw *ah = sc->sc_ah;
1562 struct ath_common *common = ath9k_hw_common(ah);
1563 struct ieee80211_conf *conf = &hw->conf;
1566 mutex_lock(&sc->mutex);
1569 * Leave this as the first check because we need to turn on the
1570 * radio if it was disabled before prior to processing the rest
1571 * of the changes. Likewise we must only disable the radio towards
1574 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1576 bool all_wiphys_idle;
1577 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1579 spin_lock_bh(&sc->wiphy_lock);
1580 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1581 ath9k_set_wiphy_idle(aphy, idle);
1583 enable_radio = (!idle && all_wiphys_idle);
1586 * After we unlock here its possible another wiphy
1587 * can be re-renabled so to account for that we will
1588 * only disable the radio toward the end of this routine
1589 * if by then all wiphys are still idle.
1591 spin_unlock_bh(&sc->wiphy_lock);
1594 sc->ps_idle = false;
1595 ath_radio_enable(sc, hw);
1596 ath_print(common, ATH_DBG_CONFIG,
1597 "not-idle: enabling radio\n");
1602 * We just prepare to enable PS. We have to wait until our AP has
1603 * ACK'd our null data frame to disable RX otherwise we'll ignore
1604 * those ACKs and end up retransmitting the same null data frames.
1605 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1607 if (changed & IEEE80211_CONF_CHANGE_PS) {
1608 unsigned long flags;
1609 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1610 if (conf->flags & IEEE80211_CONF_PS)
1611 ath9k_enable_ps(sc);
1613 ath9k_disable_ps(sc);
1614 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1617 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1618 if (conf->flags & IEEE80211_CONF_MONITOR) {
1619 ath_print(common, ATH_DBG_CONFIG,
1620 "HW opmode set to Monitor mode\n");
1621 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1625 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1626 struct ieee80211_channel *curchan = hw->conf.channel;
1627 int pos = curchan->hw_value;
1629 unsigned long flags;
1632 old_pos = ah->curchan - &ah->channels[0];
1634 aphy->chan_idx = pos;
1635 aphy->chan_is_ht = conf_is_ht(conf);
1636 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1637 sc->sc_flags |= SC_OP_OFFCHANNEL;
1639 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1641 if (aphy->state == ATH_WIPHY_SCAN ||
1642 aphy->state == ATH_WIPHY_ACTIVE)
1643 ath9k_wiphy_pause_all_forced(sc, aphy);
1646 * Do not change operational channel based on a paused
1649 goto skip_chan_change;
1652 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1653 curchan->center_freq);
1655 /* XXX: remove me eventualy */
1656 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1658 ath_update_chainmask(sc, conf_is_ht(conf));
1660 /* update survey stats for the old channel before switching */
1661 spin_lock_irqsave(&common->cc_lock, flags);
1662 ath_update_survey_stats(sc);
1663 spin_unlock_irqrestore(&common->cc_lock, flags);
1666 * If the operating channel changes, change the survey in-use flags
1668 * Reset the survey data for the new channel, unless we're switching
1669 * back to the operating channel from an off-channel operation.
1671 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1672 sc->cur_survey != &sc->survey[pos]) {
1675 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1677 sc->cur_survey = &sc->survey[pos];
1679 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1680 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1681 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1682 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1685 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1686 ath_print(common, ATH_DBG_FATAL,
1687 "Unable to set channel\n");
1688 mutex_unlock(&sc->mutex);
1693 * The most recent snapshot of channel->noisefloor for the old
1694 * channel is only available after the hardware reset. Copy it to
1695 * the survey stats now.
1698 ath_update_survey_nf(sc, old_pos);
1702 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1703 sc->config.txpowlimit = 2 * conf->power_level;
1704 ath_update_txpow(sc);
1707 spin_lock_bh(&sc->wiphy_lock);
1708 disable_radio = ath9k_all_wiphys_idle(sc);
1709 spin_unlock_bh(&sc->wiphy_lock);
1711 if (disable_radio) {
1712 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1714 ath_radio_disable(sc, hw);
1717 mutex_unlock(&sc->mutex);
1722 #define SUPPORTED_FILTERS \
1723 (FIF_PROMISC_IN_BSS | \
1728 FIF_BCN_PRBRESP_PROMISC | \
1732 /* FIXME: sc->sc_full_reset ? */
1733 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1734 unsigned int changed_flags,
1735 unsigned int *total_flags,
1738 struct ath_wiphy *aphy = hw->priv;
1739 struct ath_softc *sc = aphy->sc;
1742 changed_flags &= SUPPORTED_FILTERS;
1743 *total_flags &= SUPPORTED_FILTERS;
1745 sc->rx.rxfilter = *total_flags;
1746 ath9k_ps_wakeup(sc);
1747 rfilt = ath_calcrxfilter(sc);
1748 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1749 ath9k_ps_restore(sc);
1751 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1752 "Set HW RX filter: 0x%x\n", rfilt);
1755 static int ath9k_sta_add(struct ieee80211_hw *hw,
1756 struct ieee80211_vif *vif,
1757 struct ieee80211_sta *sta)
1759 struct ath_wiphy *aphy = hw->priv;
1760 struct ath_softc *sc = aphy->sc;
1762 ath_node_attach(sc, sta);
1767 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1768 struct ieee80211_vif *vif,
1769 struct ieee80211_sta *sta)
1771 struct ath_wiphy *aphy = hw->priv;
1772 struct ath_softc *sc = aphy->sc;
1774 ath_node_detach(sc, sta);
1779 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1780 const struct ieee80211_tx_queue_params *params)
1782 struct ath_wiphy *aphy = hw->priv;
1783 struct ath_softc *sc = aphy->sc;
1784 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1785 struct ath9k_tx_queue_info qi;
1788 if (queue >= WME_NUM_AC)
1791 mutex_lock(&sc->mutex);
1793 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1795 qi.tqi_aifs = params->aifs;
1796 qi.tqi_cwmin = params->cw_min;
1797 qi.tqi_cwmax = params->cw_max;
1798 qi.tqi_burstTime = params->txop;
1799 qnum = ath_get_hal_qnum(queue, sc);
1801 ath_print(common, ATH_DBG_CONFIG,
1802 "Configure tx [queue/halq] [%d/%d], "
1803 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1804 queue, qnum, params->aifs, params->cw_min,
1805 params->cw_max, params->txop);
1807 ret = ath_txq_update(sc, qnum, &qi);
1809 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1811 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1812 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1813 ath_beaconq_config(sc);
1815 mutex_unlock(&sc->mutex);
1820 static int ath9k_set_key(struct ieee80211_hw *hw,
1821 enum set_key_cmd cmd,
1822 struct ieee80211_vif *vif,
1823 struct ieee80211_sta *sta,
1824 struct ieee80211_key_conf *key)
1826 struct ath_wiphy *aphy = hw->priv;
1827 struct ath_softc *sc = aphy->sc;
1828 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1831 if (modparam_nohwcrypt)
1834 mutex_lock(&sc->mutex);
1835 ath9k_ps_wakeup(sc);
1836 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1840 ret = ath_key_config(common, vif, sta, key);
1842 key->hw_key_idx = ret;
1843 /* push IV and Michael MIC generation to stack */
1844 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1845 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1846 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1847 if (sc->sc_ah->sw_mgmt_crypto &&
1848 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1849 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1854 ath_key_delete(common, key);
1860 ath9k_ps_restore(sc);
1861 mutex_unlock(&sc->mutex);
1866 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1867 struct ieee80211_vif *vif,
1868 struct ieee80211_bss_conf *bss_conf,
1871 struct ath_wiphy *aphy = hw->priv;
1872 struct ath_softc *sc = aphy->sc;
1873 struct ath_hw *ah = sc->sc_ah;
1874 struct ath_common *common = ath9k_hw_common(ah);
1875 struct ath_vif *avp = (void *)vif->drv_priv;
1879 mutex_lock(&sc->mutex);
1881 if (changed & BSS_CHANGED_BSSID) {
1883 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1884 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1886 ath9k_hw_write_associd(ah);
1888 /* Set aggregation protection mode parameters */
1889 sc->config.ath_aggr_prot = 0;
1891 /* Only legacy IBSS for now */
1892 if (vif->type == NL80211_IFTYPE_ADHOC)
1893 ath_update_chainmask(sc, 0);
1895 ath_print(common, ATH_DBG_CONFIG,
1896 "BSSID: %pM aid: 0x%x\n",
1897 common->curbssid, common->curaid);
1899 /* need to reconfigure the beacon */
1900 sc->sc_flags &= ~SC_OP_BEACONS ;
1903 /* Enable transmission of beacons (AP, IBSS, MESH) */
1904 if ((changed & BSS_CHANGED_BEACON) ||
1905 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1906 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1907 error = ath_beacon_alloc(aphy, vif);
1909 ath_beacon_config(sc, vif);
1912 if (changed & BSS_CHANGED_ERP_SLOT) {
1913 if (bss_conf->use_short_slot)
1917 if (vif->type == NL80211_IFTYPE_AP) {
1919 * Defer update, so that connected stations can adjust
1920 * their settings at the same time.
1921 * See beacon.c for more details
1923 sc->beacon.slottime = slottime;
1924 sc->beacon.updateslot = UPDATE;
1926 ah->slottime = slottime;
1927 ath9k_hw_init_global_settings(ah);
1931 /* Disable transmission of beacons */
1932 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1933 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1935 if (changed & BSS_CHANGED_BEACON_INT) {
1936 sc->beacon_interval = bss_conf->beacon_int;
1938 * In case of AP mode, the HW TSF has to be reset
1939 * when the beacon interval changes.
1941 if (vif->type == NL80211_IFTYPE_AP) {
1942 sc->sc_flags |= SC_OP_TSF_RESET;
1943 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1944 error = ath_beacon_alloc(aphy, vif);
1946 ath_beacon_config(sc, vif);
1948 ath_beacon_config(sc, vif);
1952 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1953 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1954 bss_conf->use_short_preamble);
1955 if (bss_conf->use_short_preamble)
1956 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1958 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1961 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1962 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1963 bss_conf->use_cts_prot);
1964 if (bss_conf->use_cts_prot &&
1965 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1966 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1968 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1971 if (changed & BSS_CHANGED_ASSOC) {
1972 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1974 ath9k_bss_assoc_info(sc, vif, bss_conf);
1977 mutex_unlock(&sc->mutex);
1980 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1983 struct ath_wiphy *aphy = hw->priv;
1984 struct ath_softc *sc = aphy->sc;
1986 mutex_lock(&sc->mutex);
1987 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1988 mutex_unlock(&sc->mutex);
1993 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1995 struct ath_wiphy *aphy = hw->priv;
1996 struct ath_softc *sc = aphy->sc;
1998 mutex_lock(&sc->mutex);
1999 ath9k_hw_settsf64(sc->sc_ah, tsf);
2000 mutex_unlock(&sc->mutex);
2003 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2005 struct ath_wiphy *aphy = hw->priv;
2006 struct ath_softc *sc = aphy->sc;
2008 mutex_lock(&sc->mutex);
2010 ath9k_ps_wakeup(sc);
2011 ath9k_hw_reset_tsf(sc->sc_ah);
2012 ath9k_ps_restore(sc);
2014 mutex_unlock(&sc->mutex);
2017 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2018 struct ieee80211_vif *vif,
2019 enum ieee80211_ampdu_mlme_action action,
2020 struct ieee80211_sta *sta,
2023 struct ath_wiphy *aphy = hw->priv;
2024 struct ath_softc *sc = aphy->sc;
2030 case IEEE80211_AMPDU_RX_START:
2031 if (!(sc->sc_flags & SC_OP_RXAGGR))
2034 case IEEE80211_AMPDU_RX_STOP:
2036 case IEEE80211_AMPDU_TX_START:
2037 ath9k_ps_wakeup(sc);
2038 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2040 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2041 ath9k_ps_restore(sc);
2043 case IEEE80211_AMPDU_TX_STOP:
2044 ath9k_ps_wakeup(sc);
2045 ath_tx_aggr_stop(sc, sta, tid);
2046 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2047 ath9k_ps_restore(sc);
2049 case IEEE80211_AMPDU_TX_OPERATIONAL:
2050 ath9k_ps_wakeup(sc);
2051 ath_tx_aggr_resume(sc, sta, tid);
2052 ath9k_ps_restore(sc);
2055 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2056 "Unknown AMPDU action\n");
2064 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2065 struct survey_info *survey)
2067 struct ath_wiphy *aphy = hw->priv;
2068 struct ath_softc *sc = aphy->sc;
2069 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2070 struct ieee80211_supported_band *sband;
2071 struct ieee80211_channel *chan;
2072 unsigned long flags;
2075 spin_lock_irqsave(&common->cc_lock, flags);
2077 ath_update_survey_stats(sc);
2079 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2080 if (sband && idx >= sband->n_channels) {
2081 idx -= sband->n_channels;
2086 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2088 if (!sband || idx >= sband->n_channels) {
2089 spin_unlock_irqrestore(&common->cc_lock, flags);
2093 chan = &sband->channels[idx];
2094 pos = chan->hw_value;
2095 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2096 survey->channel = chan;
2097 spin_unlock_irqrestore(&common->cc_lock, flags);
2102 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2104 struct ath_wiphy *aphy = hw->priv;
2105 struct ath_softc *sc = aphy->sc;
2107 mutex_lock(&sc->mutex);
2108 if (ath9k_wiphy_scanning(sc)) {
2110 * There is a race here in mac80211 but fixing it requires
2111 * we revisit how we handle the scan complete callback.
2112 * After mac80211 fixes we will not have configured hardware
2113 * to the home channel nor would we have configured the RX
2116 mutex_unlock(&sc->mutex);
2120 aphy->state = ATH_WIPHY_SCAN;
2121 ath9k_wiphy_pause_all_forced(sc, aphy);
2122 mutex_unlock(&sc->mutex);
2126 * XXX: this requires a revisit after the driver
2127 * scan_complete gets moved to another place/removed in mac80211.
2129 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2131 struct ath_wiphy *aphy = hw->priv;
2132 struct ath_softc *sc = aphy->sc;
2134 mutex_lock(&sc->mutex);
2135 aphy->state = ATH_WIPHY_ACTIVE;
2136 mutex_unlock(&sc->mutex);
2139 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2141 struct ath_wiphy *aphy = hw->priv;
2142 struct ath_softc *sc = aphy->sc;
2143 struct ath_hw *ah = sc->sc_ah;
2145 mutex_lock(&sc->mutex);
2146 ah->coverage_class = coverage_class;
2147 ath9k_hw_init_global_settings(ah);
2148 mutex_unlock(&sc->mutex);
2151 struct ieee80211_ops ath9k_ops = {
2153 .start = ath9k_start,
2155 .add_interface = ath9k_add_interface,
2156 .remove_interface = ath9k_remove_interface,
2157 .config = ath9k_config,
2158 .configure_filter = ath9k_configure_filter,
2159 .sta_add = ath9k_sta_add,
2160 .sta_remove = ath9k_sta_remove,
2161 .conf_tx = ath9k_conf_tx,
2162 .bss_info_changed = ath9k_bss_info_changed,
2163 .set_key = ath9k_set_key,
2164 .get_tsf = ath9k_get_tsf,
2165 .set_tsf = ath9k_set_tsf,
2166 .reset_tsf = ath9k_reset_tsf,
2167 .ampdu_action = ath9k_ampdu_action,
2168 .get_survey = ath9k_get_survey,
2169 .sw_scan_start = ath9k_sw_scan_start,
2170 .sw_scan_complete = ath9k_sw_scan_complete,
2171 .rfkill_poll = ath9k_rfkill_poll_state,
2172 .set_coverage_class = ath9k_set_coverage_class,