drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/pm_qos_params.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static void ath_update_txpow(struct ath_softc *sc)
  23 {
  24         struct ath_hw *ah = sc->sc_ah;
  25
  26         if (sc->curtxpow != sc->config.txpowlimit) {
  27                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  28                 /* read back in case value is clamped */
  29                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  30         }
  31 }
  32
  33 static u8 parse_mpdudensity(u8 mpdudensity)
  34 {
  35         /*
  36          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  37          *   0 for no restriction
  38          *   1 for 1/4 us
  39          *   2 for 1/2 us
  40          *   3 for 1 us
  41          *   4 for 2 us
  42          *   5 for 4 us
  43          *   6 for 8 us
  44          *   7 for 16 us
  45          */
  46         switch (mpdudensity) {
  47         case 0:
  48                 return 0;
  49         case 1:
  50         case 2:
  51         case 3:
  52                 /* Our lower layer calculations limit our precision to
  53                    1 microsecond */
  54                 return 1;
  55         case 4:
  56                 return 2;
  57         case 5:
  58                 return 4;
  59         case 6:
  60                 return 8;
  61         case 7:
  62                 return 16;
  63         default:
  64                 return 0;
  65         }
  66 }
  67
  68 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  69                                                 struct ieee80211_hw *hw)
  70 {
  71         struct ieee80211_channel *curchan = hw->conf.channel;
  72         struct ath9k_channel *channel;
  73         u8 chan_idx;
  74
  75         chan_idx = curchan->hw_value;
  76         channel = &sc->sc_ah->channels[chan_idx];
  77         ath9k_update_ichannel(sc, hw, channel);
  78         return channel;
  79 }
  80
  81 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  82 {
  83         unsigned long flags;
  84         bool ret;
  85
  86         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  87         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  88         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  89
  90         return ret;
  91 }
  92
  93 void ath9k_ps_wakeup(struct ath_softc *sc)
  94 {
  95         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  96         unsigned long flags;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 103
 104         /*
 105          * While the hardware is asleep, the cycle counters contain no
 106          * useful data. Better clear them now so that they don't mess up
 107          * survey data results.
 108          */
 109         spin_lock(&common->cc_lock);
 110         ath_hw_cycle_counters_update(common);
 111         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 112         spin_unlock(&common->cc_lock);
 113
 114  unlock:
 115         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 116 }
 117
 118 void ath9k_ps_restore(struct ath_softc *sc)
 119 {
 120         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 121         unsigned long flags;
 122
 123         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 124         if (--sc->ps_usecount != 0)
 125                 goto unlock;
 126
 127         spin_lock(&common->cc_lock);
 128         ath_hw_cycle_counters_update(common);
 129         spin_unlock(&common->cc_lock);
 130
 131         if (sc->ps_idle)
 132                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 133         else if (sc->ps_enabled &&
 134                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 135                               PS_WAIT_FOR_CAB |
 136                               PS_WAIT_FOR_PSPOLL_DATA |
 137                               PS_WAIT_FOR_TX_ACK)))
 138                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 139
 140  unlock:
 141         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 142 }
 143
 144 static void ath_start_ani(struct ath_common *common)
 145 {
 146         struct ath_hw *ah = common->ah;
 147         unsigned long timestamp = jiffies_to_msecs(jiffies);
 148         struct ath_softc *sc = (struct ath_softc *) common->priv;
 149
 150         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 151                 return;
 152
 153         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 154                 return;
 155
 156         common->ani.longcal_timer = timestamp;
 157         common->ani.shortcal_timer = timestamp;
 158         common->ani.checkani_timer = timestamp;
 159
 160         mod_timer(&common->ani.timer,
 161                   jiffies +
 162                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 163 }
 164
 165 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath9k_channel *chan = &ah->channels[channel];
 169         struct survey_info *survey = &sc->survey[channel];
 170
 171         if (chan->noisefloor) {
 172                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 173                 survey->noise = chan->noisefloor;
 174         }
 175 }
 176
 177 static void ath_update_survey_stats(struct ath_softc *sc)
 178 {
 179         struct ath_hw *ah = sc->sc_ah;
 180         struct ath_common *common = ath9k_hw_common(ah);
 181         int pos = ah->curchan - &ah->channels[0];
 182         struct survey_info *survey = &sc->survey[pos];
 183         struct ath_cycle_counters *cc = &common->cc_survey;
 184         unsigned int div = common->clockrate * 1000;
 185
 186         if (!ah->curchan)
 187                 return;
 188
 189         if (ah->power_mode == ATH9K_PM_AWAKE)
 190                 ath_hw_cycle_counters_update(common);
 191
 192         if (cc->cycles > 0) {
 193                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 194                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 195                         SURVEY_INFO_CHANNEL_TIME_RX |
 196                         SURVEY_INFO_CHANNEL_TIME_TX;
 197                 survey->channel_time += cc->cycles / div;
 198                 survey->channel_time_busy += cc->rx_busy / div;
 199                 survey->channel_time_rx += cc->rx_frame / div;
 200                 survey->channel_time_tx += cc->tx_frame / div;
 201         }
 202         memset(cc, 0, sizeof(*cc));
 203
 204         ath_update_survey_nf(sc, pos);
 205 }
 206
 207 /*
 208  * Set/change channels.  If the channel is really being changed, it's done
 209  * by reseting the chip.  To accomplish this we must first cleanup any pending
 210  * DMA, then restart stuff.
 211 */
 212 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 213                     struct ath9k_channel *hchan)
 214 {
 215         struct ath_wiphy *aphy = hw->priv;
 216         struct ath_hw *ah = sc->sc_ah;
 217         struct ath_common *common = ath9k_hw_common(ah);
 218         struct ieee80211_conf *conf = &common->hw->conf;
 219         bool fastcc = true, stopped;
 220         struct ieee80211_channel *channel = hw->conf.channel;
 221         struct ath9k_hw_cal_data *caldata = NULL;
 222         int r;
 223
 224         if (sc->sc_flags & SC_OP_INVALID)
 225                 return -EIO;
 226
 227         del_timer_sync(&common->ani.timer);
 228         cancel_work_sync(&sc->paprd_work);
 229         cancel_work_sync(&sc->hw_check_work);
 230         cancel_delayed_work_sync(&sc->tx_complete_work);
 231
 232         ath9k_ps_wakeup(sc);
 233
 234         /*
 235          * This is only performed if the channel settings have
 236          * actually changed.
 237          *
 238          * To switch channels clear any pending DMA operations;
 239          * wait long enough for the RX fifo to drain, reset the
 240          * hardware at the new frequency, and then re-enable
 241          * the relevant bits of the h/w.
 242          */
 243         ath9k_hw_set_interrupts(ah, 0);
 244         ath_drain_all_txq(sc, false);
 245
 246         spin_lock_bh(&sc->rx.pcu_lock);
 247
 248         stopped = ath_stoprecv(sc);
 249
 250         /* XXX: do not flush receive queue here. We don't want
 251          * to flush data frames already in queue because of
 252          * changing channel. */
 253
 254         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 255                 fastcc = false;
 256
 257         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 caldata = &aphy->caldata;
 259
 260         ath_print(common, ATH_DBG_CONFIG,
 261                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 262                   sc->sc_ah->curchan->channel,
 263                   channel->center_freq, conf_is_ht40(conf),
 264                   fastcc);
 265
 266         spin_lock_bh(&sc->sc_resetlock);
 267
 268         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 269         if (r) {
 270                 ath_print(common, ATH_DBG_FATAL,
 271                           "Unable to reset channel (%u MHz), "
 272                           "reset status %d\n",
 273                           channel->center_freq, r);
 274                 spin_unlock_bh(&sc->sc_resetlock);
 275                 spin_unlock_bh(&sc->rx.pcu_lock);
 276                 goto ps_restore;
 277         }
 278         spin_unlock_bh(&sc->sc_resetlock);
 279
 280         if (ath_startrecv(sc) != 0) {
 281                 ath_print(common, ATH_DBG_FATAL,
 282                           "Unable to restart recv logic\n");
 283                 r = -EIO;
 284                 spin_unlock_bh(&sc->rx.pcu_lock);
 285                 goto ps_restore;
 286         }
 287
 288         spin_unlock_bh(&sc->rx.pcu_lock);
 289
 290         ath_update_txpow(sc);
 291         ath9k_hw_set_interrupts(ah, ah->imask);
 292
 293         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 294                 ath_beacon_config(sc, NULL);
 295                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 296                 ath_start_ani(common);
 297         }
 298
 299  ps_restore:
 300         ath9k_ps_restore(sc);
 301         return r;
 302 }
 303
 304 static void ath_paprd_activate(struct ath_softc *sc)
 305 {
 306         struct ath_hw *ah = sc->sc_ah;
 307         struct ath9k_hw_cal_data *caldata = ah->caldata;
 308         struct ath_common *common = ath9k_hw_common(ah);
 309         int chain;
 310
 311         if (!caldata || !caldata->paprd_done)
 312                 return;
 313
 314         ath9k_ps_wakeup(sc);
 315         ar9003_paprd_enable(ah, false);
 316         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 317                 if (!(common->tx_chainmask & BIT(chain)))
 318                         continue;
 319
 320                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 321         }
 322
 323         ar9003_paprd_enable(ah, true);
 324         ath9k_ps_restore(sc);
 325 }
 326
 327 void ath_paprd_calibrate(struct work_struct *work)
 328 {
 329         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 330         struct ieee80211_hw *hw = sc->hw;
 331         struct ath_hw *ah = sc->sc_ah;
 332         struct ieee80211_hdr *hdr;
 333         struct sk_buff *skb = NULL;
 334         struct ieee80211_tx_info *tx_info;
 335         int band = hw->conf.channel->band;
 336         struct ieee80211_supported_band *sband = &sc->sbands[band];
 337         struct ath_tx_control txctl;
 338         struct ath9k_hw_cal_data *caldata = ah->caldata;
 339         struct ath_common *common = ath9k_hw_common(ah);
 340         int qnum, ftype;
 341         int chain_ok = 0;
 342         int chain;
 343         int len = 1800;
 344         int time_left;
 345         int i;
 346
 347         if (!caldata)
 348                 return;
 349
 350         skb = alloc_skb(len, GFP_KERNEL);
 351         if (!skb)
 352                 return;
 353
 354         tx_info = IEEE80211_SKB_CB(skb);
 355
 356         skb_put(skb, len);
 357         memset(skb->data, 0, len);
 358         hdr = (struct ieee80211_hdr *)skb->data;
 359         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 360         hdr->frame_control = cpu_to_le16(ftype);
 361         hdr->duration_id = cpu_to_le16(10);
 362         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 363         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 364         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 365
 366         memset(&txctl, 0, sizeof(txctl));
 367         qnum = sc->tx.hwq_map[WME_AC_BE];
 368         txctl.txq = &sc->tx.txq[qnum];
 369
 370         ath9k_ps_wakeup(sc);
 371         ar9003_paprd_init_table(ah);
 372         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 373                 if (!(common->tx_chainmask & BIT(chain)))
 374                         continue;
 375
 376                 chain_ok = 0;
 377                 memset(tx_info, 0, sizeof(*tx_info));
 378                 tx_info->band = band;
 379
 380                 for (i = 0; i < 4; i++) {
 381                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 382                         tx_info->control.rates[i].count = 6;
 383                 }
 384
 385                 init_completion(&sc->paprd_complete);
 386                 ar9003_paprd_setup_gain_table(ah, chain);
 387                 txctl.paprd = BIT(chain);
 388                 if (ath_tx_start(hw, skb, &txctl) != 0)
 389                         break;
 390
 391                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 392                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 393                 if (!time_left) {
 394                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 395                                   "Timeout waiting for paprd training on "
 396                                   "TX chain %d\n",
 397                                   chain);
 398                         goto fail_paprd;
 399                 }
 400
 401                 if (!ar9003_paprd_is_done(ah))
 402                         break;
 403
 404                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 405                         break;
 406
 407                 chain_ok = 1;
 408         }
 409         kfree_skb(skb);
 410
 411         if (chain_ok) {
 412                 caldata->paprd_done = true;
 413                 ath_paprd_activate(sc);
 414         }
 415
 416 fail_paprd:
 417         ath9k_ps_restore(sc);
 418 }
 419
 420 /*
 421  *  This routine performs the periodic noise floor calibration function
 422  *  that is used to adjust and optimize the chip performance.  This
 423  *  takes environmental changes (location, temperature) into account.
 424  *  When the task is complete, it reschedules itself depending on the
 425  *  appropriate interval that was calculated.
 426  */
 427 void ath_ani_calibrate(unsigned long data)
 428 {
 429         struct ath_softc *sc = (struct ath_softc *)data;
 430         struct ath_hw *ah = sc->sc_ah;
 431         struct ath_common *common = ath9k_hw_common(ah);
 432         bool longcal = false;
 433         bool shortcal = false;
 434         bool aniflag = false;
 435         unsigned int timestamp = jiffies_to_msecs(jiffies);
 436         u32 cal_interval, short_cal_interval, long_cal_interval;
 437         unsigned long flags;
 438
 439         if (ah->caldata && ah->caldata->nfcal_interference)
 440                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 441         else
 442                 long_cal_interval = ATH_LONG_CALINTERVAL;
 443
 444         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 445                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 446
 447         /* Only calibrate if awake */
 448         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 449                 goto set_timer;
 450
 451         ath9k_ps_wakeup(sc);
 452
 453         /* Long calibration runs independently of short calibration. */
 454         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 455                 longcal = true;
 456                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 457                 common->ani.longcal_timer = timestamp;
 458         }
 459
 460         /* Short calibration applies only while caldone is false */
 461         if (!common->ani.caldone) {
 462                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 463                         shortcal = true;
 464                         ath_print(common, ATH_DBG_ANI,
 465                                   "shortcal @%lu\n", jiffies);
 466                         common->ani.shortcal_timer = timestamp;
 467                         common->ani.resetcal_timer = timestamp;
 468                 }
 469         } else {
 470                 if ((timestamp - common->ani.resetcal_timer) >=
 471                     ATH_RESTART_CALINTERVAL) {
 472                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 473                         if (common->ani.caldone)
 474                                 common->ani.resetcal_timer = timestamp;
 475                 }
 476         }
 477
 478         /* Verify whether we must check ANI */
 479         if ((timestamp - common->ani.checkani_timer) >=
 480              ah->config.ani_poll_interval) {
 481                 aniflag = true;
 482                 common->ani.checkani_timer = timestamp;
 483         }
 484
 485         /* Skip all processing if there's nothing to do. */
 486         if (longcal || shortcal || aniflag) {
 487                 /* Call ANI routine if necessary */
 488                 if (aniflag) {
 489                         spin_lock_irqsave(&common->cc_lock, flags);
 490                         ath9k_hw_ani_monitor(ah, ah->curchan);
 491                         ath_update_survey_stats(sc);
 492                         spin_unlock_irqrestore(&common->cc_lock, flags);
 493                 }
 494
 495                 /* Perform calibration if necessary */
 496                 if (longcal || shortcal) {
 497                         common->ani.caldone =
 498                                 ath9k_hw_calibrate(ah,
 499                                                    ah->curchan,
 500                                                    common->rx_chainmask,
 501                                                    longcal);
 502                 }
 503         }
 504
 505         ath9k_ps_restore(sc);
 506
 507 set_timer:
 508         /*
 509         * Set timer interval based on previous results.
 510         * The interval must be the shortest necessary to satisfy ANI,
 511         * short calibration and long calibration.
 512         */
 513         cal_interval = ATH_LONG_CALINTERVAL;
 514         if (sc->sc_ah->config.enable_ani)
 515                 cal_interval = min(cal_interval,
 516                                    (u32)ah->config.ani_poll_interval);
 517         if (!common->ani.caldone)
 518                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 519
 520         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 521         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 522                 if (!ah->caldata->paprd_done)
 523                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 524                 else
 525                         ath_paprd_activate(sc);
 526         }
 527 }
 528
 529 /*
 530  * Update tx/rx chainmask. For legacy association,
 531  * hard code chainmask to 1x1, for 11n association, use
 532  * the chainmask configuration, for bt coexistence, use
 533  * the chainmask configuration even in legacy mode.
 534  */
 535 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 536 {
 537         struct ath_hw *ah = sc->sc_ah;
 538         struct ath_common *common = ath9k_hw_common(ah);
 539
 540         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 541             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 542                 common->tx_chainmask = ah->caps.tx_chainmask;
 543                 common->rx_chainmask = ah->caps.rx_chainmask;
 544         } else {
 545                 common->tx_chainmask = 1;
 546                 common->rx_chainmask = 1;
 547         }
 548
 549         ath_print(common, ATH_DBG_CONFIG,
 550                   "tx chmask: %d, rx chmask: %d\n",
 551                   common->tx_chainmask,
 552                   common->rx_chainmask);
 553 }
 554
 555 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 556 {
 557         struct ath_node *an;
 558
 559         an = (struct ath_node *)sta->drv_priv;
 560
 561         if (sc->sc_flags & SC_OP_TXAGGR) {
 562                 ath_tx_node_init(sc, an);
 563                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 564                                      sta->ht_cap.ampdu_factor);
 565                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 566                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 567         }
 568 }
 569
 570 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 571 {
 572         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 573
 574         if (sc->sc_flags & SC_OP_TXAGGR)
 575                 ath_tx_node_cleanup(sc, an);
 576 }
 577
 578 void ath_hw_check(struct work_struct *work)
 579 {
 580         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 581         int i;
 582
 583         ath9k_ps_wakeup(sc);
 584
 585         for (i = 0; i < 3; i++) {
 586                 if (ath9k_hw_check_alive(sc->sc_ah))
 587                         goto out;
 588
 589                 msleep(1);
 590         }
 591         ath_reset(sc, true);
 592
 593 out:
 594         ath9k_ps_restore(sc);
 595 }
 596
 597 void ath9k_tasklet(unsigned long data)
 598 {
 599         struct ath_softc *sc = (struct ath_softc *)data;
 600         struct ath_hw *ah = sc->sc_ah;
 601         struct ath_common *common = ath9k_hw_common(ah);
 602
 603         u32 status = sc->intrstatus;
 604         u32 rxmask;
 605
 606         ath9k_ps_wakeup(sc);
 607
 608         if (status & ATH9K_INT_FATAL) {
 609                 ath_reset(sc, true);
 610                 ath9k_ps_restore(sc);
 611                 return;
 612         }
 613
 614         if (!ath9k_hw_check_alive(ah))
 615                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 616
 617         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 618                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 619                           ATH9K_INT_RXORN);
 620         else
 621                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 622
 623         if (status & rxmask) {
 624                 spin_lock_bh(&sc->rx.pcu_lock);
 625
 626                 /* Check for high priority Rx first */
 627                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 628                     (status & ATH9K_INT_RXHP))
 629                         ath_rx_tasklet(sc, 0, true);
 630
 631                 ath_rx_tasklet(sc, 0, false);
 632                 spin_unlock_bh(&sc->rx.pcu_lock);
 633         }
 634
 635         if (status & ATH9K_INT_TX) {
 636                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 637                         ath_tx_edma_tasklet(sc);
 638                 else
 639                         ath_tx_tasklet(sc);
 640         }
 641
 642         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 643                 /*
 644                  * TSF sync does not look correct; remain awake to sync with
 645                  * the next Beacon.
 646                  */
 647                 ath_print(common, ATH_DBG_PS,
 648                           "TSFOOR - Sync with next Beacon\n");
 649                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 650         }
 651
 652         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 653                 if (status & ATH9K_INT_GENTIMER)
 654                         ath_gen_timer_isr(sc->sc_ah);
 655
 656         /* re-enable hardware interrupt */
 657         ath9k_hw_set_interrupts(ah, ah->imask);
 658         ath9k_ps_restore(sc);
 659 }
 660
 661 irqreturn_t ath_isr(int irq, void *dev)
 662 {
 663 #define SCHED_INTR (                            \
 664                 ATH9K_INT_FATAL |               \
 665                 ATH9K_INT_RXORN |               \
 666                 ATH9K_INT_RXEOL |               \
 667                 ATH9K_INT_RX |                  \
 668                 ATH9K_INT_RXLP |                \
 669                 ATH9K_INT_RXHP |                \
 670                 ATH9K_INT_TX |                  \
 671                 ATH9K_INT_BMISS |               \
 672                 ATH9K_INT_CST |                 \
 673                 ATH9K_INT_TSFOOR |              \
 674                 ATH9K_INT_GENTIMER)
 675
 676         struct ath_softc *sc = dev;
 677         struct ath_hw *ah = sc->sc_ah;
 678         struct ath_common *common = ath9k_hw_common(ah);
 679         enum ath9k_int status;
 680         bool sched = false;
 681
 682         /*
 683          * The hardware is not ready/present, don't
 684          * touch anything. Note this can happen early
 685          * on if the IRQ is shared.
 686          */
 687         if (sc->sc_flags & SC_OP_INVALID)
 688                 return IRQ_NONE;
 689
 690
 691         /* shared irq, not for us */
 692
 693         if (!ath9k_hw_intrpend(ah))
 694                 return IRQ_NONE;
 695
 696         /*
 697          * Figure out the reason(s) for the interrupt.  Note
 698          * that the hal returns a pseudo-ISR that may include
 699          * bits we haven't explicitly enabled so we mask the
 700          * value to insure we only process bits we requested.
 701          */
 702         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 703         status &= ah->imask;    /* discard unasked-for bits */
 704
 705         /*
 706          * If there are no status bits set, then this interrupt was not
 707          * for me (should have been caught above).
 708          */
 709         if (!status)
 710                 return IRQ_NONE;
 711
 712         /* Cache the status */
 713         sc->intrstatus = status;
 714
 715         if (status & SCHED_INTR)
 716                 sched = true;
 717
 718         /*
 719          * If a FATAL or RXORN interrupt is received, we have to reset the
 720          * chip immediately.
 721          */
 722         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 723             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 724                 goto chip_reset;
 725
 726         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 727             (status & ATH9K_INT_BB_WATCHDOG)) {
 728
 729                 spin_lock(&common->cc_lock);
 730                 ath_hw_cycle_counters_update(common);
 731                 ar9003_hw_bb_watchdog_dbg_info(ah);
 732                 spin_unlock(&common->cc_lock);
 733
 734                 goto chip_reset;
 735         }
 736
 737         if (status & ATH9K_INT_SWBA)
 738                 tasklet_schedule(&sc->bcon_tasklet);
 739
 740         if (status & ATH9K_INT_TXURN)
 741                 ath9k_hw_updatetxtriglevel(ah, true);
 742
 743         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 744                 if (status & ATH9K_INT_RXEOL) {
 745                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 746                         ath9k_hw_set_interrupts(ah, ah->imask);
 747                 }
 748         }
 749
 750         if (status & ATH9K_INT_MIB) {
 751                 /*
 752                  * Disable interrupts until we service the MIB
 753                  * interrupt; otherwise it will continue to
 754                  * fire.
 755                  */
 756                 ath9k_hw_set_interrupts(ah, 0);
 757                 /*
 758                  * Let the hal handle the event. We assume
 759                  * it will clear whatever condition caused
 760                  * the interrupt.
 761                  */
 762                 spin_lock(&common->cc_lock);
 763                 ath9k_hw_proc_mib_event(ah);
 764                 spin_unlock(&common->cc_lock);
 765                 ath9k_hw_set_interrupts(ah, ah->imask);
 766         }
 767
 768         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 769                 if (status & ATH9K_INT_TIM_TIMER) {
 770                         /* Clear RxAbort bit so that we can
 771                          * receive frames */
 772                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 773                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 774                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 775                 }
 776
 777 chip_reset:
 778
 779         ath_debug_stat_interrupt(sc, status);
 780
 781         if (sched) {
 782                 /* turn off every interrupt except SWBA */
 783                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 784                 tasklet_schedule(&sc->intr_tq);
 785         }
 786
 787         return IRQ_HANDLED;
 788
 789 #undef SCHED_INTR
 790 }
 791
 792 static u32 ath_get_extchanmode(struct ath_softc *sc,
 793                                struct ieee80211_channel *chan,
 794                                enum nl80211_channel_type channel_type)
 795 {
 796         u32 chanmode = 0;
 797
 798         switch (chan->band) {
 799         case IEEE80211_BAND_2GHZ:
 800                 switch(channel_type) {
 801                 case NL80211_CHAN_NO_HT:
 802                 case NL80211_CHAN_HT20:
 803                         chanmode = CHANNEL_G_HT20;
 804                         break;
 805                 case NL80211_CHAN_HT40PLUS:
 806                         chanmode = CHANNEL_G_HT40PLUS;
 807                         break;
 808                 case NL80211_CHAN_HT40MINUS:
 809                         chanmode = CHANNEL_G_HT40MINUS;
 810                         break;
 811                 }
 812                 break;
 813         case IEEE80211_BAND_5GHZ:
 814                 switch(channel_type) {
 815                 case NL80211_CHAN_NO_HT:
 816                 case NL80211_CHAN_HT20:
 817                         chanmode = CHANNEL_A_HT20;
 818                         break;
 819                 case NL80211_CHAN_HT40PLUS:
 820                         chanmode = CHANNEL_A_HT40PLUS;
 821                         break;
 822                 case NL80211_CHAN_HT40MINUS:
 823                         chanmode = CHANNEL_A_HT40MINUS;
 824                         break;
 825                 }
 826                 break;
 827         default:
 828                 break;
 829         }
 830
 831         return chanmode;
 832 }
 833
 834 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 835                                  struct ieee80211_vif *vif,
 836                                  struct ieee80211_bss_conf *bss_conf)
 837 {
 838         struct ath_hw *ah = sc->sc_ah;
 839         struct ath_common *common = ath9k_hw_common(ah);
 840
 841         if (bss_conf->assoc) {
 842                 ath_print(common, ATH_DBG_CONFIG,
 843                           "Bss Info ASSOC %d, bssid: %pM\n",
 844                            bss_conf->aid, common->curbssid);
 845
 846                 /* New association, store aid */
 847                 common->curaid = bss_conf->aid;
 848                 ath9k_hw_write_associd(ah);
 849
 850                 /*
 851                  * Request a re-configuration of Beacon related timers
 852                  * on the receipt of the first Beacon frame (i.e.,
 853                  * after time sync with the AP).
 854                  */
 855                 sc->ps_flags |= PS_BEACON_SYNC;
 856
 857                 /* Configure the beacon */
 858                 ath_beacon_config(sc, vif);
 859
 860                 /* Reset rssi stats */
 861                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 862
 863                 sc->sc_flags |= SC_OP_ANI_RUN;
 864                 ath_start_ani(common);
 865         } else {
 866                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 867                 common->curaid = 0;
 868                 /* Stop ANI */
 869                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 870                 del_timer_sync(&common->ani.timer);
 871         }
 872 }
 873
 874 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 875 {
 876         struct ath_hw *ah = sc->sc_ah;
 877         struct ath_common *common = ath9k_hw_common(ah);
 878         struct ieee80211_channel *channel = hw->conf.channel;
 879         int r;
 880
 881         ath9k_ps_wakeup(sc);
 882         ath9k_hw_configpcipowersave(ah, 0, 0);
 883
 884         if (!ah->curchan)
 885                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 886
 887         spin_lock_bh(&sc->rx.pcu_lock);
 888         spin_lock_bh(&sc->sc_resetlock);
 889         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 890         if (r) {
 891                 ath_print(common, ATH_DBG_FATAL,
 892                           "Unable to reset channel (%u MHz), "
 893                           "reset status %d\n",
 894                           channel->center_freq, r);
 895         }
 896         spin_unlock_bh(&sc->sc_resetlock);
 897
 898         ath_update_txpow(sc);
 899         if (ath_startrecv(sc) != 0) {
 900                 ath_print(common, ATH_DBG_FATAL,
 901                           "Unable to restart recv logic\n");
 902                 spin_unlock_bh(&sc->rx.pcu_lock);
 903                 return;
 904         }
 905         spin_unlock_bh(&sc->rx.pcu_lock);
 906
 907         if (sc->sc_flags & SC_OP_BEACONS)
 908                 ath_beacon_config(sc, NULL);    /* restart beacons */
 909
 910         /* Re-Enable  interrupts */
 911         ath9k_hw_set_interrupts(ah, ah->imask);
 912
 913         /* Enable LED */
 914         ath9k_hw_cfg_output(ah, ah->led_pin,
 915                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 916         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 917
 918         ieee80211_wake_queues(hw);
 919         ath9k_ps_restore(sc);
 920 }
 921
 922 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 923 {
 924         struct ath_hw *ah = sc->sc_ah;
 925         struct ieee80211_channel *channel = hw->conf.channel;
 926         int r;
 927
 928         ath9k_ps_wakeup(sc);
 929         ieee80211_stop_queues(hw);
 930
 931         /*
 932          * Keep the LED on when the radio is disabled
 933          * during idle unassociated state.
 934          */
 935         if (!sc->ps_idle) {
 936                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 937                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 938         }
 939
 940         /* Disable interrupts */
 941         ath9k_hw_set_interrupts(ah, 0);
 942
 943         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 944
 945         spin_lock_bh(&sc->rx.pcu_lock);
 946
 947         ath_stoprecv(sc);               /* turn off frame recv */
 948         ath_flushrecv(sc);              /* flush recv queue */
 949
 950         if (!ah->curchan)
 951                 ah->curchan = ath_get_curchannel(sc, hw);
 952
 953         spin_lock_bh(&sc->sc_resetlock);
 954         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 955         if (r) {
 956                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 957                           "Unable to reset channel (%u MHz), "
 958                           "reset status %d\n",
 959                           channel->center_freq, r);
 960         }
 961         spin_unlock_bh(&sc->sc_resetlock);
 962
 963         ath9k_hw_phy_disable(ah);
 964
 965         spin_unlock_bh(&sc->rx.pcu_lock);
 966
 967         ath9k_hw_configpcipowersave(ah, 1, 1);
 968         ath9k_ps_restore(sc);
 969         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 970 }
 971
 972 int ath_reset(struct ath_softc *sc, bool retry_tx)
 973 {
 974         struct ath_hw *ah = sc->sc_ah;
 975         struct ath_common *common = ath9k_hw_common(ah);
 976         struct ieee80211_hw *hw = sc->hw;
 977         int r;
 978
 979         /* Stop ANI */
 980         del_timer_sync(&common->ani.timer);
 981
 982         ieee80211_stop_queues(hw);
 983
 984         ath9k_hw_set_interrupts(ah, 0);
 985         ath_drain_all_txq(sc, retry_tx);
 986
 987         spin_lock_bh(&sc->rx.pcu_lock);
 988
 989         ath_stoprecv(sc);
 990         ath_flushrecv(sc);
 991
 992         spin_lock_bh(&sc->sc_resetlock);
 993         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 994         if (r)
 995                 ath_print(common, ATH_DBG_FATAL,
 996                           "Unable to reset hardware; reset status %d\n", r);
 997         spin_unlock_bh(&sc->sc_resetlock);
 998
 999         if (ath_startrecv(sc) != 0)
1000                 ath_print(common, ATH_DBG_FATAL,
1001                           "Unable to start recv logic\n");
1002
1003         spin_unlock_bh(&sc->rx.pcu_lock);
1004
1005         /*
1006          * We may be doing a reset in response to a request
1007          * that changes the channel so update any state that
1008          * might change as a result.
1009          */
1010         ath_update_txpow(sc);
1011
1012         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1013                 ath_beacon_config(sc, NULL);    /* restart beacons */
1014
1015         ath9k_hw_set_interrupts(ah, ah->imask);
1016
1017         if (retry_tx) {
1018                 int i;
1019                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1020                         if (ATH_TXQ_SETUP(sc, i)) {
1021                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1022                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1023                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1024                         }
1025                 }
1026         }
1027
1028         ieee80211_wake_queues(hw);
1029
1030         /* Start ANI */
1031         ath_start_ani(common);
1032
1033         return r;
1034 }
1035
1036 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1037 {
1038         int qnum;
1039
1040         switch (queue) {
1041         case 0:
1042                 qnum = sc->tx.hwq_map[WME_AC_VO];
1043                 break;
1044         case 1:
1045                 qnum = sc->tx.hwq_map[WME_AC_VI];
1046                 break;
1047         case 2:
1048                 qnum = sc->tx.hwq_map[WME_AC_BE];
1049                 break;
1050         case 3:
1051                 qnum = sc->tx.hwq_map[WME_AC_BK];
1052                 break;
1053         default:
1054                 qnum = sc->tx.hwq_map[WME_AC_BE];
1055                 break;
1056         }
1057
1058         return qnum;
1059 }
1060
1061 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1062 {
1063         int qnum;
1064
1065         switch (queue) {
1066         case WME_AC_VO:
1067                 qnum = 0;
1068                 break;
1069         case WME_AC_VI:
1070                 qnum = 1;
1071                 break;
1072         case WME_AC_BE:
1073                 qnum = 2;
1074                 break;
1075         case WME_AC_BK:
1076                 qnum = 3;
1077                 break;
1078         default:
1079                 qnum = -1;
1080                 break;
1081         }
1082
1083         return qnum;
1084 }
1085
1086 /* XXX: Remove me once we don't depend on ath9k_channel for all
1087  * this redundant data */
1088 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1089                            struct ath9k_channel *ichan)
1090 {
1091         struct ieee80211_channel *chan = hw->conf.channel;
1092         struct ieee80211_conf *conf = &hw->conf;
1093
1094         ichan->channel = chan->center_freq;
1095         ichan->chan = chan;
1096
1097         if (chan->band == IEEE80211_BAND_2GHZ) {
1098                 ichan->chanmode = CHANNEL_G;
1099                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1100         } else {
1101                 ichan->chanmode = CHANNEL_A;
1102                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1103         }
1104
1105         if (conf_is_ht(conf))
1106                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1107                                             conf->channel_type);
1108 }
1109
1110 /**********************/
1111 /* mac80211 callbacks */
1112 /**********************/
1113
1114 static int ath9k_start(struct ieee80211_hw *hw)
1115 {
1116         struct ath_wiphy *aphy = hw->priv;
1117         struct ath_softc *sc = aphy->sc;
1118         struct ath_hw *ah = sc->sc_ah;
1119         struct ath_common *common = ath9k_hw_common(ah);
1120         struct ieee80211_channel *curchan = hw->conf.channel;
1121         struct ath9k_channel *init_channel;
1122         int r;
1123
1124         ath_print(common, ATH_DBG_CONFIG,
1125                   "Starting driver with initial channel: %d MHz\n",
1126                   curchan->center_freq);
1127
1128         mutex_lock(&sc->mutex);
1129
1130         if (ath9k_wiphy_started(sc)) {
1131                 if (sc->chan_idx == curchan->hw_value) {
1132                         /*
1133                          * Already on the operational channel, the new wiphy
1134                          * can be marked active.
1135                          */
1136                         aphy->state = ATH_WIPHY_ACTIVE;
1137                         ieee80211_wake_queues(hw);
1138                 } else {
1139                         /*
1140                          * Another wiphy is on another channel, start the new
1141                          * wiphy in paused state.
1142                          */
1143                         aphy->state = ATH_WIPHY_PAUSED;
1144                         ieee80211_stop_queues(hw);
1145                 }
1146                 mutex_unlock(&sc->mutex);
1147                 return 0;
1148         }
1149         aphy->state = ATH_WIPHY_ACTIVE;
1150
1151         /* setup initial channel */
1152
1153         sc->chan_idx = curchan->hw_value;
1154
1155         init_channel = ath_get_curchannel(sc, hw);
1156
1157         /* Reset SERDES registers */
1158         ath9k_hw_configpcipowersave(ah, 0, 0);
1159
1160         /*
1161          * The basic interface to setting the hardware in a good
1162          * state is ``reset''.  On return the hardware is known to
1163          * be powered up and with interrupts disabled.  This must
1164          * be followed by initialization of the appropriate bits
1165          * and then setup of the interrupt mask.
1166          */
1167         spin_lock_bh(&sc->rx.pcu_lock);
1168         spin_lock_bh(&sc->sc_resetlock);
1169         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1170         if (r) {
1171                 ath_print(common, ATH_DBG_FATAL,
1172                           "Unable to reset hardware; reset status %d "
1173                           "(freq %u MHz)\n", r,
1174                           curchan->center_freq);
1175                 spin_unlock_bh(&sc->sc_resetlock);
1176                 spin_unlock_bh(&sc->rx.pcu_lock);
1177                 goto mutex_unlock;
1178         }
1179         spin_unlock_bh(&sc->sc_resetlock);
1180
1181         /*
1182          * This is needed only to setup initial state
1183          * but it's best done after a reset.
1184          */
1185         ath_update_txpow(sc);
1186
1187         /*
1188          * Setup the hardware after reset:
1189          * The receive engine is set going.
1190          * Frame transmit is handled entirely
1191          * in the frame output path; there's nothing to do
1192          * here except setup the interrupt mask.
1193          */
1194         if (ath_startrecv(sc) != 0) {
1195                 ath_print(common, ATH_DBG_FATAL,
1196                           "Unable to start recv logic\n");
1197                 r = -EIO;
1198                 spin_unlock_bh(&sc->rx.pcu_lock);
1199                 goto mutex_unlock;
1200         }
1201         spin_unlock_bh(&sc->rx.pcu_lock);
1202
1203         /* Setup our intr mask. */
1204         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1205                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1206                     ATH9K_INT_GLOBAL;
1207
1208         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1209                 ah->imask |= ATH9K_INT_RXHP |
1210                              ATH9K_INT_RXLP |
1211                              ATH9K_INT_BB_WATCHDOG;
1212         else
1213                 ah->imask |= ATH9K_INT_RX;
1214
1215         ah->imask |= ATH9K_INT_GTT;
1216
1217         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1218                 ah->imask |= ATH9K_INT_CST;
1219
1220         sc->sc_flags &= ~SC_OP_INVALID;
1221         sc->sc_ah->is_monitoring = false;
1222
1223         /* Disable BMISS interrupt when we're not associated */
1224         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1225         ath9k_hw_set_interrupts(ah, ah->imask);
1226
1227         ieee80211_wake_queues(hw);
1228
1229         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1230
1231         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1232             !ah->btcoex_hw.enabled) {
1233                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1234                                            AR_STOMP_LOW_WLAN_WGHT);
1235                 ath9k_hw_btcoex_enable(ah);
1236
1237                 if (common->bus_ops->bt_coex_prep)
1238                         common->bus_ops->bt_coex_prep(common);
1239                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1240                         ath9k_btcoex_timer_resume(sc);
1241         }
1242
1243         pm_qos_update_request(&ath9k_pm_qos_req, 55);
1244
1245 mutex_unlock:
1246         mutex_unlock(&sc->mutex);
1247
1248         return r;
1249 }
1250
1251 static int ath9k_tx(struct ieee80211_hw *hw,
1252                     struct sk_buff *skb)
1253 {
1254         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1255         struct ath_wiphy *aphy = hw->priv;
1256         struct ath_softc *sc = aphy->sc;
1257         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1258         struct ath_tx_control txctl;
1259         int padpos, padsize;
1260         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1261         int qnum;
1262
1263         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1264                 ath_print(common, ATH_DBG_XMIT,
1265                           "ath9k: %s: TX in unexpected wiphy state "
1266                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1267                 goto exit;
1268         }
1269
1270         if (sc->ps_enabled) {
1271                 /*
1272                  * mac80211 does not set PM field for normal data frames, so we
1273                  * need to update that based on the current PS mode.
1274                  */
1275                 if (ieee80211_is_data(hdr->frame_control) &&
1276                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1277                     !ieee80211_has_pm(hdr->frame_control)) {
1278                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1279                                   "while in PS mode\n");
1280                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1281                 }
1282         }
1283
1284         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1285                 /*
1286                  * We are using PS-Poll and mac80211 can request TX while in
1287                  * power save mode. Need to wake up hardware for the TX to be
1288                  * completed and if needed, also for RX of buffered frames.
1289                  */
1290                 ath9k_ps_wakeup(sc);
1291                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1292                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1293                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1294                         ath_print(common, ATH_DBG_PS,
1295                                   "Sending PS-Poll to pick a buffered frame\n");
1296                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1297                 } else {
1298                         ath_print(common, ATH_DBG_PS,
1299                                   "Wake up to complete TX\n");
1300                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1301                 }
1302                 /*
1303                  * The actual restore operation will happen only after
1304                  * the sc_flags bit is cleared. We are just dropping
1305                  * the ps_usecount here.
1306                  */
1307                 ath9k_ps_restore(sc);
1308         }
1309
1310         memset(&txctl, 0, sizeof(struct ath_tx_control));
1311
1312         /*
1313          * As a temporary workaround, assign seq# here; this will likely need
1314          * to be cleaned up to work better with Beacon transmission and virtual
1315          * BSSes.
1316          */
1317         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1318                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1319                         sc->tx.seq_no += 0x10;
1320                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1321                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1322         }
1323
1324         /* Add the padding after the header if this is not already done */
1325         padpos = ath9k_cmn_padpos(hdr->frame_control);
1326         padsize = padpos & 3;
1327         if (padsize && skb->len>padpos) {
1328                 if (skb_headroom(skb) < padsize)
1329                         return -1;
1330                 skb_push(skb, padsize);
1331                 memmove(skb->data, skb->data + padsize, padpos);
1332         }
1333
1334         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1335         txctl.txq = &sc->tx.txq[qnum];
1336
1337         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1338
1339         if (ath_tx_start(hw, skb, &txctl) != 0) {
1340                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1341                 goto exit;
1342         }
1343
1344         return 0;
1345 exit:
1346         dev_kfree_skb_any(skb);
1347         return 0;
1348 }
1349
1350 static void ath9k_stop(struct ieee80211_hw *hw)
1351 {
1352         struct ath_wiphy *aphy = hw->priv;
1353         struct ath_softc *sc = aphy->sc;
1354         struct ath_hw *ah = sc->sc_ah;
1355         struct ath_common *common = ath9k_hw_common(ah);
1356         int i;
1357
1358         mutex_lock(&sc->mutex);
1359
1360         aphy->state = ATH_WIPHY_INACTIVE;
1361
1362         if (led_blink)
1363                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1364
1365         cancel_delayed_work_sync(&sc->tx_complete_work);
1366         cancel_work_sync(&sc->paprd_work);
1367         cancel_work_sync(&sc->hw_check_work);
1368
1369         for (i = 0; i < sc->num_sec_wiphy; i++) {
1370                 if (sc->sec_wiphy[i])
1371                         break;
1372         }
1373
1374         if (i == sc->num_sec_wiphy) {
1375                 cancel_delayed_work_sync(&sc->wiphy_work);
1376                 cancel_work_sync(&sc->chan_work);
1377         }
1378
1379         if (sc->sc_flags & SC_OP_INVALID) {
1380                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1381                 mutex_unlock(&sc->mutex);
1382                 return;
1383         }
1384
1385         if (ath9k_wiphy_started(sc)) {
1386                 mutex_unlock(&sc->mutex);
1387                 return; /* another wiphy still in use */
1388         }
1389
1390         /* Ensure HW is awake when we try to shut it down. */
1391         ath9k_ps_wakeup(sc);
1392
1393         if (ah->btcoex_hw.enabled) {
1394                 ath9k_hw_btcoex_disable(ah);
1395                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1396                         ath9k_btcoex_timer_pause(sc);
1397         }
1398
1399         /* make sure h/w will not generate any interrupt
1400          * before setting the invalid flag. */
1401         ath9k_hw_set_interrupts(ah, 0);
1402
1403         spin_lock_bh(&sc->rx.pcu_lock);
1404         if (!(sc->sc_flags & SC_OP_INVALID)) {
1405                 ath_drain_all_txq(sc, false);
1406                 ath_stoprecv(sc);
1407                 ath9k_hw_phy_disable(ah);
1408         } else
1409                 sc->rx.rxlink = NULL;
1410         spin_unlock_bh(&sc->rx.pcu_lock);
1411
1412         /* disable HAL and put h/w to sleep */
1413         ath9k_hw_disable(ah);
1414         ath9k_hw_configpcipowersave(ah, 1, 1);
1415         ath9k_ps_restore(sc);
1416
1417         /* Finally, put the chip in FULL SLEEP mode */
1418         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1419
1420         sc->sc_flags |= SC_OP_INVALID;
1421
1422         pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE);
1423
1424         mutex_unlock(&sc->mutex);
1425
1426         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1427 }
1428
1429 static int ath9k_add_interface(struct ieee80211_hw *hw,
1430                                struct ieee80211_vif *vif)
1431 {
1432         struct ath_wiphy *aphy = hw->priv;
1433         struct ath_softc *sc = aphy->sc;
1434         struct ath_hw *ah = sc->sc_ah;
1435         struct ath_common *common = ath9k_hw_common(ah);
1436         struct ath_vif *avp = (void *)vif->drv_priv;
1437         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1438         int ret = 0;
1439
1440         mutex_lock(&sc->mutex);
1441
1442         switch (vif->type) {
1443         case NL80211_IFTYPE_STATION:
1444                 ic_opmode = NL80211_IFTYPE_STATION;
1445                 break;
1446         case NL80211_IFTYPE_WDS:
1447                 ic_opmode = NL80211_IFTYPE_WDS;
1448                 break;
1449         case NL80211_IFTYPE_ADHOC:
1450         case NL80211_IFTYPE_AP:
1451         case NL80211_IFTYPE_MESH_POINT:
1452                 if (sc->nbcnvifs >= ATH_BCBUF) {
1453                         ret = -ENOBUFS;
1454                         goto out;
1455                 }
1456                 ic_opmode = vif->type;
1457                 break;
1458         default:
1459                 ath_print(common, ATH_DBG_FATAL,
1460                         "Interface type %d not yet supported\n", vif->type);
1461                 ret = -EOPNOTSUPP;
1462                 goto out;
1463         }
1464
1465         ath_print(common, ATH_DBG_CONFIG,
1466                   "Attach a VIF of type: %d\n", ic_opmode);
1467
1468         /* Set the VIF opmode */
1469         avp->av_opmode = ic_opmode;
1470         avp->av_bslot = -1;
1471
1472         sc->nvifs++;
1473
1474         ath9k_set_bssid_mask(hw, vif);
1475
1476         if (sc->nvifs > 1)
1477                 goto out; /* skip global settings for secondary vif */
1478
1479         if (ic_opmode == NL80211_IFTYPE_AP) {
1480                 ath9k_hw_set_tsfadjust(ah, 1);
1481                 sc->sc_flags |= SC_OP_TSF_RESET;
1482         }
1483
1484         /* Set the device opmode */
1485         ah->opmode = ic_opmode;
1486
1487         /*
1488          * Enable MIB interrupts when there are hardware phy counters.
1489          * Note we only do this (at the moment) for station mode.
1490          */
1491         if ((vif->type == NL80211_IFTYPE_STATION) ||
1492             (vif->type == NL80211_IFTYPE_ADHOC) ||
1493             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1494                 if (ah->config.enable_ani)
1495                         ah->imask |= ATH9K_INT_MIB;
1496                 ah->imask |= ATH9K_INT_TSFOOR;
1497         }
1498
1499         ath9k_hw_set_interrupts(ah, ah->imask);
1500
1501         if (vif->type == NL80211_IFTYPE_AP    ||
1502             vif->type == NL80211_IFTYPE_ADHOC) {
1503                 sc->sc_flags |= SC_OP_ANI_RUN;
1504                 ath_start_ani(common);
1505         }
1506
1507 out:
1508         mutex_unlock(&sc->mutex);
1509         return ret;
1510 }
1511
1512 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1513                                    struct ieee80211_vif *vif)
1514 {
1515         struct ath_wiphy *aphy = hw->priv;
1516         struct ath_softc *sc = aphy->sc;
1517         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518         struct ath_vif *avp = (void *)vif->drv_priv;
1519         int i;
1520
1521         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1522
1523         mutex_lock(&sc->mutex);
1524
1525         /* Stop ANI */
1526         sc->sc_flags &= ~SC_OP_ANI_RUN;
1527         del_timer_sync(&common->ani.timer);
1528
1529         /* Reclaim beacon resources */
1530         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1531             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1532             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1533                 ath9k_ps_wakeup(sc);
1534                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1535                 ath9k_ps_restore(sc);
1536         }
1537
1538         ath_beacon_return(sc, avp);
1539         sc->sc_flags &= ~SC_OP_BEACONS;
1540
1541         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1542                 if (sc->beacon.bslot[i] == vif) {
1543                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1544                                "slot\n", __func__);
1545                         sc->beacon.bslot[i] = NULL;
1546                         sc->beacon.bslot_aphy[i] = NULL;
1547                 }
1548         }
1549
1550         sc->nvifs--;
1551
1552         mutex_unlock(&sc->mutex);
1553 }
1554
1555 static void ath9k_enable_ps(struct ath_softc *sc)
1556 {
1557         struct ath_hw *ah = sc->sc_ah;
1558
1559         sc->ps_enabled = true;
1560         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1561                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1562                         ah->imask |= ATH9K_INT_TIM_TIMER;
1563                         ath9k_hw_set_interrupts(ah, ah->imask);
1564                 }
1565                 ath9k_hw_setrxabort(ah, 1);
1566         }
1567 }
1568
1569 static void ath9k_disable_ps(struct ath_softc *sc)
1570 {
1571         struct ath_hw *ah = sc->sc_ah;
1572
1573         sc->ps_enabled = false;
1574         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1575         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1576                 ath9k_hw_setrxabort(ah, 0);
1577                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1578                                   PS_WAIT_FOR_CAB |
1579                                   PS_WAIT_FOR_PSPOLL_DATA |
1580                                   PS_WAIT_FOR_TX_ACK);
1581                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1582                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1583                         ath9k_hw_set_interrupts(ah, ah->imask);
1584                 }
1585         }
1586
1587 }
1588
1589 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1590 {
1591         struct ath_wiphy *aphy = hw->priv;
1592         struct ath_softc *sc = aphy->sc;
1593         struct ath_hw *ah = sc->sc_ah;
1594         struct ath_common *common = ath9k_hw_common(ah);
1595         struct ieee80211_conf *conf = &hw->conf;
1596         bool disable_radio;
1597
1598         mutex_lock(&sc->mutex);
1599
1600         /*
1601          * Leave this as the first check because we need to turn on the
1602          * radio if it was disabled before prior to processing the rest
1603          * of the changes. Likewise we must only disable the radio towards
1604          * the end.
1605          */
1606         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1607                 bool enable_radio;
1608                 bool all_wiphys_idle;
1609                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1610
1611                 spin_lock_bh(&sc->wiphy_lock);
1612                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1613                 ath9k_set_wiphy_idle(aphy, idle);
1614
1615                 enable_radio = (!idle && all_wiphys_idle);
1616
1617                 /*
1618                  * After we unlock here its possible another wiphy
1619                  * can be re-renabled so to account for that we will
1620                  * only disable the radio toward the end of this routine
1621                  * if by then all wiphys are still idle.
1622                  */
1623                 spin_unlock_bh(&sc->wiphy_lock);
1624
1625                 if (enable_radio) {
1626                         sc->ps_idle = false;
1627                         ath_radio_enable(sc, hw);
1628                         ath_print(common, ATH_DBG_CONFIG,
1629                                   "not-idle: enabling radio\n");
1630                 }
1631         }
1632
1633         /*
1634          * We just prepare to enable PS. We have to wait until our AP has
1635          * ACK'd our null data frame to disable RX otherwise we'll ignore
1636          * those ACKs and end up retransmitting the same null data frames.
1637          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1638          */
1639         if (changed & IEEE80211_CONF_CHANGE_PS) {
1640                 unsigned long flags;
1641                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1642                 if (conf->flags & IEEE80211_CONF_PS)
1643                         ath9k_enable_ps(sc);
1644                 else
1645                         ath9k_disable_ps(sc);
1646                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1647         }
1648
1649         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1650                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1651                         ath_print(common, ATH_DBG_CONFIG,
1652                                   "Monitor mode is enabled\n");
1653                         sc->sc_ah->is_monitoring = true;
1654                 } else {
1655                         ath_print(common, ATH_DBG_CONFIG,
1656                                   "Monitor mode is disabled\n");
1657                         sc->sc_ah->is_monitoring = false;
1658                 }
1659         }
1660
1661         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1662                 struct ieee80211_channel *curchan = hw->conf.channel;
1663                 int pos = curchan->hw_value;
1664                 int old_pos = -1;
1665                 unsigned long flags;
1666
1667                 if (ah->curchan)
1668                         old_pos = ah->curchan - &ah->channels[0];
1669
1670                 aphy->chan_idx = pos;
1671                 aphy->chan_is_ht = conf_is_ht(conf);
1672                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1673                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1674                 else
1675                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1676
1677                 if (aphy->state == ATH_WIPHY_SCAN ||
1678                     aphy->state == ATH_WIPHY_ACTIVE)
1679                         ath9k_wiphy_pause_all_forced(sc, aphy);
1680                 else {
1681                         /*
1682                          * Do not change operational channel based on a paused
1683                          * wiphy changes.
1684                          */
1685                         goto skip_chan_change;
1686                 }
1687
1688                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1689                           curchan->center_freq);
1690
1691                 /* XXX: remove me eventualy */
1692                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1693
1694                 ath_update_chainmask(sc, conf_is_ht(conf));
1695
1696                 /* update survey stats for the old channel before switching */
1697                 spin_lock_irqsave(&common->cc_lock, flags);
1698                 ath_update_survey_stats(sc);
1699                 spin_unlock_irqrestore(&common->cc_lock, flags);
1700
1701                 /*
1702                  * If the operating channel changes, change the survey in-use flags
1703                  * along with it.
1704                  * Reset the survey data for the new channel, unless we're switching
1705                  * back to the operating channel from an off-channel operation.
1706                  */
1707                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1708                     sc->cur_survey != &sc->survey[pos]) {
1709
1710                         if (sc->cur_survey)
1711                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1712
1713                         sc->cur_survey = &sc->survey[pos];
1714
1715                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1716                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1717                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1718                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1719                 }
1720
1721                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1722                         ath_print(common, ATH_DBG_FATAL,
1723                                   "Unable to set channel\n");
1724                         mutex_unlock(&sc->mutex);
1725                         return -EINVAL;
1726                 }
1727
1728                 /*
1729                  * The most recent snapshot of channel->noisefloor for the old
1730                  * channel is only available after the hardware reset. Copy it to
1731                  * the survey stats now.
1732                  */
1733                 if (old_pos >= 0)
1734                         ath_update_survey_nf(sc, old_pos);
1735         }
1736
1737 skip_chan_change:
1738         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1739                 sc->config.txpowlimit = 2 * conf->power_level;
1740                 ath_update_txpow(sc);
1741         }
1742
1743         spin_lock_bh(&sc->wiphy_lock);
1744         disable_radio = ath9k_all_wiphys_idle(sc);
1745         spin_unlock_bh(&sc->wiphy_lock);
1746
1747         if (disable_radio) {
1748                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1749                 sc->ps_idle = true;
1750                 ath_radio_disable(sc, hw);
1751         }
1752
1753         mutex_unlock(&sc->mutex);
1754
1755         return 0;
1756 }
1757
1758 #define SUPPORTED_FILTERS                       \
1759         (FIF_PROMISC_IN_BSS |                   \
1760         FIF_ALLMULTI |                          \
1761         FIF_CONTROL |                           \
1762         FIF_PSPOLL |                            \
1763         FIF_OTHER_BSS |                         \
1764         FIF_BCN_PRBRESP_PROMISC |               \
1765         FIF_PROBE_REQ |                         \
1766         FIF_FCSFAIL)
1767
1768 /* FIXME: sc->sc_full_reset ? */
1769 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1770                                    unsigned int changed_flags,
1771                                    unsigned int *total_flags,
1772                                    u64 multicast)
1773 {
1774         struct ath_wiphy *aphy = hw->priv;
1775         struct ath_softc *sc = aphy->sc;
1776         u32 rfilt;
1777
1778         changed_flags &= SUPPORTED_FILTERS;
1779         *total_flags &= SUPPORTED_FILTERS;
1780
1781         sc->rx.rxfilter = *total_flags;
1782         ath9k_ps_wakeup(sc);
1783         rfilt = ath_calcrxfilter(sc);
1784         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1785         ath9k_ps_restore(sc);
1786
1787         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1788                   "Set HW RX filter: 0x%x\n", rfilt);
1789 }
1790
1791 static int ath9k_sta_add(struct ieee80211_hw *hw,
1792                          struct ieee80211_vif *vif,
1793                          struct ieee80211_sta *sta)
1794 {
1795         struct ath_wiphy *aphy = hw->priv;
1796         struct ath_softc *sc = aphy->sc;
1797
1798         ath_node_attach(sc, sta);
1799
1800         return 0;
1801 }
1802
1803 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1804                             struct ieee80211_vif *vif,
1805                             struct ieee80211_sta *sta)
1806 {
1807         struct ath_wiphy *aphy = hw->priv;
1808         struct ath_softc *sc = aphy->sc;
1809
1810         ath_node_detach(sc, sta);
1811
1812         return 0;
1813 }
1814
1815 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1816                          const struct ieee80211_tx_queue_params *params)
1817 {
1818         struct ath_wiphy *aphy = hw->priv;
1819         struct ath_softc *sc = aphy->sc;
1820         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1821         struct ath9k_tx_queue_info qi;
1822         int ret = 0, qnum;
1823
1824         if (queue >= WME_NUM_AC)
1825                 return 0;
1826
1827         mutex_lock(&sc->mutex);
1828
1829         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1830
1831         qi.tqi_aifs = params->aifs;
1832         qi.tqi_cwmin = params->cw_min;
1833         qi.tqi_cwmax = params->cw_max;
1834         qi.tqi_burstTime = params->txop;
1835         qnum = ath_get_hal_qnum(queue, sc);
1836
1837         ath_print(common, ATH_DBG_CONFIG,
1838                   "Configure tx [queue/halq] [%d/%d],  "
1839                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1840                   queue, qnum, params->aifs, params->cw_min,
1841                   params->cw_max, params->txop);
1842
1843         ret = ath_txq_update(sc, qnum, &qi);
1844         if (ret)
1845                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1846
1847         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1848                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1849                         ath_beaconq_config(sc);
1850
1851         mutex_unlock(&sc->mutex);
1852
1853         return ret;
1854 }
1855
1856 static int ath9k_set_key(struct ieee80211_hw *hw,
1857                          enum set_key_cmd cmd,
1858                          struct ieee80211_vif *vif,
1859                          struct ieee80211_sta *sta,
1860                          struct ieee80211_key_conf *key)
1861 {
1862         struct ath_wiphy *aphy = hw->priv;
1863         struct ath_softc *sc = aphy->sc;
1864         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1865         int ret = 0;
1866
1867         if (modparam_nohwcrypt)
1868                 return -ENOSPC;
1869
1870         mutex_lock(&sc->mutex);
1871         ath9k_ps_wakeup(sc);
1872         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1873
1874         switch (cmd) {
1875         case SET_KEY:
1876                 ret = ath_key_config(common, vif, sta, key);
1877                 if (ret >= 0) {
1878                         key->hw_key_idx = ret;
1879                         /* push IV and Michael MIC generation to stack */
1880                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1881                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1882                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1883                         if (sc->sc_ah->sw_mgmt_crypto &&
1884                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1885                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1886                         ret = 0;
1887                 }
1888                 break;
1889         case DISABLE_KEY:
1890                 ath_key_delete(common, key);
1891                 break;
1892         default:
1893                 ret = -EINVAL;
1894         }
1895
1896         ath9k_ps_restore(sc);
1897         mutex_unlock(&sc->mutex);
1898
1899         return ret;
1900 }
1901
1902 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1903                                    struct ieee80211_vif *vif,
1904                                    struct ieee80211_bss_conf *bss_conf,
1905                                    u32 changed)
1906 {
1907         struct ath_wiphy *aphy = hw->priv;
1908         struct ath_softc *sc = aphy->sc;
1909         struct ath_hw *ah = sc->sc_ah;
1910         struct ath_common *common = ath9k_hw_common(ah);
1911         struct ath_vif *avp = (void *)vif->drv_priv;
1912         int slottime;
1913         int error;
1914
1915         mutex_lock(&sc->mutex);
1916
1917         if (changed & BSS_CHANGED_BSSID) {
1918                 /* Set BSSID */
1919                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1920                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1921                 common->curaid = 0;
1922                 ath9k_hw_write_associd(ah);
1923
1924                 /* Set aggregation protection mode parameters */
1925                 sc->config.ath_aggr_prot = 0;
1926
1927                 /* Only legacy IBSS for now */
1928                 if (vif->type == NL80211_IFTYPE_ADHOC)
1929                         ath_update_chainmask(sc, 0);
1930
1931                 ath_print(common, ATH_DBG_CONFIG,
1932                           "BSSID: %pM aid: 0x%x\n",
1933                           common->curbssid, common->curaid);
1934
1935                 /* need to reconfigure the beacon */
1936                 sc->sc_flags &= ~SC_OP_BEACONS ;
1937         }
1938
1939         /* Enable transmission of beacons (AP, IBSS, MESH) */
1940         if ((changed & BSS_CHANGED_BEACON) ||
1941             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1942                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1943                 error = ath_beacon_alloc(aphy, vif);
1944                 if (!error)
1945                         ath_beacon_config(sc, vif);
1946         }
1947
1948         if (changed & BSS_CHANGED_ERP_SLOT) {
1949                 if (bss_conf->use_short_slot)
1950                         slottime = 9;
1951                 else
1952                         slottime = 20;
1953                 if (vif->type == NL80211_IFTYPE_AP) {
1954                         /*
1955                          * Defer update, so that connected stations can adjust
1956                          * their settings at the same time.
1957                          * See beacon.c for more details
1958                          */
1959                         sc->beacon.slottime = slottime;
1960                         sc->beacon.updateslot = UPDATE;
1961                 } else {
1962                         ah->slottime = slottime;
1963                         ath9k_hw_init_global_settings(ah);
1964                 }
1965         }
1966
1967         /* Disable transmission of beacons */
1968         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1969                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1970
1971         if (changed & BSS_CHANGED_BEACON_INT) {
1972                 sc->beacon_interval = bss_conf->beacon_int;
1973                 /*
1974                  * In case of AP mode, the HW TSF has to be reset
1975                  * when the beacon interval changes.
1976                  */
1977                 if (vif->type == NL80211_IFTYPE_AP) {
1978                         sc->sc_flags |= SC_OP_TSF_RESET;
1979                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1980                         error = ath_beacon_alloc(aphy, vif);
1981                         if (!error)
1982                                 ath_beacon_config(sc, vif);
1983                 } else {
1984                         ath_beacon_config(sc, vif);
1985                 }
1986         }
1987
1988         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1989                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1990                           bss_conf->use_short_preamble);
1991                 if (bss_conf->use_short_preamble)
1992                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1993                 else
1994                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1995         }
1996
1997         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1998                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1999                           bss_conf->use_cts_prot);
2000                 if (bss_conf->use_cts_prot &&
2001                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2002                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2003                 else
2004                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2005         }
2006
2007         if (changed & BSS_CHANGED_ASSOC) {
2008                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2009                         bss_conf->assoc);
2010                 ath9k_bss_assoc_info(sc, vif, bss_conf);
2011         }
2012
2013         mutex_unlock(&sc->mutex);
2014 }
2015
2016 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2017 {
2018         u64 tsf;
2019         struct ath_wiphy *aphy = hw->priv;
2020         struct ath_softc *sc = aphy->sc;
2021
2022         mutex_lock(&sc->mutex);
2023         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2024         mutex_unlock(&sc->mutex);
2025
2026         return tsf;
2027 }
2028
2029 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2030 {
2031         struct ath_wiphy *aphy = hw->priv;
2032         struct ath_softc *sc = aphy->sc;
2033
2034         mutex_lock(&sc->mutex);
2035         ath9k_hw_settsf64(sc->sc_ah, tsf);
2036         mutex_unlock(&sc->mutex);
2037 }
2038
2039 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2040 {
2041         struct ath_wiphy *aphy = hw->priv;
2042         struct ath_softc *sc = aphy->sc;
2043
2044         mutex_lock(&sc->mutex);
2045
2046         ath9k_ps_wakeup(sc);
2047         ath9k_hw_reset_tsf(sc->sc_ah);
2048         ath9k_ps_restore(sc);
2049
2050         mutex_unlock(&sc->mutex);
2051 }
2052
2053 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2054                               struct ieee80211_vif *vif,
2055                               enum ieee80211_ampdu_mlme_action action,
2056                               struct ieee80211_sta *sta,
2057                               u16 tid, u16 *ssn)
2058 {
2059         struct ath_wiphy *aphy = hw->priv;
2060         struct ath_softc *sc = aphy->sc;
2061         int ret = 0;
2062
2063         local_bh_disable();
2064
2065         switch (action) {
2066         case IEEE80211_AMPDU_RX_START:
2067                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2068                         ret = -ENOTSUPP;
2069                 break;
2070         case IEEE80211_AMPDU_RX_STOP:
2071                 break;
2072         case IEEE80211_AMPDU_TX_START:
2073                 ath9k_ps_wakeup(sc);
2074                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2075                 if (!ret)
2076                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2077                 ath9k_ps_restore(sc);
2078                 break;
2079         case IEEE80211_AMPDU_TX_STOP:
2080                 ath9k_ps_wakeup(sc);
2081                 ath_tx_aggr_stop(sc, sta, tid);
2082                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2083                 ath9k_ps_restore(sc);
2084                 break;
2085         case IEEE80211_AMPDU_TX_OPERATIONAL:
2086                 ath9k_ps_wakeup(sc);
2087                 ath_tx_aggr_resume(sc, sta, tid);
2088                 ath9k_ps_restore(sc);
2089                 break;
2090         default:
2091                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2092                           "Unknown AMPDU action\n");
2093         }
2094
2095         local_bh_enable();
2096
2097         return ret;
2098 }
2099
2100 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2101                              struct survey_info *survey)
2102 {
2103         struct ath_wiphy *aphy = hw->priv;
2104         struct ath_softc *sc = aphy->sc;
2105         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2106         struct ieee80211_supported_band *sband;
2107         struct ieee80211_channel *chan;
2108         unsigned long flags;
2109         int pos;
2110
2111         spin_lock_irqsave(&common->cc_lock, flags);
2112         if (idx == 0)
2113                 ath_update_survey_stats(sc);
2114
2115         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2116         if (sband && idx >= sband->n_channels) {
2117                 idx -= sband->n_channels;
2118                 sband = NULL;
2119         }
2120
2121         if (!sband)
2122                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2123
2124         if (!sband || idx >= sband->n_channels) {
2125                 spin_unlock_irqrestore(&common->cc_lock, flags);
2126                 return -ENOENT;
2127         }
2128
2129         chan = &sband->channels[idx];
2130         pos = chan->hw_value;
2131         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2132         survey->channel = chan;
2133         spin_unlock_irqrestore(&common->cc_lock, flags);
2134
2135         return 0;
2136 }
2137
2138 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2139 {
2140         struct ath_wiphy *aphy = hw->priv;
2141         struct ath_softc *sc = aphy->sc;
2142
2143         mutex_lock(&sc->mutex);
2144         if (ath9k_wiphy_scanning(sc)) {
2145                 /*
2146                  * There is a race here in mac80211 but fixing it requires
2147                  * we revisit how we handle the scan complete callback.
2148                  * After mac80211 fixes we will not have configured hardware
2149                  * to the home channel nor would we have configured the RX
2150                  * filter yet.
2151                  */
2152                 mutex_unlock(&sc->mutex);
2153                 return;
2154         }
2155
2156         aphy->state = ATH_WIPHY_SCAN;
2157         ath9k_wiphy_pause_all_forced(sc, aphy);
2158         mutex_unlock(&sc->mutex);
2159 }
2160
2161 /*
2162  * XXX: this requires a revisit after the driver
2163  * scan_complete gets moved to another place/removed in mac80211.
2164  */
2165 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2166 {
2167         struct ath_wiphy *aphy = hw->priv;
2168         struct ath_softc *sc = aphy->sc;
2169
2170         mutex_lock(&sc->mutex);
2171         aphy->state = ATH_WIPHY_ACTIVE;
2172         mutex_unlock(&sc->mutex);
2173 }
2174
2175 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2176 {
2177         struct ath_wiphy *aphy = hw->priv;
2178         struct ath_softc *sc = aphy->sc;
2179         struct ath_hw *ah = sc->sc_ah;
2180
2181         mutex_lock(&sc->mutex);
2182         ah->coverage_class = coverage_class;
2183         ath9k_hw_init_global_settings(ah);
2184         mutex_unlock(&sc->mutex);
2185 }
2186
2187 struct ieee80211_ops ath9k_ops = {
2188         .tx                 = ath9k_tx,
2189         .start              = ath9k_start,
2190         .stop               = ath9k_stop,
2191         .add_interface      = ath9k_add_interface,
2192         .remove_interface   = ath9k_remove_interface,
2193         .config             = ath9k_config,
2194         .configure_filter   = ath9k_configure_filter,
2195         .sta_add            = ath9k_sta_add,
2196         .sta_remove         = ath9k_sta_remove,
2197         .conf_tx            = ath9k_conf_tx,
2198         .bss_info_changed   = ath9k_bss_info_changed,
2199         .set_key            = ath9k_set_key,
2200         .get_tsf            = ath9k_get_tsf,
2201         .set_tsf            = ath9k_set_tsf,
2202         .reset_tsf          = ath9k_reset_tsf,
2203         .ampdu_action       = ath9k_ampdu_action,
2204         .get_survey         = ath9k_get_survey,
2205         .sw_scan_start      = ath9k_sw_scan_start,
2206         .sw_scan_complete   = ath9k_sw_scan_complete,
2207         .rfkill_poll        = ath9k_rfkill_poll_state,
2208         .set_coverage_class = ath9k_set_coverage_class,
2209 };