drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65
  66         spin_unlock_bh(&txq->axq_lock);
  67         return pending;
  68 }
  69
  70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  71 {
  72         unsigned long flags;
  73         bool ret;
  74
  75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  78
  79         return ret;
  80 }
  81
  82 void ath9k_ps_wakeup(struct ath_softc *sc)
  83 {
  84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85         unsigned long flags;
  86         enum ath9k_power_mode power_mode;
  87
  88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  89         if (++sc->ps_usecount != 1)
  90                 goto unlock;
  91
  92         power_mode = sc->sc_ah->power_mode;
  93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  94
  95         /*
  96          * While the hardware is asleep, the cycle counters contain no
  97          * useful data. Better clear them now so that they don't mess up
  98          * survey data results.
  99          */
 100         if (power_mode != ATH9K_PM_AWAKE) {
 101                 spin_lock(&common->cc_lock);
 102                 ath_hw_cycle_counters_update(common);
 103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 104                 spin_unlock(&common->cc_lock);
 105         }
 106
 107  unlock:
 108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 109 }
 110
 111 void ath9k_ps_restore(struct ath_softc *sc)
 112 {
 113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 114         unsigned long flags;
 115
 116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 117         if (--sc->ps_usecount != 0)
 118                 goto unlock;
 119
 120         spin_lock(&common->cc_lock);
 121         ath_hw_cycle_counters_update(common);
 122         spin_unlock(&common->cc_lock);
 123
 124         if (sc->ps_idle)
 125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 126         else if (sc->ps_enabled &&
 127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 128                               PS_WAIT_FOR_CAB |
 129                               PS_WAIT_FOR_PSPOLL_DATA |
 130                               PS_WAIT_FOR_TX_ACK)))
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 132
 133  unlock:
 134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 135 }
 136
 137 void ath_start_ani(struct ath_common *common)
 138 {
 139         struct ath_hw *ah = common->ah;
 140         unsigned long timestamp = jiffies_to_msecs(jiffies);
 141         struct ath_softc *sc = (struct ath_softc *) common->priv;
 142
 143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 144                 return;
 145
 146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 147                 return;
 148
 149         common->ani.longcal_timer = timestamp;
 150         common->ani.shortcal_timer = timestamp;
 151         common->ani.checkani_timer = timestamp;
 152
 153         mod_timer(&common->ani.timer,
 154                   jiffies +
 155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 156 }
 157
 158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 159 {
 160         struct ath_hw *ah = sc->sc_ah;
 161         struct ath9k_channel *chan = &ah->channels[channel];
 162         struct survey_info *survey = &sc->survey[channel];
 163
 164         if (chan->noisefloor) {
 165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 166                 survey->noise = chan->noisefloor;
 167         }
 168 }
 169
 170 /*
 171  * Updates the survey statistics and returns the busy time since last
 172  * update in %, if the measurement duration was long enough for the
 173  * result to be useful, -1 otherwise.
 174  */
 175 static int ath_update_survey_stats(struct ath_softc *sc)
 176 {
 177         struct ath_hw *ah = sc->sc_ah;
 178         struct ath_common *common = ath9k_hw_common(ah);
 179         int pos = ah->curchan - &ah->channels[0];
 180         struct survey_info *survey = &sc->survey[pos];
 181         struct ath_cycle_counters *cc = &common->cc_survey;
 182         unsigned int div = common->clockrate * 1000;
 183         int ret = 0;
 184
 185         if (!ah->curchan)
 186                 return -1;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201
 202         if (cc->cycles < div)
 203                 return -1;
 204
 205         if (cc->cycles > 0)
 206                 ret = cc->rx_busy * 100 / cc->cycles;
 207
 208         memset(cc, 0, sizeof(*cc));
 209
 210         ath_update_survey_nf(sc, pos);
 211
 212         return ret;
 213 }
 214
 215 /*
 216  * Set/change channels.  If the channel is really being changed, it's done
 217  * by reseting the chip.  To accomplish this we must first cleanup any pending
 218  * DMA, then restart stuff.
 219 */
 220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 221                     struct ath9k_channel *hchan)
 222 {
 223         struct ath_hw *ah = sc->sc_ah;
 224         struct ath_common *common = ath9k_hw_common(ah);
 225         struct ieee80211_conf *conf = &common->hw->conf;
 226         bool fastcc = true, stopped;
 227         struct ieee80211_channel *channel = hw->conf.channel;
 228         struct ath9k_hw_cal_data *caldata = NULL;
 229         int r;
 230
 231         if (sc->sc_flags & SC_OP_INVALID)
 232                 return -EIO;
 233
 234         sc->hw_busy_count = 0;
 235
 236         del_timer_sync(&common->ani.timer);
 237         cancel_work_sync(&sc->paprd_work);
 238         cancel_work_sync(&sc->hw_check_work);
 239         cancel_delayed_work_sync(&sc->tx_complete_work);
 240         cancel_delayed_work_sync(&sc->hw_pll_work);
 241
 242         ath9k_ps_wakeup(sc);
 243
 244         spin_lock_bh(&sc->sc_pcu_lock);
 245
 246         /*
 247          * This is only performed if the channel settings have
 248          * actually changed.
 249          *
 250          * To switch channels clear any pending DMA operations;
 251          * wait long enough for the RX fifo to drain, reset the
 252          * hardware at the new frequency, and then re-enable
 253          * the relevant bits of the h/w.
 254          */
 255         ath9k_hw_disable_interrupts(ah);
 256         stopped = ath_drain_all_txq(sc, false);
 257
 258         if (!ath_stoprecv(sc))
 259                 stopped = false;
 260
 261         if (!ath9k_hw_check_alive(ah))
 262                 stopped = false;
 263
 264         /* XXX: do not flush receive queue here. We don't want
 265          * to flush data frames already in queue because of
 266          * changing channel. */
 267
 268         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 269                 fastcc = false;
 270
 271         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 272                 caldata = &sc->caldata;
 273
 274         ath_dbg(common, ATH_DBG_CONFIG,
 275                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 276                 sc->sc_ah->curchan->channel,
 277                 channel->center_freq, conf_is_ht40(conf),
 278                 fastcc);
 279
 280         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 281         if (r) {
 282                 ath_err(common,
 283                         "Unable to reset channel (%u MHz), reset status %d\n",
 284                         channel->center_freq, r);
 285                 goto ps_restore;
 286         }
 287
 288         if (ath_startrecv(sc) != 0) {
 289                 ath_err(common, "Unable to restart recv logic\n");
 290                 r = -EIO;
 291                 goto ps_restore;
 292         }
 293
 294         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 295                                sc->config.txpowlimit, &sc->curtxpow);
 296         ath9k_hw_set_interrupts(ah, ah->imask);
 297
 298         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 299                 if (sc->sc_flags & SC_OP_BEACONS)
 300                         ath_set_beacon(sc);
 301                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 302                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 303                 if (!common->disable_ani)
 304                         ath_start_ani(common);
 305         }
 306
 307  ps_restore:
 308         ieee80211_wake_queues(hw);
 309
 310         spin_unlock_bh(&sc->sc_pcu_lock);
 311
 312         ath9k_ps_restore(sc);
 313         return r;
 314 }
 315
 316 static void ath_paprd_activate(struct ath_softc *sc)
 317 {
 318         struct ath_hw *ah = sc->sc_ah;
 319         struct ath9k_hw_cal_data *caldata = ah->caldata;
 320         struct ath_common *common = ath9k_hw_common(ah);
 321         int chain;
 322
 323         if (!caldata || !caldata->paprd_done)
 324                 return;
 325
 326         ath9k_ps_wakeup(sc);
 327         ar9003_paprd_enable(ah, false);
 328         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 329                 if (!(common->tx_chainmask & BIT(chain)))
 330                         continue;
 331
 332                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 333         }
 334
 335         ar9003_paprd_enable(ah, true);
 336         ath9k_ps_restore(sc);
 337 }
 338
 339 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 340 {
 341         struct ieee80211_hw *hw = sc->hw;
 342         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 343         struct ath_hw *ah = sc->sc_ah;
 344         struct ath_common *common = ath9k_hw_common(ah);
 345         struct ath_tx_control txctl;
 346         int time_left;
 347
 348         memset(&txctl, 0, sizeof(txctl));
 349         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 350
 351         memset(tx_info, 0, sizeof(*tx_info));
 352         tx_info->band = hw->conf.channel->band;
 353         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 354         tx_info->control.rates[0].idx = 0;
 355         tx_info->control.rates[0].count = 1;
 356         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 357         tx_info->control.rates[1].idx = -1;
 358
 359         init_completion(&sc->paprd_complete);
 360         txctl.paprd = BIT(chain);
 361
 362         if (ath_tx_start(hw, skb, &txctl) != 0) {
 363                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 364                 dev_kfree_skb_any(skb);
 365                 return false;
 366         }
 367
 368         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 369                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 370
 371         if (!time_left)
 372                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 373                         "Timeout waiting for paprd training on TX chain %d\n",
 374                         chain);
 375
 376         return !!time_left;
 377 }
 378
 379 void ath_paprd_calibrate(struct work_struct *work)
 380 {
 381         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 382         struct ieee80211_hw *hw = sc->hw;
 383         struct ath_hw *ah = sc->sc_ah;
 384         struct ieee80211_hdr *hdr;
 385         struct sk_buff *skb = NULL;
 386         struct ath9k_hw_cal_data *caldata = ah->caldata;
 387         struct ath_common *common = ath9k_hw_common(ah);
 388         int ftype;
 389         int chain_ok = 0;
 390         int chain;
 391         int len = 1800;
 392
 393         if (!caldata)
 394                 return;
 395
 396         ath9k_ps_wakeup(sc);
 397
 398         if (ar9003_paprd_init_table(ah) < 0)
 399                 goto fail_paprd;
 400
 401         skb = alloc_skb(len, GFP_KERNEL);
 402         if (!skb)
 403                 goto fail_paprd;
 404
 405         skb_put(skb, len);
 406         memset(skb->data, 0, len);
 407         hdr = (struct ieee80211_hdr *)skb->data;
 408         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 409         hdr->frame_control = cpu_to_le16(ftype);
 410         hdr->duration_id = cpu_to_le16(10);
 411         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 412         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 413         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 414
 415         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 416                 if (!(common->tx_chainmask & BIT(chain)))
 417                         continue;
 418
 419                 chain_ok = 0;
 420
 421                 ath_dbg(common, ATH_DBG_CALIBRATE,
 422                         "Sending PAPRD frame for thermal measurement "
 423                         "on chain %d\n", chain);
 424                 if (!ath_paprd_send_frame(sc, skb, chain))
 425                         goto fail_paprd;
 426
 427                 ar9003_paprd_setup_gain_table(ah, chain);
 428
 429                 ath_dbg(common, ATH_DBG_CALIBRATE,
 430                         "Sending PAPRD training frame on chain %d\n", chain);
 431                 if (!ath_paprd_send_frame(sc, skb, chain))
 432                         goto fail_paprd;
 433
 434                 if (!ar9003_paprd_is_done(ah))
 435                         break;
 436
 437                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 438                         break;
 439
 440                 chain_ok = 1;
 441         }
 442         kfree_skb(skb);
 443
 444         if (chain_ok) {
 445                 caldata->paprd_done = true;
 446                 ath_paprd_activate(sc);
 447         }
 448
 449 fail_paprd:
 450         ath9k_ps_restore(sc);
 451 }
 452
 453 /*
 454  *  This routine performs the periodic noise floor calibration function
 455  *  that is used to adjust and optimize the chip performance.  This
 456  *  takes environmental changes (location, temperature) into account.
 457  *  When the task is complete, it reschedules itself depending on the
 458  *  appropriate interval that was calculated.
 459  */
 460 void ath_ani_calibrate(unsigned long data)
 461 {
 462         struct ath_softc *sc = (struct ath_softc *)data;
 463         struct ath_hw *ah = sc->sc_ah;
 464         struct ath_common *common = ath9k_hw_common(ah);
 465         bool longcal = false;
 466         bool shortcal = false;
 467         bool aniflag = false;
 468         unsigned int timestamp = jiffies_to_msecs(jiffies);
 469         u32 cal_interval, short_cal_interval, long_cal_interval;
 470         unsigned long flags;
 471
 472         if (ah->caldata && ah->caldata->nfcal_interference)
 473                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 474         else
 475                 long_cal_interval = ATH_LONG_CALINTERVAL;
 476
 477         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 478                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 479
 480         /* Only calibrate if awake */
 481         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 482                 goto set_timer;
 483
 484         ath9k_ps_wakeup(sc);
 485
 486         /* Long calibration runs independently of short calibration. */
 487         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 488                 longcal = true;
 489                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 490                 common->ani.longcal_timer = timestamp;
 491         }
 492
 493         /* Short calibration applies only while caldone is false */
 494         if (!common->ani.caldone) {
 495                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 496                         shortcal = true;
 497                         ath_dbg(common, ATH_DBG_ANI,
 498                                 "shortcal @%lu\n", jiffies);
 499                         common->ani.shortcal_timer = timestamp;
 500                         common->ani.resetcal_timer = timestamp;
 501                 }
 502         } else {
 503                 if ((timestamp - common->ani.resetcal_timer) >=
 504                     ATH_RESTART_CALINTERVAL) {
 505                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 506                         if (common->ani.caldone)
 507                                 common->ani.resetcal_timer = timestamp;
 508                 }
 509         }
 510
 511         /* Verify whether we must check ANI */
 512         if ((timestamp - common->ani.checkani_timer) >=
 513              ah->config.ani_poll_interval) {
 514                 aniflag = true;
 515                 common->ani.checkani_timer = timestamp;
 516         }
 517
 518         /* Call ANI routine if necessary */
 519         if (aniflag) {
 520                 spin_lock_irqsave(&common->cc_lock, flags);
 521                 ath9k_hw_ani_monitor(ah, ah->curchan);
 522                 ath_update_survey_stats(sc);
 523                 spin_unlock_irqrestore(&common->cc_lock, flags);
 524         }
 525
 526         /* Perform calibration if necessary */
 527         if (longcal || shortcal) {
 528                 common->ani.caldone =
 529                         ath9k_hw_calibrate(ah, ah->curchan,
 530                                                 common->rx_chainmask, longcal);
 531         }
 532
 533         ath9k_ps_restore(sc);
 534
 535 set_timer:
 536         /*
 537         * Set timer interval based on previous results.
 538         * The interval must be the shortest necessary to satisfy ANI,
 539         * short calibration and long calibration.
 540         */
 541         cal_interval = ATH_LONG_CALINTERVAL;
 542         if (sc->sc_ah->config.enable_ani)
 543                 cal_interval = min(cal_interval,
 544                                    (u32)ah->config.ani_poll_interval);
 545         if (!common->ani.caldone)
 546                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 547
 548         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 549         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 550                 if (!ah->caldata->paprd_done)
 551                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 552                 else if (!ah->paprd_table_write_done)
 553                         ath_paprd_activate(sc);
 554         }
 555 }
 556
 557 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 558 {
 559         struct ath_node *an;
 560         struct ath_hw *ah = sc->sc_ah;
 561         an = (struct ath_node *)sta->drv_priv;
 562
 563 #ifdef CONFIG_ATH9K_DEBUGFS
 564         spin_lock(&sc->nodes_lock);
 565         list_add(&an->list, &sc->nodes);
 566         spin_unlock(&sc->nodes_lock);
 567         an->sta = sta;
 568 #endif
 569         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 570                 sc->sc_flags |= SC_OP_ENABLE_APM;
 571
 572         if (sc->sc_flags & SC_OP_TXAGGR) {
 573                 ath_tx_node_init(sc, an);
 574                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 575                                      sta->ht_cap.ampdu_factor);
 576                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 577         }
 578 }
 579
 580 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 581 {
 582         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 583
 584 #ifdef CONFIG_ATH9K_DEBUGFS
 585         spin_lock(&sc->nodes_lock);
 586         list_del(&an->list);
 587         spin_unlock(&sc->nodes_lock);
 588         an->sta = NULL;
 589 #endif
 590
 591         if (sc->sc_flags & SC_OP_TXAGGR)
 592                 ath_tx_node_cleanup(sc, an);
 593 }
 594
 595 void ath_hw_check(struct work_struct *work)
 596 {
 597         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 598         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 599         unsigned long flags;
 600         int busy;
 601
 602         ath9k_ps_wakeup(sc);
 603         if (ath9k_hw_check_alive(sc->sc_ah))
 604                 goto out;
 605
 606         spin_lock_irqsave(&common->cc_lock, flags);
 607         busy = ath_update_survey_stats(sc);
 608         spin_unlock_irqrestore(&common->cc_lock, flags);
 609
 610         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 611                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 612         if (busy >= 99) {
 613                 if (++sc->hw_busy_count >= 3)
 614                         ath_reset(sc, true);
 615         } else if (busy >= 0)
 616                 sc->hw_busy_count = 0;
 617
 618 out:
 619         ath9k_ps_restore(sc);
 620 }
 621
 622 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
 623 {
 624         static int count;
 625         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 626
 627         if (pll_sqsum >= 0x40000) {
 628                 count++;
 629                 if (count == 3) {
 630                         /* Rx is hung for more than 500ms. Reset it */
 631                         ath_dbg(common, ATH_DBG_RESET,
 632                                 "Possible RX hang, resetting");
 633                         ath_reset(sc, true);
 634                         count = 0;
 635                 }
 636         } else
 637                 count = 0;
 638 }
 639
 640 void ath_hw_pll_work(struct work_struct *work)
 641 {
 642         struct ath_softc *sc = container_of(work, struct ath_softc,
 643                                             hw_pll_work.work);
 644         u32 pll_sqsum;
 645
 646         if (AR_SREV_9485(sc->sc_ah)) {
 647
 648                 ath9k_ps_wakeup(sc);
 649                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
 650                 ath9k_ps_restore(sc);
 651
 652                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
 653
 654                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
 655         }
 656 }
 657
 658
 659 void ath9k_tasklet(unsigned long data)
 660 {
 661         struct ath_softc *sc = (struct ath_softc *)data;
 662         struct ath_hw *ah = sc->sc_ah;
 663         struct ath_common *common = ath9k_hw_common(ah);
 664
 665         u32 status = sc->intrstatus;
 666         u32 rxmask;
 667
 668         if ((status & ATH9K_INT_FATAL) ||
 669             (status & ATH9K_INT_BB_WATCHDOG)) {
 670                 ath_reset(sc, true);
 671                 return;
 672         }
 673
 674         ath9k_ps_wakeup(sc);
 675         spin_lock(&sc->sc_pcu_lock);
 676
 677         /*
 678          * Only run the baseband hang check if beacons stop working in AP or
 679          * IBSS mode, because it has a high false positive rate. For station
 680          * mode it should not be necessary, since the upper layers will detect
 681          * this through a beacon miss automatically and the following channel
 682          * change will trigger a hardware reset anyway
 683          */
 684         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 685             !ath9k_hw_check_alive(ah))
 686                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 687
 688         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 689                 /*
 690                  * TSF sync does not look correct; remain awake to sync with
 691                  * the next Beacon.
 692                  */
 693                 ath_dbg(common, ATH_DBG_PS,
 694                         "TSFOOR - Sync with next Beacon\n");
 695                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC |
 696                                 PS_TSFOOR_SYNC;
 697         }
 698
 699         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 700                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 701                           ATH9K_INT_RXORN);
 702         else
 703                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 704
 705         if (status & rxmask) {
 706                 /* Check for high priority Rx first */
 707                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 708                     (status & ATH9K_INT_RXHP))
 709                         ath_rx_tasklet(sc, 0, true);
 710
 711                 ath_rx_tasklet(sc, 0, false);
 712         }
 713
 714         if (status & ATH9K_INT_TX) {
 715                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 716                         ath_tx_edma_tasklet(sc);
 717                 else
 718                         ath_tx_tasklet(sc);
 719         }
 720
 721         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 722                 if (status & ATH9K_INT_GENTIMER)
 723                         ath_gen_timer_isr(sc->sc_ah);
 724
 725         /* re-enable hardware interrupt */
 726         ath9k_hw_enable_interrupts(ah);
 727
 728         spin_unlock(&sc->sc_pcu_lock);
 729         ath9k_ps_restore(sc);
 730 }
 731
 732 irqreturn_t ath_isr(int irq, void *dev)
 733 {
 734 #define SCHED_INTR (                            \
 735                 ATH9K_INT_FATAL |               \
 736                 ATH9K_INT_BB_WATCHDOG |         \
 737                 ATH9K_INT_RXORN |               \
 738                 ATH9K_INT_RXEOL |               \
 739                 ATH9K_INT_RX |                  \
 740                 ATH9K_INT_RXLP |                \
 741                 ATH9K_INT_RXHP |                \
 742                 ATH9K_INT_TX |                  \
 743                 ATH9K_INT_BMISS |               \
 744                 ATH9K_INT_CST |                 \
 745                 ATH9K_INT_TSFOOR |              \
 746                 ATH9K_INT_GENTIMER)
 747
 748         struct ath_softc *sc = dev;
 749         struct ath_hw *ah = sc->sc_ah;
 750         struct ath_common *common = ath9k_hw_common(ah);
 751         enum ath9k_int status;
 752         bool sched = false;
 753
 754         /*
 755          * The hardware is not ready/present, don't
 756          * touch anything. Note this can happen early
 757          * on if the IRQ is shared.
 758          */
 759         if (sc->sc_flags & SC_OP_INVALID)
 760                 return IRQ_NONE;
 761
 762
 763         /* shared irq, not for us */
 764
 765         if (!ath9k_hw_intrpend(ah))
 766                 return IRQ_NONE;
 767
 768         /*
 769          * Figure out the reason(s) for the interrupt.  Note
 770          * that the hal returns a pseudo-ISR that may include
 771          * bits we haven't explicitly enabled so we mask the
 772          * value to insure we only process bits we requested.
 773          */
 774         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 775         status &= ah->imask;    /* discard unasked-for bits */
 776
 777         /*
 778          * If there are no status bits set, then this interrupt was not
 779          * for me (should have been caught above).
 780          */
 781         if (!status)
 782                 return IRQ_NONE;
 783
 784         /* Cache the status */
 785         sc->intrstatus = status;
 786
 787         if (status & SCHED_INTR)
 788                 sched = true;
 789
 790         /*
 791          * If a FATAL or RXORN interrupt is received, we have to reset the
 792          * chip immediately.
 793          */
 794         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 795             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 796                 goto chip_reset;
 797
 798         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 799             (status & ATH9K_INT_BB_WATCHDOG)) {
 800
 801                 spin_lock(&common->cc_lock);
 802                 ath_hw_cycle_counters_update(common);
 803                 ar9003_hw_bb_watchdog_dbg_info(ah);
 804                 spin_unlock(&common->cc_lock);
 805
 806                 goto chip_reset;
 807         }
 808
 809         if (status & ATH9K_INT_SWBA)
 810                 tasklet_schedule(&sc->bcon_tasklet);
 811
 812         if (status & ATH9K_INT_TXURN)
 813                 ath9k_hw_updatetxtriglevel(ah, true);
 814
 815         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 816                 if (status & ATH9K_INT_RXEOL) {
 817                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 818                         ath9k_hw_set_interrupts(ah, ah->imask);
 819                 }
 820         }
 821
 822         if (status & ATH9K_INT_MIB) {
 823                 /*
 824                  * Disable interrupts until we service the MIB
 825                  * interrupt; otherwise it will continue to
 826                  * fire.
 827                  */
 828                 ath9k_hw_disable_interrupts(ah);
 829                 /*
 830                  * Let the hal handle the event. We assume
 831                  * it will clear whatever condition caused
 832                  * the interrupt.
 833                  */
 834                 spin_lock(&common->cc_lock);
 835                 ath9k_hw_proc_mib_event(ah);
 836                 spin_unlock(&common->cc_lock);
 837                 ath9k_hw_enable_interrupts(ah);
 838         }
 839
 840         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 841                 if (status & ATH9K_INT_TIM_TIMER) {
 842                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 843                                 goto chip_reset;
 844                         /* Clear RxAbort bit so that we can
 845                          * receive frames */
 846                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 847                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 848                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 849                 }
 850
 851 chip_reset:
 852
 853         ath_debug_stat_interrupt(sc, status);
 854
 855         if (sched) {
 856                 /* turn off every interrupt */
 857                 ath9k_hw_disable_interrupts(ah);
 858                 tasklet_schedule(&sc->intr_tq);
 859         }
 860
 861         return IRQ_HANDLED;
 862
 863 #undef SCHED_INTR
 864 }
 865
 866 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 867 {
 868         struct ath_hw *ah = sc->sc_ah;
 869         struct ath_common *common = ath9k_hw_common(ah);
 870         struct ieee80211_channel *channel = hw->conf.channel;
 871         int r;
 872
 873         ath9k_ps_wakeup(sc);
 874         spin_lock_bh(&sc->sc_pcu_lock);
 875
 876         ath9k_hw_configpcipowersave(ah, 0, 0);
 877
 878         if (!ah->curchan)
 879                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 880
 881         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 882         if (r) {
 883                 ath_err(common,
 884                         "Unable to reset channel (%u MHz), reset status %d\n",
 885                         channel->center_freq, r);
 886         }
 887
 888         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 889                                sc->config.txpowlimit, &sc->curtxpow);
 890         if (ath_startrecv(sc) != 0) {
 891                 ath_err(common, "Unable to restart recv logic\n");
 892                 goto out;
 893         }
 894         if (sc->sc_flags & SC_OP_BEACONS)
 895                 ath_set_beacon(sc);     /* restart beacons */
 896
 897         /* Re-Enable  interrupts */
 898         ath9k_hw_set_interrupts(ah, ah->imask);
 899
 900         /* Enable LED */
 901         ath9k_hw_cfg_output(ah, ah->led_pin,
 902                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 903         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 904
 905         ieee80211_wake_queues(hw);
 906         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 907
 908 out:
 909         spin_unlock_bh(&sc->sc_pcu_lock);
 910
 911         ath9k_ps_restore(sc);
 912 }
 913
 914 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 915 {
 916         struct ath_hw *ah = sc->sc_ah;
 917         struct ieee80211_channel *channel = hw->conf.channel;
 918         int r;
 919
 920         ath9k_ps_wakeup(sc);
 921         cancel_delayed_work_sync(&sc->hw_pll_work);
 922
 923         spin_lock_bh(&sc->sc_pcu_lock);
 924
 925         ieee80211_stop_queues(hw);
 926
 927         /*
 928          * Keep the LED on when the radio is disabled
 929          * during idle unassociated state.
 930          */
 931         if (!sc->ps_idle) {
 932                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 933                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 934         }
 935
 936         /* Disable interrupts */
 937         ath9k_hw_disable_interrupts(ah);
 938
 939         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 940
 941         ath_stoprecv(sc);               /* turn off frame recv */
 942         ath_flushrecv(sc);              /* flush recv queue */
 943
 944         if (!ah->curchan)
 945                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 946
 947         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 948         if (r) {
 949                 ath_err(ath9k_hw_common(sc->sc_ah),
 950                         "Unable to reset channel (%u MHz), reset status %d\n",
 951                         channel->center_freq, r);
 952         }
 953
 954         ath9k_hw_phy_disable(ah);
 955
 956         ath9k_hw_configpcipowersave(ah, 1, 1);
 957
 958         spin_unlock_bh(&sc->sc_pcu_lock);
 959         ath9k_ps_restore(sc);
 960 }
 961
 962 int ath_reset(struct ath_softc *sc, bool retry_tx)
 963 {
 964         struct ath_hw *ah = sc->sc_ah;
 965         struct ath_common *common = ath9k_hw_common(ah);
 966         struct ieee80211_hw *hw = sc->hw;
 967         int r;
 968
 969         sc->hw_busy_count = 0;
 970
 971         /* Stop ANI */
 972
 973         del_timer_sync(&common->ani.timer);
 974
 975         ath9k_ps_wakeup(sc);
 976         spin_lock_bh(&sc->sc_pcu_lock);
 977
 978         ieee80211_stop_queues(hw);
 979
 980         ath9k_hw_disable_interrupts(ah);
 981         ath_drain_all_txq(sc, retry_tx);
 982
 983         ath_stoprecv(sc);
 984         ath_flushrecv(sc);
 985
 986         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 987         if (r)
 988                 ath_err(common,
 989                         "Unable to reset hardware; reset status %d\n", r);
 990
 991         if (ath_startrecv(sc) != 0)
 992                 ath_err(common, "Unable to start recv logic\n");
 993
 994         /*
 995          * We may be doing a reset in response to a request
 996          * that changes the channel so update any state that
 997          * might change as a result.
 998          */
 999         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1000                                sc->config.txpowlimit, &sc->curtxpow);
1001
1002         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1003                 ath_set_beacon(sc);     /* restart beacons */
1004
1005         ath9k_hw_set_interrupts(ah, ah->imask);
1006
1007         if (retry_tx) {
1008                 int i;
1009                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1010                         if (ATH_TXQ_SETUP(sc, i)) {
1011                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1012                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1013                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1014                         }
1015                 }
1016         }
1017
1018         ieee80211_wake_queues(hw);
1019         spin_unlock_bh(&sc->sc_pcu_lock);
1020
1021         /* Start ANI */
1022         if (!common->disable_ani)
1023                 ath_start_ani(common);
1024
1025         ath9k_ps_restore(sc);
1026
1027         return r;
1028 }
1029
1030 /**********************/
1031 /* mac80211 callbacks */
1032 /**********************/
1033
1034 static int ath9k_start(struct ieee80211_hw *hw)
1035 {
1036         struct ath_softc *sc = hw->priv;
1037         struct ath_hw *ah = sc->sc_ah;
1038         struct ath_common *common = ath9k_hw_common(ah);
1039         struct ieee80211_channel *curchan = hw->conf.channel;
1040         struct ath9k_channel *init_channel;
1041         int r;
1042
1043         ath_dbg(common, ATH_DBG_CONFIG,
1044                 "Starting driver with initial channel: %d MHz\n",
1045                 curchan->center_freq);
1046
1047         ath9k_ps_wakeup(sc);
1048
1049         mutex_lock(&sc->mutex);
1050
1051         /* setup initial channel */
1052         sc->chan_idx = curchan->hw_value;
1053
1054         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1055
1056         /* Reset SERDES registers */
1057         ath9k_hw_configpcipowersave(ah, 0, 0);
1058
1059         /*
1060          * The basic interface to setting the hardware in a good
1061          * state is ``reset''.  On return the hardware is known to
1062          * be powered up and with interrupts disabled.  This must
1063          * be followed by initialization of the appropriate bits
1064          * and then setup of the interrupt mask.
1065          */
1066         spin_lock_bh(&sc->sc_pcu_lock);
1067         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1068         if (r) {
1069                 ath_err(common,
1070                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1071                         r, curchan->center_freq);
1072                 spin_unlock_bh(&sc->sc_pcu_lock);
1073                 goto mutex_unlock;
1074         }
1075
1076         /*
1077          * This is needed only to setup initial state
1078          * but it's best done after a reset.
1079          */
1080         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1081                         sc->config.txpowlimit, &sc->curtxpow);
1082
1083         /*
1084          * Setup the hardware after reset:
1085          * The receive engine is set going.
1086          * Frame transmit is handled entirely
1087          * in the frame output path; there's nothing to do
1088          * here except setup the interrupt mask.
1089          */
1090         if (ath_startrecv(sc) != 0) {
1091                 ath_err(common, "Unable to start recv logic\n");
1092                 r = -EIO;
1093                 spin_unlock_bh(&sc->sc_pcu_lock);
1094                 goto mutex_unlock;
1095         }
1096         spin_unlock_bh(&sc->sc_pcu_lock);
1097
1098         /* Setup our intr mask. */
1099         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1100                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1101                     ATH9K_INT_GLOBAL;
1102
1103         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1104                 ah->imask |= ATH9K_INT_RXHP |
1105                              ATH9K_INT_RXLP |
1106                              ATH9K_INT_BB_WATCHDOG;
1107         else
1108                 ah->imask |= ATH9K_INT_RX;
1109
1110         ah->imask |= ATH9K_INT_GTT;
1111
1112         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1113                 ah->imask |= ATH9K_INT_CST;
1114
1115         sc->sc_flags &= ~SC_OP_INVALID;
1116         sc->sc_ah->is_monitoring = false;
1117
1118         /* Disable BMISS interrupt when we're not associated */
1119         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1120         ath9k_hw_set_interrupts(ah, ah->imask);
1121
1122         ieee80211_wake_queues(hw);
1123
1124         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1125
1126         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1127             !ah->btcoex_hw.enabled) {
1128                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1129                                            AR_STOMP_LOW_WLAN_WGHT);
1130                 ath9k_hw_btcoex_enable(ah);
1131
1132                 if (common->bus_ops->bt_coex_prep)
1133                         common->bus_ops->bt_coex_prep(common);
1134                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1135                         ath9k_btcoex_timer_resume(sc);
1136         }
1137
1138         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1139                 common->bus_ops->extn_synch_en(common);
1140
1141 mutex_unlock:
1142         mutex_unlock(&sc->mutex);
1143
1144         ath9k_ps_restore(sc);
1145
1146         return r;
1147 }
1148
1149 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1150 {
1151         struct ath_softc *sc = hw->priv;
1152         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1153         struct ath_tx_control txctl;
1154         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1155
1156         if (sc->ps_enabled) {
1157                 /*
1158                  * mac80211 does not set PM field for normal data frames, so we
1159                  * need to update that based on the current PS mode.
1160                  */
1161                 if (ieee80211_is_data(hdr->frame_control) &&
1162                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1163                     !ieee80211_has_pm(hdr->frame_control)) {
1164                         ath_dbg(common, ATH_DBG_PS,
1165                                 "Add PM=1 for a TX frame while in PS mode\n");
1166                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1167                 }
1168         }
1169
1170         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1171                 /*
1172                  * We are using PS-Poll and mac80211 can request TX while in
1173                  * power save mode. Need to wake up hardware for the TX to be
1174                  * completed and if needed, also for RX of buffered frames.
1175                  */
1176                 ath9k_ps_wakeup(sc);
1177                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1178                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1179                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1180                         ath_dbg(common, ATH_DBG_PS,
1181                                 "Sending PS-Poll to pick a buffered frame\n");
1182                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1183                 } else {
1184                         ath_dbg(common, ATH_DBG_PS,
1185                                 "Wake up to complete TX\n");
1186                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1187                 }
1188                 /*
1189                  * The actual restore operation will happen only after
1190                  * the sc_flags bit is cleared. We are just dropping
1191                  * the ps_usecount here.
1192                  */
1193                 ath9k_ps_restore(sc);
1194         }
1195
1196         memset(&txctl, 0, sizeof(struct ath_tx_control));
1197         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1198
1199         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1200
1201         if (ath_tx_start(hw, skb, &txctl) != 0) {
1202                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1203                 goto exit;
1204         }
1205
1206         return;
1207 exit:
1208         dev_kfree_skb_any(skb);
1209 }
1210
1211 static void ath9k_stop(struct ieee80211_hw *hw)
1212 {
1213         struct ath_softc *sc = hw->priv;
1214         struct ath_hw *ah = sc->sc_ah;
1215         struct ath_common *common = ath9k_hw_common(ah);
1216
1217         mutex_lock(&sc->mutex);
1218
1219         cancel_delayed_work_sync(&sc->tx_complete_work);
1220         cancel_delayed_work_sync(&sc->hw_pll_work);
1221         cancel_work_sync(&sc->paprd_work);
1222         cancel_work_sync(&sc->hw_check_work);
1223
1224         if (sc->sc_flags & SC_OP_INVALID) {
1225                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1226                 mutex_unlock(&sc->mutex);
1227                 return;
1228         }
1229
1230         /* Ensure HW is awake when we try to shut it down. */
1231         ath9k_ps_wakeup(sc);
1232
1233         if (ah->btcoex_hw.enabled) {
1234                 ath9k_hw_btcoex_disable(ah);
1235                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1236                         ath9k_btcoex_timer_pause(sc);
1237         }
1238
1239         spin_lock_bh(&sc->sc_pcu_lock);
1240
1241         /* prevent tasklets to enable interrupts once we disable them */
1242         ah->imask &= ~ATH9K_INT_GLOBAL;
1243
1244         /* make sure h/w will not generate any interrupt
1245          * before setting the invalid flag. */
1246         ath9k_hw_disable_interrupts(ah);
1247
1248         if (!(sc->sc_flags & SC_OP_INVALID)) {
1249                 ath_drain_all_txq(sc, false);
1250                 ath_stoprecv(sc);
1251                 ath9k_hw_phy_disable(ah);
1252         } else
1253                 sc->rx.rxlink = NULL;
1254
1255         if (sc->rx.frag) {
1256                 dev_kfree_skb_any(sc->rx.frag);
1257                 sc->rx.frag = NULL;
1258         }
1259
1260         /* disable HAL and put h/w to sleep */
1261         ath9k_hw_disable(ah);
1262         ath9k_hw_configpcipowersave(ah, 1, 1);
1263
1264         spin_unlock_bh(&sc->sc_pcu_lock);
1265
1266         /* we can now sync irq and kill any running tasklets, since we already
1267          * disabled interrupts and not holding a spin lock */
1268         synchronize_irq(sc->irq);
1269         tasklet_kill(&sc->intr_tq);
1270         tasklet_kill(&sc->bcon_tasklet);
1271
1272         ath9k_ps_restore(sc);
1273
1274         sc->ps_idle = true;
1275         ath_radio_disable(sc, hw);
1276
1277         sc->sc_flags |= SC_OP_INVALID;
1278
1279         mutex_unlock(&sc->mutex);
1280
1281         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1282 }
1283
1284 bool ath9k_uses_beacons(int type)
1285 {
1286         switch (type) {
1287         case NL80211_IFTYPE_AP:
1288         case NL80211_IFTYPE_ADHOC:
1289         case NL80211_IFTYPE_MESH_POINT:
1290                 return true;
1291         default:
1292                 return false;
1293         }
1294 }
1295
1296 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1297                                  struct ieee80211_vif *vif)
1298 {
1299         struct ath_vif *avp = (void *)vif->drv_priv;
1300
1301         ath9k_set_beaconing_status(sc, false);
1302         ath_beacon_return(sc, avp);
1303         ath9k_set_beaconing_status(sc, true);
1304         sc->sc_flags &= ~SC_OP_BEACONS;
1305 }
1306
1307 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1308 {
1309         struct ath9k_vif_iter_data *iter_data = data;
1310         int i;
1311
1312         if (iter_data->hw_macaddr)
1313                 for (i = 0; i < ETH_ALEN; i++)
1314                         iter_data->mask[i] &=
1315                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1316
1317         switch (vif->type) {
1318         case NL80211_IFTYPE_AP:
1319                 iter_data->naps++;
1320                 break;
1321         case NL80211_IFTYPE_STATION:
1322                 iter_data->nstations++;
1323                 break;
1324         case NL80211_IFTYPE_ADHOC:
1325                 iter_data->nadhocs++;
1326                 break;
1327         case NL80211_IFTYPE_MESH_POINT:
1328                 iter_data->nmeshes++;
1329                 break;
1330         case NL80211_IFTYPE_WDS:
1331                 iter_data->nwds++;
1332                 break;
1333         default:
1334                 iter_data->nothers++;
1335                 break;
1336         }
1337 }
1338
1339 /* Called with sc->mutex held. */
1340 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1341                                struct ieee80211_vif *vif,
1342                                struct ath9k_vif_iter_data *iter_data)
1343 {
1344         struct ath_softc *sc = hw->priv;
1345         struct ath_hw *ah = sc->sc_ah;
1346         struct ath_common *common = ath9k_hw_common(ah);
1347
1348         /*
1349          * Use the hardware MAC address as reference, the hardware uses it
1350          * together with the BSSID mask when matching addresses.
1351          */
1352         memset(iter_data, 0, sizeof(*iter_data));
1353         iter_data->hw_macaddr = common->macaddr;
1354         memset(&iter_data->mask, 0xff, ETH_ALEN);
1355
1356         if (vif)
1357                 ath9k_vif_iter(iter_data, vif->addr, vif);
1358
1359         /* Get list of all active MAC addresses */
1360         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1361                                                    iter_data);
1362 }
1363
1364 /* Called with sc->mutex held. */
1365 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1366                                           struct ieee80211_vif *vif)
1367 {
1368         struct ath_softc *sc = hw->priv;
1369         struct ath_hw *ah = sc->sc_ah;
1370         struct ath_common *common = ath9k_hw_common(ah);
1371         struct ath9k_vif_iter_data iter_data;
1372
1373         ath9k_calculate_iter_data(hw, vif, &iter_data);
1374
1375         /* Set BSSID mask. */
1376         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1377         ath_hw_setbssidmask(common);
1378
1379         /* Set op-mode & TSF */
1380         if (iter_data.naps > 0) {
1381                 ath9k_hw_set_tsfadjust(ah, 1);
1382                 sc->sc_flags |= SC_OP_TSF_RESET;
1383                 ah->opmode = NL80211_IFTYPE_AP;
1384         } else {
1385                 ath9k_hw_set_tsfadjust(ah, 0);
1386                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1387
1388                 if (iter_data.nmeshes)
1389                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1390                 else if (iter_data.nwds)
1391                         ah->opmode = NL80211_IFTYPE_AP;
1392                 else if (iter_data.nadhocs)
1393                         ah->opmode = NL80211_IFTYPE_ADHOC;
1394                 else
1395                         ah->opmode = NL80211_IFTYPE_STATION;
1396         }
1397
1398         /*
1399          * Enable MIB interrupts when there are hardware phy counters.
1400          */
1401         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1402                 if (ah->config.enable_ani)
1403                         ah->imask |= ATH9K_INT_MIB;
1404                 ah->imask |= ATH9K_INT_TSFOOR;
1405         } else {
1406                 ah->imask &= ~ATH9K_INT_MIB;
1407                 ah->imask &= ~ATH9K_INT_TSFOOR;
1408         }
1409
1410         ath9k_hw_set_interrupts(ah, ah->imask);
1411
1412         /* Set up ANI */
1413         if (iter_data.naps > 0) {
1414                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1415
1416                 if (!common->disable_ani) {
1417                         sc->sc_flags |= SC_OP_ANI_RUN;
1418                         ath_start_ani(common);
1419                 }
1420
1421         } else {
1422                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1423                 del_timer_sync(&common->ani.timer);
1424         }
1425 }
1426
1427 /* Called with sc->mutex held, vif counts set up properly. */
1428 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1429                                    struct ieee80211_vif *vif)
1430 {
1431         struct ath_softc *sc = hw->priv;
1432
1433         ath9k_calculate_summary_state(hw, vif);
1434
1435         if (ath9k_uses_beacons(vif->type)) {
1436                 int error;
1437                 /* This may fail because upper levels do not have beacons
1438                  * properly configured yet.  That's OK, we assume it
1439                  * will be properly configured and then we will be notified
1440                  * in the info_changed method and set up beacons properly
1441                  * there.
1442                  */
1443                 ath9k_set_beaconing_status(sc, false);
1444                 error = ath_beacon_alloc(sc, vif);
1445                 if (!error)
1446                         ath_beacon_config(sc, vif);
1447                 ath9k_set_beaconing_status(sc, true);
1448         }
1449 }
1450
1451
1452 static int ath9k_add_interface(struct ieee80211_hw *hw,
1453                                struct ieee80211_vif *vif)
1454 {
1455         struct ath_softc *sc = hw->priv;
1456         struct ath_hw *ah = sc->sc_ah;
1457         struct ath_common *common = ath9k_hw_common(ah);
1458         int ret = 0;
1459
1460         ath9k_ps_wakeup(sc);
1461         mutex_lock(&sc->mutex);
1462
1463         switch (vif->type) {
1464         case NL80211_IFTYPE_STATION:
1465         case NL80211_IFTYPE_WDS:
1466         case NL80211_IFTYPE_ADHOC:
1467         case NL80211_IFTYPE_AP:
1468         case NL80211_IFTYPE_MESH_POINT:
1469                 break;
1470         default:
1471                 ath_err(common, "Interface type %d not yet supported\n",
1472                         vif->type);
1473                 ret = -EOPNOTSUPP;
1474                 goto out;
1475         }
1476
1477         if (ath9k_uses_beacons(vif->type)) {
1478                 if (sc->nbcnvifs >= ATH_BCBUF) {
1479                         ath_err(common, "Not enough beacon buffers when adding"
1480                                 " new interface of type: %i\n",
1481                                 vif->type);
1482                         ret = -ENOBUFS;
1483                         goto out;
1484                 }
1485         }
1486
1487         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1488             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1489              sc->nvifs > 0)) {
1490                 ath_err(common, "Cannot create ADHOC interface when other"
1491                         " interfaces already exist.\n");
1492                 ret = -EINVAL;
1493                 goto out;
1494         }
1495
1496         ath_dbg(common, ATH_DBG_CONFIG,
1497                 "Attach a VIF of type: %d\n", vif->type);
1498
1499         sc->nvifs++;
1500
1501         ath9k_do_vif_add_setup(hw, vif);
1502 out:
1503         mutex_unlock(&sc->mutex);
1504         ath9k_ps_restore(sc);
1505         return ret;
1506 }
1507
1508 static int ath9k_change_interface(struct ieee80211_hw *hw,
1509                                   struct ieee80211_vif *vif,
1510                                   enum nl80211_iftype new_type,
1511                                   bool p2p)
1512 {
1513         struct ath_softc *sc = hw->priv;
1514         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1515         int ret = 0;
1516
1517         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1518         mutex_lock(&sc->mutex);
1519         ath9k_ps_wakeup(sc);
1520
1521         /* See if new interface type is valid. */
1522         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1523             (sc->nvifs > 1)) {
1524                 ath_err(common, "When using ADHOC, it must be the only"
1525                         " interface.\n");
1526                 ret = -EINVAL;
1527                 goto out;
1528         }
1529
1530         if (ath9k_uses_beacons(new_type) &&
1531             !ath9k_uses_beacons(vif->type)) {
1532                 if (sc->nbcnvifs >= ATH_BCBUF) {
1533                         ath_err(common, "No beacon slot available\n");
1534                         ret = -ENOBUFS;
1535                         goto out;
1536                 }
1537         }
1538
1539         /* Clean up old vif stuff */
1540         if (ath9k_uses_beacons(vif->type))
1541                 ath9k_reclaim_beacon(sc, vif);
1542
1543         /* Add new settings */
1544         vif->type = new_type;
1545         vif->p2p = p2p;
1546
1547         ath9k_do_vif_add_setup(hw, vif);
1548 out:
1549         ath9k_ps_restore(sc);
1550         mutex_unlock(&sc->mutex);
1551         return ret;
1552 }
1553
1554 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1555                                    struct ieee80211_vif *vif)
1556 {
1557         struct ath_softc *sc = hw->priv;
1558         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1559
1560         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1561
1562         ath9k_ps_wakeup(sc);
1563         mutex_lock(&sc->mutex);
1564
1565         sc->nvifs--;
1566
1567         /* Reclaim beacon resources */
1568         if (ath9k_uses_beacons(vif->type))
1569                 ath9k_reclaim_beacon(sc, vif);
1570
1571         ath9k_calculate_summary_state(hw, NULL);
1572
1573         mutex_unlock(&sc->mutex);
1574         ath9k_ps_restore(sc);
1575 }
1576
1577 static void ath9k_enable_ps(struct ath_softc *sc)
1578 {
1579         struct ath_hw *ah = sc->sc_ah;
1580
1581         sc->ps_enabled = true;
1582         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1583                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1584                         ah->imask |= ATH9K_INT_TIM_TIMER;
1585                         ath9k_hw_set_interrupts(ah, ah->imask);
1586                 }
1587                 ath9k_hw_setrxabort(ah, 1);
1588         }
1589 }
1590
1591 static void ath9k_disable_ps(struct ath_softc *sc)
1592 {
1593         struct ath_hw *ah = sc->sc_ah;
1594
1595         sc->ps_enabled = false;
1596         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1597         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1598                 ath9k_hw_setrxabort(ah, 0);
1599                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1600                                   PS_WAIT_FOR_CAB |
1601                                   PS_WAIT_FOR_PSPOLL_DATA |
1602                                   PS_WAIT_FOR_TX_ACK);
1603                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1604                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1605                         ath9k_hw_set_interrupts(ah, ah->imask);
1606                 }
1607         }
1608
1609 }
1610
1611 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1612 {
1613         struct ath_softc *sc = hw->priv;
1614         struct ath_hw *ah = sc->sc_ah;
1615         struct ath_common *common = ath9k_hw_common(ah);
1616         struct ieee80211_conf *conf = &hw->conf;
1617         bool disable_radio = false;
1618
1619         mutex_lock(&sc->mutex);
1620
1621         /*
1622          * Leave this as the first check because we need to turn on the
1623          * radio if it was disabled before prior to processing the rest
1624          * of the changes. Likewise we must only disable the radio towards
1625          * the end.
1626          */
1627         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1628                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1629                 if (!sc->ps_idle) {
1630                         ath_radio_enable(sc, hw);
1631                         ath_dbg(common, ATH_DBG_CONFIG,
1632                                 "not-idle: enabling radio\n");
1633                 } else {
1634                         disable_radio = true;
1635                 }
1636         }
1637
1638         /*
1639          * We just prepare to enable PS. We have to wait until our AP has
1640          * ACK'd our null data frame to disable RX otherwise we'll ignore
1641          * those ACKs and end up retransmitting the same null data frames.
1642          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1643          */
1644         if (changed & IEEE80211_CONF_CHANGE_PS) {
1645                 unsigned long flags;
1646                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1647                 if (conf->flags & IEEE80211_CONF_PS)
1648                         ath9k_enable_ps(sc);
1649                 else
1650                         ath9k_disable_ps(sc);
1651                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1652         }
1653
1654         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1655                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1656                         ath_dbg(common, ATH_DBG_CONFIG,
1657                                 "Monitor mode is enabled\n");
1658                         sc->sc_ah->is_monitoring = true;
1659                 } else {
1660                         ath_dbg(common, ATH_DBG_CONFIG,
1661                                 "Monitor mode is disabled\n");
1662                         sc->sc_ah->is_monitoring = false;
1663                 }
1664         }
1665
1666         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1667                 struct ieee80211_channel *curchan = hw->conf.channel;
1668                 int pos = curchan->hw_value;
1669                 int old_pos = -1;
1670                 unsigned long flags;
1671
1672                 if (ah->curchan)
1673                         old_pos = ah->curchan - &ah->channels[0];
1674
1675                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1676                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1677                 else
1678                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1679
1680                 ath_dbg(common, ATH_DBG_CONFIG,
1681                         "Set channel: %d MHz type: %d\n",
1682                         curchan->center_freq, conf->channel_type);
1683
1684                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1685                                           curchan, conf->channel_type);
1686
1687                 /* update survey stats for the old channel before switching */
1688                 spin_lock_irqsave(&common->cc_lock, flags);
1689                 ath_update_survey_stats(sc);
1690                 spin_unlock_irqrestore(&common->cc_lock, flags);
1691
1692                 /*
1693                  * If the operating channel changes, change the survey in-use flags
1694                  * along with it.
1695                  * Reset the survey data for the new channel, unless we're switching
1696                  * back to the operating channel from an off-channel operation.
1697                  */
1698                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1699                     sc->cur_survey != &sc->survey[pos]) {
1700
1701                         if (sc->cur_survey)
1702                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1703
1704                         sc->cur_survey = &sc->survey[pos];
1705
1706                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1707                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1708                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1709                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1710                 }
1711
1712                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1713                         ath_err(common, "Unable to set channel\n");
1714                         mutex_unlock(&sc->mutex);
1715                         return -EINVAL;
1716                 }
1717
1718                 /*
1719                  * The most recent snapshot of channel->noisefloor for the old
1720                  * channel is only available after the hardware reset. Copy it to
1721                  * the survey stats now.
1722                  */
1723                 if (old_pos >= 0)
1724                         ath_update_survey_nf(sc, old_pos);
1725         }
1726
1727         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1728                 ath_dbg(common, ATH_DBG_CONFIG,
1729                         "Set power: %d\n", conf->power_level);
1730                 sc->config.txpowlimit = 2 * conf->power_level;
1731                 ath9k_ps_wakeup(sc);
1732                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1733                                        sc->config.txpowlimit, &sc->curtxpow);
1734                 ath9k_ps_restore(sc);
1735         }
1736
1737         if (disable_radio) {
1738                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1739                 ath_radio_disable(sc, hw);
1740         }
1741
1742         mutex_unlock(&sc->mutex);
1743
1744         return 0;
1745 }
1746
1747 #define SUPPORTED_FILTERS                       \
1748         (FIF_PROMISC_IN_BSS |                   \
1749         FIF_ALLMULTI |                          \
1750         FIF_CONTROL |                           \
1751         FIF_PSPOLL |                            \
1752         FIF_OTHER_BSS |                         \
1753         FIF_BCN_PRBRESP_PROMISC |               \
1754         FIF_PROBE_REQ |                         \
1755         FIF_FCSFAIL)
1756
1757 /* FIXME: sc->sc_full_reset ? */
1758 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1759                                    unsigned int changed_flags,
1760                                    unsigned int *total_flags,
1761                                    u64 multicast)
1762 {
1763         struct ath_softc *sc = hw->priv;
1764         u32 rfilt;
1765
1766         changed_flags &= SUPPORTED_FILTERS;
1767         *total_flags &= SUPPORTED_FILTERS;
1768
1769         sc->rx.rxfilter = *total_flags;
1770         ath9k_ps_wakeup(sc);
1771         rfilt = ath_calcrxfilter(sc);
1772         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1773         ath9k_ps_restore(sc);
1774
1775         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1776                 "Set HW RX filter: 0x%x\n", rfilt);
1777 }
1778
1779 static int ath9k_sta_add(struct ieee80211_hw *hw,
1780                          struct ieee80211_vif *vif,
1781                          struct ieee80211_sta *sta)
1782 {
1783         struct ath_softc *sc = hw->priv;
1784         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1785         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1786         struct ieee80211_key_conf ps_key = { };
1787
1788         ath_node_attach(sc, sta);
1789
1790         if (vif->type != NL80211_IFTYPE_AP &&
1791             vif->type != NL80211_IFTYPE_AP_VLAN)
1792                 return 0;
1793
1794         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1795
1796         return 0;
1797 }
1798
1799 static void ath9k_del_ps_key(struct ath_softc *sc,
1800                              struct ieee80211_vif *vif,
1801                              struct ieee80211_sta *sta)
1802 {
1803         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1804         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1805         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1806
1807         if (!an->ps_key)
1808             return;
1809
1810         ath_key_delete(common, &ps_key);
1811 }
1812
1813 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1814                             struct ieee80211_vif *vif,
1815                             struct ieee80211_sta *sta)
1816 {
1817         struct ath_softc *sc = hw->priv;
1818
1819         ath9k_del_ps_key(sc, vif, sta);
1820         ath_node_detach(sc, sta);
1821
1822         return 0;
1823 }
1824
1825 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1826                          struct ieee80211_vif *vif,
1827                          enum sta_notify_cmd cmd,
1828                          struct ieee80211_sta *sta)
1829 {
1830         struct ath_softc *sc = hw->priv;
1831         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1832
1833         switch (cmd) {
1834         case STA_NOTIFY_SLEEP:
1835                 an->sleeping = true;
1836                 if (ath_tx_aggr_sleep(sc, an))
1837                         ieee80211_sta_set_tim(sta);
1838                 break;
1839         case STA_NOTIFY_AWAKE:
1840                 an->sleeping = false;
1841                 ath_tx_aggr_wakeup(sc, an);
1842                 break;
1843         }
1844 }
1845
1846 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1847                          const struct ieee80211_tx_queue_params *params)
1848 {
1849         struct ath_softc *sc = hw->priv;
1850         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1851         struct ath_txq *txq;
1852         struct ath9k_tx_queue_info qi;
1853         int ret = 0;
1854
1855         if (queue >= WME_NUM_AC)
1856                 return 0;
1857
1858         txq = sc->tx.txq_map[queue];
1859
1860         ath9k_ps_wakeup(sc);
1861         mutex_lock(&sc->mutex);
1862
1863         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1864
1865         qi.tqi_aifs = params->aifs;
1866         qi.tqi_cwmin = params->cw_min;
1867         qi.tqi_cwmax = params->cw_max;
1868         qi.tqi_burstTime = params->txop;
1869
1870         ath_dbg(common, ATH_DBG_CONFIG,
1871                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1872                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1873                 params->cw_max, params->txop);
1874
1875         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1876         if (ret)
1877                 ath_err(common, "TXQ Update failed\n");
1878
1879         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1880                 if (queue == WME_AC_BE && !ret)
1881                         ath_beaconq_config(sc);
1882
1883         mutex_unlock(&sc->mutex);
1884         ath9k_ps_restore(sc);
1885
1886         return ret;
1887 }
1888
1889 static int ath9k_set_key(struct ieee80211_hw *hw,
1890                          enum set_key_cmd cmd,
1891                          struct ieee80211_vif *vif,
1892                          struct ieee80211_sta *sta,
1893                          struct ieee80211_key_conf *key)
1894 {
1895         struct ath_softc *sc = hw->priv;
1896         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1897         int ret = 0;
1898
1899         if (ath9k_modparam_nohwcrypt)
1900                 return -ENOSPC;
1901
1902         if (vif->type == NL80211_IFTYPE_ADHOC &&
1903             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1904              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1905             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1906                 /*
1907                  * For now, disable hw crypto for the RSN IBSS group keys. This
1908                  * could be optimized in the future to use a modified key cache
1909                  * design to support per-STA RX GTK, but until that gets
1910                  * implemented, use of software crypto for group addressed
1911                  * frames is a acceptable to allow RSN IBSS to be used.
1912                  */
1913                 return -EOPNOTSUPP;
1914         }
1915
1916         mutex_lock(&sc->mutex);
1917         ath9k_ps_wakeup(sc);
1918         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1919
1920         switch (cmd) {
1921         case SET_KEY:
1922                 if (sta)
1923                         ath9k_del_ps_key(sc, vif, sta);
1924
1925                 ret = ath_key_config(common, vif, sta, key);
1926                 if (ret >= 0) {
1927                         key->hw_key_idx = ret;
1928                         /* push IV and Michael MIC generation to stack */
1929                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1930                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1931                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1932                         if (sc->sc_ah->sw_mgmt_crypto &&
1933                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1934                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1935                         ret = 0;
1936                 }
1937                 break;
1938         case DISABLE_KEY:
1939                 ath_key_delete(common, key);
1940                 break;
1941         default:
1942                 ret = -EINVAL;
1943         }
1944
1945         ath9k_ps_restore(sc);
1946         mutex_unlock(&sc->mutex);
1947
1948         return ret;
1949 }
1950 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1951 {
1952         struct ath_softc *sc = data;
1953         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1954         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1955         struct ath_vif *avp = (void *)vif->drv_priv;
1956
1957         /*
1958          * Skip iteration if primary station vif's bss info
1959          * was not changed
1960          */
1961         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1962                 return;
1963
1964         if (bss_conf->assoc) {
1965                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1966                 avp->primary_sta_vif = true;
1967                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1968                 common->curaid = bss_conf->aid;
1969                 ath9k_hw_write_associd(sc->sc_ah);
1970                 ath_dbg(common, ATH_DBG_CONFIG,
1971                                 "Bss Info ASSOC %d, bssid: %pM\n",
1972                                 bss_conf->aid, common->curbssid);
1973                 ath_beacon_config(sc, vif);
1974                 /*
1975                  * Request a re-configuration of Beacon related timers
1976                  * on the receipt of the first Beacon frame (i.e.,
1977                  * after time sync with the AP).
1978                  */
1979                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1980                 /* Reset rssi stats */
1981                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1982                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1983
1984                 if (!common->disable_ani) {
1985                         sc->sc_flags |= SC_OP_ANI_RUN;
1986                         ath_start_ani(common);
1987                 }
1988
1989         }
1990 }
1991
1992 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1993 {
1994         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1995         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1996         struct ath_vif *avp = (void *)vif->drv_priv;
1997
1998         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1999                 return;
2000
2001         /* Reconfigure bss info */
2002         if (avp->primary_sta_vif && !bss_conf->assoc) {
2003                 ath_dbg(common, ATH_DBG_CONFIG,
2004                         "Bss Info DISASSOC %d, bssid %pM\n",
2005                         common->curaid, common->curbssid);
2006                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2007                 avp->primary_sta_vif = false;
2008                 memset(common->curbssid, 0, ETH_ALEN);
2009                 common->curaid = 0;
2010         }
2011
2012         ieee80211_iterate_active_interfaces_atomic(
2013                         sc->hw, ath9k_bss_iter, sc);
2014
2015         /*
2016          * None of station vifs are associated.
2017          * Clear bssid & aid
2018          */
2019         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2020                 ath9k_hw_write_associd(sc->sc_ah);
2021                 /* Stop ANI */
2022                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2023                 del_timer_sync(&common->ani.timer);
2024         }
2025 }
2026
2027 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2028                                    struct ieee80211_vif *vif,
2029                                    struct ieee80211_bss_conf *bss_conf,
2030                                    u32 changed)
2031 {
2032         struct ath_softc *sc = hw->priv;
2033         struct ath_hw *ah = sc->sc_ah;
2034         struct ath_common *common = ath9k_hw_common(ah);
2035         struct ath_vif *avp = (void *)vif->drv_priv;
2036         int slottime;
2037         int error;
2038
2039         ath9k_ps_wakeup(sc);
2040         mutex_lock(&sc->mutex);
2041
2042         if (changed & BSS_CHANGED_BSSID) {
2043                 ath9k_config_bss(sc, vif);
2044
2045                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2046                         common->curbssid, common->curaid);
2047         }
2048
2049         if (changed & BSS_CHANGED_IBSS) {
2050                 /* There can be only one vif available */
2051                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2052                 common->curaid = bss_conf->aid;
2053                 ath9k_hw_write_associd(sc->sc_ah);
2054
2055                 if (bss_conf->ibss_joined) {
2056                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2057
2058                         if (!common->disable_ani) {
2059                                 sc->sc_flags |= SC_OP_ANI_RUN;
2060                                 ath_start_ani(common);
2061                         }
2062
2063                 } else {
2064                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2065                         del_timer_sync(&common->ani.timer);
2066                 }
2067         }
2068
2069         /* Enable transmission of beacons (AP, IBSS, MESH) */
2070         if ((changed & BSS_CHANGED_BEACON) ||
2071             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2072                 ath9k_set_beaconing_status(sc, false);
2073                 error = ath_beacon_alloc(sc, vif);
2074                 if (!error)
2075                         ath_beacon_config(sc, vif);
2076                 ath9k_set_beaconing_status(sc, true);
2077         }
2078
2079         if (changed & BSS_CHANGED_ERP_SLOT) {
2080                 if (bss_conf->use_short_slot)
2081                         slottime = 9;
2082                 else
2083                         slottime = 20;
2084                 if (vif->type == NL80211_IFTYPE_AP) {
2085                         /*
2086                          * Defer update, so that connected stations can adjust
2087                          * their settings at the same time.
2088                          * See beacon.c for more details
2089                          */
2090                         sc->beacon.slottime = slottime;
2091                         sc->beacon.updateslot = UPDATE;
2092                 } else {
2093                         ah->slottime = slottime;
2094                         ath9k_hw_init_global_settings(ah);
2095                 }
2096         }
2097
2098         /* Disable transmission of beacons */
2099         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2100             !bss_conf->enable_beacon) {
2101                 ath9k_set_beaconing_status(sc, false);
2102                 avp->is_bslot_active = false;
2103                 ath9k_set_beaconing_status(sc, true);
2104         }
2105
2106         if (changed & BSS_CHANGED_BEACON_INT) {
2107                 /*
2108                  * In case of AP mode, the HW TSF has to be reset
2109                  * when the beacon interval changes.
2110                  */
2111                 if (vif->type == NL80211_IFTYPE_AP) {
2112                         sc->sc_flags |= SC_OP_TSF_RESET;
2113                         ath9k_set_beaconing_status(sc, false);
2114                         error = ath_beacon_alloc(sc, vif);
2115                         if (!error)
2116                                 ath_beacon_config(sc, vif);
2117                         ath9k_set_beaconing_status(sc, true);
2118                 } else
2119                         ath_beacon_config(sc, vif);
2120         }
2121
2122         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2123                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2124                         bss_conf->use_short_preamble);
2125                 if (bss_conf->use_short_preamble)
2126                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2127                 else
2128                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2129         }
2130
2131         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2132                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2133                         bss_conf->use_cts_prot);
2134                 if (bss_conf->use_cts_prot &&
2135                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2136                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2137                 else
2138                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2139         }
2140
2141         mutex_unlock(&sc->mutex);
2142         ath9k_ps_restore(sc);
2143 }
2144
2145 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2146 {
2147         struct ath_softc *sc = hw->priv;
2148         u64 tsf;
2149
2150         mutex_lock(&sc->mutex);
2151         ath9k_ps_wakeup(sc);
2152         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2153         ath9k_ps_restore(sc);
2154         mutex_unlock(&sc->mutex);
2155
2156         return tsf;
2157 }
2158
2159 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2160 {
2161         struct ath_softc *sc = hw->priv;
2162
2163         mutex_lock(&sc->mutex);
2164         ath9k_ps_wakeup(sc);
2165         ath9k_hw_settsf64(sc->sc_ah, tsf);
2166         ath9k_ps_restore(sc);
2167         mutex_unlock(&sc->mutex);
2168 }
2169
2170 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2171 {
2172         struct ath_softc *sc = hw->priv;
2173
2174         mutex_lock(&sc->mutex);
2175
2176         ath9k_ps_wakeup(sc);
2177         ath9k_hw_reset_tsf(sc->sc_ah);
2178         ath9k_ps_restore(sc);
2179
2180         mutex_unlock(&sc->mutex);
2181 }
2182
2183 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2184                               struct ieee80211_vif *vif,
2185                               enum ieee80211_ampdu_mlme_action action,
2186                               struct ieee80211_sta *sta,
2187                               u16 tid, u16 *ssn, u8 buf_size)
2188 {
2189         struct ath_softc *sc = hw->priv;
2190         int ret = 0;
2191
2192         local_bh_disable();
2193
2194         switch (action) {
2195         case IEEE80211_AMPDU_RX_START:
2196                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2197                         ret = -ENOTSUPP;
2198                 break;
2199         case IEEE80211_AMPDU_RX_STOP:
2200                 break;
2201         case IEEE80211_AMPDU_TX_START:
2202                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2203                         return -EOPNOTSUPP;
2204
2205                 ath9k_ps_wakeup(sc);
2206                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2207                 if (!ret)
2208                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2209                 ath9k_ps_restore(sc);
2210                 break;
2211         case IEEE80211_AMPDU_TX_STOP:
2212                 ath9k_ps_wakeup(sc);
2213                 ath_tx_aggr_stop(sc, sta, tid);
2214                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2215                 ath9k_ps_restore(sc);
2216                 break;
2217         case IEEE80211_AMPDU_TX_OPERATIONAL:
2218                 ath9k_ps_wakeup(sc);
2219                 ath_tx_aggr_resume(sc, sta, tid);
2220                 ath9k_ps_restore(sc);
2221                 break;
2222         default:
2223                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2224         }
2225
2226         local_bh_enable();
2227
2228         return ret;
2229 }
2230
2231 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2232                              struct survey_info *survey)
2233 {
2234         struct ath_softc *sc = hw->priv;
2235         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2236         struct ieee80211_supported_band *sband;
2237         struct ieee80211_channel *chan;
2238         unsigned long flags;
2239         int pos;
2240
2241         spin_lock_irqsave(&common->cc_lock, flags);
2242         if (idx == 0)
2243                 ath_update_survey_stats(sc);
2244
2245         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2246         if (sband && idx >= sband->n_channels) {
2247                 idx -= sband->n_channels;
2248                 sband = NULL;
2249         }
2250
2251         if (!sband)
2252                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2253
2254         if (!sband || idx >= sband->n_channels) {
2255                 spin_unlock_irqrestore(&common->cc_lock, flags);
2256                 return -ENOENT;
2257         }
2258
2259         chan = &sband->channels[idx];
2260         pos = chan->hw_value;
2261         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2262         survey->channel = chan;
2263         spin_unlock_irqrestore(&common->cc_lock, flags);
2264
2265         return 0;
2266 }
2267
2268 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2269 {
2270         struct ath_softc *sc = hw->priv;
2271         struct ath_hw *ah = sc->sc_ah;
2272
2273         mutex_lock(&sc->mutex);
2274         ah->coverage_class = coverage_class;
2275         ath9k_hw_init_global_settings(ah);
2276         mutex_unlock(&sc->mutex);
2277 }
2278
2279 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2280 {
2281         struct ath_softc *sc = hw->priv;
2282         struct ath_hw *ah = sc->sc_ah;
2283         struct ath_common *common = ath9k_hw_common(ah);
2284         int timeout = 200; /* ms */
2285         int i, j;
2286         bool drain_txq;
2287
2288         mutex_lock(&sc->mutex);
2289         cancel_delayed_work_sync(&sc->tx_complete_work);
2290
2291         if (sc->sc_flags & SC_OP_INVALID) {
2292                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2293                 mutex_unlock(&sc->mutex);
2294                 return;
2295         }
2296
2297         if (drop)
2298                 timeout = 1;
2299
2300         for (j = 0; j < timeout; j++) {
2301                 bool npend = false;
2302
2303                 if (j)
2304                         usleep_range(1000, 2000);
2305
2306                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2307                         if (!ATH_TXQ_SETUP(sc, i))
2308                                 continue;
2309
2310                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2311
2312                         if (npend)
2313                                 break;
2314                 }
2315
2316                 if (!npend)
2317                     goto out;
2318         }
2319
2320         ath9k_ps_wakeup(sc);
2321         spin_lock_bh(&sc->sc_pcu_lock);
2322         drain_txq = ath_drain_all_txq(sc, false);
2323         spin_unlock_bh(&sc->sc_pcu_lock);
2324         if (!drain_txq)
2325                 ath_reset(sc, false);
2326         ath9k_ps_restore(sc);
2327         ieee80211_wake_queues(hw);
2328
2329 out:
2330         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2331         mutex_unlock(&sc->mutex);
2332 }
2333
2334 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2335 {
2336         struct ath_softc *sc = hw->priv;
2337         int i;
2338
2339         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2340                 if (!ATH_TXQ_SETUP(sc, i))
2341                         continue;
2342
2343                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2344                         return true;
2345         }
2346         return false;
2347 }
2348
2349 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2350 {
2351         struct ath_softc *sc = hw->priv;
2352         struct ath_hw *ah = sc->sc_ah;
2353         struct ieee80211_vif *vif;
2354         struct ath_vif *avp;
2355         struct ath_buf *bf;
2356         struct ath_tx_status ts;
2357         int status;
2358
2359         vif = sc->beacon.bslot[0];
2360         if (!vif)
2361                 return 0;
2362
2363         avp = (void *)vif->drv_priv;
2364         if (!avp->is_bslot_active)
2365                 return 0;
2366
2367         if (!sc->beacon.tx_processed) {
2368                 tasklet_disable(&sc->bcon_tasklet);
2369
2370                 bf = avp->av_bcbuf;
2371                 if (!bf || !bf->bf_mpdu)
2372                         goto skip;
2373
2374                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2375                 if (status == -EINPROGRESS)
2376                         goto skip;
2377
2378                 sc->beacon.tx_processed = true;
2379                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2380
2381 skip:
2382                 tasklet_enable(&sc->bcon_tasklet);
2383         }
2384
2385         return sc->beacon.tx_last;
2386 }
2387
2388 struct ieee80211_ops ath9k_ops = {
2389         .tx                 = ath9k_tx,
2390         .start              = ath9k_start,
2391         .stop               = ath9k_stop,
2392         .add_interface      = ath9k_add_interface,
2393         .change_interface   = ath9k_change_interface,
2394         .remove_interface   = ath9k_remove_interface,
2395         .config             = ath9k_config,
2396         .configure_filter   = ath9k_configure_filter,
2397         .sta_add            = ath9k_sta_add,
2398         .sta_remove         = ath9k_sta_remove,
2399         .sta_notify         = ath9k_sta_notify,
2400         .conf_tx            = ath9k_conf_tx,
2401         .bss_info_changed   = ath9k_bss_info_changed,
2402         .set_key            = ath9k_set_key,
2403         .get_tsf            = ath9k_get_tsf,
2404         .set_tsf            = ath9k_set_tsf,
2405         .reset_tsf          = ath9k_reset_tsf,
2406         .ampdu_action       = ath9k_ampdu_action,
2407         .get_survey         = ath9k_get_survey,
2408         .rfkill_poll        = ath9k_rfkill_poll_state,
2409         .set_coverage_class = ath9k_set_coverage_class,
2410         .flush              = ath9k_flush,
2411         .tx_frames_pending  = ath9k_tx_frames_pending,
2412         .tx_last_beacon = ath9k_tx_last_beacon,
2413 };