drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  98         if (++sc->ps_usecount != 1)
  99                 goto unlock;
 100
 101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 102
 103         /*
 104          * While the hardware is asleep, the cycle counters contain no
 105          * useful data. Better clear them now so that they don't mess up
 106          * survey data results.
 107          */
 108         spin_lock(&common->cc_lock);
 109         ath_hw_cycle_counters_update(common);
 110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 111         spin_unlock(&common->cc_lock);
 112
 113  unlock:
 114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 115 }
 116
 117 void ath9k_ps_restore(struct ath_softc *sc)
 118 {
 119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123         if (--sc->ps_usecount != 0)
 124                 goto unlock;
 125
 126         spin_lock(&common->cc_lock);
 127         ath_hw_cycle_counters_update(common);
 128         spin_unlock(&common->cc_lock);
 129
 130         if (sc->ps_idle)
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 132         else if (sc->ps_enabled &&
 133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 134                               PS_WAIT_FOR_CAB |
 135                               PS_WAIT_FOR_PSPOLL_DATA |
 136                               PS_WAIT_FOR_TX_ACK)))
 137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 static void ath_start_ani(struct ath_common *common)
 144 {
 145         struct ath_hw *ah = common->ah;
 146         unsigned long timestamp = jiffies_to_msecs(jiffies);
 147         struct ath_softc *sc = (struct ath_softc *) common->priv;
 148
 149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 150                 return;
 151
 152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 153                 return;
 154
 155         common->ani.longcal_timer = timestamp;
 156         common->ani.shortcal_timer = timestamp;
 157         common->ani.checkani_timer = timestamp;
 158
 159         mod_timer(&common->ani.timer,
 160                   jiffies +
 161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 162 }
 163
 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 165 {
 166         struct ath_hw *ah = sc->sc_ah;
 167         struct ath9k_channel *chan = &ah->channels[channel];
 168         struct survey_info *survey = &sc->survey[channel];
 169
 170         if (chan->noisefloor) {
 171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 172                 survey->noise = chan->noisefloor;
 173         }
 174 }
 175
 176 static void ath_update_survey_stats(struct ath_softc *sc)
 177 {
 178         struct ath_hw *ah = sc->sc_ah;
 179         struct ath_common *common = ath9k_hw_common(ah);
 180         int pos = ah->curchan - &ah->channels[0];
 181         struct survey_info *survey = &sc->survey[pos];
 182         struct ath_cycle_counters *cc = &common->cc_survey;
 183         unsigned int div = common->clockrate * 1000;
 184
 185         if (!ah->curchan)
 186                 return;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201         memset(cc, 0, sizeof(*cc));
 202
 203         ath_update_survey_nf(sc, pos);
 204 }
 205
 206 /*
 207  * Set/change channels.  If the channel is really being changed, it's done
 208  * by reseting the chip.  To accomplish this we must first cleanup any pending
 209  * DMA, then restart stuff.
 210 */
 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 212                     struct ath9k_channel *hchan)
 213 {
 214         struct ath_wiphy *aphy = hw->priv;
 215         struct ath_hw *ah = sc->sc_ah;
 216         struct ath_common *common = ath9k_hw_common(ah);
 217         struct ieee80211_conf *conf = &common->hw->conf;
 218         bool fastcc = true, stopped;
 219         struct ieee80211_channel *channel = hw->conf.channel;
 220         struct ath9k_hw_cal_data *caldata = NULL;
 221         int r;
 222
 223         if (sc->sc_flags & SC_OP_INVALID)
 224                 return -EIO;
 225
 226         del_timer_sync(&common->ani.timer);
 227         cancel_work_sync(&sc->paprd_work);
 228         cancel_work_sync(&sc->hw_check_work);
 229         cancel_delayed_work_sync(&sc->tx_complete_work);
 230
 231         ath9k_ps_wakeup(sc);
 232
 233         /*
 234          * This is only performed if the channel settings have
 235          * actually changed.
 236          *
 237          * To switch channels clear any pending DMA operations;
 238          * wait long enough for the RX fifo to drain, reset the
 239          * hardware at the new frequency, and then re-enable
 240          * the relevant bits of the h/w.
 241          */
 242         ath9k_hw_disable_interrupts(ah);
 243         ath_drain_all_txq(sc, false);
 244
 245         spin_lock_bh(&sc->sc_pcu_lock);
 246
 247         stopped = ath_stoprecv(sc);
 248
 249         /* XXX: do not flush receive queue here. We don't want
 250          * to flush data frames already in queue because of
 251          * changing channel. */
 252
 253         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 254                 fastcc = false;
 255
 256         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 257                 caldata = &aphy->caldata;
 258
 259         ath_print(common, ATH_DBG_CONFIG,
 260                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 261                   sc->sc_ah->curchan->channel,
 262                   channel->center_freq, conf_is_ht40(conf),
 263                   fastcc);
 264
 265         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 266         if (r) {
 267                 ath_print(common, ATH_DBG_FATAL,
 268                           "Unable to reset channel (%u MHz), "
 269                           "reset status %d\n",
 270                           channel->center_freq, r);
 271                 spin_unlock_bh(&sc->sc_pcu_lock);
 272                 goto ps_restore;
 273         }
 274
 275         if (ath_startrecv(sc) != 0) {
 276                 ath_print(common, ATH_DBG_FATAL,
 277                           "Unable to restart recv logic\n");
 278                 r = -EIO;
 279                 spin_unlock_bh(&sc->sc_pcu_lock);
 280                 goto ps_restore;
 281         }
 282
 283         spin_unlock_bh(&sc->sc_pcu_lock);
 284
 285         ath_update_txpow(sc);
 286         ath9k_hw_set_interrupts(ah, ah->imask);
 287
 288         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 289                 ath_beacon_config(sc, NULL);
 290                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 291                 ath_start_ani(common);
 292         }
 293
 294  ps_restore:
 295         ath9k_ps_restore(sc);
 296         return r;
 297 }
 298
 299 static void ath_paprd_activate(struct ath_softc *sc)
 300 {
 301         struct ath_hw *ah = sc->sc_ah;
 302         struct ath9k_hw_cal_data *caldata = ah->caldata;
 303         struct ath_common *common = ath9k_hw_common(ah);
 304         int chain;
 305
 306         if (!caldata || !caldata->paprd_done)
 307                 return;
 308
 309         ath9k_ps_wakeup(sc);
 310         ar9003_paprd_enable(ah, false);
 311         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 312                 if (!(common->tx_chainmask & BIT(chain)))
 313                         continue;
 314
 315                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 316         }
 317
 318         ar9003_paprd_enable(ah, true);
 319         ath9k_ps_restore(sc);
 320 }
 321
 322 void ath_paprd_calibrate(struct work_struct *work)
 323 {
 324         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 325         struct ieee80211_hw *hw = sc->hw;
 326         struct ath_hw *ah = sc->sc_ah;
 327         struct ieee80211_hdr *hdr;
 328         struct sk_buff *skb = NULL;
 329         struct ieee80211_tx_info *tx_info;
 330         int band = hw->conf.channel->band;
 331         struct ieee80211_supported_band *sband = &sc->sbands[band];
 332         struct ath_tx_control txctl;
 333         struct ath9k_hw_cal_data *caldata = ah->caldata;
 334         struct ath_common *common = ath9k_hw_common(ah);
 335         int qnum, ftype;
 336         int chain_ok = 0;
 337         int chain;
 338         int len = 1800;
 339         int time_left;
 340         int i;
 341
 342         if (!caldata)
 343                 return;
 344
 345         skb = alloc_skb(len, GFP_KERNEL);
 346         if (!skb)
 347                 return;
 348
 349         tx_info = IEEE80211_SKB_CB(skb);
 350
 351         skb_put(skb, len);
 352         memset(skb->data, 0, len);
 353         hdr = (struct ieee80211_hdr *)skb->data;
 354         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 355         hdr->frame_control = cpu_to_le16(ftype);
 356         hdr->duration_id = cpu_to_le16(10);
 357         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 358         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 359         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 360
 361         memset(&txctl, 0, sizeof(txctl));
 362         qnum = sc->tx.hwq_map[WME_AC_BE];
 363         txctl.txq = &sc->tx.txq[qnum];
 364
 365         ath9k_ps_wakeup(sc);
 366         ar9003_paprd_init_table(ah);
 367         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 368                 if (!(common->tx_chainmask & BIT(chain)))
 369                         continue;
 370
 371                 chain_ok = 0;
 372                 memset(tx_info, 0, sizeof(*tx_info));
 373                 tx_info->band = band;
 374
 375                 for (i = 0; i < 4; i++) {
 376                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 377                         tx_info->control.rates[i].count = 6;
 378                 }
 379
 380                 init_completion(&sc->paprd_complete);
 381                 ar9003_paprd_setup_gain_table(ah, chain);
 382                 txctl.paprd = BIT(chain);
 383                 if (ath_tx_start(hw, skb, &txctl) != 0)
 384                         break;
 385
 386                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 387                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 388                 if (!time_left) {
 389                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 390                                   "Timeout waiting for paprd training on "
 391                                   "TX chain %d\n",
 392                                   chain);
 393                         goto fail_paprd;
 394                 }
 395
 396                 if (!ar9003_paprd_is_done(ah))
 397                         break;
 398
 399                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 400                         break;
 401
 402                 chain_ok = 1;
 403         }
 404         kfree_skb(skb);
 405
 406         if (chain_ok) {
 407                 caldata->paprd_done = true;
 408                 ath_paprd_activate(sc);
 409         }
 410
 411 fail_paprd:
 412         ath9k_ps_restore(sc);
 413 }
 414
 415 /*
 416  *  This routine performs the periodic noise floor calibration function
 417  *  that is used to adjust and optimize the chip performance.  This
 418  *  takes environmental changes (location, temperature) into account.
 419  *  When the task is complete, it reschedules itself depending on the
 420  *  appropriate interval that was calculated.
 421  */
 422 void ath_ani_calibrate(unsigned long data)
 423 {
 424         struct ath_softc *sc = (struct ath_softc *)data;
 425         struct ath_hw *ah = sc->sc_ah;
 426         struct ath_common *common = ath9k_hw_common(ah);
 427         bool longcal = false;
 428         bool shortcal = false;
 429         bool aniflag = false;
 430         unsigned int timestamp = jiffies_to_msecs(jiffies);
 431         u32 cal_interval, short_cal_interval, long_cal_interval;
 432         unsigned long flags;
 433
 434         if (ah->caldata && ah->caldata->nfcal_interference)
 435                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 436         else
 437                 long_cal_interval = ATH_LONG_CALINTERVAL;
 438
 439         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 440                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 441
 442         /* Only calibrate if awake */
 443         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 444                 goto set_timer;
 445
 446         ath9k_ps_wakeup(sc);
 447
 448         /* Long calibration runs independently of short calibration. */
 449         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 450                 longcal = true;
 451                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 452                 common->ani.longcal_timer = timestamp;
 453         }
 454
 455         /* Short calibration applies only while caldone is false */
 456         if (!common->ani.caldone) {
 457                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 458                         shortcal = true;
 459                         ath_print(common, ATH_DBG_ANI,
 460                                   "shortcal @%lu\n", jiffies);
 461                         common->ani.shortcal_timer = timestamp;
 462                         common->ani.resetcal_timer = timestamp;
 463                 }
 464         } else {
 465                 if ((timestamp - common->ani.resetcal_timer) >=
 466                     ATH_RESTART_CALINTERVAL) {
 467                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 468                         if (common->ani.caldone)
 469                                 common->ani.resetcal_timer = timestamp;
 470                 }
 471         }
 472
 473         /* Verify whether we must check ANI */
 474         if ((timestamp - common->ani.checkani_timer) >=
 475              ah->config.ani_poll_interval) {
 476                 aniflag = true;
 477                 common->ani.checkani_timer = timestamp;
 478         }
 479
 480         /* Skip all processing if there's nothing to do. */
 481         if (longcal || shortcal || aniflag) {
 482                 /* Call ANI routine if necessary */
 483                 if (aniflag) {
 484                         spin_lock_irqsave(&common->cc_lock, flags);
 485                         ath9k_hw_ani_monitor(ah, ah->curchan);
 486                         ath_update_survey_stats(sc);
 487                         spin_unlock_irqrestore(&common->cc_lock, flags);
 488                 }
 489
 490                 /* Perform calibration if necessary */
 491                 if (longcal || shortcal) {
 492                         common->ani.caldone =
 493                                 ath9k_hw_calibrate(ah,
 494                                                    ah->curchan,
 495                                                    common->rx_chainmask,
 496                                                    longcal);
 497                 }
 498         }
 499
 500         ath9k_ps_restore(sc);
 501
 502 set_timer:
 503         /*
 504         * Set timer interval based on previous results.
 505         * The interval must be the shortest necessary to satisfy ANI,
 506         * short calibration and long calibration.
 507         */
 508         cal_interval = ATH_LONG_CALINTERVAL;
 509         if (sc->sc_ah->config.enable_ani)
 510                 cal_interval = min(cal_interval,
 511                                    (u32)ah->config.ani_poll_interval);
 512         if (!common->ani.caldone)
 513                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 514
 515         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 516         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 517                 if (!ah->caldata->paprd_done)
 518                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 519                 else
 520                         ath_paprd_activate(sc);
 521         }
 522 }
 523
 524 /*
 525  * Update tx/rx chainmask. For legacy association,
 526  * hard code chainmask to 1x1, for 11n association, use
 527  * the chainmask configuration, for bt coexistence, use
 528  * the chainmask configuration even in legacy mode.
 529  */
 530 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 531 {
 532         struct ath_hw *ah = sc->sc_ah;
 533         struct ath_common *common = ath9k_hw_common(ah);
 534
 535         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 536             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 537                 common->tx_chainmask = ah->caps.tx_chainmask;
 538                 common->rx_chainmask = ah->caps.rx_chainmask;
 539         } else {
 540                 common->tx_chainmask = 1;
 541                 common->rx_chainmask = 1;
 542         }
 543
 544         ath_print(common, ATH_DBG_CONFIG,
 545                   "tx chmask: %d, rx chmask: %d\n",
 546                   common->tx_chainmask,
 547                   common->rx_chainmask);
 548 }
 549
 550 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 551 {
 552         struct ath_node *an;
 553
 554         an = (struct ath_node *)sta->drv_priv;
 555
 556         if (sc->sc_flags & SC_OP_TXAGGR) {
 557                 ath_tx_node_init(sc, an);
 558                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 559                                      sta->ht_cap.ampdu_factor);
 560                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 561         }
 562 }
 563
 564 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 565 {
 566         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 567
 568         if (sc->sc_flags & SC_OP_TXAGGR)
 569                 ath_tx_node_cleanup(sc, an);
 570 }
 571
 572 void ath_hw_check(struct work_struct *work)
 573 {
 574         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 575         int i;
 576
 577         ath9k_ps_wakeup(sc);
 578
 579         for (i = 0; i < 3; i++) {
 580                 if (ath9k_hw_check_alive(sc->sc_ah))
 581                         goto out;
 582
 583                 msleep(1);
 584         }
 585         ath_reset(sc, true);
 586
 587 out:
 588         ath9k_ps_restore(sc);
 589 }
 590
 591 void ath9k_tasklet(unsigned long data)
 592 {
 593         struct ath_softc *sc = (struct ath_softc *)data;
 594         struct ath_hw *ah = sc->sc_ah;
 595         struct ath_common *common = ath9k_hw_common(ah);
 596
 597         u32 status = sc->intrstatus;
 598         u32 rxmask;
 599
 600         ath9k_ps_wakeup(sc);
 601
 602         if (status & ATH9K_INT_FATAL) {
 603                 ath_reset(sc, true);
 604                 ath9k_ps_restore(sc);
 605                 return;
 606         }
 607
 608         if (!ath9k_hw_check_alive(ah))
 609                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 610
 611         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 612                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 613                           ATH9K_INT_RXORN);
 614         else
 615                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 616
 617         if (status & rxmask) {
 618                 spin_lock_bh(&sc->sc_pcu_lock);
 619
 620                 /* Check for high priority Rx first */
 621                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 622                     (status & ATH9K_INT_RXHP))
 623                         ath_rx_tasklet(sc, 0, true);
 624
 625                 ath_rx_tasklet(sc, 0, false);
 626                 spin_unlock_bh(&sc->sc_pcu_lock);
 627         }
 628
 629         if (status & ATH9K_INT_TX) {
 630                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 631                         ath_tx_edma_tasklet(sc);
 632                 else
 633                         ath_tx_tasklet(sc);
 634         }
 635
 636         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 637                 /*
 638                  * TSF sync does not look correct; remain awake to sync with
 639                  * the next Beacon.
 640                  */
 641                 ath_print(common, ATH_DBG_PS,
 642                           "TSFOOR - Sync with next Beacon\n");
 643                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 644         }
 645
 646         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 647                 if (status & ATH9K_INT_GENTIMER)
 648                         ath_gen_timer_isr(sc->sc_ah);
 649
 650         /* re-enable hardware interrupt */
 651         ath9k_hw_enable_interrupts(ah);
 652         ath9k_ps_restore(sc);
 653 }
 654
 655 irqreturn_t ath_isr(int irq, void *dev)
 656 {
 657 #define SCHED_INTR (                            \
 658                 ATH9K_INT_FATAL |               \
 659                 ATH9K_INT_RXORN |               \
 660                 ATH9K_INT_RXEOL |               \
 661                 ATH9K_INT_RX |                  \
 662                 ATH9K_INT_RXLP |                \
 663                 ATH9K_INT_RXHP |                \
 664                 ATH9K_INT_TX |                  \
 665                 ATH9K_INT_BMISS |               \
 666                 ATH9K_INT_CST |                 \
 667                 ATH9K_INT_TSFOOR |              \
 668                 ATH9K_INT_GENTIMER)
 669
 670         struct ath_softc *sc = dev;
 671         struct ath_hw *ah = sc->sc_ah;
 672         struct ath_common *common = ath9k_hw_common(ah);
 673         enum ath9k_int status;
 674         bool sched = false;
 675
 676         /*
 677          * The hardware is not ready/present, don't
 678          * touch anything. Note this can happen early
 679          * on if the IRQ is shared.
 680          */
 681         if (sc->sc_flags & SC_OP_INVALID)
 682                 return IRQ_NONE;
 683
 684
 685         /* shared irq, not for us */
 686
 687         if (!ath9k_hw_intrpend(ah))
 688                 return IRQ_NONE;
 689
 690         /*
 691          * Figure out the reason(s) for the interrupt.  Note
 692          * that the hal returns a pseudo-ISR that may include
 693          * bits we haven't explicitly enabled so we mask the
 694          * value to insure we only process bits we requested.
 695          */
 696         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 697         status &= ah->imask;    /* discard unasked-for bits */
 698
 699         /*
 700          * If there are no status bits set, then this interrupt was not
 701          * for me (should have been caught above).
 702          */
 703         if (!status)
 704                 return IRQ_NONE;
 705
 706         /* Cache the status */
 707         sc->intrstatus = status;
 708
 709         if (status & SCHED_INTR)
 710                 sched = true;
 711
 712         /*
 713          * If a FATAL or RXORN interrupt is received, we have to reset the
 714          * chip immediately.
 715          */
 716         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 717             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 718                 goto chip_reset;
 719
 720         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 721             (status & ATH9K_INT_BB_WATCHDOG)) {
 722
 723                 spin_lock(&common->cc_lock);
 724                 ath_hw_cycle_counters_update(common);
 725                 ar9003_hw_bb_watchdog_dbg_info(ah);
 726                 spin_unlock(&common->cc_lock);
 727
 728                 goto chip_reset;
 729         }
 730
 731         if (status & ATH9K_INT_SWBA)
 732                 tasklet_schedule(&sc->bcon_tasklet);
 733
 734         if (status & ATH9K_INT_TXURN)
 735                 ath9k_hw_updatetxtriglevel(ah, true);
 736
 737         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 738                 if (status & ATH9K_INT_RXEOL) {
 739                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 740                         ath9k_hw_set_interrupts(ah, ah->imask);
 741                 }
 742         }
 743
 744         if (status & ATH9K_INT_MIB) {
 745                 /*
 746                  * Disable interrupts until we service the MIB
 747                  * interrupt; otherwise it will continue to
 748                  * fire.
 749                  */
 750                 ath9k_hw_disable_interrupts(ah);
 751                 /*
 752                  * Let the hal handle the event. We assume
 753                  * it will clear whatever condition caused
 754                  * the interrupt.
 755                  */
 756                 spin_lock(&common->cc_lock);
 757                 ath9k_hw_proc_mib_event(ah);
 758                 spin_unlock(&common->cc_lock);
 759                 ath9k_hw_enable_interrupts(ah);
 760         }
 761
 762         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 763                 if (status & ATH9K_INT_TIM_TIMER) {
 764                         /* Clear RxAbort bit so that we can
 765                          * receive frames */
 766                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 767                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 768                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 769                 }
 770
 771 chip_reset:
 772
 773         ath_debug_stat_interrupt(sc, status);
 774
 775         if (sched) {
 776                 /* turn off every interrupt */
 777                 ath9k_hw_disable_interrupts(ah);
 778                 tasklet_schedule(&sc->intr_tq);
 779         }
 780
 781         return IRQ_HANDLED;
 782
 783 #undef SCHED_INTR
 784 }
 785
 786 static u32 ath_get_extchanmode(struct ath_softc *sc,
 787                                struct ieee80211_channel *chan,
 788                                enum nl80211_channel_type channel_type)
 789 {
 790         u32 chanmode = 0;
 791
 792         switch (chan->band) {
 793         case IEEE80211_BAND_2GHZ:
 794                 switch(channel_type) {
 795                 case NL80211_CHAN_NO_HT:
 796                 case NL80211_CHAN_HT20:
 797                         chanmode = CHANNEL_G_HT20;
 798                         break;
 799                 case NL80211_CHAN_HT40PLUS:
 800                         chanmode = CHANNEL_G_HT40PLUS;
 801                         break;
 802                 case NL80211_CHAN_HT40MINUS:
 803                         chanmode = CHANNEL_G_HT40MINUS;
 804                         break;
 805                 }
 806                 break;
 807         case IEEE80211_BAND_5GHZ:
 808                 switch(channel_type) {
 809                 case NL80211_CHAN_NO_HT:
 810                 case NL80211_CHAN_HT20:
 811                         chanmode = CHANNEL_A_HT20;
 812                         break;
 813                 case NL80211_CHAN_HT40PLUS:
 814                         chanmode = CHANNEL_A_HT40PLUS;
 815                         break;
 816                 case NL80211_CHAN_HT40MINUS:
 817                         chanmode = CHANNEL_A_HT40MINUS;
 818                         break;
 819                 }
 820                 break;
 821         default:
 822                 break;
 823         }
 824
 825         return chanmode;
 826 }
 827
 828 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 829                                  struct ieee80211_hw *hw,
 830                                  struct ieee80211_vif *vif,
 831                                  struct ieee80211_bss_conf *bss_conf)
 832 {
 833         struct ath_wiphy *aphy = hw->priv;
 834         struct ath_hw *ah = sc->sc_ah;
 835         struct ath_common *common = ath9k_hw_common(ah);
 836
 837         if (bss_conf->assoc) {
 838                 ath_print(common, ATH_DBG_CONFIG,
 839                           "Bss Info ASSOC %d, bssid: %pM\n",
 840                            bss_conf->aid, common->curbssid);
 841
 842                 /* New association, store aid */
 843                 common->curaid = bss_conf->aid;
 844                 ath9k_hw_write_associd(ah);
 845
 846                 /*
 847                  * Request a re-configuration of Beacon related timers
 848                  * on the receipt of the first Beacon frame (i.e.,
 849                  * after time sync with the AP).
 850                  */
 851                 sc->ps_flags |= PS_BEACON_SYNC;
 852
 853                 /* Configure the beacon */
 854                 ath_beacon_config(sc, vif);
 855
 856                 /* Reset rssi stats */
 857                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 858                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 859
 860                 sc->sc_flags |= SC_OP_ANI_RUN;
 861                 ath_start_ani(common);
 862         } else {
 863                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 864                 common->curaid = 0;
 865                 /* Stop ANI */
 866                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 867                 del_timer_sync(&common->ani.timer);
 868         }
 869 }
 870
 871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 872 {
 873         struct ath_hw *ah = sc->sc_ah;
 874         struct ath_common *common = ath9k_hw_common(ah);
 875         struct ieee80211_channel *channel = hw->conf.channel;
 876         int r;
 877
 878         ath9k_ps_wakeup(sc);
 879         ath9k_hw_configpcipowersave(ah, 0, 0);
 880
 881         if (!ah->curchan)
 882                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 883
 884         spin_lock_bh(&sc->sc_pcu_lock);
 885         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 886         if (r) {
 887                 ath_print(common, ATH_DBG_FATAL,
 888                           "Unable to reset channel (%u MHz), "
 889                           "reset status %d\n",
 890                           channel->center_freq, r);
 891         }
 892
 893         ath_update_txpow(sc);
 894         if (ath_startrecv(sc) != 0) {
 895                 ath_print(common, ATH_DBG_FATAL,
 896                           "Unable to restart recv logic\n");
 897                 spin_unlock_bh(&sc->sc_pcu_lock);
 898                 return;
 899         }
 900         spin_unlock_bh(&sc->sc_pcu_lock);
 901
 902         if (sc->sc_flags & SC_OP_BEACONS)
 903                 ath_beacon_config(sc, NULL);    /* restart beacons */
 904
 905         /* Re-Enable  interrupts */
 906         ath9k_hw_set_interrupts(ah, ah->imask);
 907
 908         /* Enable LED */
 909         ath9k_hw_cfg_output(ah, ah->led_pin,
 910                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 911         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 912
 913         ieee80211_wake_queues(hw);
 914         ath9k_ps_restore(sc);
 915 }
 916
 917 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 918 {
 919         struct ath_hw *ah = sc->sc_ah;
 920         struct ieee80211_channel *channel = hw->conf.channel;
 921         int r;
 922
 923         ath9k_ps_wakeup(sc);
 924         ieee80211_stop_queues(hw);
 925
 926         /*
 927          * Keep the LED on when the radio is disabled
 928          * during idle unassociated state.
 929          */
 930         if (!sc->ps_idle) {
 931                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 932                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 933         }
 934
 935         /* Disable interrupts */
 936         ath9k_hw_disable_interrupts(ah);
 937
 938         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 939
 940         spin_lock_bh(&sc->sc_pcu_lock);
 941
 942         ath_stoprecv(sc);               /* turn off frame recv */
 943         ath_flushrecv(sc);              /* flush recv queue */
 944
 945         if (!ah->curchan)
 946                 ah->curchan = ath_get_curchannel(sc, hw);
 947
 948         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 949         if (r) {
 950                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 951                           "Unable to reset channel (%u MHz), "
 952                           "reset status %d\n",
 953                           channel->center_freq, r);
 954         }
 955
 956         ath9k_hw_phy_disable(ah);
 957
 958         spin_unlock_bh(&sc->sc_pcu_lock);
 959
 960         ath9k_hw_configpcipowersave(ah, 1, 1);
 961         ath9k_ps_restore(sc);
 962         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 963 }
 964
 965 int ath_reset(struct ath_softc *sc, bool retry_tx)
 966 {
 967         struct ath_hw *ah = sc->sc_ah;
 968         struct ath_common *common = ath9k_hw_common(ah);
 969         struct ieee80211_hw *hw = sc->hw;
 970         int r;
 971
 972         /* Stop ANI */
 973         del_timer_sync(&common->ani.timer);
 974
 975         ieee80211_stop_queues(hw);
 976
 977         ath9k_hw_disable_interrupts(ah);
 978         ath_drain_all_txq(sc, retry_tx);
 979
 980         spin_lock_bh(&sc->sc_pcu_lock);
 981
 982         ath_stoprecv(sc);
 983         ath_flushrecv(sc);
 984
 985         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 986         if (r)
 987                 ath_print(common, ATH_DBG_FATAL,
 988                           "Unable to reset hardware; reset status %d\n", r);
 989
 990         if (ath_startrecv(sc) != 0)
 991                 ath_print(common, ATH_DBG_FATAL,
 992                           "Unable to start recv logic\n");
 993
 994         spin_unlock_bh(&sc->sc_pcu_lock);
 995
 996         /*
 997          * We may be doing a reset in response to a request
 998          * that changes the channel so update any state that
 999          * might change as a result.
1000          */
1001         ath_update_txpow(sc);
1002
1003         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1004                 ath_beacon_config(sc, NULL);    /* restart beacons */
1005
1006         ath9k_hw_set_interrupts(ah, ah->imask);
1007
1008         if (retry_tx) {
1009                 int i;
1010                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1011                         if (ATH_TXQ_SETUP(sc, i)) {
1012                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1013                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1014                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1015                         }
1016                 }
1017         }
1018
1019         ieee80211_wake_queues(hw);
1020
1021         /* Start ANI */
1022         ath_start_ani(common);
1023
1024         return r;
1025 }
1026
1027 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1028 {
1029         int qnum;
1030
1031         switch (queue) {
1032         case 0:
1033                 qnum = sc->tx.hwq_map[WME_AC_VO];
1034                 break;
1035         case 1:
1036                 qnum = sc->tx.hwq_map[WME_AC_VI];
1037                 break;
1038         case 2:
1039                 qnum = sc->tx.hwq_map[WME_AC_BE];
1040                 break;
1041         case 3:
1042                 qnum = sc->tx.hwq_map[WME_AC_BK];
1043                 break;
1044         default:
1045                 qnum = sc->tx.hwq_map[WME_AC_BE];
1046                 break;
1047         }
1048
1049         return qnum;
1050 }
1051
1052 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1053 {
1054         int qnum;
1055
1056         switch (queue) {
1057         case WME_AC_VO:
1058                 qnum = 0;
1059                 break;
1060         case WME_AC_VI:
1061                 qnum = 1;
1062                 break;
1063         case WME_AC_BE:
1064                 qnum = 2;
1065                 break;
1066         case WME_AC_BK:
1067                 qnum = 3;
1068                 break;
1069         default:
1070                 qnum = -1;
1071                 break;
1072         }
1073
1074         return qnum;
1075 }
1076
1077 /* XXX: Remove me once we don't depend on ath9k_channel for all
1078  * this redundant data */
1079 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1080                            struct ath9k_channel *ichan)
1081 {
1082         struct ieee80211_channel *chan = hw->conf.channel;
1083         struct ieee80211_conf *conf = &hw->conf;
1084
1085         ichan->channel = chan->center_freq;
1086         ichan->chan = chan;
1087
1088         if (chan->band == IEEE80211_BAND_2GHZ) {
1089                 ichan->chanmode = CHANNEL_G;
1090                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1091         } else {
1092                 ichan->chanmode = CHANNEL_A;
1093                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1094         }
1095
1096         if (conf_is_ht(conf))
1097                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1098                                             conf->channel_type);
1099 }
1100
1101 /**********************/
1102 /* mac80211 callbacks */
1103 /**********************/
1104
1105 static int ath9k_start(struct ieee80211_hw *hw)
1106 {
1107         struct ath_wiphy *aphy = hw->priv;
1108         struct ath_softc *sc = aphy->sc;
1109         struct ath_hw *ah = sc->sc_ah;
1110         struct ath_common *common = ath9k_hw_common(ah);
1111         struct ieee80211_channel *curchan = hw->conf.channel;
1112         struct ath9k_channel *init_channel;
1113         int r;
1114
1115         ath_print(common, ATH_DBG_CONFIG,
1116                   "Starting driver with initial channel: %d MHz\n",
1117                   curchan->center_freq);
1118
1119         mutex_lock(&sc->mutex);
1120
1121         if (ath9k_wiphy_started(sc)) {
1122                 if (sc->chan_idx == curchan->hw_value) {
1123                         /*
1124                          * Already on the operational channel, the new wiphy
1125                          * can be marked active.
1126                          */
1127                         aphy->state = ATH_WIPHY_ACTIVE;
1128                         ieee80211_wake_queues(hw);
1129                 } else {
1130                         /*
1131                          * Another wiphy is on another channel, start the new
1132                          * wiphy in paused state.
1133                          */
1134                         aphy->state = ATH_WIPHY_PAUSED;
1135                         ieee80211_stop_queues(hw);
1136                 }
1137                 mutex_unlock(&sc->mutex);
1138                 return 0;
1139         }
1140         aphy->state = ATH_WIPHY_ACTIVE;
1141
1142         /* setup initial channel */
1143
1144         sc->chan_idx = curchan->hw_value;
1145
1146         init_channel = ath_get_curchannel(sc, hw);
1147
1148         /* Reset SERDES registers */
1149         ath9k_hw_configpcipowersave(ah, 0, 0);
1150
1151         /*
1152          * The basic interface to setting the hardware in a good
1153          * state is ``reset''.  On return the hardware is known to
1154          * be powered up and with interrupts disabled.  This must
1155          * be followed by initialization of the appropriate bits
1156          * and then setup of the interrupt mask.
1157          */
1158         spin_lock_bh(&sc->sc_pcu_lock);
1159         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1160         if (r) {
1161                 ath_print(common, ATH_DBG_FATAL,
1162                           "Unable to reset hardware; reset status %d "
1163                           "(freq %u MHz)\n", r,
1164                           curchan->center_freq);
1165                 spin_unlock_bh(&sc->sc_pcu_lock);
1166                 goto mutex_unlock;
1167         }
1168
1169         /*
1170          * This is needed only to setup initial state
1171          * but it's best done after a reset.
1172          */
1173         ath_update_txpow(sc);
1174
1175         /*
1176          * Setup the hardware after reset:
1177          * The receive engine is set going.
1178          * Frame transmit is handled entirely
1179          * in the frame output path; there's nothing to do
1180          * here except setup the interrupt mask.
1181          */
1182         if (ath_startrecv(sc) != 0) {
1183                 ath_print(common, ATH_DBG_FATAL,
1184                           "Unable to start recv logic\n");
1185                 r = -EIO;
1186                 spin_unlock_bh(&sc->sc_pcu_lock);
1187                 goto mutex_unlock;
1188         }
1189         spin_unlock_bh(&sc->sc_pcu_lock);
1190
1191         /* Setup our intr mask. */
1192         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1193                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1194                     ATH9K_INT_GLOBAL;
1195
1196         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1197                 ah->imask |= ATH9K_INT_RXHP |
1198                              ATH9K_INT_RXLP |
1199                              ATH9K_INT_BB_WATCHDOG;
1200         else
1201                 ah->imask |= ATH9K_INT_RX;
1202
1203         ah->imask |= ATH9K_INT_GTT;
1204
1205         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1206                 ah->imask |= ATH9K_INT_CST;
1207
1208         sc->sc_flags &= ~SC_OP_INVALID;
1209
1210         /* Disable BMISS interrupt when we're not associated */
1211         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1212         ath9k_hw_set_interrupts(ah, ah->imask);
1213
1214         ieee80211_wake_queues(hw);
1215
1216         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1217
1218         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1219             !ah->btcoex_hw.enabled) {
1220                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1221                                            AR_STOMP_LOW_WLAN_WGHT);
1222                 ath9k_hw_btcoex_enable(ah);
1223
1224                 if (common->bus_ops->bt_coex_prep)
1225                         common->bus_ops->bt_coex_prep(common);
1226                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1227                         ath9k_btcoex_timer_resume(sc);
1228         }
1229
1230 mutex_unlock:
1231         mutex_unlock(&sc->mutex);
1232
1233         return r;
1234 }
1235
1236 static int ath9k_tx(struct ieee80211_hw *hw,
1237                     struct sk_buff *skb)
1238 {
1239         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1240         struct ath_wiphy *aphy = hw->priv;
1241         struct ath_softc *sc = aphy->sc;
1242         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1243         struct ath_tx_control txctl;
1244         int padpos, padsize;
1245         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1246         int qnum;
1247
1248         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1249                 ath_print(common, ATH_DBG_XMIT,
1250                           "ath9k: %s: TX in unexpected wiphy state "
1251                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1252                 goto exit;
1253         }
1254
1255         if (sc->ps_enabled) {
1256                 /*
1257                  * mac80211 does not set PM field for normal data frames, so we
1258                  * need to update that based on the current PS mode.
1259                  */
1260                 if (ieee80211_is_data(hdr->frame_control) &&
1261                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1262                     !ieee80211_has_pm(hdr->frame_control)) {
1263                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1264                                   "while in PS mode\n");
1265                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1266                 }
1267         }
1268
1269         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1270                 /*
1271                  * We are using PS-Poll and mac80211 can request TX while in
1272                  * power save mode. Need to wake up hardware for the TX to be
1273                  * completed and if needed, also for RX of buffered frames.
1274                  */
1275                 ath9k_ps_wakeup(sc);
1276                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1277                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1278                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1279                         ath_print(common, ATH_DBG_PS,
1280                                   "Sending PS-Poll to pick a buffered frame\n");
1281                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1282                 } else {
1283                         ath_print(common, ATH_DBG_PS,
1284                                   "Wake up to complete TX\n");
1285                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1286                 }
1287                 /*
1288                  * The actual restore operation will happen only after
1289                  * the sc_flags bit is cleared. We are just dropping
1290                  * the ps_usecount here.
1291                  */
1292                 ath9k_ps_restore(sc);
1293         }
1294
1295         memset(&txctl, 0, sizeof(struct ath_tx_control));
1296
1297         /*
1298          * As a temporary workaround, assign seq# here; this will likely need
1299          * to be cleaned up to work better with Beacon transmission and virtual
1300          * BSSes.
1301          */
1302         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1303                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1304                         sc->tx.seq_no += 0x10;
1305                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1306                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1307         }
1308
1309         /* Add the padding after the header if this is not already done */
1310         padpos = ath9k_cmn_padpos(hdr->frame_control);
1311         padsize = padpos & 3;
1312         if (padsize && skb->len>padpos) {
1313                 if (skb_headroom(skb) < padsize)
1314                         return -1;
1315                 skb_push(skb, padsize);
1316                 memmove(skb->data, skb->data + padsize, padpos);
1317         }
1318
1319         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1320         txctl.txq = &sc->tx.txq[qnum];
1321
1322         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1323
1324         if (ath_tx_start(hw, skb, &txctl) != 0) {
1325                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1326                 goto exit;
1327         }
1328
1329         return 0;
1330 exit:
1331         dev_kfree_skb_any(skb);
1332         return 0;
1333 }
1334
1335 static void ath9k_stop(struct ieee80211_hw *hw)
1336 {
1337         struct ath_wiphy *aphy = hw->priv;
1338         struct ath_softc *sc = aphy->sc;
1339         struct ath_hw *ah = sc->sc_ah;
1340         struct ath_common *common = ath9k_hw_common(ah);
1341         int i;
1342
1343         mutex_lock(&sc->mutex);
1344
1345         aphy->state = ATH_WIPHY_INACTIVE;
1346
1347         if (led_blink)
1348                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1349
1350         cancel_delayed_work_sync(&sc->tx_complete_work);
1351         cancel_work_sync(&sc->paprd_work);
1352         cancel_work_sync(&sc->hw_check_work);
1353
1354         for (i = 0; i < sc->num_sec_wiphy; i++) {
1355                 if (sc->sec_wiphy[i])
1356                         break;
1357         }
1358
1359         if (i == sc->num_sec_wiphy) {
1360                 cancel_delayed_work_sync(&sc->wiphy_work);
1361                 cancel_work_sync(&sc->chan_work);
1362         }
1363
1364         if (sc->sc_flags & SC_OP_INVALID) {
1365                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1366                 mutex_unlock(&sc->mutex);
1367                 return;
1368         }
1369
1370         if (ath9k_wiphy_started(sc)) {
1371                 mutex_unlock(&sc->mutex);
1372                 return; /* another wiphy still in use */
1373         }
1374
1375         /* Ensure HW is awake when we try to shut it down. */
1376         ath9k_ps_wakeup(sc);
1377
1378         if (ah->btcoex_hw.enabled) {
1379                 ath9k_hw_btcoex_disable(ah);
1380                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1381                         ath9k_btcoex_timer_pause(sc);
1382         }
1383
1384         /* make sure h/w will not generate any interrupt
1385          * before setting the invalid flag. */
1386         ath9k_hw_disable_interrupts(ah);
1387
1388         if (!(sc->sc_flags & SC_OP_INVALID)) {
1389                 ath_drain_all_txq(sc, false);
1390                 spin_lock_bh(&sc->sc_pcu_lock);
1391                 ath_stoprecv(sc);
1392                 ath9k_hw_phy_disable(ah);
1393                 spin_unlock_bh(&sc->sc_pcu_lock);
1394         } else {
1395                 spin_lock_bh(&sc->sc_pcu_lock);
1396                 sc->rx.rxlink = NULL;
1397                 spin_unlock_bh(&sc->sc_pcu_lock);
1398         }
1399
1400         /* disable HAL and put h/w to sleep */
1401         ath9k_hw_disable(ah);
1402         ath9k_hw_configpcipowersave(ah, 1, 1);
1403         ath9k_ps_restore(sc);
1404
1405         /* Finally, put the chip in FULL SLEEP mode */
1406         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1407
1408         sc->sc_flags |= SC_OP_INVALID;
1409
1410         mutex_unlock(&sc->mutex);
1411
1412         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1413 }
1414
1415 static int ath9k_add_interface(struct ieee80211_hw *hw,
1416                                struct ieee80211_vif *vif)
1417 {
1418         struct ath_wiphy *aphy = hw->priv;
1419         struct ath_softc *sc = aphy->sc;
1420         struct ath_hw *ah = sc->sc_ah;
1421         struct ath_common *common = ath9k_hw_common(ah);
1422         struct ath_vif *avp = (void *)vif->drv_priv;
1423         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1424         int ret = 0;
1425
1426         mutex_lock(&sc->mutex);
1427
1428         switch (vif->type) {
1429         case NL80211_IFTYPE_STATION:
1430                 ic_opmode = NL80211_IFTYPE_STATION;
1431                 break;
1432         case NL80211_IFTYPE_WDS:
1433                 ic_opmode = NL80211_IFTYPE_WDS;
1434                 break;
1435         case NL80211_IFTYPE_ADHOC:
1436         case NL80211_IFTYPE_AP:
1437         case NL80211_IFTYPE_MESH_POINT:
1438                 if (sc->nbcnvifs >= ATH_BCBUF) {
1439                         ret = -ENOBUFS;
1440                         goto out;
1441                 }
1442                 ic_opmode = vif->type;
1443                 break;
1444         default:
1445                 ath_print(common, ATH_DBG_FATAL,
1446                         "Interface type %d not yet supported\n", vif->type);
1447                 ret = -EOPNOTSUPP;
1448                 goto out;
1449         }
1450
1451         ath_print(common, ATH_DBG_CONFIG,
1452                   "Attach a VIF of type: %d\n", ic_opmode);
1453
1454         /* Set the VIF opmode */
1455         avp->av_opmode = ic_opmode;
1456         avp->av_bslot = -1;
1457
1458         sc->nvifs++;
1459
1460         ath9k_set_bssid_mask(hw, vif);
1461
1462         if (sc->nvifs > 1)
1463                 goto out; /* skip global settings for secondary vif */
1464
1465         if (ic_opmode == NL80211_IFTYPE_AP) {
1466                 ath9k_hw_set_tsfadjust(ah, 1);
1467                 sc->sc_flags |= SC_OP_TSF_RESET;
1468         }
1469
1470         /* Set the device opmode */
1471         ah->opmode = ic_opmode;
1472
1473         /*
1474          * Enable MIB interrupts when there are hardware phy counters.
1475          * Note we only do this (at the moment) for station mode.
1476          */
1477         if ((vif->type == NL80211_IFTYPE_STATION) ||
1478             (vif->type == NL80211_IFTYPE_ADHOC) ||
1479             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1480                 if (ah->config.enable_ani)
1481                         ah->imask |= ATH9K_INT_MIB;
1482                 ah->imask |= ATH9K_INT_TSFOOR;
1483         }
1484
1485         ath9k_hw_set_interrupts(ah, ah->imask);
1486
1487         if (vif->type == NL80211_IFTYPE_AP    ||
1488             vif->type == NL80211_IFTYPE_ADHOC ||
1489             vif->type == NL80211_IFTYPE_MONITOR) {
1490                 sc->sc_flags |= SC_OP_ANI_RUN;
1491                 ath_start_ani(common);
1492         }
1493
1494 out:
1495         mutex_unlock(&sc->mutex);
1496         return ret;
1497 }
1498
1499 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1500                                    struct ieee80211_vif *vif)
1501 {
1502         struct ath_wiphy *aphy = hw->priv;
1503         struct ath_softc *sc = aphy->sc;
1504         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1505         struct ath_vif *avp = (void *)vif->drv_priv;
1506         int i;
1507
1508         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1509
1510         mutex_lock(&sc->mutex);
1511
1512         /* Stop ANI */
1513         sc->sc_flags &= ~SC_OP_ANI_RUN;
1514         del_timer_sync(&common->ani.timer);
1515
1516         /* Reclaim beacon resources */
1517         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1518             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1519             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1520                 ath9k_ps_wakeup(sc);
1521                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1522                 ath9k_ps_restore(sc);
1523         }
1524
1525         ath_beacon_return(sc, avp);
1526         sc->sc_flags &= ~SC_OP_BEACONS;
1527
1528         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1529                 if (sc->beacon.bslot[i] == vif) {
1530                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1531                                "slot\n", __func__);
1532                         sc->beacon.bslot[i] = NULL;
1533                         sc->beacon.bslot_aphy[i] = NULL;
1534                 }
1535         }
1536
1537         sc->nvifs--;
1538
1539         mutex_unlock(&sc->mutex);
1540 }
1541
1542 static void ath9k_enable_ps(struct ath_softc *sc)
1543 {
1544         struct ath_hw *ah = sc->sc_ah;
1545
1546         sc->ps_enabled = true;
1547         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1548                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1549                         ah->imask |= ATH9K_INT_TIM_TIMER;
1550                         ath9k_hw_set_interrupts(ah, ah->imask);
1551                 }
1552                 ath9k_hw_setrxabort(ah, 1);
1553         }
1554 }
1555
1556 static void ath9k_disable_ps(struct ath_softc *sc)
1557 {
1558         struct ath_hw *ah = sc->sc_ah;
1559
1560         sc->ps_enabled = false;
1561         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1562         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1563                 ath9k_hw_setrxabort(ah, 0);
1564                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1565                                   PS_WAIT_FOR_CAB |
1566                                   PS_WAIT_FOR_PSPOLL_DATA |
1567                                   PS_WAIT_FOR_TX_ACK);
1568                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1569                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1570                         ath9k_hw_set_interrupts(ah, ah->imask);
1571                 }
1572         }
1573
1574 }
1575
1576 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1577 {
1578         struct ath_wiphy *aphy = hw->priv;
1579         struct ath_softc *sc = aphy->sc;
1580         struct ath_hw *ah = sc->sc_ah;
1581         struct ath_common *common = ath9k_hw_common(ah);
1582         struct ieee80211_conf *conf = &hw->conf;
1583         bool disable_radio;
1584
1585         mutex_lock(&sc->mutex);
1586
1587         /*
1588          * Leave this as the first check because we need to turn on the
1589          * radio if it was disabled before prior to processing the rest
1590          * of the changes. Likewise we must only disable the radio towards
1591          * the end.
1592          */
1593         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1594                 bool enable_radio;
1595                 bool all_wiphys_idle;
1596                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1597
1598                 spin_lock_bh(&sc->wiphy_lock);
1599                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1600                 ath9k_set_wiphy_idle(aphy, idle);
1601
1602                 enable_radio = (!idle && all_wiphys_idle);
1603
1604                 /*
1605                  * After we unlock here its possible another wiphy
1606                  * can be re-renabled so to account for that we will
1607                  * only disable the radio toward the end of this routine
1608                  * if by then all wiphys are still idle.
1609                  */
1610                 spin_unlock_bh(&sc->wiphy_lock);
1611
1612                 if (enable_radio) {
1613                         sc->ps_idle = false;
1614                         ath_radio_enable(sc, hw);
1615                         ath_print(common, ATH_DBG_CONFIG,
1616                                   "not-idle: enabling radio\n");
1617                 }
1618         }
1619
1620         /*
1621          * We just prepare to enable PS. We have to wait until our AP has
1622          * ACK'd our null data frame to disable RX otherwise we'll ignore
1623          * those ACKs and end up retransmitting the same null data frames.
1624          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1625          */
1626         if (changed & IEEE80211_CONF_CHANGE_PS) {
1627                 unsigned long flags;
1628                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1629                 if (conf->flags & IEEE80211_CONF_PS)
1630                         ath9k_enable_ps(sc);
1631                 else
1632                         ath9k_disable_ps(sc);
1633                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1634         }
1635
1636         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1637                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1638                         ath_print(common, ATH_DBG_CONFIG,
1639                                   "HW opmode set to Monitor mode\n");
1640                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1641                 }
1642         }
1643
1644         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1645                 struct ieee80211_channel *curchan = hw->conf.channel;
1646                 int pos = curchan->hw_value;
1647                 int old_pos = -1;
1648                 unsigned long flags;
1649
1650                 if (ah->curchan)
1651                         old_pos = ah->curchan - &ah->channels[0];
1652
1653                 aphy->chan_idx = pos;
1654                 aphy->chan_is_ht = conf_is_ht(conf);
1655                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1656                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1657                 else
1658                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1659
1660                 if (aphy->state == ATH_WIPHY_SCAN ||
1661                     aphy->state == ATH_WIPHY_ACTIVE)
1662                         ath9k_wiphy_pause_all_forced(sc, aphy);
1663                 else {
1664                         /*
1665                          * Do not change operational channel based on a paused
1666                          * wiphy changes.
1667                          */
1668                         goto skip_chan_change;
1669                 }
1670
1671                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1672                           curchan->center_freq);
1673
1674                 /* XXX: remove me eventualy */
1675                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1676
1677                 ath_update_chainmask(sc, conf_is_ht(conf));
1678
1679                 /* update survey stats for the old channel before switching */
1680                 spin_lock_irqsave(&common->cc_lock, flags);
1681                 ath_update_survey_stats(sc);
1682                 spin_unlock_irqrestore(&common->cc_lock, flags);
1683
1684                 /*
1685                  * If the operating channel changes, change the survey in-use flags
1686                  * along with it.
1687                  * Reset the survey data for the new channel, unless we're switching
1688                  * back to the operating channel from an off-channel operation.
1689                  */
1690                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1691                     sc->cur_survey != &sc->survey[pos]) {
1692
1693                         if (sc->cur_survey)
1694                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1695
1696                         sc->cur_survey = &sc->survey[pos];
1697
1698                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1699                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1700                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1701                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1702                 }
1703
1704                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1705                         ath_print(common, ATH_DBG_FATAL,
1706                                   "Unable to set channel\n");
1707                         mutex_unlock(&sc->mutex);
1708                         return -EINVAL;
1709                 }
1710
1711                 /*
1712                  * The most recent snapshot of channel->noisefloor for the old
1713                  * channel is only available after the hardware reset. Copy it to
1714                  * the survey stats now.
1715                  */
1716                 if (old_pos >= 0)
1717                         ath_update_survey_nf(sc, old_pos);
1718         }
1719
1720 skip_chan_change:
1721         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1722                 sc->config.txpowlimit = 2 * conf->power_level;
1723                 ath_update_txpow(sc);
1724         }
1725
1726         spin_lock_bh(&sc->wiphy_lock);
1727         disable_radio = ath9k_all_wiphys_idle(sc);
1728         spin_unlock_bh(&sc->wiphy_lock);
1729
1730         if (disable_radio) {
1731                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1732                 sc->ps_idle = true;
1733                 ath_radio_disable(sc, hw);
1734         }
1735
1736         mutex_unlock(&sc->mutex);
1737
1738         return 0;
1739 }
1740
1741 #define SUPPORTED_FILTERS                       \
1742         (FIF_PROMISC_IN_BSS |                   \
1743         FIF_ALLMULTI |                          \
1744         FIF_CONTROL |                           \
1745         FIF_PSPOLL |                            \
1746         FIF_OTHER_BSS |                         \
1747         FIF_BCN_PRBRESP_PROMISC |               \
1748         FIF_PROBE_REQ |                         \
1749         FIF_FCSFAIL)
1750
1751 /* FIXME: sc->sc_full_reset ? */
1752 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1753                                    unsigned int changed_flags,
1754                                    unsigned int *total_flags,
1755                                    u64 multicast)
1756 {
1757         struct ath_wiphy *aphy = hw->priv;
1758         struct ath_softc *sc = aphy->sc;
1759         u32 rfilt;
1760
1761         changed_flags &= SUPPORTED_FILTERS;
1762         *total_flags &= SUPPORTED_FILTERS;
1763
1764         sc->rx.rxfilter = *total_flags;
1765         ath9k_ps_wakeup(sc);
1766         rfilt = ath_calcrxfilter(sc);
1767         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1768         ath9k_ps_restore(sc);
1769
1770         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1771                   "Set HW RX filter: 0x%x\n", rfilt);
1772 }
1773
1774 static int ath9k_sta_add(struct ieee80211_hw *hw,
1775                          struct ieee80211_vif *vif,
1776                          struct ieee80211_sta *sta)
1777 {
1778         struct ath_wiphy *aphy = hw->priv;
1779         struct ath_softc *sc = aphy->sc;
1780
1781         ath_node_attach(sc, sta);
1782
1783         return 0;
1784 }
1785
1786 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1787                             struct ieee80211_vif *vif,
1788                             struct ieee80211_sta *sta)
1789 {
1790         struct ath_wiphy *aphy = hw->priv;
1791         struct ath_softc *sc = aphy->sc;
1792
1793         ath_node_detach(sc, sta);
1794
1795         return 0;
1796 }
1797
1798 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1799                          const struct ieee80211_tx_queue_params *params)
1800 {
1801         struct ath_wiphy *aphy = hw->priv;
1802         struct ath_softc *sc = aphy->sc;
1803         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1804         struct ath9k_tx_queue_info qi;
1805         int ret = 0, qnum;
1806
1807         if (queue >= WME_NUM_AC)
1808                 return 0;
1809
1810         mutex_lock(&sc->mutex);
1811
1812         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1813
1814         qi.tqi_aifs = params->aifs;
1815         qi.tqi_cwmin = params->cw_min;
1816         qi.tqi_cwmax = params->cw_max;
1817         qi.tqi_burstTime = params->txop;
1818         qnum = ath_get_hal_qnum(queue, sc);
1819
1820         ath_print(common, ATH_DBG_CONFIG,
1821                   "Configure tx [queue/halq] [%d/%d],  "
1822                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1823                   queue, qnum, params->aifs, params->cw_min,
1824                   params->cw_max, params->txop);
1825
1826         ret = ath_txq_update(sc, qnum, &qi);
1827         if (ret)
1828                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1829
1830         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1831                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1832                         ath_beaconq_config(sc);
1833
1834         mutex_unlock(&sc->mutex);
1835
1836         return ret;
1837 }
1838
1839 static int ath9k_set_key(struct ieee80211_hw *hw,
1840                          enum set_key_cmd cmd,
1841                          struct ieee80211_vif *vif,
1842                          struct ieee80211_sta *sta,
1843                          struct ieee80211_key_conf *key)
1844 {
1845         struct ath_wiphy *aphy = hw->priv;
1846         struct ath_softc *sc = aphy->sc;
1847         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1848         int ret = 0;
1849
1850         if (modparam_nohwcrypt)
1851                 return -ENOSPC;
1852
1853         mutex_lock(&sc->mutex);
1854         ath9k_ps_wakeup(sc);
1855         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1856
1857         switch (cmd) {
1858         case SET_KEY:
1859                 ret = ath_key_config(common, vif, sta, key);
1860                 if (ret >= 0) {
1861                         key->hw_key_idx = ret;
1862                         /* push IV and Michael MIC generation to stack */
1863                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1864                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1865                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1866                         if (sc->sc_ah->sw_mgmt_crypto &&
1867                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1868                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1869                         ret = 0;
1870                 }
1871                 break;
1872         case DISABLE_KEY:
1873                 ath_key_delete(common, key);
1874                 break;
1875         default:
1876                 ret = -EINVAL;
1877         }
1878
1879         ath9k_ps_restore(sc);
1880         mutex_unlock(&sc->mutex);
1881
1882         return ret;
1883 }
1884
1885 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1886                                    struct ieee80211_vif *vif,
1887                                    struct ieee80211_bss_conf *bss_conf,
1888                                    u32 changed)
1889 {
1890         struct ath_wiphy *aphy = hw->priv;
1891         struct ath_softc *sc = aphy->sc;
1892         struct ath_hw *ah = sc->sc_ah;
1893         struct ath_common *common = ath9k_hw_common(ah);
1894         struct ath_vif *avp = (void *)vif->drv_priv;
1895         int slottime;
1896         int error;
1897
1898         mutex_lock(&sc->mutex);
1899
1900         if (changed & BSS_CHANGED_BSSID) {
1901                 /* Set BSSID */
1902                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1903                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1904                 common->curaid = 0;
1905                 ath9k_hw_write_associd(ah);
1906
1907                 /* Set aggregation protection mode parameters */
1908                 sc->config.ath_aggr_prot = 0;
1909
1910                 /* Only legacy IBSS for now */
1911                 if (vif->type == NL80211_IFTYPE_ADHOC)
1912                         ath_update_chainmask(sc, 0);
1913
1914                 ath_print(common, ATH_DBG_CONFIG,
1915                           "BSSID: %pM aid: 0x%x\n",
1916                           common->curbssid, common->curaid);
1917
1918                 /* need to reconfigure the beacon */
1919                 sc->sc_flags &= ~SC_OP_BEACONS ;
1920         }
1921
1922         /* Enable transmission of beacons (AP, IBSS, MESH) */
1923         if ((changed & BSS_CHANGED_BEACON) ||
1924             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1925                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1926                 error = ath_beacon_alloc(aphy, vif);
1927                 if (!error)
1928                         ath_beacon_config(sc, vif);
1929         }
1930
1931         if (changed & BSS_CHANGED_ERP_SLOT) {
1932                 if (bss_conf->use_short_slot)
1933                         slottime = 9;
1934                 else
1935                         slottime = 20;
1936                 if (vif->type == NL80211_IFTYPE_AP) {
1937                         /*
1938                          * Defer update, so that connected stations can adjust
1939                          * their settings at the same time.
1940                          * See beacon.c for more details
1941                          */
1942                         sc->beacon.slottime = slottime;
1943                         sc->beacon.updateslot = UPDATE;
1944                 } else {
1945                         ah->slottime = slottime;
1946                         ath9k_hw_init_global_settings(ah);
1947                 }
1948         }
1949
1950         /* Disable transmission of beacons */
1951         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1952                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1953
1954         if (changed & BSS_CHANGED_BEACON_INT) {
1955                 sc->beacon_interval = bss_conf->beacon_int;
1956                 /*
1957                  * In case of AP mode, the HW TSF has to be reset
1958                  * when the beacon interval changes.
1959                  */
1960                 if (vif->type == NL80211_IFTYPE_AP) {
1961                         sc->sc_flags |= SC_OP_TSF_RESET;
1962                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1963                         error = ath_beacon_alloc(aphy, vif);
1964                         if (!error)
1965                                 ath_beacon_config(sc, vif);
1966                 } else {
1967                         ath_beacon_config(sc, vif);
1968                 }
1969         }
1970
1971         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1972                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1973                           bss_conf->use_short_preamble);
1974                 if (bss_conf->use_short_preamble)
1975                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1976                 else
1977                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1978         }
1979
1980         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1981                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1982                           bss_conf->use_cts_prot);
1983                 if (bss_conf->use_cts_prot &&
1984                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1985                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1986                 else
1987                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1988         }
1989
1990         if (changed & BSS_CHANGED_ASSOC) {
1991                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1992                         bss_conf->assoc);
1993                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1994         }
1995
1996         mutex_unlock(&sc->mutex);
1997 }
1998
1999 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2000 {
2001         u64 tsf;
2002         struct ath_wiphy *aphy = hw->priv;
2003         struct ath_softc *sc = aphy->sc;
2004
2005         mutex_lock(&sc->mutex);
2006         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2007         mutex_unlock(&sc->mutex);
2008
2009         return tsf;
2010 }
2011
2012 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2013 {
2014         struct ath_wiphy *aphy = hw->priv;
2015         struct ath_softc *sc = aphy->sc;
2016
2017         mutex_lock(&sc->mutex);
2018         ath9k_hw_settsf64(sc->sc_ah, tsf);
2019         mutex_unlock(&sc->mutex);
2020 }
2021
2022 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2023 {
2024         struct ath_wiphy *aphy = hw->priv;
2025         struct ath_softc *sc = aphy->sc;
2026
2027         mutex_lock(&sc->mutex);
2028
2029         ath9k_ps_wakeup(sc);
2030         ath9k_hw_reset_tsf(sc->sc_ah);
2031         ath9k_ps_restore(sc);
2032
2033         mutex_unlock(&sc->mutex);
2034 }
2035
2036 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2037                               struct ieee80211_vif *vif,
2038                               enum ieee80211_ampdu_mlme_action action,
2039                               struct ieee80211_sta *sta,
2040                               u16 tid, u16 *ssn)
2041 {
2042         struct ath_wiphy *aphy = hw->priv;
2043         struct ath_softc *sc = aphy->sc;
2044         int ret = 0;
2045
2046         local_bh_disable();
2047
2048         switch (action) {
2049         case IEEE80211_AMPDU_RX_START:
2050                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2051                         ret = -ENOTSUPP;
2052                 break;
2053         case IEEE80211_AMPDU_RX_STOP:
2054                 break;
2055         case IEEE80211_AMPDU_TX_START:
2056                 ath9k_ps_wakeup(sc);
2057                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2058                 if (!ret)
2059                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2060                 ath9k_ps_restore(sc);
2061                 break;
2062         case IEEE80211_AMPDU_TX_STOP:
2063                 ath9k_ps_wakeup(sc);
2064                 ath_tx_aggr_stop(sc, sta, tid);
2065                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2066                 ath9k_ps_restore(sc);
2067                 break;
2068         case IEEE80211_AMPDU_TX_OPERATIONAL:
2069                 ath9k_ps_wakeup(sc);
2070                 ath_tx_aggr_resume(sc, sta, tid);
2071                 ath9k_ps_restore(sc);
2072                 break;
2073         default:
2074                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2075                           "Unknown AMPDU action\n");
2076         }
2077
2078         local_bh_enable();
2079
2080         return ret;
2081 }
2082
2083 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2084                              struct survey_info *survey)
2085 {
2086         struct ath_wiphy *aphy = hw->priv;
2087         struct ath_softc *sc = aphy->sc;
2088         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2089         struct ieee80211_supported_band *sband;
2090         struct ieee80211_channel *chan;
2091         unsigned long flags;
2092         int pos;
2093
2094         spin_lock_irqsave(&common->cc_lock, flags);
2095         if (idx == 0)
2096                 ath_update_survey_stats(sc);
2097
2098         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2099         if (sband && idx >= sband->n_channels) {
2100                 idx -= sband->n_channels;
2101                 sband = NULL;
2102         }
2103
2104         if (!sband)
2105                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2106
2107         if (!sband || idx >= sband->n_channels) {
2108                 spin_unlock_irqrestore(&common->cc_lock, flags);
2109                 return -ENOENT;
2110         }
2111
2112         chan = &sband->channels[idx];
2113         pos = chan->hw_value;
2114         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2115         survey->channel = chan;
2116         spin_unlock_irqrestore(&common->cc_lock, flags);
2117
2118         return 0;
2119 }
2120
2121 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2122 {
2123         struct ath_wiphy *aphy = hw->priv;
2124         struct ath_softc *sc = aphy->sc;
2125
2126         mutex_lock(&sc->mutex);
2127         if (ath9k_wiphy_scanning(sc)) {
2128                 /*
2129                  * There is a race here in mac80211 but fixing it requires
2130                  * we revisit how we handle the scan complete callback.
2131                  * After mac80211 fixes we will not have configured hardware
2132                  * to the home channel nor would we have configured the RX
2133                  * filter yet.
2134                  */
2135                 mutex_unlock(&sc->mutex);
2136                 return;
2137         }
2138
2139         aphy->state = ATH_WIPHY_SCAN;
2140         ath9k_wiphy_pause_all_forced(sc, aphy);
2141         mutex_unlock(&sc->mutex);
2142 }
2143
2144 /*
2145  * XXX: this requires a revisit after the driver
2146  * scan_complete gets moved to another place/removed in mac80211.
2147  */
2148 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2149 {
2150         struct ath_wiphy *aphy = hw->priv;
2151         struct ath_softc *sc = aphy->sc;
2152
2153         mutex_lock(&sc->mutex);
2154         aphy->state = ATH_WIPHY_ACTIVE;
2155         mutex_unlock(&sc->mutex);
2156 }
2157
2158 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2159 {
2160         struct ath_wiphy *aphy = hw->priv;
2161         struct ath_softc *sc = aphy->sc;
2162         struct ath_hw *ah = sc->sc_ah;
2163
2164         mutex_lock(&sc->mutex);
2165         ah->coverage_class = coverage_class;
2166         ath9k_hw_init_global_settings(ah);
2167         mutex_unlock(&sc->mutex);
2168 }
2169
2170 struct ieee80211_ops ath9k_ops = {
2171         .tx                 = ath9k_tx,
2172         .start              = ath9k_start,
2173         .stop               = ath9k_stop,
2174         .add_interface      = ath9k_add_interface,
2175         .remove_interface   = ath9k_remove_interface,
2176         .config             = ath9k_config,
2177         .configure_filter   = ath9k_configure_filter,
2178         .sta_add            = ath9k_sta_add,
2179         .sta_remove         = ath9k_sta_remove,
2180         .conf_tx            = ath9k_conf_tx,
2181         .bss_info_changed   = ath9k_bss_info_changed,
2182         .set_key            = ath9k_set_key,
2183         .get_tsf            = ath9k_get_tsf,
2184         .set_tsf            = ath9k_set_tsf,
2185         .reset_tsf          = ath9k_reset_tsf,
2186         .ampdu_action       = ath9k_ampdu_action,
2187         .get_survey         = ath9k_get_survey,
2188         .sw_scan_start      = ath9k_sw_scan_start,
2189         .sw_scan_complete   = ath9k_sw_scan_complete,
2190         .rfkill_poll        = ath9k_rfkill_poll_state,
2191         .set_coverage_class = ath9k_set_coverage_class,
2192 };