2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
158 * Set/change channels. If the channel is really being changed, it's done
159 * by reseting the chip. To accomplish this we must first cleanup any pending
160 * DMA, then restart stuff.
162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
163 struct ath9k_channel *hchan)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath_common *common = ath9k_hw_common(ah);
167 struct ieee80211_conf *conf = &common->hw->conf;
168 bool fastcc = true, stopped;
169 struct ieee80211_channel *channel = hw->conf.channel;
172 if (sc->sc_flags & SC_OP_INVALID)
178 * This is only performed if the channel settings have
181 * To switch channels clear any pending DMA operations;
182 * wait long enough for the RX fifo to drain, reset the
183 * hardware at the new frequency, and then re-enable
184 * the relevant bits of the h/w.
186 ath9k_hw_set_interrupts(ah, 0);
187 ath_drain_all_txq(sc, false);
188 stopped = ath_stoprecv(sc);
190 /* XXX: do not flush receive queue here. We don't want
191 * to flush data frames already in queue because of
192 * changing channel. */
194 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
197 ath_print(common, ATH_DBG_CONFIG,
198 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
199 sc->sc_ah->curchan->channel,
200 channel->center_freq, conf_is_ht40(conf));
202 spin_lock_bh(&sc->sc_resetlock);
204 r = ath9k_hw_reset(ah, hchan, fastcc);
206 ath_print(common, ATH_DBG_FATAL,
207 "Unable to reset channel (%u MHz), "
209 channel->center_freq, r);
210 spin_unlock_bh(&sc->sc_resetlock);
213 spin_unlock_bh(&sc->sc_resetlock);
215 sc->sc_flags &= ~SC_OP_FULL_RESET;
217 if (ath_startrecv(sc) != 0) {
218 ath_print(common, ATH_DBG_FATAL,
219 "Unable to restart recv logic\n");
224 ath_cache_conf_rate(sc, &hw->conf);
225 ath_update_txpow(sc);
226 ath9k_hw_set_interrupts(ah, ah->imask);
229 ath9k_ps_restore(sc);
233 static void ath_paprd_activate(struct ath_softc *sc)
235 struct ath_hw *ah = sc->sc_ah;
238 if (!ah->curchan->paprd_done)
242 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
243 if (!(ah->caps.tx_chainmask & BIT(chain)))
246 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
249 ar9003_paprd_enable(ah, true);
250 ath9k_ps_restore(sc);
253 void ath_paprd_calibrate(struct work_struct *work)
255 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
256 struct ieee80211_hw *hw = sc->hw;
257 struct ath_hw *ah = sc->sc_ah;
258 struct ieee80211_hdr *hdr;
259 struct sk_buff *skb = NULL;
260 struct ieee80211_tx_info *tx_info;
261 int band = hw->conf.channel->band;
262 struct ieee80211_supported_band *sband = &sc->sbands[band];
263 struct ath_tx_control txctl;
271 skb = alloc_skb(len, GFP_KERNEL);
275 tx_info = IEEE80211_SKB_CB(skb);
278 memset(skb->data, 0, len);
279 hdr = (struct ieee80211_hdr *)skb->data;
280 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
281 hdr->frame_control = cpu_to_le16(ftype);
282 hdr->duration_id = 10;
283 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
284 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
285 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
287 memset(&txctl, 0, sizeof(txctl));
288 qnum = sc->tx.hwq_map[WME_AC_BE];
289 txctl.txq = &sc->tx.txq[qnum];
292 ar9003_paprd_init_table(ah);
293 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
294 if (!(ah->caps.tx_chainmask & BIT(chain)))
298 memset(tx_info, 0, sizeof(*tx_info));
299 tx_info->band = band;
301 for (i = 0; i < 4; i++) {
302 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
303 tx_info->control.rates[i].count = 6;
306 init_completion(&sc->paprd_complete);
307 ar9003_paprd_setup_gain_table(ah, chain);
308 txctl.paprd = BIT(chain);
309 if (ath_tx_start(hw, skb, &txctl) != 0)
312 time_left = wait_for_completion_timeout(&sc->paprd_complete,
313 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
315 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
316 "Timeout waiting for paprd training on "
322 if (!ar9003_paprd_is_done(ah))
325 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
333 ah->curchan->paprd_done = true;
334 ath_paprd_activate(sc);
338 ath9k_ps_restore(sc);
342 * This routine performs the periodic noise floor calibration function
343 * that is used to adjust and optimize the chip performance. This
344 * takes environmental changes (location, temperature) into account.
345 * When the task is complete, it reschedules itself depending on the
346 * appropriate interval that was calculated.
348 void ath_ani_calibrate(unsigned long data)
350 struct ath_softc *sc = (struct ath_softc *)data;
351 struct ath_hw *ah = sc->sc_ah;
352 struct ath_common *common = ath9k_hw_common(ah);
353 bool longcal = false;
354 bool shortcal = false;
355 bool aniflag = false;
356 unsigned int timestamp = jiffies_to_msecs(jiffies);
357 u32 cal_interval, short_cal_interval;
359 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
360 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
362 /* Only calibrate if awake */
363 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
368 /* Long calibration runs independently of short calibration. */
369 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
371 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
372 common->ani.longcal_timer = timestamp;
375 /* Short calibration applies only while caldone is false */
376 if (!common->ani.caldone) {
377 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
379 ath_print(common, ATH_DBG_ANI,
380 "shortcal @%lu\n", jiffies);
381 common->ani.shortcal_timer = timestamp;
382 common->ani.resetcal_timer = timestamp;
385 if ((timestamp - common->ani.resetcal_timer) >=
386 ATH_RESTART_CALINTERVAL) {
387 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
388 if (common->ani.caldone)
389 common->ani.resetcal_timer = timestamp;
393 /* Verify whether we must check ANI */
394 if ((timestamp - common->ani.checkani_timer) >=
395 ah->config.ani_poll_interval) {
397 common->ani.checkani_timer = timestamp;
400 /* Skip all processing if there's nothing to do. */
401 if (longcal || shortcal || aniflag) {
402 /* Call ANI routine if necessary */
404 ath9k_hw_ani_monitor(ah, ah->curchan);
406 /* Perform calibration if necessary */
407 if (longcal || shortcal) {
408 common->ani.caldone =
409 ath9k_hw_calibrate(ah,
411 common->rx_chainmask,
415 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
418 ath_print(common, ATH_DBG_ANI,
419 " calibrate chan %u/%x nf: %d\n",
420 ah->curchan->channel,
421 ah->curchan->channelFlags,
422 common->ani.noise_floor);
426 ath9k_ps_restore(sc);
430 * Set timer interval based on previous results.
431 * The interval must be the shortest necessary to satisfy ANI,
432 * short calibration and long calibration.
434 cal_interval = ATH_LONG_CALINTERVAL;
435 if (sc->sc_ah->config.enable_ani)
436 cal_interval = min(cal_interval,
437 (u32)ah->config.ani_poll_interval);
438 if (!common->ani.caldone)
439 cal_interval = min(cal_interval, (u32)short_cal_interval);
441 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
442 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
443 !(sc->sc_flags & SC_OP_SCANNING)) {
444 if (!sc->sc_ah->curchan->paprd_done)
445 ieee80211_queue_work(sc->hw, &sc->paprd_work);
447 ath_paprd_activate(sc);
451 static void ath_start_ani(struct ath_common *common)
453 struct ath_hw *ah = common->ah;
454 unsigned long timestamp = jiffies_to_msecs(jiffies);
455 struct ath_softc *sc = (struct ath_softc *) common->priv;
457 if (!(sc->sc_flags & SC_OP_ANI_RUN))
460 common->ani.longcal_timer = timestamp;
461 common->ani.shortcal_timer = timestamp;
462 common->ani.checkani_timer = timestamp;
464 mod_timer(&common->ani.timer,
466 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
470 * Update tx/rx chainmask. For legacy association,
471 * hard code chainmask to 1x1, for 11n association, use
472 * the chainmask configuration, for bt coexistence, use
473 * the chainmask configuration even in legacy mode.
475 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
477 struct ath_hw *ah = sc->sc_ah;
478 struct ath_common *common = ath9k_hw_common(ah);
480 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
481 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
482 common->tx_chainmask = ah->caps.tx_chainmask;
483 common->rx_chainmask = ah->caps.rx_chainmask;
485 common->tx_chainmask = 1;
486 common->rx_chainmask = 1;
489 ath_print(common, ATH_DBG_CONFIG,
490 "tx chmask: %d, rx chmask: %d\n",
491 common->tx_chainmask,
492 common->rx_chainmask);
495 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
499 an = (struct ath_node *)sta->drv_priv;
501 if (sc->sc_flags & SC_OP_TXAGGR) {
502 ath_tx_node_init(sc, an);
503 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
504 sta->ht_cap.ampdu_factor);
505 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
506 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
510 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
512 struct ath_node *an = (struct ath_node *)sta->drv_priv;
514 if (sc->sc_flags & SC_OP_TXAGGR)
515 ath_tx_node_cleanup(sc, an);
518 void ath_hw_check(struct work_struct *work)
520 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
525 for (i = 0; i < 3; i++) {
526 if (ath9k_hw_check_alive(sc->sc_ah))
531 ath_reset(sc, false);
534 ath9k_ps_restore(sc);
537 void ath9k_tasklet(unsigned long data)
539 struct ath_softc *sc = (struct ath_softc *)data;
540 struct ath_hw *ah = sc->sc_ah;
541 struct ath_common *common = ath9k_hw_common(ah);
543 u32 status = sc->intrstatus;
548 if (status & ATH9K_INT_FATAL) {
549 ath_reset(sc, false);
550 ath9k_ps_restore(sc);
554 if (!ath9k_hw_check_alive(ah))
555 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
557 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
558 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
561 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
563 if (status & rxmask) {
564 spin_lock_bh(&sc->rx.rxflushlock);
566 /* Check for high priority Rx first */
567 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
568 (status & ATH9K_INT_RXHP))
569 ath_rx_tasklet(sc, 0, true);
571 ath_rx_tasklet(sc, 0, false);
572 spin_unlock_bh(&sc->rx.rxflushlock);
575 if (status & ATH9K_INT_TX) {
576 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
577 ath_tx_edma_tasklet(sc);
582 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
584 * TSF sync does not look correct; remain awake to sync with
587 ath_print(common, ATH_DBG_PS,
588 "TSFOOR - Sync with next Beacon\n");
589 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
592 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
593 if (status & ATH9K_INT_GENTIMER)
594 ath_gen_timer_isr(sc->sc_ah);
596 /* re-enable hardware interrupt */
597 ath9k_hw_set_interrupts(ah, ah->imask);
598 ath9k_ps_restore(sc);
601 irqreturn_t ath_isr(int irq, void *dev)
603 #define SCHED_INTR ( \
616 struct ath_softc *sc = dev;
617 struct ath_hw *ah = sc->sc_ah;
618 enum ath9k_int status;
622 * The hardware is not ready/present, don't
623 * touch anything. Note this can happen early
624 * on if the IRQ is shared.
626 if (sc->sc_flags & SC_OP_INVALID)
630 /* shared irq, not for us */
632 if (!ath9k_hw_intrpend(ah))
636 * Figure out the reason(s) for the interrupt. Note
637 * that the hal returns a pseudo-ISR that may include
638 * bits we haven't explicitly enabled so we mask the
639 * value to insure we only process bits we requested.
641 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
642 status &= ah->imask; /* discard unasked-for bits */
645 * If there are no status bits set, then this interrupt was not
646 * for me (should have been caught above).
651 /* Cache the status */
652 sc->intrstatus = status;
654 if (status & SCHED_INTR)
658 * If a FATAL or RXORN interrupt is received, we have to reset the
661 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
662 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
665 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
666 (status & ATH9K_INT_BB_WATCHDOG)) {
667 ar9003_hw_bb_watchdog_dbg_info(ah);
671 if (status & ATH9K_INT_SWBA)
672 tasklet_schedule(&sc->bcon_tasklet);
674 if (status & ATH9K_INT_TXURN)
675 ath9k_hw_updatetxtriglevel(ah, true);
677 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
678 if (status & ATH9K_INT_RXEOL) {
679 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
680 ath9k_hw_set_interrupts(ah, ah->imask);
684 if (status & ATH9K_INT_MIB) {
686 * Disable interrupts until we service the MIB
687 * interrupt; otherwise it will continue to
690 ath9k_hw_set_interrupts(ah, 0);
692 * Let the hal handle the event. We assume
693 * it will clear whatever condition caused
696 ath9k_hw_procmibevent(ah);
697 ath9k_hw_set_interrupts(ah, ah->imask);
700 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
701 if (status & ATH9K_INT_TIM_TIMER) {
702 /* Clear RxAbort bit so that we can
704 ath9k_setpower(sc, ATH9K_PM_AWAKE);
705 ath9k_hw_setrxabort(sc->sc_ah, 0);
706 sc->ps_flags |= PS_WAIT_FOR_BEACON;
711 ath_debug_stat_interrupt(sc, status);
714 /* turn off every interrupt except SWBA */
715 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
716 tasklet_schedule(&sc->intr_tq);
724 static u32 ath_get_extchanmode(struct ath_softc *sc,
725 struct ieee80211_channel *chan,
726 enum nl80211_channel_type channel_type)
730 switch (chan->band) {
731 case IEEE80211_BAND_2GHZ:
732 switch(channel_type) {
733 case NL80211_CHAN_NO_HT:
734 case NL80211_CHAN_HT20:
735 chanmode = CHANNEL_G_HT20;
737 case NL80211_CHAN_HT40PLUS:
738 chanmode = CHANNEL_G_HT40PLUS;
740 case NL80211_CHAN_HT40MINUS:
741 chanmode = CHANNEL_G_HT40MINUS;
745 case IEEE80211_BAND_5GHZ:
746 switch(channel_type) {
747 case NL80211_CHAN_NO_HT:
748 case NL80211_CHAN_HT20:
749 chanmode = CHANNEL_A_HT20;
751 case NL80211_CHAN_HT40PLUS:
752 chanmode = CHANNEL_A_HT40PLUS;
754 case NL80211_CHAN_HT40MINUS:
755 chanmode = CHANNEL_A_HT40MINUS;
766 static void ath9k_bss_assoc_info(struct ath_softc *sc,
767 struct ieee80211_vif *vif,
768 struct ieee80211_bss_conf *bss_conf)
770 struct ath_hw *ah = sc->sc_ah;
771 struct ath_common *common = ath9k_hw_common(ah);
773 if (bss_conf->assoc) {
774 ath_print(common, ATH_DBG_CONFIG,
775 "Bss Info ASSOC %d, bssid: %pM\n",
776 bss_conf->aid, common->curbssid);
778 /* New association, store aid */
779 common->curaid = bss_conf->aid;
780 ath9k_hw_write_associd(ah);
783 * Request a re-configuration of Beacon related timers
784 * on the receipt of the first Beacon frame (i.e.,
785 * after time sync with the AP).
787 sc->ps_flags |= PS_BEACON_SYNC;
789 /* Configure the beacon */
790 ath_beacon_config(sc, vif);
792 /* Reset rssi stats */
793 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
795 sc->sc_flags |= SC_OP_ANI_RUN;
796 ath_start_ani(common);
798 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
801 sc->sc_flags &= ~SC_OP_ANI_RUN;
802 del_timer_sync(&common->ani.timer);
806 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
808 struct ath_hw *ah = sc->sc_ah;
809 struct ath_common *common = ath9k_hw_common(ah);
810 struct ieee80211_channel *channel = hw->conf.channel;
814 ath9k_hw_configpcipowersave(ah, 0, 0);
817 ah->curchan = ath_get_curchannel(sc, sc->hw);
819 spin_lock_bh(&sc->sc_resetlock);
820 r = ath9k_hw_reset(ah, ah->curchan, false);
822 ath_print(common, ATH_DBG_FATAL,
823 "Unable to reset channel (%u MHz), "
825 channel->center_freq, r);
827 spin_unlock_bh(&sc->sc_resetlock);
829 ath_update_txpow(sc);
830 if (ath_startrecv(sc) != 0) {
831 ath_print(common, ATH_DBG_FATAL,
832 "Unable to restart recv logic\n");
836 if (sc->sc_flags & SC_OP_BEACONS)
837 ath_beacon_config(sc, NULL); /* restart beacons */
839 /* Re-Enable interrupts */
840 ath9k_hw_set_interrupts(ah, ah->imask);
843 ath9k_hw_cfg_output(ah, ah->led_pin,
844 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
845 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
847 ieee80211_wake_queues(hw);
848 ath9k_ps_restore(sc);
851 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
853 struct ath_hw *ah = sc->sc_ah;
854 struct ieee80211_channel *channel = hw->conf.channel;
858 ieee80211_stop_queues(hw);
861 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
862 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
864 /* Disable interrupts */
865 ath9k_hw_set_interrupts(ah, 0);
867 ath_drain_all_txq(sc, false); /* clear pending tx frames */
868 ath_stoprecv(sc); /* turn off frame recv */
869 ath_flushrecv(sc); /* flush recv queue */
872 ah->curchan = ath_get_curchannel(sc, hw);
874 spin_lock_bh(&sc->sc_resetlock);
875 r = ath9k_hw_reset(ah, ah->curchan, false);
877 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
878 "Unable to reset channel (%u MHz), "
880 channel->center_freq, r);
882 spin_unlock_bh(&sc->sc_resetlock);
884 ath9k_hw_phy_disable(ah);
885 ath9k_hw_configpcipowersave(ah, 1, 1);
886 ath9k_ps_restore(sc);
887 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
890 int ath_reset(struct ath_softc *sc, bool retry_tx)
892 struct ath_hw *ah = sc->sc_ah;
893 struct ath_common *common = ath9k_hw_common(ah);
894 struct ieee80211_hw *hw = sc->hw;
898 del_timer_sync(&common->ani.timer);
900 ieee80211_stop_queues(hw);
902 ath9k_hw_set_interrupts(ah, 0);
903 ath_drain_all_txq(sc, retry_tx);
907 spin_lock_bh(&sc->sc_resetlock);
908 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
910 ath_print(common, ATH_DBG_FATAL,
911 "Unable to reset hardware; reset status %d\n", r);
912 spin_unlock_bh(&sc->sc_resetlock);
914 if (ath_startrecv(sc) != 0)
915 ath_print(common, ATH_DBG_FATAL,
916 "Unable to start recv logic\n");
919 * We may be doing a reset in response to a request
920 * that changes the channel so update any state that
921 * might change as a result.
923 ath_cache_conf_rate(sc, &hw->conf);
925 ath_update_txpow(sc);
927 if (sc->sc_flags & SC_OP_BEACONS)
928 ath_beacon_config(sc, NULL); /* restart beacons */
930 ath9k_hw_set_interrupts(ah, ah->imask);
934 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
935 if (ATH_TXQ_SETUP(sc, i)) {
936 spin_lock_bh(&sc->tx.txq[i].axq_lock);
937 ath_txq_schedule(sc, &sc->tx.txq[i]);
938 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
943 ieee80211_wake_queues(hw);
946 ath_start_ani(common);
951 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
957 qnum = sc->tx.hwq_map[WME_AC_VO];
960 qnum = sc->tx.hwq_map[WME_AC_VI];
963 qnum = sc->tx.hwq_map[WME_AC_BE];
966 qnum = sc->tx.hwq_map[WME_AC_BK];
969 qnum = sc->tx.hwq_map[WME_AC_BE];
976 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1001 /* XXX: Remove me once we don't depend on ath9k_channel for all
1002 * this redundant data */
1003 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1004 struct ath9k_channel *ichan)
1006 struct ieee80211_channel *chan = hw->conf.channel;
1007 struct ieee80211_conf *conf = &hw->conf;
1009 ichan->channel = chan->center_freq;
1012 if (chan->band == IEEE80211_BAND_2GHZ) {
1013 ichan->chanmode = CHANNEL_G;
1014 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1016 ichan->chanmode = CHANNEL_A;
1017 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1020 if (conf_is_ht(conf))
1021 ichan->chanmode = ath_get_extchanmode(sc, chan,
1022 conf->channel_type);
1025 /**********************/
1026 /* mac80211 callbacks */
1027 /**********************/
1029 static int ath9k_start(struct ieee80211_hw *hw)
1031 struct ath_wiphy *aphy = hw->priv;
1032 struct ath_softc *sc = aphy->sc;
1033 struct ath_hw *ah = sc->sc_ah;
1034 struct ath_common *common = ath9k_hw_common(ah);
1035 struct ieee80211_channel *curchan = hw->conf.channel;
1036 struct ath9k_channel *init_channel;
1039 ath_print(common, ATH_DBG_CONFIG,
1040 "Starting driver with initial channel: %d MHz\n",
1041 curchan->center_freq);
1043 mutex_lock(&sc->mutex);
1045 if (ath9k_wiphy_started(sc)) {
1046 if (sc->chan_idx == curchan->hw_value) {
1048 * Already on the operational channel, the new wiphy
1049 * can be marked active.
1051 aphy->state = ATH_WIPHY_ACTIVE;
1052 ieee80211_wake_queues(hw);
1055 * Another wiphy is on another channel, start the new
1056 * wiphy in paused state.
1058 aphy->state = ATH_WIPHY_PAUSED;
1059 ieee80211_stop_queues(hw);
1061 mutex_unlock(&sc->mutex);
1064 aphy->state = ATH_WIPHY_ACTIVE;
1066 /* setup initial channel */
1068 sc->chan_idx = curchan->hw_value;
1070 init_channel = ath_get_curchannel(sc, hw);
1072 /* Reset SERDES registers */
1073 ath9k_hw_configpcipowersave(ah, 0, 0);
1076 * The basic interface to setting the hardware in a good
1077 * state is ``reset''. On return the hardware is known to
1078 * be powered up and with interrupts disabled. This must
1079 * be followed by initialization of the appropriate bits
1080 * and then setup of the interrupt mask.
1082 spin_lock_bh(&sc->sc_resetlock);
1083 r = ath9k_hw_reset(ah, init_channel, false);
1085 ath_print(common, ATH_DBG_FATAL,
1086 "Unable to reset hardware; reset status %d "
1087 "(freq %u MHz)\n", r,
1088 curchan->center_freq);
1089 spin_unlock_bh(&sc->sc_resetlock);
1092 spin_unlock_bh(&sc->sc_resetlock);
1095 * This is needed only to setup initial state
1096 * but it's best done after a reset.
1098 ath_update_txpow(sc);
1101 * Setup the hardware after reset:
1102 * The receive engine is set going.
1103 * Frame transmit is handled entirely
1104 * in the frame output path; there's nothing to do
1105 * here except setup the interrupt mask.
1107 if (ath_startrecv(sc) != 0) {
1108 ath_print(common, ATH_DBG_FATAL,
1109 "Unable to start recv logic\n");
1114 /* Setup our intr mask. */
1115 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1116 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1119 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1120 ah->imask |= ATH9K_INT_RXHP |
1122 ATH9K_INT_BB_WATCHDOG;
1124 ah->imask |= ATH9K_INT_RX;
1126 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1127 ah->imask |= ATH9K_INT_GTT;
1129 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1130 ah->imask |= ATH9K_INT_CST;
1132 ath_cache_conf_rate(sc, &hw->conf);
1134 sc->sc_flags &= ~SC_OP_INVALID;
1136 /* Disable BMISS interrupt when we're not associated */
1137 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1138 ath9k_hw_set_interrupts(ah, ah->imask);
1140 ieee80211_wake_queues(hw);
1142 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1144 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1145 !ah->btcoex_hw.enabled) {
1146 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1147 AR_STOMP_LOW_WLAN_WGHT);
1148 ath9k_hw_btcoex_enable(ah);
1150 if (common->bus_ops->bt_coex_prep)
1151 common->bus_ops->bt_coex_prep(common);
1152 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1153 ath9k_btcoex_timer_resume(sc);
1157 mutex_unlock(&sc->mutex);
1162 static int ath9k_tx(struct ieee80211_hw *hw,
1163 struct sk_buff *skb)
1165 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1166 struct ath_wiphy *aphy = hw->priv;
1167 struct ath_softc *sc = aphy->sc;
1168 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1169 struct ath_tx_control txctl;
1170 int padpos, padsize;
1171 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1174 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1175 ath_print(common, ATH_DBG_XMIT,
1176 "ath9k: %s: TX in unexpected wiphy state "
1177 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1181 if (sc->ps_enabled) {
1183 * mac80211 does not set PM field for normal data frames, so we
1184 * need to update that based on the current PS mode.
1186 if (ieee80211_is_data(hdr->frame_control) &&
1187 !ieee80211_is_nullfunc(hdr->frame_control) &&
1188 !ieee80211_has_pm(hdr->frame_control)) {
1189 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1190 "while in PS mode\n");
1191 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1195 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1197 * We are using PS-Poll and mac80211 can request TX while in
1198 * power save mode. Need to wake up hardware for the TX to be
1199 * completed and if needed, also for RX of buffered frames.
1201 ath9k_ps_wakeup(sc);
1202 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1203 ath9k_hw_setrxabort(sc->sc_ah, 0);
1204 if (ieee80211_is_pspoll(hdr->frame_control)) {
1205 ath_print(common, ATH_DBG_PS,
1206 "Sending PS-Poll to pick a buffered frame\n");
1207 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1209 ath_print(common, ATH_DBG_PS,
1210 "Wake up to complete TX\n");
1211 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1214 * The actual restore operation will happen only after
1215 * the sc_flags bit is cleared. We are just dropping
1216 * the ps_usecount here.
1218 ath9k_ps_restore(sc);
1221 memset(&txctl, 0, sizeof(struct ath_tx_control));
1224 * As a temporary workaround, assign seq# here; this will likely need
1225 * to be cleaned up to work better with Beacon transmission and virtual
1228 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1229 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1230 sc->tx.seq_no += 0x10;
1231 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1232 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1235 /* Add the padding after the header if this is not already done */
1236 padpos = ath9k_cmn_padpos(hdr->frame_control);
1237 padsize = padpos & 3;
1238 if (padsize && skb->len>padpos) {
1239 if (skb_headroom(skb) < padsize)
1241 skb_push(skb, padsize);
1242 memmove(skb->data, skb->data + padsize, padpos);
1245 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1246 txctl.txq = &sc->tx.txq[qnum];
1248 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1250 if (ath_tx_start(hw, skb, &txctl) != 0) {
1251 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1257 dev_kfree_skb_any(skb);
1261 static void ath9k_stop(struct ieee80211_hw *hw)
1263 struct ath_wiphy *aphy = hw->priv;
1264 struct ath_softc *sc = aphy->sc;
1265 struct ath_hw *ah = sc->sc_ah;
1266 struct ath_common *common = ath9k_hw_common(ah);
1268 mutex_lock(&sc->mutex);
1270 aphy->state = ATH_WIPHY_INACTIVE;
1273 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1275 cancel_delayed_work_sync(&sc->tx_complete_work);
1276 cancel_work_sync(&sc->paprd_work);
1277 cancel_work_sync(&sc->hw_check_work);
1279 if (!sc->num_sec_wiphy) {
1280 cancel_delayed_work_sync(&sc->wiphy_work);
1281 cancel_work_sync(&sc->chan_work);
1284 if (sc->sc_flags & SC_OP_INVALID) {
1285 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1286 mutex_unlock(&sc->mutex);
1290 if (ath9k_wiphy_started(sc)) {
1291 mutex_unlock(&sc->mutex);
1292 return; /* another wiphy still in use */
1295 /* Ensure HW is awake when we try to shut it down. */
1296 ath9k_ps_wakeup(sc);
1298 if (ah->btcoex_hw.enabled) {
1299 ath9k_hw_btcoex_disable(ah);
1300 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1301 ath9k_btcoex_timer_pause(sc);
1304 /* make sure h/w will not generate any interrupt
1305 * before setting the invalid flag. */
1306 ath9k_hw_set_interrupts(ah, 0);
1308 if (!(sc->sc_flags & SC_OP_INVALID)) {
1309 ath_drain_all_txq(sc, false);
1311 ath9k_hw_phy_disable(ah);
1313 sc->rx.rxlink = NULL;
1315 /* disable HAL and put h/w to sleep */
1316 ath9k_hw_disable(ah);
1317 ath9k_hw_configpcipowersave(ah, 1, 1);
1318 ath9k_ps_restore(sc);
1320 /* Finally, put the chip in FULL SLEEP mode */
1321 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1323 sc->sc_flags |= SC_OP_INVALID;
1325 mutex_unlock(&sc->mutex);
1327 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1330 static int ath9k_add_interface(struct ieee80211_hw *hw,
1331 struct ieee80211_vif *vif)
1333 struct ath_wiphy *aphy = hw->priv;
1334 struct ath_softc *sc = aphy->sc;
1335 struct ath_hw *ah = sc->sc_ah;
1336 struct ath_common *common = ath9k_hw_common(ah);
1337 struct ath_vif *avp = (void *)vif->drv_priv;
1338 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1341 mutex_lock(&sc->mutex);
1343 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1349 switch (vif->type) {
1350 case NL80211_IFTYPE_STATION:
1351 ic_opmode = NL80211_IFTYPE_STATION;
1353 case NL80211_IFTYPE_ADHOC:
1354 case NL80211_IFTYPE_AP:
1355 case NL80211_IFTYPE_MESH_POINT:
1356 if (sc->nbcnvifs >= ATH_BCBUF) {
1360 ic_opmode = vif->type;
1363 ath_print(common, ATH_DBG_FATAL,
1364 "Interface type %d not yet supported\n", vif->type);
1369 ath_print(common, ATH_DBG_CONFIG,
1370 "Attach a VIF of type: %d\n", ic_opmode);
1372 /* Set the VIF opmode */
1373 avp->av_opmode = ic_opmode;
1378 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1379 ath9k_set_bssid_mask(hw);
1382 goto out; /* skip global settings for secondary vif */
1384 if (ic_opmode == NL80211_IFTYPE_AP) {
1385 ath9k_hw_set_tsfadjust(ah, 1);
1386 sc->sc_flags |= SC_OP_TSF_RESET;
1389 /* Set the device opmode */
1390 ah->opmode = ic_opmode;
1393 * Enable MIB interrupts when there are hardware phy counters.
1394 * Note we only do this (at the moment) for station mode.
1396 if ((vif->type == NL80211_IFTYPE_STATION) ||
1397 (vif->type == NL80211_IFTYPE_ADHOC) ||
1398 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1399 if (ah->config.enable_ani)
1400 ah->imask |= ATH9K_INT_MIB;
1401 ah->imask |= ATH9K_INT_TSFOOR;
1404 ath9k_hw_set_interrupts(ah, ah->imask);
1406 if (vif->type == NL80211_IFTYPE_AP ||
1407 vif->type == NL80211_IFTYPE_ADHOC ||
1408 vif->type == NL80211_IFTYPE_MONITOR) {
1409 sc->sc_flags |= SC_OP_ANI_RUN;
1410 ath_start_ani(common);
1414 mutex_unlock(&sc->mutex);
1418 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1419 struct ieee80211_vif *vif)
1421 struct ath_wiphy *aphy = hw->priv;
1422 struct ath_softc *sc = aphy->sc;
1423 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1424 struct ath_vif *avp = (void *)vif->drv_priv;
1427 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1429 mutex_lock(&sc->mutex);
1432 sc->sc_flags &= ~SC_OP_ANI_RUN;
1433 del_timer_sync(&common->ani.timer);
1435 /* Reclaim beacon resources */
1436 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1437 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1438 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1439 ath9k_ps_wakeup(sc);
1440 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1441 ath9k_ps_restore(sc);
1444 ath_beacon_return(sc, avp);
1445 sc->sc_flags &= ~SC_OP_BEACONS;
1447 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1448 if (sc->beacon.bslot[i] == vif) {
1449 printk(KERN_DEBUG "%s: vif had allocated beacon "
1450 "slot\n", __func__);
1451 sc->beacon.bslot[i] = NULL;
1452 sc->beacon.bslot_aphy[i] = NULL;
1458 mutex_unlock(&sc->mutex);
1461 void ath9k_enable_ps(struct ath_softc *sc)
1463 struct ath_hw *ah = sc->sc_ah;
1465 sc->ps_enabled = true;
1466 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1467 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1468 ah->imask |= ATH9K_INT_TIM_TIMER;
1469 ath9k_hw_set_interrupts(ah, ah->imask);
1471 ath9k_hw_setrxabort(ah, 1);
1475 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1477 struct ath_wiphy *aphy = hw->priv;
1478 struct ath_softc *sc = aphy->sc;
1479 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1480 struct ieee80211_conf *conf = &hw->conf;
1481 struct ath_hw *ah = sc->sc_ah;
1484 mutex_lock(&sc->mutex);
1487 * Leave this as the first check because we need to turn on the
1488 * radio if it was disabled before prior to processing the rest
1489 * of the changes. Likewise we must only disable the radio towards
1492 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1494 bool all_wiphys_idle;
1495 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1497 spin_lock_bh(&sc->wiphy_lock);
1498 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1499 ath9k_set_wiphy_idle(aphy, idle);
1501 enable_radio = (!idle && all_wiphys_idle);
1504 * After we unlock here its possible another wiphy
1505 * can be re-renabled so to account for that we will
1506 * only disable the radio toward the end of this routine
1507 * if by then all wiphys are still idle.
1509 spin_unlock_bh(&sc->wiphy_lock);
1512 sc->ps_idle = false;
1513 ath_radio_enable(sc, hw);
1514 ath_print(common, ATH_DBG_CONFIG,
1515 "not-idle: enabling radio\n");
1520 * We just prepare to enable PS. We have to wait until our AP has
1521 * ACK'd our null data frame to disable RX otherwise we'll ignore
1522 * those ACKs and end up retransmitting the same null data frames.
1523 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1525 if (changed & IEEE80211_CONF_CHANGE_PS) {
1526 if (conf->flags & IEEE80211_CONF_PS) {
1527 sc->ps_flags |= PS_ENABLED;
1529 * At this point we know hardware has received an ACK
1530 * of a previously sent null data frame.
1532 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1533 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1534 ath9k_enable_ps(sc);
1537 sc->ps_enabled = false;
1538 sc->ps_flags &= ~(PS_ENABLED |
1539 PS_NULLFUNC_COMPLETED);
1540 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1541 if (!(ah->caps.hw_caps &
1542 ATH9K_HW_CAP_AUTOSLEEP)) {
1543 ath9k_hw_setrxabort(sc->sc_ah, 0);
1544 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1546 PS_WAIT_FOR_PSPOLL_DATA |
1547 PS_WAIT_FOR_TX_ACK);
1548 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1549 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1550 ath9k_hw_set_interrupts(sc->sc_ah,
1557 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1558 if (conf->flags & IEEE80211_CONF_MONITOR) {
1559 ath_print(common, ATH_DBG_CONFIG,
1560 "HW opmode set to Monitor mode\n");
1561 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1565 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1566 struct ieee80211_channel *curchan = hw->conf.channel;
1567 int pos = curchan->hw_value;
1569 aphy->chan_idx = pos;
1570 aphy->chan_is_ht = conf_is_ht(conf);
1572 if (aphy->state == ATH_WIPHY_SCAN ||
1573 aphy->state == ATH_WIPHY_ACTIVE)
1574 ath9k_wiphy_pause_all_forced(sc, aphy);
1577 * Do not change operational channel based on a paused
1580 goto skip_chan_change;
1583 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1584 curchan->center_freq);
1586 /* XXX: remove me eventualy */
1587 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1589 ath_update_chainmask(sc, conf_is_ht(conf));
1591 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1592 ath_print(common, ATH_DBG_FATAL,
1593 "Unable to set channel\n");
1594 mutex_unlock(&sc->mutex);
1600 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1601 sc->config.txpowlimit = 2 * conf->power_level;
1602 ath_update_txpow(sc);
1605 spin_lock_bh(&sc->wiphy_lock);
1606 disable_radio = ath9k_all_wiphys_idle(sc);
1607 spin_unlock_bh(&sc->wiphy_lock);
1609 if (disable_radio) {
1610 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1612 ath_radio_disable(sc, hw);
1615 mutex_unlock(&sc->mutex);
1620 #define SUPPORTED_FILTERS \
1621 (FIF_PROMISC_IN_BSS | \
1626 FIF_BCN_PRBRESP_PROMISC | \
1629 /* FIXME: sc->sc_full_reset ? */
1630 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1631 unsigned int changed_flags,
1632 unsigned int *total_flags,
1635 struct ath_wiphy *aphy = hw->priv;
1636 struct ath_softc *sc = aphy->sc;
1639 changed_flags &= SUPPORTED_FILTERS;
1640 *total_flags &= SUPPORTED_FILTERS;
1642 sc->rx.rxfilter = *total_flags;
1643 ath9k_ps_wakeup(sc);
1644 rfilt = ath_calcrxfilter(sc);
1645 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1646 ath9k_ps_restore(sc);
1648 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1649 "Set HW RX filter: 0x%x\n", rfilt);
1652 static int ath9k_sta_add(struct ieee80211_hw *hw,
1653 struct ieee80211_vif *vif,
1654 struct ieee80211_sta *sta)
1656 struct ath_wiphy *aphy = hw->priv;
1657 struct ath_softc *sc = aphy->sc;
1659 ath_node_attach(sc, sta);
1664 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1665 struct ieee80211_vif *vif,
1666 struct ieee80211_sta *sta)
1668 struct ath_wiphy *aphy = hw->priv;
1669 struct ath_softc *sc = aphy->sc;
1671 ath_node_detach(sc, sta);
1676 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1677 const struct ieee80211_tx_queue_params *params)
1679 struct ath_wiphy *aphy = hw->priv;
1680 struct ath_softc *sc = aphy->sc;
1681 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1682 struct ath9k_tx_queue_info qi;
1685 if (queue >= WME_NUM_AC)
1688 mutex_lock(&sc->mutex);
1690 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1692 qi.tqi_aifs = params->aifs;
1693 qi.tqi_cwmin = params->cw_min;
1694 qi.tqi_cwmax = params->cw_max;
1695 qi.tqi_burstTime = params->txop;
1696 qnum = ath_get_hal_qnum(queue, sc);
1698 ath_print(common, ATH_DBG_CONFIG,
1699 "Configure tx [queue/halq] [%d/%d], "
1700 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1701 queue, qnum, params->aifs, params->cw_min,
1702 params->cw_max, params->txop);
1704 ret = ath_txq_update(sc, qnum, &qi);
1706 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1708 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1709 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1710 ath_beaconq_config(sc);
1712 mutex_unlock(&sc->mutex);
1717 static int ath9k_set_key(struct ieee80211_hw *hw,
1718 enum set_key_cmd cmd,
1719 struct ieee80211_vif *vif,
1720 struct ieee80211_sta *sta,
1721 struct ieee80211_key_conf *key)
1723 struct ath_wiphy *aphy = hw->priv;
1724 struct ath_softc *sc = aphy->sc;
1725 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1728 if (modparam_nohwcrypt)
1731 mutex_lock(&sc->mutex);
1732 ath9k_ps_wakeup(sc);
1733 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1737 ret = ath9k_cmn_key_config(common, vif, sta, key);
1739 key->hw_key_idx = ret;
1740 /* push IV and Michael MIC generation to stack */
1741 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1742 if (key->alg == ALG_TKIP)
1743 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1744 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1745 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1750 ath9k_cmn_key_delete(common, key);
1756 ath9k_ps_restore(sc);
1757 mutex_unlock(&sc->mutex);
1762 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1763 struct ieee80211_vif *vif,
1764 struct ieee80211_bss_conf *bss_conf,
1767 struct ath_wiphy *aphy = hw->priv;
1768 struct ath_softc *sc = aphy->sc;
1769 struct ath_hw *ah = sc->sc_ah;
1770 struct ath_common *common = ath9k_hw_common(ah);
1771 struct ath_vif *avp = (void *)vif->drv_priv;
1775 mutex_lock(&sc->mutex);
1777 if (changed & BSS_CHANGED_BSSID) {
1779 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1780 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1782 ath9k_hw_write_associd(ah);
1784 /* Set aggregation protection mode parameters */
1785 sc->config.ath_aggr_prot = 0;
1787 /* Only legacy IBSS for now */
1788 if (vif->type == NL80211_IFTYPE_ADHOC)
1789 ath_update_chainmask(sc, 0);
1791 ath_print(common, ATH_DBG_CONFIG,
1792 "BSSID: %pM aid: 0x%x\n",
1793 common->curbssid, common->curaid);
1795 /* need to reconfigure the beacon */
1796 sc->sc_flags &= ~SC_OP_BEACONS ;
1799 /* Enable transmission of beacons (AP, IBSS, MESH) */
1800 if ((changed & BSS_CHANGED_BEACON) ||
1801 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1802 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1803 error = ath_beacon_alloc(aphy, vif);
1805 ath_beacon_config(sc, vif);
1808 if (changed & BSS_CHANGED_ERP_SLOT) {
1809 if (bss_conf->use_short_slot)
1813 if (vif->type == NL80211_IFTYPE_AP) {
1815 * Defer update, so that connected stations can adjust
1816 * their settings at the same time.
1817 * See beacon.c for more details
1819 sc->beacon.slottime = slottime;
1820 sc->beacon.updateslot = UPDATE;
1822 ah->slottime = slottime;
1823 ath9k_hw_init_global_settings(ah);
1827 /* Disable transmission of beacons */
1828 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1829 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1831 if (changed & BSS_CHANGED_BEACON_INT) {
1832 sc->beacon_interval = bss_conf->beacon_int;
1834 * In case of AP mode, the HW TSF has to be reset
1835 * when the beacon interval changes.
1837 if (vif->type == NL80211_IFTYPE_AP) {
1838 sc->sc_flags |= SC_OP_TSF_RESET;
1839 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1840 error = ath_beacon_alloc(aphy, vif);
1842 ath_beacon_config(sc, vif);
1844 ath_beacon_config(sc, vif);
1848 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1849 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1850 bss_conf->use_short_preamble);
1851 if (bss_conf->use_short_preamble)
1852 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1854 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1857 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1858 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1859 bss_conf->use_cts_prot);
1860 if (bss_conf->use_cts_prot &&
1861 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1862 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1864 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1867 if (changed & BSS_CHANGED_ASSOC) {
1868 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1870 ath9k_bss_assoc_info(sc, vif, bss_conf);
1873 mutex_unlock(&sc->mutex);
1876 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1879 struct ath_wiphy *aphy = hw->priv;
1880 struct ath_softc *sc = aphy->sc;
1882 mutex_lock(&sc->mutex);
1883 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1884 mutex_unlock(&sc->mutex);
1889 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1891 struct ath_wiphy *aphy = hw->priv;
1892 struct ath_softc *sc = aphy->sc;
1894 mutex_lock(&sc->mutex);
1895 ath9k_hw_settsf64(sc->sc_ah, tsf);
1896 mutex_unlock(&sc->mutex);
1899 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1901 struct ath_wiphy *aphy = hw->priv;
1902 struct ath_softc *sc = aphy->sc;
1904 mutex_lock(&sc->mutex);
1906 ath9k_ps_wakeup(sc);
1907 ath9k_hw_reset_tsf(sc->sc_ah);
1908 ath9k_ps_restore(sc);
1910 mutex_unlock(&sc->mutex);
1913 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1914 struct ieee80211_vif *vif,
1915 enum ieee80211_ampdu_mlme_action action,
1916 struct ieee80211_sta *sta,
1919 struct ath_wiphy *aphy = hw->priv;
1920 struct ath_softc *sc = aphy->sc;
1926 case IEEE80211_AMPDU_RX_START:
1927 if (!(sc->sc_flags & SC_OP_RXAGGR))
1930 case IEEE80211_AMPDU_RX_STOP:
1932 case IEEE80211_AMPDU_TX_START:
1933 ath9k_ps_wakeup(sc);
1934 ath_tx_aggr_start(sc, sta, tid, ssn);
1935 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1936 ath9k_ps_restore(sc);
1938 case IEEE80211_AMPDU_TX_STOP:
1939 ath9k_ps_wakeup(sc);
1940 ath_tx_aggr_stop(sc, sta, tid);
1941 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1942 ath9k_ps_restore(sc);
1944 case IEEE80211_AMPDU_TX_OPERATIONAL:
1945 ath9k_ps_wakeup(sc);
1946 ath_tx_aggr_resume(sc, sta, tid);
1947 ath9k_ps_restore(sc);
1950 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1951 "Unknown AMPDU action\n");
1959 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1960 struct survey_info *survey)
1962 struct ath_wiphy *aphy = hw->priv;
1963 struct ath_softc *sc = aphy->sc;
1964 struct ath_hw *ah = sc->sc_ah;
1965 struct ath_common *common = ath9k_hw_common(ah);
1966 struct ieee80211_conf *conf = &hw->conf;
1971 survey->channel = conf->channel;
1972 survey->filled = SURVEY_INFO_NOISE_DBM;
1973 survey->noise = common->ani.noise_floor;
1978 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1980 struct ath_wiphy *aphy = hw->priv;
1981 struct ath_softc *sc = aphy->sc;
1982 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1984 mutex_lock(&sc->mutex);
1985 if (ath9k_wiphy_scanning(sc)) {
1986 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1989 * Do not allow the concurrent scanning state for now. This
1990 * could be improved with scanning control moved into ath9k.
1992 mutex_unlock(&sc->mutex);
1996 aphy->state = ATH_WIPHY_SCAN;
1997 ath9k_wiphy_pause_all_forced(sc, aphy);
1998 sc->sc_flags |= SC_OP_SCANNING;
1999 del_timer_sync(&common->ani.timer);
2000 cancel_work_sync(&sc->paprd_work);
2001 cancel_work_sync(&sc->hw_check_work);
2002 cancel_delayed_work_sync(&sc->tx_complete_work);
2003 mutex_unlock(&sc->mutex);
2006 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2008 struct ath_wiphy *aphy = hw->priv;
2009 struct ath_softc *sc = aphy->sc;
2010 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2012 mutex_lock(&sc->mutex);
2013 aphy->state = ATH_WIPHY_ACTIVE;
2014 sc->sc_flags &= ~SC_OP_SCANNING;
2015 sc->sc_flags |= SC_OP_FULL_RESET;
2016 ath_start_ani(common);
2017 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2018 ath_beacon_config(sc, NULL);
2019 mutex_unlock(&sc->mutex);
2022 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2024 struct ath_wiphy *aphy = hw->priv;
2025 struct ath_softc *sc = aphy->sc;
2026 struct ath_hw *ah = sc->sc_ah;
2028 mutex_lock(&sc->mutex);
2029 ah->coverage_class = coverage_class;
2030 ath9k_hw_init_global_settings(ah);
2031 mutex_unlock(&sc->mutex);
2034 struct ieee80211_ops ath9k_ops = {
2036 .start = ath9k_start,
2038 .add_interface = ath9k_add_interface,
2039 .remove_interface = ath9k_remove_interface,
2040 .config = ath9k_config,
2041 .configure_filter = ath9k_configure_filter,
2042 .sta_add = ath9k_sta_add,
2043 .sta_remove = ath9k_sta_remove,
2044 .conf_tx = ath9k_conf_tx,
2045 .bss_info_changed = ath9k_bss_info_changed,
2046 .set_key = ath9k_set_key,
2047 .get_tsf = ath9k_get_tsf,
2048 .set_tsf = ath9k_set_tsf,
2049 .reset_tsf = ath9k_reset_tsf,
2050 .ampdu_action = ath9k_ampdu_action,
2051 .get_survey = ath9k_get_survey,
2052 .sw_scan_start = ath9k_sw_scan_start,
2053 .sw_scan_complete = ath9k_sw_scan_complete,
2054 .rfkill_poll = ath9k_rfkill_poll_state,
2055 .set_coverage_class = ath9k_set_coverage_class,