drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96
  97         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  98         if (++sc->ps_usecount != 1)
  99                 goto unlock;
 100
 101         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 102
 103         /*
 104          * While the hardware is asleep, the cycle counters contain no
 105          * useful data. Better clear them now so that they don't mess up
 106          * survey data results.
 107          */
 108         spin_lock(&common->cc_lock);
 109         ath_hw_cycle_counters_update(common);
 110         memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 111         spin_unlock(&common->cc_lock);
 112
 113  unlock:
 114         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 115 }
 116
 117 void ath9k_ps_restore(struct ath_softc *sc)
 118 {
 119         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 123         if (--sc->ps_usecount != 0)
 124                 goto unlock;
 125
 126         spin_lock(&common->cc_lock);
 127         ath_hw_cycle_counters_update(common);
 128         spin_unlock(&common->cc_lock);
 129
 130         if (sc->ps_idle)
 131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 132         else if (sc->ps_enabled &&
 133                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 134                               PS_WAIT_FOR_CAB |
 135                               PS_WAIT_FOR_PSPOLL_DATA |
 136                               PS_WAIT_FOR_TX_ACK)))
 137                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 static void ath_start_ani(struct ath_common *common)
 144 {
 145         struct ath_hw *ah = common->ah;
 146         unsigned long timestamp = jiffies_to_msecs(jiffies);
 147         struct ath_softc *sc = (struct ath_softc *) common->priv;
 148
 149         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 150                 return;
 151
 152         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 153                 return;
 154
 155         common->ani.longcal_timer = timestamp;
 156         common->ani.shortcal_timer = timestamp;
 157         common->ani.checkani_timer = timestamp;
 158
 159         mod_timer(&common->ani.timer,
 160                   jiffies +
 161                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 162 }
 163
 164 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 165 {
 166         struct ath_hw *ah = sc->sc_ah;
 167         struct ath9k_channel *chan = &ah->channels[channel];
 168         struct survey_info *survey = &sc->survey[channel];
 169
 170         if (chan->noisefloor) {
 171                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 172                 survey->noise = chan->noisefloor;
 173         }
 174 }
 175
 176 static void ath_update_survey_stats(struct ath_softc *sc)
 177 {
 178         struct ath_hw *ah = sc->sc_ah;
 179         struct ath_common *common = ath9k_hw_common(ah);
 180         int pos = ah->curchan - &ah->channels[0];
 181         struct survey_info *survey = &sc->survey[pos];
 182         struct ath_cycle_counters *cc = &common->cc_survey;
 183         unsigned int div = common->clockrate * 1000;
 184
 185         if (!ah->curchan)
 186                 return;
 187
 188         if (ah->power_mode == ATH9K_PM_AWAKE)
 189                 ath_hw_cycle_counters_update(common);
 190
 191         if (cc->cycles > 0) {
 192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 194                         SURVEY_INFO_CHANNEL_TIME_RX |
 195                         SURVEY_INFO_CHANNEL_TIME_TX;
 196                 survey->channel_time += cc->cycles / div;
 197                 survey->channel_time_busy += cc->rx_busy / div;
 198                 survey->channel_time_rx += cc->rx_frame / div;
 199                 survey->channel_time_tx += cc->tx_frame / div;
 200         }
 201         memset(cc, 0, sizeof(*cc));
 202
 203         ath_update_survey_nf(sc, pos);
 204 }
 205
 206 /*
 207  * Set/change channels.  If the channel is really being changed, it's done
 208  * by reseting the chip.  To accomplish this we must first cleanup any pending
 209  * DMA, then restart stuff.
 210 */
 211 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 212                     struct ath9k_channel *hchan)
 213 {
 214         struct ath_wiphy *aphy = hw->priv;
 215         struct ath_hw *ah = sc->sc_ah;
 216         struct ath_common *common = ath9k_hw_common(ah);
 217         struct ieee80211_conf *conf = &common->hw->conf;
 218         bool fastcc = true, stopped;
 219         struct ieee80211_channel *channel = hw->conf.channel;
 220         struct ath9k_hw_cal_data *caldata = NULL;
 221         int r;
 222
 223         if (sc->sc_flags & SC_OP_INVALID)
 224                 return -EIO;
 225
 226         del_timer_sync(&common->ani.timer);
 227         cancel_work_sync(&sc->paprd_work);
 228         cancel_work_sync(&sc->hw_check_work);
 229         cancel_delayed_work_sync(&sc->tx_complete_work);
 230
 231         ath9k_ps_wakeup(sc);
 232
 233         spin_lock_bh(&sc->sc_pcu_lock);
 234
 235         /*
 236          * This is only performed if the channel settings have
 237          * actually changed.
 238          *
 239          * To switch channels clear any pending DMA operations;
 240          * wait long enough for the RX fifo to drain, reset the
 241          * hardware at the new frequency, and then re-enable
 242          * the relevant bits of the h/w.
 243          */
 244         ath9k_hw_disable_interrupts(ah);
 245         ath_drain_all_txq(sc, false);
 246
 247         stopped = ath_stoprecv(sc);
 248
 249         /* XXX: do not flush receive queue here. We don't want
 250          * to flush data frames already in queue because of
 251          * changing channel. */
 252
 253         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 254                 fastcc = false;
 255
 256         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 257                 caldata = &aphy->caldata;
 258
 259         ath_print(common, ATH_DBG_CONFIG,
 260                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 261                   sc->sc_ah->curchan->channel,
 262                   channel->center_freq, conf_is_ht40(conf),
 263                   fastcc);
 264
 265         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 266         if (r) {
 267                 ath_print(common, ATH_DBG_FATAL,
 268                           "Unable to reset channel (%u MHz), "
 269                           "reset status %d\n",
 270                           channel->center_freq, r);
 271                 goto ps_restore;
 272         }
 273
 274         if (ath_startrecv(sc) != 0) {
 275                 ath_print(common, ATH_DBG_FATAL,
 276                           "Unable to restart recv logic\n");
 277                 r = -EIO;
 278                 goto ps_restore;
 279         }
 280
 281         ath_update_txpow(sc);
 282         ath9k_hw_set_interrupts(ah, ah->imask);
 283
 284         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 285                 ath_beacon_config(sc, NULL);
 286                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 287                 ath_start_ani(common);
 288         }
 289
 290  ps_restore:
 291         spin_unlock_bh(&sc->sc_pcu_lock);
 292
 293         ath9k_ps_restore(sc);
 294         return r;
 295 }
 296
 297 static void ath_paprd_activate(struct ath_softc *sc)
 298 {
 299         struct ath_hw *ah = sc->sc_ah;
 300         struct ath9k_hw_cal_data *caldata = ah->caldata;
 301         struct ath_common *common = ath9k_hw_common(ah);
 302         int chain;
 303
 304         if (!caldata || !caldata->paprd_done)
 305                 return;
 306
 307         ath9k_ps_wakeup(sc);
 308         ar9003_paprd_enable(ah, false);
 309         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 310                 if (!(common->tx_chainmask & BIT(chain)))
 311                         continue;
 312
 313                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 314         }
 315
 316         ar9003_paprd_enable(ah, true);
 317         ath9k_ps_restore(sc);
 318 }
 319
 320 void ath_paprd_calibrate(struct work_struct *work)
 321 {
 322         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 323         struct ieee80211_hw *hw = sc->hw;
 324         struct ath_hw *ah = sc->sc_ah;
 325         struct ieee80211_hdr *hdr;
 326         struct sk_buff *skb = NULL;
 327         struct ieee80211_tx_info *tx_info;
 328         int band = hw->conf.channel->band;
 329         struct ieee80211_supported_band *sband = &sc->sbands[band];
 330         struct ath_tx_control txctl;
 331         struct ath9k_hw_cal_data *caldata = ah->caldata;
 332         struct ath_common *common = ath9k_hw_common(ah);
 333         int ftype;
 334         int chain_ok = 0;
 335         int chain;
 336         int len = 1800;
 337         int time_left;
 338         int i;
 339
 340         if (!caldata)
 341                 return;
 342
 343         skb = alloc_skb(len, GFP_KERNEL);
 344         if (!skb)
 345                 return;
 346
 347         tx_info = IEEE80211_SKB_CB(skb);
 348
 349         skb_put(skb, len);
 350         memset(skb->data, 0, len);
 351         hdr = (struct ieee80211_hdr *)skb->data;
 352         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 353         hdr->frame_control = cpu_to_le16(ftype);
 354         hdr->duration_id = cpu_to_le16(10);
 355         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 356         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 357         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 358
 359         memset(&txctl, 0, sizeof(txctl));
 360         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 361
 362         ath9k_ps_wakeup(sc);
 363         ar9003_paprd_init_table(ah);
 364         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 365                 if (!(common->tx_chainmask & BIT(chain)))
 366                         continue;
 367
 368                 chain_ok = 0;
 369                 memset(tx_info, 0, sizeof(*tx_info));
 370                 tx_info->band = band;
 371
 372                 for (i = 0; i < 4; i++) {
 373                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 374                         tx_info->control.rates[i].count = 6;
 375                 }
 376
 377                 init_completion(&sc->paprd_complete);
 378                 sc->paprd_pending = true;
 379                 ar9003_paprd_setup_gain_table(ah, chain);
 380                 txctl.paprd = BIT(chain);
 381                 if (ath_tx_start(hw, skb, &txctl) != 0)
 382                         break;
 383
 384                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 385                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 386                 sc->paprd_pending = false;
 387                 if (!time_left) {
 388                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 389                                   "Timeout waiting for paprd training on "
 390                                   "TX chain %d\n",
 391                                   chain);
 392                         goto fail_paprd;
 393                 }
 394
 395                 if (!ar9003_paprd_is_done(ah))
 396                         break;
 397
 398                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 399                         break;
 400
 401                 chain_ok = 1;
 402         }
 403         kfree_skb(skb);
 404
 405         if (chain_ok) {
 406                 caldata->paprd_done = true;
 407                 ath_paprd_activate(sc);
 408         }
 409
 410 fail_paprd:
 411         ath9k_ps_restore(sc);
 412 }
 413
 414 /*
 415  *  This routine performs the periodic noise floor calibration function
 416  *  that is used to adjust and optimize the chip performance.  This
 417  *  takes environmental changes (location, temperature) into account.
 418  *  When the task is complete, it reschedules itself depending on the
 419  *  appropriate interval that was calculated.
 420  */
 421 void ath_ani_calibrate(unsigned long data)
 422 {
 423         struct ath_softc *sc = (struct ath_softc *)data;
 424         struct ath_hw *ah = sc->sc_ah;
 425         struct ath_common *common = ath9k_hw_common(ah);
 426         bool longcal = false;
 427         bool shortcal = false;
 428         bool aniflag = false;
 429         unsigned int timestamp = jiffies_to_msecs(jiffies);
 430         u32 cal_interval, short_cal_interval, long_cal_interval;
 431         unsigned long flags;
 432
 433         if (ah->caldata && ah->caldata->nfcal_interference)
 434                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 435         else
 436                 long_cal_interval = ATH_LONG_CALINTERVAL;
 437
 438         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 439                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 440
 441         /* Only calibrate if awake */
 442         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 443                 goto set_timer;
 444
 445         ath9k_ps_wakeup(sc);
 446
 447         /* Long calibration runs independently of short calibration. */
 448         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 449                 longcal = true;
 450                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 451                 common->ani.longcal_timer = timestamp;
 452         }
 453
 454         /* Short calibration applies only while caldone is false */
 455         if (!common->ani.caldone) {
 456                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 457                         shortcal = true;
 458                         ath_print(common, ATH_DBG_ANI,
 459                                   "shortcal @%lu\n", jiffies);
 460                         common->ani.shortcal_timer = timestamp;
 461                         common->ani.resetcal_timer = timestamp;
 462                 }
 463         } else {
 464                 if ((timestamp - common->ani.resetcal_timer) >=
 465                     ATH_RESTART_CALINTERVAL) {
 466                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 467                         if (common->ani.caldone)
 468                                 common->ani.resetcal_timer = timestamp;
 469                 }
 470         }
 471
 472         /* Verify whether we must check ANI */
 473         if ((timestamp - common->ani.checkani_timer) >=
 474              ah->config.ani_poll_interval) {
 475                 aniflag = true;
 476                 common->ani.checkani_timer = timestamp;
 477         }
 478
 479         /* Skip all processing if there's nothing to do. */
 480         if (longcal || shortcal || aniflag) {
 481                 /* Call ANI routine if necessary */
 482                 if (aniflag) {
 483                         spin_lock_irqsave(&common->cc_lock, flags);
 484                         ath9k_hw_ani_monitor(ah, ah->curchan);
 485                         ath_update_survey_stats(sc);
 486                         spin_unlock_irqrestore(&common->cc_lock, flags);
 487                 }
 488
 489                 /* Perform calibration if necessary */
 490                 if (longcal || shortcal) {
 491                         common->ani.caldone =
 492                                 ath9k_hw_calibrate(ah,
 493                                                    ah->curchan,
 494                                                    common->rx_chainmask,
 495                                                    longcal);
 496                 }
 497         }
 498
 499         ath9k_ps_restore(sc);
 500
 501 set_timer:
 502         /*
 503         * Set timer interval based on previous results.
 504         * The interval must be the shortest necessary to satisfy ANI,
 505         * short calibration and long calibration.
 506         */
 507         cal_interval = ATH_LONG_CALINTERVAL;
 508         if (sc->sc_ah->config.enable_ani)
 509                 cal_interval = min(cal_interval,
 510                                    (u32)ah->config.ani_poll_interval);
 511         if (!common->ani.caldone)
 512                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 513
 514         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 515         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 516                 if (!ah->caldata->paprd_done)
 517                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 518                 else
 519                         ath_paprd_activate(sc);
 520         }
 521 }
 522
 523 /*
 524  * Update tx/rx chainmask. For legacy association,
 525  * hard code chainmask to 1x1, for 11n association, use
 526  * the chainmask configuration, for bt coexistence, use
 527  * the chainmask configuration even in legacy mode.
 528  */
 529 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 530 {
 531         struct ath_hw *ah = sc->sc_ah;
 532         struct ath_common *common = ath9k_hw_common(ah);
 533
 534         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 535             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 536                 common->tx_chainmask = ah->caps.tx_chainmask;
 537                 common->rx_chainmask = ah->caps.rx_chainmask;
 538         } else {
 539                 common->tx_chainmask = 1;
 540                 common->rx_chainmask = 1;
 541         }
 542
 543         ath_print(common, ATH_DBG_CONFIG,
 544                   "tx chmask: %d, rx chmask: %d\n",
 545                   common->tx_chainmask,
 546                   common->rx_chainmask);
 547 }
 548
 549 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 550 {
 551         struct ath_node *an;
 552
 553         an = (struct ath_node *)sta->drv_priv;
 554
 555         if (sc->sc_flags & SC_OP_TXAGGR) {
 556                 ath_tx_node_init(sc, an);
 557                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 558                                      sta->ht_cap.ampdu_factor);
 559                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 560         }
 561 }
 562
 563 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 564 {
 565         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 566
 567         if (sc->sc_flags & SC_OP_TXAGGR)
 568                 ath_tx_node_cleanup(sc, an);
 569 }
 570
 571 void ath_hw_check(struct work_struct *work)
 572 {
 573         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 574         int i;
 575
 576         ath9k_ps_wakeup(sc);
 577
 578         for (i = 0; i < 3; i++) {
 579                 if (ath9k_hw_check_alive(sc->sc_ah))
 580                         goto out;
 581
 582                 msleep(1);
 583         }
 584         ath_reset(sc, true);
 585
 586 out:
 587         ath9k_ps_restore(sc);
 588 }
 589
 590 void ath9k_tasklet(unsigned long data)
 591 {
 592         struct ath_softc *sc = (struct ath_softc *)data;
 593         struct ath_hw *ah = sc->sc_ah;
 594         struct ath_common *common = ath9k_hw_common(ah);
 595
 596         u32 status = sc->intrstatus;
 597         u32 rxmask;
 598
 599         ath9k_ps_wakeup(sc);
 600
 601         if (status & ATH9K_INT_FATAL) {
 602                 ath_reset(sc, true);
 603                 ath9k_ps_restore(sc);
 604                 return;
 605         }
 606
 607         spin_lock_bh(&sc->sc_pcu_lock);
 608
 609         if (!ath9k_hw_check_alive(ah))
 610                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 611
 612         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 613                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 614                           ATH9K_INT_RXORN);
 615         else
 616                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 617
 618         if (status & rxmask) {
 619                 /* Check for high priority Rx first */
 620                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 621                     (status & ATH9K_INT_RXHP))
 622                         ath_rx_tasklet(sc, 0, true);
 623
 624                 ath_rx_tasklet(sc, 0, false);
 625         }
 626
 627         if (status & ATH9K_INT_TX) {
 628                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 629                         ath_tx_edma_tasklet(sc);
 630                 else
 631                         ath_tx_tasklet(sc);
 632         }
 633
 634         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 635                 /*
 636                  * TSF sync does not look correct; remain awake to sync with
 637                  * the next Beacon.
 638                  */
 639                 ath_print(common, ATH_DBG_PS,
 640                           "TSFOOR - Sync with next Beacon\n");
 641                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 642         }
 643
 644         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 645                 if (status & ATH9K_INT_GENTIMER)
 646                         ath_gen_timer_isr(sc->sc_ah);
 647
 648         /* re-enable hardware interrupt */
 649         ath9k_hw_enable_interrupts(ah);
 650
 651         spin_unlock_bh(&sc->sc_pcu_lock);
 652         ath9k_ps_restore(sc);
 653 }
 654
 655 irqreturn_t ath_isr(int irq, void *dev)
 656 {
 657 #define SCHED_INTR (                            \
 658                 ATH9K_INT_FATAL |               \
 659                 ATH9K_INT_RXORN |               \
 660                 ATH9K_INT_RXEOL |               \
 661                 ATH9K_INT_RX |                  \
 662                 ATH9K_INT_RXLP |                \
 663                 ATH9K_INT_RXHP |                \
 664                 ATH9K_INT_TX |                  \
 665                 ATH9K_INT_BMISS |               \
 666                 ATH9K_INT_CST |                 \
 667                 ATH9K_INT_TSFOOR |              \
 668                 ATH9K_INT_GENTIMER)
 669
 670         struct ath_softc *sc = dev;
 671         struct ath_hw *ah = sc->sc_ah;
 672         struct ath_common *common = ath9k_hw_common(ah);
 673         enum ath9k_int status;
 674         bool sched = false;
 675
 676         /*
 677          * The hardware is not ready/present, don't
 678          * touch anything. Note this can happen early
 679          * on if the IRQ is shared.
 680          */
 681         if (sc->sc_flags & SC_OP_INVALID)
 682                 return IRQ_NONE;
 683
 684
 685         /* shared irq, not for us */
 686
 687         if (!ath9k_hw_intrpend(ah))
 688                 return IRQ_NONE;
 689
 690         /*
 691          * Figure out the reason(s) for the interrupt.  Note
 692          * that the hal returns a pseudo-ISR that may include
 693          * bits we haven't explicitly enabled so we mask the
 694          * value to insure we only process bits we requested.
 695          */
 696         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 697         status &= ah->imask;    /* discard unasked-for bits */
 698
 699         /*
 700          * If there are no status bits set, then this interrupt was not
 701          * for me (should have been caught above).
 702          */
 703         if (!status)
 704                 return IRQ_NONE;
 705
 706         /* Cache the status */
 707         sc->intrstatus = status;
 708
 709         if (status & SCHED_INTR)
 710                 sched = true;
 711
 712         /*
 713          * If a FATAL or RXORN interrupt is received, we have to reset the
 714          * chip immediately.
 715          */
 716         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 717             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 718                 goto chip_reset;
 719
 720         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 721             (status & ATH9K_INT_BB_WATCHDOG)) {
 722
 723                 spin_lock(&common->cc_lock);
 724                 ath_hw_cycle_counters_update(common);
 725                 ar9003_hw_bb_watchdog_dbg_info(ah);
 726                 spin_unlock(&common->cc_lock);
 727
 728                 goto chip_reset;
 729         }
 730
 731         if (status & ATH9K_INT_SWBA)
 732                 tasklet_schedule(&sc->bcon_tasklet);
 733
 734         if (status & ATH9K_INT_TXURN)
 735                 ath9k_hw_updatetxtriglevel(ah, true);
 736
 737         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 738                 if (status & ATH9K_INT_RXEOL) {
 739                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 740                         ath9k_hw_set_interrupts(ah, ah->imask);
 741                 }
 742         }
 743
 744         if (status & ATH9K_INT_MIB) {
 745                 /*
 746                  * Disable interrupts until we service the MIB
 747                  * interrupt; otherwise it will continue to
 748                  * fire.
 749                  */
 750                 ath9k_hw_disable_interrupts(ah);
 751                 /*
 752                  * Let the hal handle the event. We assume
 753                  * it will clear whatever condition caused
 754                  * the interrupt.
 755                  */
 756                 spin_lock(&common->cc_lock);
 757                 ath9k_hw_proc_mib_event(ah);
 758                 spin_unlock(&common->cc_lock);
 759                 ath9k_hw_enable_interrupts(ah);
 760         }
 761
 762         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 763                 if (status & ATH9K_INT_TIM_TIMER) {
 764                         /* Clear RxAbort bit so that we can
 765                          * receive frames */
 766                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 767                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 768                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 769                 }
 770
 771 chip_reset:
 772
 773         ath_debug_stat_interrupt(sc, status);
 774
 775         if (sched) {
 776                 /* turn off every interrupt */
 777                 ath9k_hw_disable_interrupts(ah);
 778                 tasklet_schedule(&sc->intr_tq);
 779         }
 780
 781         return IRQ_HANDLED;
 782
 783 #undef SCHED_INTR
 784 }
 785
 786 static u32 ath_get_extchanmode(struct ath_softc *sc,
 787                                struct ieee80211_channel *chan,
 788                                enum nl80211_channel_type channel_type)
 789 {
 790         u32 chanmode = 0;
 791
 792         switch (chan->band) {
 793         case IEEE80211_BAND_2GHZ:
 794                 switch(channel_type) {
 795                 case NL80211_CHAN_NO_HT:
 796                 case NL80211_CHAN_HT20:
 797                         chanmode = CHANNEL_G_HT20;
 798                         break;
 799                 case NL80211_CHAN_HT40PLUS:
 800                         chanmode = CHANNEL_G_HT40PLUS;
 801                         break;
 802                 case NL80211_CHAN_HT40MINUS:
 803                         chanmode = CHANNEL_G_HT40MINUS;
 804                         break;
 805                 }
 806                 break;
 807         case IEEE80211_BAND_5GHZ:
 808                 switch(channel_type) {
 809                 case NL80211_CHAN_NO_HT:
 810                 case NL80211_CHAN_HT20:
 811                         chanmode = CHANNEL_A_HT20;
 812                         break;
 813                 case NL80211_CHAN_HT40PLUS:
 814                         chanmode = CHANNEL_A_HT40PLUS;
 815                         break;
 816                 case NL80211_CHAN_HT40MINUS:
 817                         chanmode = CHANNEL_A_HT40MINUS;
 818                         break;
 819                 }
 820                 break;
 821         default:
 822                 break;
 823         }
 824
 825         return chanmode;
 826 }
 827
 828 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 829                                  struct ieee80211_hw *hw,
 830                                  struct ieee80211_vif *vif,
 831                                  struct ieee80211_bss_conf *bss_conf)
 832 {
 833         struct ath_wiphy *aphy = hw->priv;
 834         struct ath_hw *ah = sc->sc_ah;
 835         struct ath_common *common = ath9k_hw_common(ah);
 836
 837         if (bss_conf->assoc) {
 838                 ath_print(common, ATH_DBG_CONFIG,
 839                           "Bss Info ASSOC %d, bssid: %pM\n",
 840                            bss_conf->aid, common->curbssid);
 841
 842                 /* New association, store aid */
 843                 common->curaid = bss_conf->aid;
 844                 ath9k_hw_write_associd(ah);
 845
 846                 /*
 847                  * Request a re-configuration of Beacon related timers
 848                  * on the receipt of the first Beacon frame (i.e.,
 849                  * after time sync with the AP).
 850                  */
 851                 sc->ps_flags |= PS_BEACON_SYNC;
 852
 853                 /* Configure the beacon */
 854                 ath_beacon_config(sc, vif);
 855
 856                 /* Reset rssi stats */
 857                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 858                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 859
 860                 sc->sc_flags |= SC_OP_ANI_RUN;
 861                 ath_start_ani(common);
 862         } else {
 863                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 864                 common->curaid = 0;
 865                 /* Stop ANI */
 866                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 867                 del_timer_sync(&common->ani.timer);
 868         }
 869 }
 870
 871 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 872 {
 873         struct ath_hw *ah = sc->sc_ah;
 874         struct ath_common *common = ath9k_hw_common(ah);
 875         struct ieee80211_channel *channel = hw->conf.channel;
 876         int r;
 877
 878         ath9k_ps_wakeup(sc);
 879         spin_lock_bh(&sc->sc_pcu_lock);
 880
 881         ath9k_hw_configpcipowersave(ah, 0, 0);
 882
 883         if (!ah->curchan)
 884                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 885
 886         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 887         if (r) {
 888                 ath_print(common, ATH_DBG_FATAL,
 889                           "Unable to reset channel (%u MHz), "
 890                           "reset status %d\n",
 891                           channel->center_freq, r);
 892         }
 893
 894         ath_update_txpow(sc);
 895         if (ath_startrecv(sc) != 0) {
 896                 ath_print(common, ATH_DBG_FATAL,
 897                           "Unable to restart recv logic\n");
 898                 spin_unlock_bh(&sc->sc_pcu_lock);
 899                 return;
 900         }
 901         if (sc->sc_flags & SC_OP_BEACONS)
 902                 ath_beacon_config(sc, NULL);    /* restart beacons */
 903
 904         /* Re-Enable  interrupts */
 905         ath9k_hw_set_interrupts(ah, ah->imask);
 906
 907         /* Enable LED */
 908         ath9k_hw_cfg_output(ah, ah->led_pin,
 909                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 910         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 911
 912         ieee80211_wake_queues(hw);
 913         spin_unlock_bh(&sc->sc_pcu_lock);
 914
 915         ath9k_ps_restore(sc);
 916 }
 917
 918 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 919 {
 920         struct ath_hw *ah = sc->sc_ah;
 921         struct ieee80211_channel *channel = hw->conf.channel;
 922         int r;
 923
 924         ath9k_ps_wakeup(sc);
 925         spin_lock_bh(&sc->sc_pcu_lock);
 926
 927         ieee80211_stop_queues(hw);
 928
 929         /*
 930          * Keep the LED on when the radio is disabled
 931          * during idle unassociated state.
 932          */
 933         if (!sc->ps_idle) {
 934                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 935                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 936         }
 937
 938         /* Disable interrupts */
 939         ath9k_hw_disable_interrupts(ah);
 940
 941         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 942
 943         ath_stoprecv(sc);               /* turn off frame recv */
 944         ath_flushrecv(sc);              /* flush recv queue */
 945
 946         if (!ah->curchan)
 947                 ah->curchan = ath_get_curchannel(sc, hw);
 948
 949         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 950         if (r) {
 951                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 952                           "Unable to reset channel (%u MHz), "
 953                           "reset status %d\n",
 954                           channel->center_freq, r);
 955         }
 956
 957         ath9k_hw_phy_disable(ah);
 958
 959         ath9k_hw_configpcipowersave(ah, 1, 1);
 960
 961         spin_unlock_bh(&sc->sc_pcu_lock);
 962         ath9k_ps_restore(sc);
 963
 964         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 965 }
 966
 967 int ath_reset(struct ath_softc *sc, bool retry_tx)
 968 {
 969         struct ath_hw *ah = sc->sc_ah;
 970         struct ath_common *common = ath9k_hw_common(ah);
 971         struct ieee80211_hw *hw = sc->hw;
 972         int r;
 973
 974         /* Stop ANI */
 975         del_timer_sync(&common->ani.timer);
 976
 977         spin_lock_bh(&sc->sc_pcu_lock);
 978
 979         ieee80211_stop_queues(hw);
 980
 981         ath9k_hw_disable_interrupts(ah);
 982         ath_drain_all_txq(sc, retry_tx);
 983
 984         ath_stoprecv(sc);
 985         ath_flushrecv(sc);
 986
 987         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 988         if (r)
 989                 ath_print(common, ATH_DBG_FATAL,
 990                           "Unable to reset hardware; reset status %d\n", r);
 991
 992         if (ath_startrecv(sc) != 0)
 993                 ath_print(common, ATH_DBG_FATAL,
 994                           "Unable to start recv logic\n");
 995
 996         /*
 997          * We may be doing a reset in response to a request
 998          * that changes the channel so update any state that
 999          * might change as a result.
1000          */
1001         ath_update_txpow(sc);
1002
1003         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1004                 ath_beacon_config(sc, NULL);    /* restart beacons */
1005
1006         ath9k_hw_set_interrupts(ah, ah->imask);
1007
1008         if (retry_tx) {
1009                 int i;
1010                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1011                         if (ATH_TXQ_SETUP(sc, i)) {
1012                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1013                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1014                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1015                         }
1016                 }
1017         }
1018
1019         ieee80211_wake_queues(hw);
1020         spin_unlock_bh(&sc->sc_pcu_lock);
1021
1022         /* Start ANI */
1023         ath_start_ani(common);
1024
1025         return r;
1026 }
1027
1028 /* XXX: Remove me once we don't depend on ath9k_channel for all
1029  * this redundant data */
1030 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1031                            struct ath9k_channel *ichan)
1032 {
1033         struct ieee80211_channel *chan = hw->conf.channel;
1034         struct ieee80211_conf *conf = &hw->conf;
1035
1036         ichan->channel = chan->center_freq;
1037         ichan->chan = chan;
1038
1039         if (chan->band == IEEE80211_BAND_2GHZ) {
1040                 ichan->chanmode = CHANNEL_G;
1041                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1042         } else {
1043                 ichan->chanmode = CHANNEL_A;
1044                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1045         }
1046
1047         if (conf_is_ht(conf))
1048                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1049                                             conf->channel_type);
1050 }
1051
1052 /**********************/
1053 /* mac80211 callbacks */
1054 /**********************/
1055
1056 static int ath9k_start(struct ieee80211_hw *hw)
1057 {
1058         struct ath_wiphy *aphy = hw->priv;
1059         struct ath_softc *sc = aphy->sc;
1060         struct ath_hw *ah = sc->sc_ah;
1061         struct ath_common *common = ath9k_hw_common(ah);
1062         struct ieee80211_channel *curchan = hw->conf.channel;
1063         struct ath9k_channel *init_channel;
1064         int r;
1065
1066         ath_print(common, ATH_DBG_CONFIG,
1067                   "Starting driver with initial channel: %d MHz\n",
1068                   curchan->center_freq);
1069
1070         mutex_lock(&sc->mutex);
1071
1072         if (ath9k_wiphy_started(sc)) {
1073                 if (sc->chan_idx == curchan->hw_value) {
1074                         /*
1075                          * Already on the operational channel, the new wiphy
1076                          * can be marked active.
1077                          */
1078                         aphy->state = ATH_WIPHY_ACTIVE;
1079                         ieee80211_wake_queues(hw);
1080                 } else {
1081                         /*
1082                          * Another wiphy is on another channel, start the new
1083                          * wiphy in paused state.
1084                          */
1085                         aphy->state = ATH_WIPHY_PAUSED;
1086                         ieee80211_stop_queues(hw);
1087                 }
1088                 mutex_unlock(&sc->mutex);
1089                 return 0;
1090         }
1091         aphy->state = ATH_WIPHY_ACTIVE;
1092
1093         /* setup initial channel */
1094
1095         sc->chan_idx = curchan->hw_value;
1096
1097         init_channel = ath_get_curchannel(sc, hw);
1098
1099         /* Reset SERDES registers */
1100         ath9k_hw_configpcipowersave(ah, 0, 0);
1101
1102         /*
1103          * The basic interface to setting the hardware in a good
1104          * state is ``reset''.  On return the hardware is known to
1105          * be powered up and with interrupts disabled.  This must
1106          * be followed by initialization of the appropriate bits
1107          * and then setup of the interrupt mask.
1108          */
1109         spin_lock_bh(&sc->sc_pcu_lock);
1110         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1111         if (r) {
1112                 ath_print(common, ATH_DBG_FATAL,
1113                           "Unable to reset hardware; reset status %d "
1114                           "(freq %u MHz)\n", r,
1115                           curchan->center_freq);
1116                 spin_unlock_bh(&sc->sc_pcu_lock);
1117                 goto mutex_unlock;
1118         }
1119
1120         /*
1121          * This is needed only to setup initial state
1122          * but it's best done after a reset.
1123          */
1124         ath_update_txpow(sc);
1125
1126         /*
1127          * Setup the hardware after reset:
1128          * The receive engine is set going.
1129          * Frame transmit is handled entirely
1130          * in the frame output path; there's nothing to do
1131          * here except setup the interrupt mask.
1132          */
1133         if (ath_startrecv(sc) != 0) {
1134                 ath_print(common, ATH_DBG_FATAL,
1135                           "Unable to start recv logic\n");
1136                 r = -EIO;
1137                 spin_unlock_bh(&sc->sc_pcu_lock);
1138                 goto mutex_unlock;
1139         }
1140         spin_unlock_bh(&sc->sc_pcu_lock);
1141
1142         /* Setup our intr mask. */
1143         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1144                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1145                     ATH9K_INT_GLOBAL;
1146
1147         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1148                 ah->imask |= ATH9K_INT_RXHP |
1149                              ATH9K_INT_RXLP |
1150                              ATH9K_INT_BB_WATCHDOG;
1151         else
1152                 ah->imask |= ATH9K_INT_RX;
1153
1154         ah->imask |= ATH9K_INT_GTT;
1155
1156         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1157                 ah->imask |= ATH9K_INT_CST;
1158
1159         sc->sc_flags &= ~SC_OP_INVALID;
1160
1161         /* Disable BMISS interrupt when we're not associated */
1162         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1163         ath9k_hw_set_interrupts(ah, ah->imask);
1164
1165         ieee80211_wake_queues(hw);
1166
1167         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1168
1169         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1170             !ah->btcoex_hw.enabled) {
1171                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1172                                            AR_STOMP_LOW_WLAN_WGHT);
1173                 ath9k_hw_btcoex_enable(ah);
1174
1175                 if (common->bus_ops->bt_coex_prep)
1176                         common->bus_ops->bt_coex_prep(common);
1177                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1178                         ath9k_btcoex_timer_resume(sc);
1179         }
1180
1181 mutex_unlock:
1182         mutex_unlock(&sc->mutex);
1183
1184         return r;
1185 }
1186
1187 static int ath9k_tx(struct ieee80211_hw *hw,
1188                     struct sk_buff *skb)
1189 {
1190         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1191         struct ath_wiphy *aphy = hw->priv;
1192         struct ath_softc *sc = aphy->sc;
1193         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1194         struct ath_tx_control txctl;
1195         int padpos, padsize;
1196         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1197
1198         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199                 ath_print(common, ATH_DBG_XMIT,
1200                           "ath9k: %s: TX in unexpected wiphy state "
1201                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1202                 goto exit;
1203         }
1204
1205         if (sc->ps_enabled) {
1206                 /*
1207                  * mac80211 does not set PM field for normal data frames, so we
1208                  * need to update that based on the current PS mode.
1209                  */
1210                 if (ieee80211_is_data(hdr->frame_control) &&
1211                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1212                     !ieee80211_has_pm(hdr->frame_control)) {
1213                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1214                                   "while in PS mode\n");
1215                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1216                 }
1217         }
1218
1219         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1220                 /*
1221                  * We are using PS-Poll and mac80211 can request TX while in
1222                  * power save mode. Need to wake up hardware for the TX to be
1223                  * completed and if needed, also for RX of buffered frames.
1224                  */
1225                 ath9k_ps_wakeup(sc);
1226                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1228                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229                         ath_print(common, ATH_DBG_PS,
1230                                   "Sending PS-Poll to pick a buffered frame\n");
1231                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1232                 } else {
1233                         ath_print(common, ATH_DBG_PS,
1234                                   "Wake up to complete TX\n");
1235                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1236                 }
1237                 /*
1238                  * The actual restore operation will happen only after
1239                  * the sc_flags bit is cleared. We are just dropping
1240                  * the ps_usecount here.
1241                  */
1242                 ath9k_ps_restore(sc);
1243         }
1244
1245         memset(&txctl, 0, sizeof(struct ath_tx_control));
1246
1247         /*
1248          * As a temporary workaround, assign seq# here; this will likely need
1249          * to be cleaned up to work better with Beacon transmission and virtual
1250          * BSSes.
1251          */
1252         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1253                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1254                         sc->tx.seq_no += 0x10;
1255                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1256                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1257         }
1258
1259         /* Add the padding after the header if this is not already done */
1260         padpos = ath9k_cmn_padpos(hdr->frame_control);
1261         padsize = padpos & 3;
1262         if (padsize && skb->len>padpos) {
1263                 if (skb_headroom(skb) < padsize)
1264                         return -1;
1265                 skb_push(skb, padsize);
1266                 memmove(skb->data, skb->data + padsize, padpos);
1267         }
1268
1269         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1270
1271         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1272
1273         if (ath_tx_start(hw, skb, &txctl) != 0) {
1274                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1275                 goto exit;
1276         }
1277
1278         return 0;
1279 exit:
1280         dev_kfree_skb_any(skb);
1281         return 0;
1282 }
1283
1284 static void ath9k_stop(struct ieee80211_hw *hw)
1285 {
1286         struct ath_wiphy *aphy = hw->priv;
1287         struct ath_softc *sc = aphy->sc;
1288         struct ath_hw *ah = sc->sc_ah;
1289         struct ath_common *common = ath9k_hw_common(ah);
1290         int i;
1291
1292         mutex_lock(&sc->mutex);
1293
1294         aphy->state = ATH_WIPHY_INACTIVE;
1295
1296         if (led_blink)
1297                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1298
1299         cancel_delayed_work_sync(&sc->tx_complete_work);
1300         cancel_work_sync(&sc->paprd_work);
1301         cancel_work_sync(&sc->hw_check_work);
1302
1303         for (i = 0; i < sc->num_sec_wiphy; i++) {
1304                 if (sc->sec_wiphy[i])
1305                         break;
1306         }
1307
1308         if (i == sc->num_sec_wiphy) {
1309                 cancel_delayed_work_sync(&sc->wiphy_work);
1310                 cancel_work_sync(&sc->chan_work);
1311         }
1312
1313         if (sc->sc_flags & SC_OP_INVALID) {
1314                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1315                 mutex_unlock(&sc->mutex);
1316                 return;
1317         }
1318
1319         if (ath9k_wiphy_started(sc)) {
1320                 mutex_unlock(&sc->mutex);
1321                 return; /* another wiphy still in use */
1322         }
1323
1324         /* Ensure HW is awake when we try to shut it down. */
1325         ath9k_ps_wakeup(sc);
1326
1327         if (ah->btcoex_hw.enabled) {
1328                 ath9k_hw_btcoex_disable(ah);
1329                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1330                         ath9k_btcoex_timer_pause(sc);
1331         }
1332
1333         spin_lock_bh(&sc->sc_pcu_lock);
1334
1335         /* make sure h/w will not generate any interrupt
1336          * before setting the invalid flag. */
1337         ath9k_hw_disable_interrupts(ah);
1338
1339         if (!(sc->sc_flags & SC_OP_INVALID)) {
1340                 ath_drain_all_txq(sc, false);
1341                 ath_stoprecv(sc);
1342                 ath9k_hw_phy_disable(ah);
1343         } else
1344                 sc->rx.rxlink = NULL;
1345
1346         /* disable HAL and put h/w to sleep */
1347         ath9k_hw_disable(ah);
1348         ath9k_hw_configpcipowersave(ah, 1, 1);
1349
1350         spin_unlock_bh(&sc->sc_pcu_lock);
1351
1352         ath9k_ps_restore(sc);
1353
1354         /* Finally, put the chip in FULL SLEEP mode */
1355         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1356
1357         sc->sc_flags |= SC_OP_INVALID;
1358
1359         mutex_unlock(&sc->mutex);
1360
1361         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1362 }
1363
1364 static int ath9k_add_interface(struct ieee80211_hw *hw,
1365                                struct ieee80211_vif *vif)
1366 {
1367         struct ath_wiphy *aphy = hw->priv;
1368         struct ath_softc *sc = aphy->sc;
1369         struct ath_hw *ah = sc->sc_ah;
1370         struct ath_common *common = ath9k_hw_common(ah);
1371         struct ath_vif *avp = (void *)vif->drv_priv;
1372         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1373         int ret = 0;
1374
1375         mutex_lock(&sc->mutex);
1376
1377         switch (vif->type) {
1378         case NL80211_IFTYPE_STATION:
1379                 ic_opmode = NL80211_IFTYPE_STATION;
1380                 break;
1381         case NL80211_IFTYPE_WDS:
1382                 ic_opmode = NL80211_IFTYPE_WDS;
1383                 break;
1384         case NL80211_IFTYPE_ADHOC:
1385         case NL80211_IFTYPE_AP:
1386         case NL80211_IFTYPE_MESH_POINT:
1387                 if (sc->nbcnvifs >= ATH_BCBUF) {
1388                         ret = -ENOBUFS;
1389                         goto out;
1390                 }
1391                 ic_opmode = vif->type;
1392                 break;
1393         default:
1394                 ath_print(common, ATH_DBG_FATAL,
1395                         "Interface type %d not yet supported\n", vif->type);
1396                 ret = -EOPNOTSUPP;
1397                 goto out;
1398         }
1399
1400         ath_print(common, ATH_DBG_CONFIG,
1401                   "Attach a VIF of type: %d\n", ic_opmode);
1402
1403         /* Set the VIF opmode */
1404         avp->av_opmode = ic_opmode;
1405         avp->av_bslot = -1;
1406
1407         sc->nvifs++;
1408
1409         ath9k_set_bssid_mask(hw, vif);
1410
1411         if (sc->nvifs > 1)
1412                 goto out; /* skip global settings for secondary vif */
1413
1414         if (ic_opmode == NL80211_IFTYPE_AP) {
1415                 ath9k_hw_set_tsfadjust(ah, 1);
1416                 sc->sc_flags |= SC_OP_TSF_RESET;
1417         }
1418
1419         /* Set the device opmode */
1420         ah->opmode = ic_opmode;
1421
1422         /*
1423          * Enable MIB interrupts when there are hardware phy counters.
1424          * Note we only do this (at the moment) for station mode.
1425          */
1426         if ((vif->type == NL80211_IFTYPE_STATION) ||
1427             (vif->type == NL80211_IFTYPE_ADHOC) ||
1428             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1429                 if (ah->config.enable_ani)
1430                         ah->imask |= ATH9K_INT_MIB;
1431                 ah->imask |= ATH9K_INT_TSFOOR;
1432         }
1433
1434         ath9k_hw_set_interrupts(ah, ah->imask);
1435
1436         if (vif->type == NL80211_IFTYPE_AP    ||
1437             vif->type == NL80211_IFTYPE_ADHOC ||
1438             vif->type == NL80211_IFTYPE_MONITOR) {
1439                 sc->sc_flags |= SC_OP_ANI_RUN;
1440                 ath_start_ani(common);
1441         }
1442
1443 out:
1444         mutex_unlock(&sc->mutex);
1445         return ret;
1446 }
1447
1448 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1449                                    struct ieee80211_vif *vif)
1450 {
1451         struct ath_wiphy *aphy = hw->priv;
1452         struct ath_softc *sc = aphy->sc;
1453         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1454         struct ath_vif *avp = (void *)vif->drv_priv;
1455         int i;
1456
1457         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1458
1459         mutex_lock(&sc->mutex);
1460
1461         /* Stop ANI */
1462         sc->sc_flags &= ~SC_OP_ANI_RUN;
1463         del_timer_sync(&common->ani.timer);
1464
1465         /* Reclaim beacon resources */
1466         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1467             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1468             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1469                 ath9k_ps_wakeup(sc);
1470                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1471                 ath9k_ps_restore(sc);
1472         }
1473
1474         ath_beacon_return(sc, avp);
1475         sc->sc_flags &= ~SC_OP_BEACONS;
1476
1477         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1478                 if (sc->beacon.bslot[i] == vif) {
1479                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1480                                "slot\n", __func__);
1481                         sc->beacon.bslot[i] = NULL;
1482                         sc->beacon.bslot_aphy[i] = NULL;
1483                 }
1484         }
1485
1486         sc->nvifs--;
1487
1488         mutex_unlock(&sc->mutex);
1489 }
1490
1491 static void ath9k_enable_ps(struct ath_softc *sc)
1492 {
1493         struct ath_hw *ah = sc->sc_ah;
1494
1495         sc->ps_enabled = true;
1496         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1497                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1498                         ah->imask |= ATH9K_INT_TIM_TIMER;
1499                         ath9k_hw_set_interrupts(ah, ah->imask);
1500                 }
1501                 ath9k_hw_setrxabort(ah, 1);
1502         }
1503 }
1504
1505 static void ath9k_disable_ps(struct ath_softc *sc)
1506 {
1507         struct ath_hw *ah = sc->sc_ah;
1508
1509         sc->ps_enabled = false;
1510         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1511         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1512                 ath9k_hw_setrxabort(ah, 0);
1513                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1514                                   PS_WAIT_FOR_CAB |
1515                                   PS_WAIT_FOR_PSPOLL_DATA |
1516                                   PS_WAIT_FOR_TX_ACK);
1517                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1518                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1519                         ath9k_hw_set_interrupts(ah, ah->imask);
1520                 }
1521         }
1522
1523 }
1524
1525 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1526 {
1527         struct ath_wiphy *aphy = hw->priv;
1528         struct ath_softc *sc = aphy->sc;
1529         struct ath_hw *ah = sc->sc_ah;
1530         struct ath_common *common = ath9k_hw_common(ah);
1531         struct ieee80211_conf *conf = &hw->conf;
1532         bool disable_radio;
1533
1534         mutex_lock(&sc->mutex);
1535
1536         /*
1537          * Leave this as the first check because we need to turn on the
1538          * radio if it was disabled before prior to processing the rest
1539          * of the changes. Likewise we must only disable the radio towards
1540          * the end.
1541          */
1542         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1543                 bool enable_radio;
1544                 bool all_wiphys_idle;
1545                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1546
1547                 spin_lock_bh(&sc->wiphy_lock);
1548                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1549                 ath9k_set_wiphy_idle(aphy, idle);
1550
1551                 enable_radio = (!idle && all_wiphys_idle);
1552
1553                 /*
1554                  * After we unlock here its possible another wiphy
1555                  * can be re-renabled so to account for that we will
1556                  * only disable the radio toward the end of this routine
1557                  * if by then all wiphys are still idle.
1558                  */
1559                 spin_unlock_bh(&sc->wiphy_lock);
1560
1561                 if (enable_radio) {
1562                         sc->ps_idle = false;
1563                         ath_radio_enable(sc, hw);
1564                         ath_print(common, ATH_DBG_CONFIG,
1565                                   "not-idle: enabling radio\n");
1566                 }
1567         }
1568
1569         /*
1570          * We just prepare to enable PS. We have to wait until our AP has
1571          * ACK'd our null data frame to disable RX otherwise we'll ignore
1572          * those ACKs and end up retransmitting the same null data frames.
1573          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1574          */
1575         if (changed & IEEE80211_CONF_CHANGE_PS) {
1576                 unsigned long flags;
1577                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1578                 if (conf->flags & IEEE80211_CONF_PS)
1579                         ath9k_enable_ps(sc);
1580                 else
1581                         ath9k_disable_ps(sc);
1582                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1583         }
1584
1585         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1586                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1587                         ath_print(common, ATH_DBG_CONFIG,
1588                                   "HW opmode set to Monitor mode\n");
1589                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1590                 }
1591         }
1592
1593         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1594                 struct ieee80211_channel *curchan = hw->conf.channel;
1595                 int pos = curchan->hw_value;
1596                 int old_pos = -1;
1597                 unsigned long flags;
1598
1599                 if (ah->curchan)
1600                         old_pos = ah->curchan - &ah->channels[0];
1601
1602                 aphy->chan_idx = pos;
1603                 aphy->chan_is_ht = conf_is_ht(conf);
1604                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1605                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1606                 else
1607                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1608
1609                 if (aphy->state == ATH_WIPHY_SCAN ||
1610                     aphy->state == ATH_WIPHY_ACTIVE)
1611                         ath9k_wiphy_pause_all_forced(sc, aphy);
1612                 else {
1613                         /*
1614                          * Do not change operational channel based on a paused
1615                          * wiphy changes.
1616                          */
1617                         goto skip_chan_change;
1618                 }
1619
1620                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1621                           curchan->center_freq);
1622
1623                 /* XXX: remove me eventualy */
1624                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1625
1626                 ath_update_chainmask(sc, conf_is_ht(conf));
1627
1628                 /* update survey stats for the old channel before switching */
1629                 spin_lock_irqsave(&common->cc_lock, flags);
1630                 ath_update_survey_stats(sc);
1631                 spin_unlock_irqrestore(&common->cc_lock, flags);
1632
1633                 /*
1634                  * If the operating channel changes, change the survey in-use flags
1635                  * along with it.
1636                  * Reset the survey data for the new channel, unless we're switching
1637                  * back to the operating channel from an off-channel operation.
1638                  */
1639                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1640                     sc->cur_survey != &sc->survey[pos]) {
1641
1642                         if (sc->cur_survey)
1643                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1644
1645                         sc->cur_survey = &sc->survey[pos];
1646
1647                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1648                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1649                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1650                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1651                 }
1652
1653                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1654                         ath_print(common, ATH_DBG_FATAL,
1655                                   "Unable to set channel\n");
1656                         mutex_unlock(&sc->mutex);
1657                         return -EINVAL;
1658                 }
1659
1660                 /*
1661                  * The most recent snapshot of channel->noisefloor for the old
1662                  * channel is only available after the hardware reset. Copy it to
1663                  * the survey stats now.
1664                  */
1665                 if (old_pos >= 0)
1666                         ath_update_survey_nf(sc, old_pos);
1667         }
1668
1669 skip_chan_change:
1670         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1671                 sc->config.txpowlimit = 2 * conf->power_level;
1672                 ath_update_txpow(sc);
1673         }
1674
1675         spin_lock_bh(&sc->wiphy_lock);
1676         disable_radio = ath9k_all_wiphys_idle(sc);
1677         spin_unlock_bh(&sc->wiphy_lock);
1678
1679         if (disable_radio) {
1680                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1681                 sc->ps_idle = true;
1682                 ath_radio_disable(sc, hw);
1683         }
1684
1685         mutex_unlock(&sc->mutex);
1686
1687         return 0;
1688 }
1689
1690 #define SUPPORTED_FILTERS                       \
1691         (FIF_PROMISC_IN_BSS |                   \
1692         FIF_ALLMULTI |                          \
1693         FIF_CONTROL |                           \
1694         FIF_PSPOLL |                            \
1695         FIF_OTHER_BSS |                         \
1696         FIF_BCN_PRBRESP_PROMISC |               \
1697         FIF_PROBE_REQ |                         \
1698         FIF_FCSFAIL)
1699
1700 /* FIXME: sc->sc_full_reset ? */
1701 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1702                                    unsigned int changed_flags,
1703                                    unsigned int *total_flags,
1704                                    u64 multicast)
1705 {
1706         struct ath_wiphy *aphy = hw->priv;
1707         struct ath_softc *sc = aphy->sc;
1708         u32 rfilt;
1709
1710         changed_flags &= SUPPORTED_FILTERS;
1711         *total_flags &= SUPPORTED_FILTERS;
1712
1713         sc->rx.rxfilter = *total_flags;
1714         ath9k_ps_wakeup(sc);
1715         rfilt = ath_calcrxfilter(sc);
1716         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1717         ath9k_ps_restore(sc);
1718
1719         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1720                   "Set HW RX filter: 0x%x\n", rfilt);
1721 }
1722
1723 static int ath9k_sta_add(struct ieee80211_hw *hw,
1724                          struct ieee80211_vif *vif,
1725                          struct ieee80211_sta *sta)
1726 {
1727         struct ath_wiphy *aphy = hw->priv;
1728         struct ath_softc *sc = aphy->sc;
1729
1730         ath_node_attach(sc, sta);
1731
1732         return 0;
1733 }
1734
1735 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1736                             struct ieee80211_vif *vif,
1737                             struct ieee80211_sta *sta)
1738 {
1739         struct ath_wiphy *aphy = hw->priv;
1740         struct ath_softc *sc = aphy->sc;
1741
1742         ath_node_detach(sc, sta);
1743
1744         return 0;
1745 }
1746
1747 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1748                          const struct ieee80211_tx_queue_params *params)
1749 {
1750         struct ath_wiphy *aphy = hw->priv;
1751         struct ath_softc *sc = aphy->sc;
1752         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1753         struct ath_txq *txq;
1754         struct ath9k_tx_queue_info qi;
1755         int ret = 0;
1756
1757         if (queue >= WME_NUM_AC)
1758                 return 0;
1759
1760         txq = sc->tx.txq_map[queue];
1761
1762         mutex_lock(&sc->mutex);
1763
1764         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1765
1766         qi.tqi_aifs = params->aifs;
1767         qi.tqi_cwmin = params->cw_min;
1768         qi.tqi_cwmax = params->cw_max;
1769         qi.tqi_burstTime = params->txop;
1770
1771         ath_print(common, ATH_DBG_CONFIG,
1772                   "Configure tx [queue/halq] [%d/%d],  "
1773                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1774                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1775                   params->cw_max, params->txop);
1776
1777         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1778         if (ret)
1779                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1780
1781         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1782                 if (queue == WME_AC_BE && !ret)
1783                         ath_beaconq_config(sc);
1784
1785         mutex_unlock(&sc->mutex);
1786
1787         return ret;
1788 }
1789
1790 static int ath9k_set_key(struct ieee80211_hw *hw,
1791                          enum set_key_cmd cmd,
1792                          struct ieee80211_vif *vif,
1793                          struct ieee80211_sta *sta,
1794                          struct ieee80211_key_conf *key)
1795 {
1796         struct ath_wiphy *aphy = hw->priv;
1797         struct ath_softc *sc = aphy->sc;
1798         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1799         int ret = 0;
1800
1801         if (modparam_nohwcrypt)
1802                 return -ENOSPC;
1803
1804         mutex_lock(&sc->mutex);
1805         ath9k_ps_wakeup(sc);
1806         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1807
1808         switch (cmd) {
1809         case SET_KEY:
1810                 ret = ath_key_config(common, vif, sta, key);
1811                 if (ret >= 0) {
1812                         key->hw_key_idx = ret;
1813                         /* push IV and Michael MIC generation to stack */
1814                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1815                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1816                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1817                         if (sc->sc_ah->sw_mgmt_crypto &&
1818                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1819                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1820                         ret = 0;
1821                 }
1822                 break;
1823         case DISABLE_KEY:
1824                 ath_key_delete(common, key);
1825                 break;
1826         default:
1827                 ret = -EINVAL;
1828         }
1829
1830         ath9k_ps_restore(sc);
1831         mutex_unlock(&sc->mutex);
1832
1833         return ret;
1834 }
1835
1836 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1837                                    struct ieee80211_vif *vif,
1838                                    struct ieee80211_bss_conf *bss_conf,
1839                                    u32 changed)
1840 {
1841         struct ath_wiphy *aphy = hw->priv;
1842         struct ath_softc *sc = aphy->sc;
1843         struct ath_hw *ah = sc->sc_ah;
1844         struct ath_common *common = ath9k_hw_common(ah);
1845         struct ath_vif *avp = (void *)vif->drv_priv;
1846         int slottime;
1847         int error;
1848
1849         mutex_lock(&sc->mutex);
1850
1851         if (changed & BSS_CHANGED_BSSID) {
1852                 /* Set BSSID */
1853                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1854                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1855                 common->curaid = 0;
1856                 ath9k_hw_write_associd(ah);
1857
1858                 /* Set aggregation protection mode parameters */
1859                 sc->config.ath_aggr_prot = 0;
1860
1861                 /* Only legacy IBSS for now */
1862                 if (vif->type == NL80211_IFTYPE_ADHOC)
1863                         ath_update_chainmask(sc, 0);
1864
1865                 ath_print(common, ATH_DBG_CONFIG,
1866                           "BSSID: %pM aid: 0x%x\n",
1867                           common->curbssid, common->curaid);
1868
1869                 /* need to reconfigure the beacon */
1870                 sc->sc_flags &= ~SC_OP_BEACONS ;
1871         }
1872
1873         /* Enable transmission of beacons (AP, IBSS, MESH) */
1874         if ((changed & BSS_CHANGED_BEACON) ||
1875             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1876                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1877                 error = ath_beacon_alloc(aphy, vif);
1878                 if (!error)
1879                         ath_beacon_config(sc, vif);
1880         }
1881
1882         if (changed & BSS_CHANGED_ERP_SLOT) {
1883                 if (bss_conf->use_short_slot)
1884                         slottime = 9;
1885                 else
1886                         slottime = 20;
1887                 if (vif->type == NL80211_IFTYPE_AP) {
1888                         /*
1889                          * Defer update, so that connected stations can adjust
1890                          * their settings at the same time.
1891                          * See beacon.c for more details
1892                          */
1893                         sc->beacon.slottime = slottime;
1894                         sc->beacon.updateslot = UPDATE;
1895                 } else {
1896                         ah->slottime = slottime;
1897                         ath9k_hw_init_global_settings(ah);
1898                 }
1899         }
1900
1901         /* Disable transmission of beacons */
1902         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1903                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1904
1905         if (changed & BSS_CHANGED_BEACON_INT) {
1906                 sc->beacon_interval = bss_conf->beacon_int;
1907                 /*
1908                  * In case of AP mode, the HW TSF has to be reset
1909                  * when the beacon interval changes.
1910                  */
1911                 if (vif->type == NL80211_IFTYPE_AP) {
1912                         sc->sc_flags |= SC_OP_TSF_RESET;
1913                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1914                         error = ath_beacon_alloc(aphy, vif);
1915                         if (!error)
1916                                 ath_beacon_config(sc, vif);
1917                 } else {
1918                         ath_beacon_config(sc, vif);
1919                 }
1920         }
1921
1922         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1923                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1924                           bss_conf->use_short_preamble);
1925                 if (bss_conf->use_short_preamble)
1926                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1927                 else
1928                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1929         }
1930
1931         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1932                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1933                           bss_conf->use_cts_prot);
1934                 if (bss_conf->use_cts_prot &&
1935                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1936                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1937                 else
1938                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1939         }
1940
1941         if (changed & BSS_CHANGED_ASSOC) {
1942                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1943                         bss_conf->assoc);
1944                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1945         }
1946
1947         mutex_unlock(&sc->mutex);
1948 }
1949
1950 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1951 {
1952         u64 tsf;
1953         struct ath_wiphy *aphy = hw->priv;
1954         struct ath_softc *sc = aphy->sc;
1955
1956         mutex_lock(&sc->mutex);
1957         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1958         mutex_unlock(&sc->mutex);
1959
1960         return tsf;
1961 }
1962
1963 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1964 {
1965         struct ath_wiphy *aphy = hw->priv;
1966         struct ath_softc *sc = aphy->sc;
1967
1968         mutex_lock(&sc->mutex);
1969         ath9k_hw_settsf64(sc->sc_ah, tsf);
1970         mutex_unlock(&sc->mutex);
1971 }
1972
1973 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1974 {
1975         struct ath_wiphy *aphy = hw->priv;
1976         struct ath_softc *sc = aphy->sc;
1977
1978         mutex_lock(&sc->mutex);
1979
1980         ath9k_ps_wakeup(sc);
1981         ath9k_hw_reset_tsf(sc->sc_ah);
1982         ath9k_ps_restore(sc);
1983
1984         mutex_unlock(&sc->mutex);
1985 }
1986
1987 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1988                               struct ieee80211_vif *vif,
1989                               enum ieee80211_ampdu_mlme_action action,
1990                               struct ieee80211_sta *sta,
1991                               u16 tid, u16 *ssn)
1992 {
1993         struct ath_wiphy *aphy = hw->priv;
1994         struct ath_softc *sc = aphy->sc;
1995         int ret = 0;
1996
1997         local_bh_disable();
1998
1999         switch (action) {
2000         case IEEE80211_AMPDU_RX_START:
2001                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2002                         ret = -ENOTSUPP;
2003                 break;
2004         case IEEE80211_AMPDU_RX_STOP:
2005                 break;
2006         case IEEE80211_AMPDU_TX_START:
2007                 ath9k_ps_wakeup(sc);
2008                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2009                 if (!ret)
2010                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2011                 ath9k_ps_restore(sc);
2012                 break;
2013         case IEEE80211_AMPDU_TX_STOP:
2014                 ath9k_ps_wakeup(sc);
2015                 ath_tx_aggr_stop(sc, sta, tid);
2016                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2017                 ath9k_ps_restore(sc);
2018                 break;
2019         case IEEE80211_AMPDU_TX_OPERATIONAL:
2020                 ath9k_ps_wakeup(sc);
2021                 ath_tx_aggr_resume(sc, sta, tid);
2022                 ath9k_ps_restore(sc);
2023                 break;
2024         default:
2025                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2026                           "Unknown AMPDU action\n");
2027         }
2028
2029         local_bh_enable();
2030
2031         return ret;
2032 }
2033
2034 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2035                              struct survey_info *survey)
2036 {
2037         struct ath_wiphy *aphy = hw->priv;
2038         struct ath_softc *sc = aphy->sc;
2039         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2040         struct ieee80211_supported_band *sband;
2041         struct ieee80211_channel *chan;
2042         unsigned long flags;
2043         int pos;
2044
2045         spin_lock_irqsave(&common->cc_lock, flags);
2046         if (idx == 0)
2047                 ath_update_survey_stats(sc);
2048
2049         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2050         if (sband && idx >= sband->n_channels) {
2051                 idx -= sband->n_channels;
2052                 sband = NULL;
2053         }
2054
2055         if (!sband)
2056                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2057
2058         if (!sband || idx >= sband->n_channels) {
2059                 spin_unlock_irqrestore(&common->cc_lock, flags);
2060                 return -ENOENT;
2061         }
2062
2063         chan = &sband->channels[idx];
2064         pos = chan->hw_value;
2065         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2066         survey->channel = chan;
2067         spin_unlock_irqrestore(&common->cc_lock, flags);
2068
2069         return 0;
2070 }
2071
2072 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2073 {
2074         struct ath_wiphy *aphy = hw->priv;
2075         struct ath_softc *sc = aphy->sc;
2076
2077         mutex_lock(&sc->mutex);
2078         if (ath9k_wiphy_scanning(sc)) {
2079                 /*
2080                  * There is a race here in mac80211 but fixing it requires
2081                  * we revisit how we handle the scan complete callback.
2082                  * After mac80211 fixes we will not have configured hardware
2083                  * to the home channel nor would we have configured the RX
2084                  * filter yet.
2085                  */
2086                 mutex_unlock(&sc->mutex);
2087                 return;
2088         }
2089
2090         aphy->state = ATH_WIPHY_SCAN;
2091         ath9k_wiphy_pause_all_forced(sc, aphy);
2092         mutex_unlock(&sc->mutex);
2093 }
2094
2095 /*
2096  * XXX: this requires a revisit after the driver
2097  * scan_complete gets moved to another place/removed in mac80211.
2098  */
2099 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2100 {
2101         struct ath_wiphy *aphy = hw->priv;
2102         struct ath_softc *sc = aphy->sc;
2103
2104         mutex_lock(&sc->mutex);
2105         aphy->state = ATH_WIPHY_ACTIVE;
2106         mutex_unlock(&sc->mutex);
2107 }
2108
2109 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2110 {
2111         struct ath_wiphy *aphy = hw->priv;
2112         struct ath_softc *sc = aphy->sc;
2113         struct ath_hw *ah = sc->sc_ah;
2114
2115         mutex_lock(&sc->mutex);
2116         ah->coverage_class = coverage_class;
2117         ath9k_hw_init_global_settings(ah);
2118         mutex_unlock(&sc->mutex);
2119 }
2120
2121 struct ieee80211_ops ath9k_ops = {
2122         .tx                 = ath9k_tx,
2123         .start              = ath9k_start,
2124         .stop               = ath9k_stop,
2125         .add_interface      = ath9k_add_interface,
2126         .remove_interface   = ath9k_remove_interface,
2127         .config             = ath9k_config,
2128         .configure_filter   = ath9k_configure_filter,
2129         .sta_add            = ath9k_sta_add,
2130         .sta_remove         = ath9k_sta_remove,
2131         .conf_tx            = ath9k_conf_tx,
2132         .bss_info_changed   = ath9k_bss_info_changed,
2133         .set_key            = ath9k_set_key,
2134         .get_tsf            = ath9k_get_tsf,
2135         .set_tsf            = ath9k_set_tsf,
2136         .reset_tsf          = ath9k_reset_tsf,
2137         .ampdu_action       = ath9k_ampdu_action,
2138         .get_survey         = ath9k_get_survey,
2139         .sw_scan_start      = ath9k_sw_scan_start,
2140         .sw_scan_complete   = ath9k_sw_scan_complete,
2141         .rfkill_poll        = ath9k_rfkill_poll_state,
2142         .set_coverage_class = ath9k_set_coverage_class,
2143 };