2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
158 * Set/change channels. If the channel is really being changed, it's done
159 * by reseting the chip. To accomplish this we must first cleanup any pending
160 * DMA, then restart stuff.
162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
163 struct ath9k_channel *hchan)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath_common *common = ath9k_hw_common(ah);
167 struct ieee80211_conf *conf = &common->hw->conf;
168 bool fastcc = true, stopped;
169 struct ieee80211_channel *channel = hw->conf.channel;
172 if (sc->sc_flags & SC_OP_INVALID)
178 * This is only performed if the channel settings have
181 * To switch channels clear any pending DMA operations;
182 * wait long enough for the RX fifo to drain, reset the
183 * hardware at the new frequency, and then re-enable
184 * the relevant bits of the h/w.
186 ath9k_hw_set_interrupts(ah, 0);
187 ath_drain_all_txq(sc, false);
188 stopped = ath_stoprecv(sc);
190 /* XXX: do not flush receive queue here. We don't want
191 * to flush data frames already in queue because of
192 * changing channel. */
194 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
197 ath_print(common, ATH_DBG_CONFIG,
198 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
199 sc->sc_ah->curchan->channel,
200 channel->center_freq, conf_is_ht40(conf));
202 spin_lock_bh(&sc->sc_resetlock);
204 r = ath9k_hw_reset(ah, hchan, fastcc);
206 ath_print(common, ATH_DBG_FATAL,
207 "Unable to reset channel (%u MHz), "
209 channel->center_freq, r);
210 spin_unlock_bh(&sc->sc_resetlock);
213 spin_unlock_bh(&sc->sc_resetlock);
215 sc->sc_flags &= ~SC_OP_FULL_RESET;
217 if (ath_startrecv(sc) != 0) {
218 ath_print(common, ATH_DBG_FATAL,
219 "Unable to restart recv logic\n");
224 ath_cache_conf_rate(sc, &hw->conf);
225 ath_update_txpow(sc);
226 ath9k_hw_set_interrupts(ah, ah->imask);
229 ath9k_ps_restore(sc);
233 static void ath_paprd_activate(struct ath_softc *sc)
235 struct ath_hw *ah = sc->sc_ah;
238 if (!ah->curchan->paprd_done)
242 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
243 if (!(ah->caps.tx_chainmask & BIT(chain)))
246 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
249 ar9003_paprd_enable(ah, true);
250 ath9k_ps_restore(sc);
253 void ath_paprd_calibrate(struct work_struct *work)
255 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
256 struct ieee80211_hw *hw = sc->hw;
257 struct ath_hw *ah = sc->sc_ah;
258 struct ieee80211_hdr *hdr;
259 struct sk_buff *skb = NULL;
260 struct ieee80211_tx_info *tx_info;
261 int band = hw->conf.channel->band;
262 struct ieee80211_supported_band *sband = &sc->sbands[band];
263 struct ath_tx_control txctl;
272 skb = alloc_skb(len, GFP_KERNEL);
276 tx_info = IEEE80211_SKB_CB(skb);
279 memset(skb->data, 0, len);
280 hdr = (struct ieee80211_hdr *)skb->data;
281 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
282 hdr->frame_control = cpu_to_le16(ftype);
283 hdr->duration_id = 10;
284 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
285 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
286 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
288 memset(&txctl, 0, sizeof(txctl));
289 qnum = sc->tx.hwq_map[WME_AC_BE];
290 txctl.txq = &sc->tx.txq[qnum];
292 ar9003_paprd_init_table(ah);
293 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
294 if (!(ah->caps.tx_chainmask & BIT(chain)))
298 memset(tx_info, 0, sizeof(*tx_info));
299 tx_info->band = band;
301 for (i = 0; i < 4; i++) {
302 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
303 tx_info->control.rates[i].count = 6;
306 init_completion(&sc->paprd_complete);
307 ar9003_paprd_setup_gain_table(ah, chain);
308 txctl.paprd = BIT(chain);
309 if (ath_tx_start(hw, skb, &txctl) != 0)
312 time_left = wait_for_completion_timeout(&sc->paprd_complete,
315 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
316 "Timeout waiting for paprd training on "
322 if (!ar9003_paprd_is_done(ah))
325 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
333 ah->curchan->paprd_done = true;
334 ath_paprd_activate(sc);
337 ath9k_ps_restore(sc);
341 * This routine performs the periodic noise floor calibration function
342 * that is used to adjust and optimize the chip performance. This
343 * takes environmental changes (location, temperature) into account.
344 * When the task is complete, it reschedules itself depending on the
345 * appropriate interval that was calculated.
347 void ath_ani_calibrate(unsigned long data)
349 struct ath_softc *sc = (struct ath_softc *)data;
350 struct ath_hw *ah = sc->sc_ah;
351 struct ath_common *common = ath9k_hw_common(ah);
352 bool longcal = false;
353 bool shortcal = false;
354 bool aniflag = false;
355 unsigned int timestamp = jiffies_to_msecs(jiffies);
356 u32 cal_interval, short_cal_interval;
358 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
359 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
361 /* Only calibrate if awake */
362 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
367 /* Long calibration runs independently of short calibration. */
368 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
370 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
371 common->ani.longcal_timer = timestamp;
374 /* Short calibration applies only while caldone is false */
375 if (!common->ani.caldone) {
376 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
378 ath_print(common, ATH_DBG_ANI,
379 "shortcal @%lu\n", jiffies);
380 common->ani.shortcal_timer = timestamp;
381 common->ani.resetcal_timer = timestamp;
384 if ((timestamp - common->ani.resetcal_timer) >=
385 ATH_RESTART_CALINTERVAL) {
386 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
387 if (common->ani.caldone)
388 common->ani.resetcal_timer = timestamp;
392 /* Verify whether we must check ANI */
393 if ((timestamp - common->ani.checkani_timer) >=
394 ah->config.ani_poll_interval) {
396 common->ani.checkani_timer = timestamp;
399 /* Skip all processing if there's nothing to do. */
400 if (longcal || shortcal || aniflag) {
401 /* Call ANI routine if necessary */
403 ath9k_hw_ani_monitor(ah, ah->curchan);
405 /* Perform calibration if necessary */
406 if (longcal || shortcal) {
407 common->ani.caldone =
408 ath9k_hw_calibrate(ah,
410 common->rx_chainmask,
414 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
417 ath_print(common, ATH_DBG_ANI,
418 " calibrate chan %u/%x nf: %d\n",
419 ah->curchan->channel,
420 ah->curchan->channelFlags,
421 common->ani.noise_floor);
425 ath9k_ps_restore(sc);
429 * Set timer interval based on previous results.
430 * The interval must be the shortest necessary to satisfy ANI,
431 * short calibration and long calibration.
433 cal_interval = ATH_LONG_CALINTERVAL;
434 if (sc->sc_ah->config.enable_ani)
435 cal_interval = min(cal_interval,
436 (u32)ah->config.ani_poll_interval);
437 if (!common->ani.caldone)
438 cal_interval = min(cal_interval, (u32)short_cal_interval);
440 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
441 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
442 !(sc->sc_flags & SC_OP_SCANNING)) {
443 if (!sc->sc_ah->curchan->paprd_done)
444 ieee80211_queue_work(sc->hw, &sc->paprd_work);
446 ath_paprd_activate(sc);
450 static void ath_start_ani(struct ath_common *common)
452 struct ath_hw *ah = common->ah;
453 unsigned long timestamp = jiffies_to_msecs(jiffies);
455 common->ani.longcal_timer = timestamp;
456 common->ani.shortcal_timer = timestamp;
457 common->ani.checkani_timer = timestamp;
459 mod_timer(&common->ani.timer,
461 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
465 * Update tx/rx chainmask. For legacy association,
466 * hard code chainmask to 1x1, for 11n association, use
467 * the chainmask configuration, for bt coexistence, use
468 * the chainmask configuration even in legacy mode.
470 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
472 struct ath_hw *ah = sc->sc_ah;
473 struct ath_common *common = ath9k_hw_common(ah);
475 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
476 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
477 common->tx_chainmask = ah->caps.tx_chainmask;
478 common->rx_chainmask = ah->caps.rx_chainmask;
480 common->tx_chainmask = 1;
481 common->rx_chainmask = 1;
484 ath_print(common, ATH_DBG_CONFIG,
485 "tx chmask: %d, rx chmask: %d\n",
486 common->tx_chainmask,
487 common->rx_chainmask);
490 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
494 an = (struct ath_node *)sta->drv_priv;
496 if (sc->sc_flags & SC_OP_TXAGGR) {
497 ath_tx_node_init(sc, an);
498 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
499 sta->ht_cap.ampdu_factor);
500 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
501 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
505 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
507 struct ath_node *an = (struct ath_node *)sta->drv_priv;
509 if (sc->sc_flags & SC_OP_TXAGGR)
510 ath_tx_node_cleanup(sc, an);
513 void ath9k_tasklet(unsigned long data)
515 struct ath_softc *sc = (struct ath_softc *)data;
516 struct ath_hw *ah = sc->sc_ah;
517 struct ath_common *common = ath9k_hw_common(ah);
519 u32 status = sc->intrstatus;
524 if ((status & ATH9K_INT_FATAL) ||
525 !ath9k_hw_check_alive(ah)) {
526 ath_reset(sc, false);
527 ath9k_ps_restore(sc);
531 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
532 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
535 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
537 if (status & rxmask) {
538 spin_lock_bh(&sc->rx.rxflushlock);
540 /* Check for high priority Rx first */
541 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
542 (status & ATH9K_INT_RXHP))
543 ath_rx_tasklet(sc, 0, true);
545 ath_rx_tasklet(sc, 0, false);
546 spin_unlock_bh(&sc->rx.rxflushlock);
549 if (status & ATH9K_INT_TX) {
550 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
551 ath_tx_edma_tasklet(sc);
556 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
558 * TSF sync does not look correct; remain awake to sync with
561 ath_print(common, ATH_DBG_PS,
562 "TSFOOR - Sync with next Beacon\n");
563 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
566 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
567 if (status & ATH9K_INT_GENTIMER)
568 ath_gen_timer_isr(sc->sc_ah);
570 /* re-enable hardware interrupt */
571 ath9k_hw_set_interrupts(ah, ah->imask);
572 ath9k_ps_restore(sc);
575 irqreturn_t ath_isr(int irq, void *dev)
577 #define SCHED_INTR ( \
590 struct ath_softc *sc = dev;
591 struct ath_hw *ah = sc->sc_ah;
592 enum ath9k_int status;
596 * The hardware is not ready/present, don't
597 * touch anything. Note this can happen early
598 * on if the IRQ is shared.
600 if (sc->sc_flags & SC_OP_INVALID)
604 /* shared irq, not for us */
606 if (!ath9k_hw_intrpend(ah))
610 * Figure out the reason(s) for the interrupt. Note
611 * that the hal returns a pseudo-ISR that may include
612 * bits we haven't explicitly enabled so we mask the
613 * value to insure we only process bits we requested.
615 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
616 status &= ah->imask; /* discard unasked-for bits */
619 * If there are no status bits set, then this interrupt was not
620 * for me (should have been caught above).
625 /* Cache the status */
626 sc->intrstatus = status;
628 if (status & SCHED_INTR)
632 * If a FATAL or RXORN interrupt is received, we have to reset the
635 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
636 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
639 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
640 (status & ATH9K_INT_BB_WATCHDOG)) {
641 ar9003_hw_bb_watchdog_dbg_info(ah);
645 if (status & ATH9K_INT_SWBA)
646 tasklet_schedule(&sc->bcon_tasklet);
648 if (status & ATH9K_INT_TXURN)
649 ath9k_hw_updatetxtriglevel(ah, true);
651 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
652 if (status & ATH9K_INT_RXEOL) {
653 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
654 ath9k_hw_set_interrupts(ah, ah->imask);
658 if (status & ATH9K_INT_MIB) {
660 * Disable interrupts until we service the MIB
661 * interrupt; otherwise it will continue to
664 ath9k_hw_set_interrupts(ah, 0);
666 * Let the hal handle the event. We assume
667 * it will clear whatever condition caused
670 ath9k_hw_procmibevent(ah);
671 ath9k_hw_set_interrupts(ah, ah->imask);
674 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
675 if (status & ATH9K_INT_TIM_TIMER) {
676 /* Clear RxAbort bit so that we can
678 ath9k_setpower(sc, ATH9K_PM_AWAKE);
679 ath9k_hw_setrxabort(sc->sc_ah, 0);
680 sc->ps_flags |= PS_WAIT_FOR_BEACON;
685 ath_debug_stat_interrupt(sc, status);
688 /* turn off every interrupt except SWBA */
689 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
690 tasklet_schedule(&sc->intr_tq);
698 static u32 ath_get_extchanmode(struct ath_softc *sc,
699 struct ieee80211_channel *chan,
700 enum nl80211_channel_type channel_type)
704 switch (chan->band) {
705 case IEEE80211_BAND_2GHZ:
706 switch(channel_type) {
707 case NL80211_CHAN_NO_HT:
708 case NL80211_CHAN_HT20:
709 chanmode = CHANNEL_G_HT20;
711 case NL80211_CHAN_HT40PLUS:
712 chanmode = CHANNEL_G_HT40PLUS;
714 case NL80211_CHAN_HT40MINUS:
715 chanmode = CHANNEL_G_HT40MINUS;
719 case IEEE80211_BAND_5GHZ:
720 switch(channel_type) {
721 case NL80211_CHAN_NO_HT:
722 case NL80211_CHAN_HT20:
723 chanmode = CHANNEL_A_HT20;
725 case NL80211_CHAN_HT40PLUS:
726 chanmode = CHANNEL_A_HT40PLUS;
728 case NL80211_CHAN_HT40MINUS:
729 chanmode = CHANNEL_A_HT40MINUS;
740 static void ath9k_bss_assoc_info(struct ath_softc *sc,
741 struct ieee80211_vif *vif,
742 struct ieee80211_bss_conf *bss_conf)
744 struct ath_hw *ah = sc->sc_ah;
745 struct ath_common *common = ath9k_hw_common(ah);
747 if (bss_conf->assoc) {
748 ath_print(common, ATH_DBG_CONFIG,
749 "Bss Info ASSOC %d, bssid: %pM\n",
750 bss_conf->aid, common->curbssid);
752 /* New association, store aid */
753 common->curaid = bss_conf->aid;
754 ath9k_hw_write_associd(ah);
757 * Request a re-configuration of Beacon related timers
758 * on the receipt of the first Beacon frame (i.e.,
759 * after time sync with the AP).
761 sc->ps_flags |= PS_BEACON_SYNC;
763 /* Configure the beacon */
764 ath_beacon_config(sc, vif);
766 /* Reset rssi stats */
767 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
769 ath_start_ani(common);
771 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
774 del_timer_sync(&common->ani.timer);
778 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
780 struct ath_hw *ah = sc->sc_ah;
781 struct ath_common *common = ath9k_hw_common(ah);
782 struct ieee80211_channel *channel = hw->conf.channel;
786 ath9k_hw_configpcipowersave(ah, 0, 0);
789 ah->curchan = ath_get_curchannel(sc, sc->hw);
791 spin_lock_bh(&sc->sc_resetlock);
792 r = ath9k_hw_reset(ah, ah->curchan, false);
794 ath_print(common, ATH_DBG_FATAL,
795 "Unable to reset channel (%u MHz), "
797 channel->center_freq, r);
799 spin_unlock_bh(&sc->sc_resetlock);
801 ath_update_txpow(sc);
802 if (ath_startrecv(sc) != 0) {
803 ath_print(common, ATH_DBG_FATAL,
804 "Unable to restart recv logic\n");
808 if (sc->sc_flags & SC_OP_BEACONS)
809 ath_beacon_config(sc, NULL); /* restart beacons */
811 /* Re-Enable interrupts */
812 ath9k_hw_set_interrupts(ah, ah->imask);
815 ath9k_hw_cfg_output(ah, ah->led_pin,
816 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
817 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
819 ieee80211_wake_queues(hw);
820 ath9k_ps_restore(sc);
823 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
825 struct ath_hw *ah = sc->sc_ah;
826 struct ieee80211_channel *channel = hw->conf.channel;
830 ieee80211_stop_queues(hw);
833 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
834 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
836 /* Disable interrupts */
837 ath9k_hw_set_interrupts(ah, 0);
839 ath_drain_all_txq(sc, false); /* clear pending tx frames */
840 ath_stoprecv(sc); /* turn off frame recv */
841 ath_flushrecv(sc); /* flush recv queue */
844 ah->curchan = ath_get_curchannel(sc, hw);
846 spin_lock_bh(&sc->sc_resetlock);
847 r = ath9k_hw_reset(ah, ah->curchan, false);
849 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
850 "Unable to reset channel (%u MHz), "
852 channel->center_freq, r);
854 spin_unlock_bh(&sc->sc_resetlock);
856 ath9k_hw_phy_disable(ah);
857 ath9k_hw_configpcipowersave(ah, 1, 1);
858 ath9k_ps_restore(sc);
859 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
862 int ath_reset(struct ath_softc *sc, bool retry_tx)
864 struct ath_hw *ah = sc->sc_ah;
865 struct ath_common *common = ath9k_hw_common(ah);
866 struct ieee80211_hw *hw = sc->hw;
870 del_timer_sync(&common->ani.timer);
872 ieee80211_stop_queues(hw);
874 ath9k_hw_set_interrupts(ah, 0);
875 ath_drain_all_txq(sc, retry_tx);
879 spin_lock_bh(&sc->sc_resetlock);
880 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
882 ath_print(common, ATH_DBG_FATAL,
883 "Unable to reset hardware; reset status %d\n", r);
884 spin_unlock_bh(&sc->sc_resetlock);
886 if (ath_startrecv(sc) != 0)
887 ath_print(common, ATH_DBG_FATAL,
888 "Unable to start recv logic\n");
891 * We may be doing a reset in response to a request
892 * that changes the channel so update any state that
893 * might change as a result.
895 ath_cache_conf_rate(sc, &hw->conf);
897 ath_update_txpow(sc);
899 if (sc->sc_flags & SC_OP_BEACONS)
900 ath_beacon_config(sc, NULL); /* restart beacons */
902 ath9k_hw_set_interrupts(ah, ah->imask);
906 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
907 if (ATH_TXQ_SETUP(sc, i)) {
908 spin_lock_bh(&sc->tx.txq[i].axq_lock);
909 ath_txq_schedule(sc, &sc->tx.txq[i]);
910 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
915 ieee80211_wake_queues(hw);
918 ath_start_ani(common);
923 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
929 qnum = sc->tx.hwq_map[WME_AC_VO];
932 qnum = sc->tx.hwq_map[WME_AC_VI];
935 qnum = sc->tx.hwq_map[WME_AC_BE];
938 qnum = sc->tx.hwq_map[WME_AC_BK];
941 qnum = sc->tx.hwq_map[WME_AC_BE];
948 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
973 /* XXX: Remove me once we don't depend on ath9k_channel for all
974 * this redundant data */
975 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
976 struct ath9k_channel *ichan)
978 struct ieee80211_channel *chan = hw->conf.channel;
979 struct ieee80211_conf *conf = &hw->conf;
981 ichan->channel = chan->center_freq;
984 if (chan->band == IEEE80211_BAND_2GHZ) {
985 ichan->chanmode = CHANNEL_G;
986 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
988 ichan->chanmode = CHANNEL_A;
989 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
992 if (conf_is_ht(conf))
993 ichan->chanmode = ath_get_extchanmode(sc, chan,
997 /**********************/
998 /* mac80211 callbacks */
999 /**********************/
1001 static int ath9k_start(struct ieee80211_hw *hw)
1003 struct ath_wiphy *aphy = hw->priv;
1004 struct ath_softc *sc = aphy->sc;
1005 struct ath_hw *ah = sc->sc_ah;
1006 struct ath_common *common = ath9k_hw_common(ah);
1007 struct ieee80211_channel *curchan = hw->conf.channel;
1008 struct ath9k_channel *init_channel;
1011 ath_print(common, ATH_DBG_CONFIG,
1012 "Starting driver with initial channel: %d MHz\n",
1013 curchan->center_freq);
1015 mutex_lock(&sc->mutex);
1017 if (ath9k_wiphy_started(sc)) {
1018 if (sc->chan_idx == curchan->hw_value) {
1020 * Already on the operational channel, the new wiphy
1021 * can be marked active.
1023 aphy->state = ATH_WIPHY_ACTIVE;
1024 ieee80211_wake_queues(hw);
1027 * Another wiphy is on another channel, start the new
1028 * wiphy in paused state.
1030 aphy->state = ATH_WIPHY_PAUSED;
1031 ieee80211_stop_queues(hw);
1033 mutex_unlock(&sc->mutex);
1036 aphy->state = ATH_WIPHY_ACTIVE;
1038 /* setup initial channel */
1040 sc->chan_idx = curchan->hw_value;
1042 init_channel = ath_get_curchannel(sc, hw);
1044 /* Reset SERDES registers */
1045 ath9k_hw_configpcipowersave(ah, 0, 0);
1048 * The basic interface to setting the hardware in a good
1049 * state is ``reset''. On return the hardware is known to
1050 * be powered up and with interrupts disabled. This must
1051 * be followed by initialization of the appropriate bits
1052 * and then setup of the interrupt mask.
1054 spin_lock_bh(&sc->sc_resetlock);
1055 r = ath9k_hw_reset(ah, init_channel, false);
1057 ath_print(common, ATH_DBG_FATAL,
1058 "Unable to reset hardware; reset status %d "
1059 "(freq %u MHz)\n", r,
1060 curchan->center_freq);
1061 spin_unlock_bh(&sc->sc_resetlock);
1064 spin_unlock_bh(&sc->sc_resetlock);
1067 * This is needed only to setup initial state
1068 * but it's best done after a reset.
1070 ath_update_txpow(sc);
1073 * Setup the hardware after reset:
1074 * The receive engine is set going.
1075 * Frame transmit is handled entirely
1076 * in the frame output path; there's nothing to do
1077 * here except setup the interrupt mask.
1079 if (ath_startrecv(sc) != 0) {
1080 ath_print(common, ATH_DBG_FATAL,
1081 "Unable to start recv logic\n");
1086 /* Setup our intr mask. */
1087 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1088 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1091 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1092 ah->imask |= ATH9K_INT_RXHP |
1094 ATH9K_INT_BB_WATCHDOG;
1096 ah->imask |= ATH9K_INT_RX;
1098 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1099 ah->imask |= ATH9K_INT_GTT;
1101 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1102 ah->imask |= ATH9K_INT_CST;
1104 ath_cache_conf_rate(sc, &hw->conf);
1106 sc->sc_flags &= ~SC_OP_INVALID;
1108 /* Disable BMISS interrupt when we're not associated */
1109 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1110 ath9k_hw_set_interrupts(ah, ah->imask);
1112 ieee80211_wake_queues(hw);
1114 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1116 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1117 !ah->btcoex_hw.enabled) {
1118 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1119 AR_STOMP_LOW_WLAN_WGHT);
1120 ath9k_hw_btcoex_enable(ah);
1122 if (common->bus_ops->bt_coex_prep)
1123 common->bus_ops->bt_coex_prep(common);
1124 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1125 ath9k_btcoex_timer_resume(sc);
1129 mutex_unlock(&sc->mutex);
1134 static int ath9k_tx(struct ieee80211_hw *hw,
1135 struct sk_buff *skb)
1137 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1138 struct ath_wiphy *aphy = hw->priv;
1139 struct ath_softc *sc = aphy->sc;
1140 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1141 struct ath_tx_control txctl;
1142 int padpos, padsize;
1143 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1146 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1147 ath_print(common, ATH_DBG_XMIT,
1148 "ath9k: %s: TX in unexpected wiphy state "
1149 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1153 if (sc->ps_enabled) {
1155 * mac80211 does not set PM field for normal data frames, so we
1156 * need to update that based on the current PS mode.
1158 if (ieee80211_is_data(hdr->frame_control) &&
1159 !ieee80211_is_nullfunc(hdr->frame_control) &&
1160 !ieee80211_has_pm(hdr->frame_control)) {
1161 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1162 "while in PS mode\n");
1163 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1167 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1169 * We are using PS-Poll and mac80211 can request TX while in
1170 * power save mode. Need to wake up hardware for the TX to be
1171 * completed and if needed, also for RX of buffered frames.
1173 ath9k_ps_wakeup(sc);
1174 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1175 ath9k_hw_setrxabort(sc->sc_ah, 0);
1176 if (ieee80211_is_pspoll(hdr->frame_control)) {
1177 ath_print(common, ATH_DBG_PS,
1178 "Sending PS-Poll to pick a buffered frame\n");
1179 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1181 ath_print(common, ATH_DBG_PS,
1182 "Wake up to complete TX\n");
1183 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1186 * The actual restore operation will happen only after
1187 * the sc_flags bit is cleared. We are just dropping
1188 * the ps_usecount here.
1190 ath9k_ps_restore(sc);
1193 memset(&txctl, 0, sizeof(struct ath_tx_control));
1196 * As a temporary workaround, assign seq# here; this will likely need
1197 * to be cleaned up to work better with Beacon transmission and virtual
1200 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1201 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1202 sc->tx.seq_no += 0x10;
1203 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1204 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1207 /* Add the padding after the header if this is not already done */
1208 padpos = ath9k_cmn_padpos(hdr->frame_control);
1209 padsize = padpos & 3;
1210 if (padsize && skb->len>padpos) {
1211 if (skb_headroom(skb) < padsize)
1213 skb_push(skb, padsize);
1214 memmove(skb->data, skb->data + padsize, padpos);
1217 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1218 txctl.txq = &sc->tx.txq[qnum];
1220 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1222 if (ath_tx_start(hw, skb, &txctl) != 0) {
1223 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1229 dev_kfree_skb_any(skb);
1233 static void ath9k_stop(struct ieee80211_hw *hw)
1235 struct ath_wiphy *aphy = hw->priv;
1236 struct ath_softc *sc = aphy->sc;
1237 struct ath_hw *ah = sc->sc_ah;
1238 struct ath_common *common = ath9k_hw_common(ah);
1240 mutex_lock(&sc->mutex);
1242 aphy->state = ATH_WIPHY_INACTIVE;
1245 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1247 cancel_delayed_work_sync(&sc->tx_complete_work);
1248 cancel_work_sync(&sc->paprd_work);
1250 if (!sc->num_sec_wiphy) {
1251 cancel_delayed_work_sync(&sc->wiphy_work);
1252 cancel_work_sync(&sc->chan_work);
1255 if (sc->sc_flags & SC_OP_INVALID) {
1256 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1257 mutex_unlock(&sc->mutex);
1261 if (ath9k_wiphy_started(sc)) {
1262 mutex_unlock(&sc->mutex);
1263 return; /* another wiphy still in use */
1266 /* Ensure HW is awake when we try to shut it down. */
1267 ath9k_ps_wakeup(sc);
1269 if (ah->btcoex_hw.enabled) {
1270 ath9k_hw_btcoex_disable(ah);
1271 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1272 ath9k_btcoex_timer_pause(sc);
1275 /* make sure h/w will not generate any interrupt
1276 * before setting the invalid flag. */
1277 ath9k_hw_set_interrupts(ah, 0);
1279 if (!(sc->sc_flags & SC_OP_INVALID)) {
1280 ath_drain_all_txq(sc, false);
1282 ath9k_hw_phy_disable(ah);
1284 sc->rx.rxlink = NULL;
1286 /* disable HAL and put h/w to sleep */
1287 ath9k_hw_disable(ah);
1288 ath9k_hw_configpcipowersave(ah, 1, 1);
1289 ath9k_ps_restore(sc);
1291 /* Finally, put the chip in FULL SLEEP mode */
1292 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1294 sc->sc_flags |= SC_OP_INVALID;
1296 mutex_unlock(&sc->mutex);
1298 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1301 static int ath9k_add_interface(struct ieee80211_hw *hw,
1302 struct ieee80211_vif *vif)
1304 struct ath_wiphy *aphy = hw->priv;
1305 struct ath_softc *sc = aphy->sc;
1306 struct ath_hw *ah = sc->sc_ah;
1307 struct ath_common *common = ath9k_hw_common(ah);
1308 struct ath_vif *avp = (void *)vif->drv_priv;
1309 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1312 mutex_lock(&sc->mutex);
1314 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1320 switch (vif->type) {
1321 case NL80211_IFTYPE_STATION:
1322 ic_opmode = NL80211_IFTYPE_STATION;
1324 case NL80211_IFTYPE_ADHOC:
1325 case NL80211_IFTYPE_AP:
1326 case NL80211_IFTYPE_MESH_POINT:
1327 if (sc->nbcnvifs >= ATH_BCBUF) {
1331 ic_opmode = vif->type;
1334 ath_print(common, ATH_DBG_FATAL,
1335 "Interface type %d not yet supported\n", vif->type);
1340 ath_print(common, ATH_DBG_CONFIG,
1341 "Attach a VIF of type: %d\n", ic_opmode);
1343 /* Set the VIF opmode */
1344 avp->av_opmode = ic_opmode;
1349 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1350 ath9k_set_bssid_mask(hw);
1353 goto out; /* skip global settings for secondary vif */
1355 if (ic_opmode == NL80211_IFTYPE_AP) {
1356 ath9k_hw_set_tsfadjust(ah, 1);
1357 sc->sc_flags |= SC_OP_TSF_RESET;
1360 /* Set the device opmode */
1361 ah->opmode = ic_opmode;
1364 * Enable MIB interrupts when there are hardware phy counters.
1365 * Note we only do this (at the moment) for station mode.
1367 if ((vif->type == NL80211_IFTYPE_STATION) ||
1368 (vif->type == NL80211_IFTYPE_ADHOC) ||
1369 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1370 if (ah->config.enable_ani)
1371 ah->imask |= ATH9K_INT_MIB;
1372 ah->imask |= ATH9K_INT_TSFOOR;
1375 ath9k_hw_set_interrupts(ah, ah->imask);
1377 if (vif->type == NL80211_IFTYPE_AP ||
1378 vif->type == NL80211_IFTYPE_ADHOC ||
1379 vif->type == NL80211_IFTYPE_MONITOR)
1380 ath_start_ani(common);
1383 mutex_unlock(&sc->mutex);
1387 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1388 struct ieee80211_vif *vif)
1390 struct ath_wiphy *aphy = hw->priv;
1391 struct ath_softc *sc = aphy->sc;
1392 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1393 struct ath_vif *avp = (void *)vif->drv_priv;
1396 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1398 mutex_lock(&sc->mutex);
1401 del_timer_sync(&common->ani.timer);
1403 /* Reclaim beacon resources */
1404 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1405 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1406 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1407 ath9k_ps_wakeup(sc);
1408 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1409 ath9k_ps_restore(sc);
1412 ath_beacon_return(sc, avp);
1413 sc->sc_flags &= ~SC_OP_BEACONS;
1415 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1416 if (sc->beacon.bslot[i] == vif) {
1417 printk(KERN_DEBUG "%s: vif had allocated beacon "
1418 "slot\n", __func__);
1419 sc->beacon.bslot[i] = NULL;
1420 sc->beacon.bslot_aphy[i] = NULL;
1426 mutex_unlock(&sc->mutex);
1429 void ath9k_enable_ps(struct ath_softc *sc)
1431 struct ath_hw *ah = sc->sc_ah;
1433 sc->ps_enabled = true;
1434 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1435 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1436 ah->imask |= ATH9K_INT_TIM_TIMER;
1437 ath9k_hw_set_interrupts(ah, ah->imask);
1439 ath9k_hw_setrxabort(ah, 1);
1443 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1445 struct ath_wiphy *aphy = hw->priv;
1446 struct ath_softc *sc = aphy->sc;
1447 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1448 struct ieee80211_conf *conf = &hw->conf;
1449 struct ath_hw *ah = sc->sc_ah;
1452 mutex_lock(&sc->mutex);
1455 * Leave this as the first check because we need to turn on the
1456 * radio if it was disabled before prior to processing the rest
1457 * of the changes. Likewise we must only disable the radio towards
1460 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1462 bool all_wiphys_idle;
1463 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1465 spin_lock_bh(&sc->wiphy_lock);
1466 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1467 ath9k_set_wiphy_idle(aphy, idle);
1469 enable_radio = (!idle && all_wiphys_idle);
1472 * After we unlock here its possible another wiphy
1473 * can be re-renabled so to account for that we will
1474 * only disable the radio toward the end of this routine
1475 * if by then all wiphys are still idle.
1477 spin_unlock_bh(&sc->wiphy_lock);
1480 sc->ps_idle = false;
1481 ath_radio_enable(sc, hw);
1482 ath_print(common, ATH_DBG_CONFIG,
1483 "not-idle: enabling radio\n");
1488 * We just prepare to enable PS. We have to wait until our AP has
1489 * ACK'd our null data frame to disable RX otherwise we'll ignore
1490 * those ACKs and end up retransmitting the same null data frames.
1491 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1493 if (changed & IEEE80211_CONF_CHANGE_PS) {
1494 if (conf->flags & IEEE80211_CONF_PS) {
1495 sc->ps_flags |= PS_ENABLED;
1497 * At this point we know hardware has received an ACK
1498 * of a previously sent null data frame.
1500 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1501 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1502 ath9k_enable_ps(sc);
1505 sc->ps_enabled = false;
1506 sc->ps_flags &= ~(PS_ENABLED |
1507 PS_NULLFUNC_COMPLETED);
1508 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1509 if (!(ah->caps.hw_caps &
1510 ATH9K_HW_CAP_AUTOSLEEP)) {
1511 ath9k_hw_setrxabort(sc->sc_ah, 0);
1512 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1514 PS_WAIT_FOR_PSPOLL_DATA |
1515 PS_WAIT_FOR_TX_ACK);
1516 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1517 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1518 ath9k_hw_set_interrupts(sc->sc_ah,
1525 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1526 if (conf->flags & IEEE80211_CONF_MONITOR) {
1527 ath_print(common, ATH_DBG_CONFIG,
1528 "HW opmode set to Monitor mode\n");
1529 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1533 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1534 struct ieee80211_channel *curchan = hw->conf.channel;
1535 int pos = curchan->hw_value;
1537 aphy->chan_idx = pos;
1538 aphy->chan_is_ht = conf_is_ht(conf);
1540 if (aphy->state == ATH_WIPHY_SCAN ||
1541 aphy->state == ATH_WIPHY_ACTIVE)
1542 ath9k_wiphy_pause_all_forced(sc, aphy);
1545 * Do not change operational channel based on a paused
1548 goto skip_chan_change;
1551 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1552 curchan->center_freq);
1554 /* XXX: remove me eventualy */
1555 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1557 ath_update_chainmask(sc, conf_is_ht(conf));
1559 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1560 ath_print(common, ATH_DBG_FATAL,
1561 "Unable to set channel\n");
1562 mutex_unlock(&sc->mutex);
1568 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1569 sc->config.txpowlimit = 2 * conf->power_level;
1570 ath_update_txpow(sc);
1573 spin_lock_bh(&sc->wiphy_lock);
1574 disable_radio = ath9k_all_wiphys_idle(sc);
1575 spin_unlock_bh(&sc->wiphy_lock);
1577 if (disable_radio) {
1578 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1580 ath_radio_disable(sc, hw);
1583 mutex_unlock(&sc->mutex);
1588 #define SUPPORTED_FILTERS \
1589 (FIF_PROMISC_IN_BSS | \
1594 FIF_BCN_PRBRESP_PROMISC | \
1597 /* FIXME: sc->sc_full_reset ? */
1598 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1599 unsigned int changed_flags,
1600 unsigned int *total_flags,
1603 struct ath_wiphy *aphy = hw->priv;
1604 struct ath_softc *sc = aphy->sc;
1607 changed_flags &= SUPPORTED_FILTERS;
1608 *total_flags &= SUPPORTED_FILTERS;
1610 sc->rx.rxfilter = *total_flags;
1611 ath9k_ps_wakeup(sc);
1612 rfilt = ath_calcrxfilter(sc);
1613 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1614 ath9k_ps_restore(sc);
1616 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1617 "Set HW RX filter: 0x%x\n", rfilt);
1620 static int ath9k_sta_add(struct ieee80211_hw *hw,
1621 struct ieee80211_vif *vif,
1622 struct ieee80211_sta *sta)
1624 struct ath_wiphy *aphy = hw->priv;
1625 struct ath_softc *sc = aphy->sc;
1627 ath_node_attach(sc, sta);
1632 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1633 struct ieee80211_vif *vif,
1634 struct ieee80211_sta *sta)
1636 struct ath_wiphy *aphy = hw->priv;
1637 struct ath_softc *sc = aphy->sc;
1639 ath_node_detach(sc, sta);
1644 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1645 const struct ieee80211_tx_queue_params *params)
1647 struct ath_wiphy *aphy = hw->priv;
1648 struct ath_softc *sc = aphy->sc;
1649 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1650 struct ath9k_tx_queue_info qi;
1653 if (queue >= WME_NUM_AC)
1656 mutex_lock(&sc->mutex);
1658 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1660 qi.tqi_aifs = params->aifs;
1661 qi.tqi_cwmin = params->cw_min;
1662 qi.tqi_cwmax = params->cw_max;
1663 qi.tqi_burstTime = params->txop;
1664 qnum = ath_get_hal_qnum(queue, sc);
1666 ath_print(common, ATH_DBG_CONFIG,
1667 "Configure tx [queue/halq] [%d/%d], "
1668 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1669 queue, qnum, params->aifs, params->cw_min,
1670 params->cw_max, params->txop);
1672 ret = ath_txq_update(sc, qnum, &qi);
1674 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1676 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1677 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1678 ath_beaconq_config(sc);
1680 mutex_unlock(&sc->mutex);
1685 static int ath9k_set_key(struct ieee80211_hw *hw,
1686 enum set_key_cmd cmd,
1687 struct ieee80211_vif *vif,
1688 struct ieee80211_sta *sta,
1689 struct ieee80211_key_conf *key)
1691 struct ath_wiphy *aphy = hw->priv;
1692 struct ath_softc *sc = aphy->sc;
1693 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1696 if (modparam_nohwcrypt)
1699 mutex_lock(&sc->mutex);
1700 ath9k_ps_wakeup(sc);
1701 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1705 ret = ath9k_cmn_key_config(common, vif, sta, key);
1707 key->hw_key_idx = ret;
1708 /* push IV and Michael MIC generation to stack */
1709 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1710 if (key->alg == ALG_TKIP)
1711 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1712 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1713 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1718 ath9k_cmn_key_delete(common, key);
1724 ath9k_ps_restore(sc);
1725 mutex_unlock(&sc->mutex);
1730 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1731 struct ieee80211_vif *vif,
1732 struct ieee80211_bss_conf *bss_conf,
1735 struct ath_wiphy *aphy = hw->priv;
1736 struct ath_softc *sc = aphy->sc;
1737 struct ath_hw *ah = sc->sc_ah;
1738 struct ath_common *common = ath9k_hw_common(ah);
1739 struct ath_vif *avp = (void *)vif->drv_priv;
1743 mutex_lock(&sc->mutex);
1745 if (changed & BSS_CHANGED_BSSID) {
1747 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1748 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1750 ath9k_hw_write_associd(ah);
1752 /* Set aggregation protection mode parameters */
1753 sc->config.ath_aggr_prot = 0;
1755 /* Only legacy IBSS for now */
1756 if (vif->type == NL80211_IFTYPE_ADHOC)
1757 ath_update_chainmask(sc, 0);
1759 ath_print(common, ATH_DBG_CONFIG,
1760 "BSSID: %pM aid: 0x%x\n",
1761 common->curbssid, common->curaid);
1763 /* need to reconfigure the beacon */
1764 sc->sc_flags &= ~SC_OP_BEACONS ;
1767 /* Enable transmission of beacons (AP, IBSS, MESH) */
1768 if ((changed & BSS_CHANGED_BEACON) ||
1769 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1770 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1771 error = ath_beacon_alloc(aphy, vif);
1773 ath_beacon_config(sc, vif);
1776 if (changed & BSS_CHANGED_ERP_SLOT) {
1777 if (bss_conf->use_short_slot)
1781 if (vif->type == NL80211_IFTYPE_AP) {
1783 * Defer update, so that connected stations can adjust
1784 * their settings at the same time.
1785 * See beacon.c for more details
1787 sc->beacon.slottime = slottime;
1788 sc->beacon.updateslot = UPDATE;
1790 ah->slottime = slottime;
1791 ath9k_hw_init_global_settings(ah);
1795 /* Disable transmission of beacons */
1796 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1797 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1799 if (changed & BSS_CHANGED_BEACON_INT) {
1800 sc->beacon_interval = bss_conf->beacon_int;
1802 * In case of AP mode, the HW TSF has to be reset
1803 * when the beacon interval changes.
1805 if (vif->type == NL80211_IFTYPE_AP) {
1806 sc->sc_flags |= SC_OP_TSF_RESET;
1807 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1808 error = ath_beacon_alloc(aphy, vif);
1810 ath_beacon_config(sc, vif);
1812 ath_beacon_config(sc, vif);
1816 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1817 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1818 bss_conf->use_short_preamble);
1819 if (bss_conf->use_short_preamble)
1820 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1822 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1825 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1826 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1827 bss_conf->use_cts_prot);
1828 if (bss_conf->use_cts_prot &&
1829 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1830 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1832 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1835 if (changed & BSS_CHANGED_ASSOC) {
1836 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1838 ath9k_bss_assoc_info(sc, vif, bss_conf);
1841 mutex_unlock(&sc->mutex);
1844 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1847 struct ath_wiphy *aphy = hw->priv;
1848 struct ath_softc *sc = aphy->sc;
1850 mutex_lock(&sc->mutex);
1851 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1852 mutex_unlock(&sc->mutex);
1857 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1859 struct ath_wiphy *aphy = hw->priv;
1860 struct ath_softc *sc = aphy->sc;
1862 mutex_lock(&sc->mutex);
1863 ath9k_hw_settsf64(sc->sc_ah, tsf);
1864 mutex_unlock(&sc->mutex);
1867 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1869 struct ath_wiphy *aphy = hw->priv;
1870 struct ath_softc *sc = aphy->sc;
1872 mutex_lock(&sc->mutex);
1874 ath9k_ps_wakeup(sc);
1875 ath9k_hw_reset_tsf(sc->sc_ah);
1876 ath9k_ps_restore(sc);
1878 mutex_unlock(&sc->mutex);
1881 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1882 struct ieee80211_vif *vif,
1883 enum ieee80211_ampdu_mlme_action action,
1884 struct ieee80211_sta *sta,
1887 struct ath_wiphy *aphy = hw->priv;
1888 struct ath_softc *sc = aphy->sc;
1894 case IEEE80211_AMPDU_RX_START:
1895 if (!(sc->sc_flags & SC_OP_RXAGGR))
1898 case IEEE80211_AMPDU_RX_STOP:
1900 case IEEE80211_AMPDU_TX_START:
1901 ath9k_ps_wakeup(sc);
1902 ath_tx_aggr_start(sc, sta, tid, ssn);
1903 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1904 ath9k_ps_restore(sc);
1906 case IEEE80211_AMPDU_TX_STOP:
1907 ath9k_ps_wakeup(sc);
1908 ath_tx_aggr_stop(sc, sta, tid);
1909 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1910 ath9k_ps_restore(sc);
1912 case IEEE80211_AMPDU_TX_OPERATIONAL:
1913 ath9k_ps_wakeup(sc);
1914 ath_tx_aggr_resume(sc, sta, tid);
1915 ath9k_ps_restore(sc);
1918 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1919 "Unknown AMPDU action\n");
1927 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1928 struct survey_info *survey)
1930 struct ath_wiphy *aphy = hw->priv;
1931 struct ath_softc *sc = aphy->sc;
1932 struct ath_hw *ah = sc->sc_ah;
1933 struct ath_common *common = ath9k_hw_common(ah);
1934 struct ieee80211_conf *conf = &hw->conf;
1939 survey->channel = conf->channel;
1940 survey->filled = SURVEY_INFO_NOISE_DBM;
1941 survey->noise = common->ani.noise_floor;
1946 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1948 struct ath_wiphy *aphy = hw->priv;
1949 struct ath_softc *sc = aphy->sc;
1950 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1952 mutex_lock(&sc->mutex);
1953 if (ath9k_wiphy_scanning(sc)) {
1954 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1957 * Do not allow the concurrent scanning state for now. This
1958 * could be improved with scanning control moved into ath9k.
1960 mutex_unlock(&sc->mutex);
1964 aphy->state = ATH_WIPHY_SCAN;
1965 ath9k_wiphy_pause_all_forced(sc, aphy);
1966 sc->sc_flags |= SC_OP_SCANNING;
1967 del_timer_sync(&common->ani.timer);
1968 cancel_work_sync(&sc->paprd_work);
1969 cancel_delayed_work_sync(&sc->tx_complete_work);
1970 mutex_unlock(&sc->mutex);
1973 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1975 struct ath_wiphy *aphy = hw->priv;
1976 struct ath_softc *sc = aphy->sc;
1977 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1979 mutex_lock(&sc->mutex);
1980 aphy->state = ATH_WIPHY_ACTIVE;
1981 sc->sc_flags &= ~SC_OP_SCANNING;
1982 sc->sc_flags |= SC_OP_FULL_RESET;
1983 ath_start_ani(common);
1984 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1985 ath_beacon_config(sc, NULL);
1986 mutex_unlock(&sc->mutex);
1989 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1991 struct ath_wiphy *aphy = hw->priv;
1992 struct ath_softc *sc = aphy->sc;
1993 struct ath_hw *ah = sc->sc_ah;
1995 mutex_lock(&sc->mutex);
1996 ah->coverage_class = coverage_class;
1997 ath9k_hw_init_global_settings(ah);
1998 mutex_unlock(&sc->mutex);
2001 struct ieee80211_ops ath9k_ops = {
2003 .start = ath9k_start,
2005 .add_interface = ath9k_add_interface,
2006 .remove_interface = ath9k_remove_interface,
2007 .config = ath9k_config,
2008 .configure_filter = ath9k_configure_filter,
2009 .sta_add = ath9k_sta_add,
2010 .sta_remove = ath9k_sta_remove,
2011 .conf_tx = ath9k_conf_tx,
2012 .bss_info_changed = ath9k_bss_info_changed,
2013 .set_key = ath9k_set_key,
2014 .get_tsf = ath9k_get_tsf,
2015 .set_tsf = ath9k_set_tsf,
2016 .reset_tsf = ath9k_reset_tsf,
2017 .ampdu_action = ath9k_ampdu_action,
2018 .get_survey = ath9k_get_survey,
2019 .sw_scan_start = ath9k_sw_scan_start,
2020 .sw_scan_complete = ath9k_sw_scan_complete,
2021 .rfkill_poll = ath9k_rfkill_poll_state,
2022 .set_coverage_class = ath9k_set_coverage_class,