drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 static void ath_start_ani(struct ath_common *common)
 158 {
 159         struct ath_hw *ah = common->ah;
 160         unsigned long timestamp = jiffies_to_msecs(jiffies);
 161         struct ath_softc *sc = (struct ath_softc *) common->priv;
 162
 163         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 164                 return;
 165
 166         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 167                 return;
 168
 169         common->ani.longcal_timer = timestamp;
 170         common->ani.shortcal_timer = timestamp;
 171         common->ani.checkani_timer = timestamp;
 172
 173         mod_timer(&common->ani.timer,
 174                   jiffies +
 175                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 176 }
 177
 178 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 179 {
 180         struct ath_hw *ah = sc->sc_ah;
 181         struct ath9k_channel *chan = &ah->channels[channel];
 182         struct survey_info *survey = &sc->survey[channel];
 183
 184         if (chan->noisefloor) {
 185                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 186                 survey->noise = chan->noisefloor;
 187         }
 188 }
 189
 190 static void ath_update_survey_stats(struct ath_softc *sc)
 191 {
 192         struct ath_hw *ah = sc->sc_ah;
 193         struct ath_common *common = ath9k_hw_common(ah);
 194         int pos = ah->curchan - &ah->channels[0];
 195         struct survey_info *survey = &sc->survey[pos];
 196         struct ath_cycle_counters *cc = &common->cc_survey;
 197         unsigned int div = common->clockrate * 1000;
 198
 199         ath_hw_cycle_counters_update(common);
 200
 201         if (cc->cycles > 0) {
 202                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 203                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 204                         SURVEY_INFO_CHANNEL_TIME_RX |
 205                         SURVEY_INFO_CHANNEL_TIME_TX;
 206                 survey->channel_time += cc->cycles / div;
 207                 survey->channel_time_busy += cc->rx_busy / div;
 208                 survey->channel_time_rx += cc->rx_frame / div;
 209                 survey->channel_time_tx += cc->tx_frame / div;
 210         }
 211         memset(cc, 0, sizeof(*cc));
 212
 213         ath_update_survey_nf(sc, pos);
 214 }
 215
 216 /*
 217  * Set/change channels.  If the channel is really being changed, it's done
 218  * by reseting the chip.  To accomplish this we must first cleanup any pending
 219  * DMA, then restart stuff.
 220 */
 221 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 222                     struct ath9k_channel *hchan)
 223 {
 224         struct ath_wiphy *aphy = hw->priv;
 225         struct ath_hw *ah = sc->sc_ah;
 226         struct ath_common *common = ath9k_hw_common(ah);
 227         struct ieee80211_conf *conf = &common->hw->conf;
 228         bool fastcc = true, stopped;
 229         struct ieee80211_channel *channel = hw->conf.channel;
 230         struct ath9k_hw_cal_data *caldata = NULL;
 231         int r;
 232
 233         if (sc->sc_flags & SC_OP_INVALID)
 234                 return -EIO;
 235
 236         del_timer_sync(&common->ani.timer);
 237         cancel_work_sync(&sc->paprd_work);
 238         cancel_work_sync(&sc->hw_check_work);
 239         cancel_delayed_work_sync(&sc->tx_complete_work);
 240
 241         ath9k_ps_wakeup(sc);
 242
 243         /*
 244          * This is only performed if the channel settings have
 245          * actually changed.
 246          *
 247          * To switch channels clear any pending DMA operations;
 248          * wait long enough for the RX fifo to drain, reset the
 249          * hardware at the new frequency, and then re-enable
 250          * the relevant bits of the h/w.
 251          */
 252         ath9k_hw_set_interrupts(ah, 0);
 253         ath_drain_all_txq(sc, false);
 254         stopped = ath_stoprecv(sc);
 255
 256         /* XXX: do not flush receive queue here. We don't want
 257          * to flush data frames already in queue because of
 258          * changing channel. */
 259
 260         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 fastcc = false;
 262
 263         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 264                 caldata = &aphy->caldata;
 265
 266         ath_print(common, ATH_DBG_CONFIG,
 267                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 268                   sc->sc_ah->curchan->channel,
 269                   channel->center_freq, conf_is_ht40(conf),
 270                   fastcc);
 271
 272         spin_lock_bh(&sc->sc_resetlock);
 273
 274         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 275         if (r) {
 276                 ath_print(common, ATH_DBG_FATAL,
 277                           "Unable to reset channel (%u MHz), "
 278                           "reset status %d\n",
 279                           channel->center_freq, r);
 280                 spin_unlock_bh(&sc->sc_resetlock);
 281                 goto ps_restore;
 282         }
 283         spin_unlock_bh(&sc->sc_resetlock);
 284
 285         if (ath_startrecv(sc) != 0) {
 286                 ath_print(common, ATH_DBG_FATAL,
 287                           "Unable to restart recv logic\n");
 288                 r = -EIO;
 289                 goto ps_restore;
 290         }
 291
 292         ath_cache_conf_rate(sc, &hw->conf);
 293         ath_update_txpow(sc);
 294         ath9k_hw_set_interrupts(ah, ah->imask);
 295
 296         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 297                 ath_beacon_config(sc, NULL);
 298                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 299                 ath_start_ani(common);
 300         }
 301
 302  ps_restore:
 303         ath9k_ps_restore(sc);
 304         return r;
 305 }
 306
 307 static void ath_paprd_activate(struct ath_softc *sc)
 308 {
 309         struct ath_hw *ah = sc->sc_ah;
 310         struct ath9k_hw_cal_data *caldata = ah->caldata;
 311         struct ath_common *common = ath9k_hw_common(ah);
 312         int chain;
 313
 314         if (!caldata || !caldata->paprd_done)
 315                 return;
 316
 317         ath9k_ps_wakeup(sc);
 318         ar9003_paprd_enable(ah, false);
 319         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 320                 if (!(common->tx_chainmask & BIT(chain)))
 321                         continue;
 322
 323                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 324         }
 325
 326         ar9003_paprd_enable(ah, true);
 327         ath9k_ps_restore(sc);
 328 }
 329
 330 void ath_paprd_calibrate(struct work_struct *work)
 331 {
 332         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 333         struct ieee80211_hw *hw = sc->hw;
 334         struct ath_hw *ah = sc->sc_ah;
 335         struct ieee80211_hdr *hdr;
 336         struct sk_buff *skb = NULL;
 337         struct ieee80211_tx_info *tx_info;
 338         int band = hw->conf.channel->band;
 339         struct ieee80211_supported_band *sband = &sc->sbands[band];
 340         struct ath_tx_control txctl;
 341         struct ath9k_hw_cal_data *caldata = ah->caldata;
 342         struct ath_common *common = ath9k_hw_common(ah);
 343         int qnum, ftype;
 344         int chain_ok = 0;
 345         int chain;
 346         int len = 1800;
 347         int time_left;
 348         int i;
 349
 350         if (!caldata)
 351                 return;
 352
 353         skb = alloc_skb(len, GFP_KERNEL);
 354         if (!skb)
 355                 return;
 356
 357         tx_info = IEEE80211_SKB_CB(skb);
 358
 359         skb_put(skb, len);
 360         memset(skb->data, 0, len);
 361         hdr = (struct ieee80211_hdr *)skb->data;
 362         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 363         hdr->frame_control = cpu_to_le16(ftype);
 364         hdr->duration_id = cpu_to_le16(10);
 365         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 366         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 367         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 368
 369         memset(&txctl, 0, sizeof(txctl));
 370         qnum = sc->tx.hwq_map[WME_AC_BE];
 371         txctl.txq = &sc->tx.txq[qnum];
 372
 373         ath9k_ps_wakeup(sc);
 374         ar9003_paprd_init_table(ah);
 375         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 376                 if (!(common->tx_chainmask & BIT(chain)))
 377                         continue;
 378
 379                 chain_ok = 0;
 380                 memset(tx_info, 0, sizeof(*tx_info));
 381                 tx_info->band = band;
 382
 383                 for (i = 0; i < 4; i++) {
 384                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 385                         tx_info->control.rates[i].count = 6;
 386                 }
 387
 388                 init_completion(&sc->paprd_complete);
 389                 ar9003_paprd_setup_gain_table(ah, chain);
 390                 txctl.paprd = BIT(chain);
 391                 if (ath_tx_start(hw, skb, &txctl) != 0)
 392                         break;
 393
 394                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 395                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 396                 if (!time_left) {
 397                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 398                                   "Timeout waiting for paprd training on "
 399                                   "TX chain %d\n",
 400                                   chain);
 401                         goto fail_paprd;
 402                 }
 403
 404                 if (!ar9003_paprd_is_done(ah))
 405                         break;
 406
 407                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 408                         break;
 409
 410                 chain_ok = 1;
 411         }
 412         kfree_skb(skb);
 413
 414         if (chain_ok) {
 415                 caldata->paprd_done = true;
 416                 ath_paprd_activate(sc);
 417         }
 418
 419 fail_paprd:
 420         ath9k_ps_restore(sc);
 421 }
 422
 423 /*
 424  *  This routine performs the periodic noise floor calibration function
 425  *  that is used to adjust and optimize the chip performance.  This
 426  *  takes environmental changes (location, temperature) into account.
 427  *  When the task is complete, it reschedules itself depending on the
 428  *  appropriate interval that was calculated.
 429  */
 430 void ath_ani_calibrate(unsigned long data)
 431 {
 432         struct ath_softc *sc = (struct ath_softc *)data;
 433         struct ath_hw *ah = sc->sc_ah;
 434         struct ath_common *common = ath9k_hw_common(ah);
 435         bool longcal = false;
 436         bool shortcal = false;
 437         bool aniflag = false;
 438         unsigned int timestamp = jiffies_to_msecs(jiffies);
 439         u32 cal_interval, short_cal_interval, long_cal_interval;
 440         unsigned long flags;
 441
 442         if (ah->caldata && ah->caldata->nfcal_interference)
 443                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 444         else
 445                 long_cal_interval = ATH_LONG_CALINTERVAL;
 446
 447         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 448                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 449
 450         /* Only calibrate if awake */
 451         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 452                 goto set_timer;
 453
 454         ath9k_ps_wakeup(sc);
 455
 456         /* Long calibration runs independently of short calibration. */
 457         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 458                 longcal = true;
 459                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 460                 common->ani.longcal_timer = timestamp;
 461         }
 462
 463         /* Short calibration applies only while caldone is false */
 464         if (!common->ani.caldone) {
 465                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 466                         shortcal = true;
 467                         ath_print(common, ATH_DBG_ANI,
 468                                   "shortcal @%lu\n", jiffies);
 469                         common->ani.shortcal_timer = timestamp;
 470                         common->ani.resetcal_timer = timestamp;
 471                 }
 472         } else {
 473                 if ((timestamp - common->ani.resetcal_timer) >=
 474                     ATH_RESTART_CALINTERVAL) {
 475                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 476                         if (common->ani.caldone)
 477                                 common->ani.resetcal_timer = timestamp;
 478                 }
 479         }
 480
 481         /* Verify whether we must check ANI */
 482         if ((timestamp - common->ani.checkani_timer) >=
 483              ah->config.ani_poll_interval) {
 484                 aniflag = true;
 485                 common->ani.checkani_timer = timestamp;
 486         }
 487
 488         /* Skip all processing if there's nothing to do. */
 489         if (longcal || shortcal || aniflag) {
 490                 /* Call ANI routine if necessary */
 491                 if (aniflag) {
 492                         spin_lock_irqsave(&common->cc_lock, flags);
 493                         ath9k_hw_ani_monitor(ah, ah->curchan);
 494                         ath_update_survey_stats(sc);
 495                         spin_unlock_irqrestore(&common->cc_lock, flags);
 496                 }
 497
 498                 /* Perform calibration if necessary */
 499                 if (longcal || shortcal) {
 500                         common->ani.caldone =
 501                                 ath9k_hw_calibrate(ah,
 502                                                    ah->curchan,
 503                                                    common->rx_chainmask,
 504                                                    longcal);
 505                 }
 506         }
 507
 508         ath9k_ps_restore(sc);
 509
 510 set_timer:
 511         /*
 512         * Set timer interval based on previous results.
 513         * The interval must be the shortest necessary to satisfy ANI,
 514         * short calibration and long calibration.
 515         */
 516         cal_interval = ATH_LONG_CALINTERVAL;
 517         if (sc->sc_ah->config.enable_ani)
 518                 cal_interval = min(cal_interval,
 519                                    (u32)ah->config.ani_poll_interval);
 520         if (!common->ani.caldone)
 521                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 522
 523         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 524         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 525                 if (!ah->caldata->paprd_done)
 526                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 527                 else
 528                         ath_paprd_activate(sc);
 529         }
 530 }
 531
 532 /*
 533  * Update tx/rx chainmask. For legacy association,
 534  * hard code chainmask to 1x1, for 11n association, use
 535  * the chainmask configuration, for bt coexistence, use
 536  * the chainmask configuration even in legacy mode.
 537  */
 538 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 539 {
 540         struct ath_hw *ah = sc->sc_ah;
 541         struct ath_common *common = ath9k_hw_common(ah);
 542
 543         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 544             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 545                 common->tx_chainmask = ah->caps.tx_chainmask;
 546                 common->rx_chainmask = ah->caps.rx_chainmask;
 547         } else {
 548                 common->tx_chainmask = 1;
 549                 common->rx_chainmask = 1;
 550         }
 551
 552         ath_print(common, ATH_DBG_CONFIG,
 553                   "tx chmask: %d, rx chmask: %d\n",
 554                   common->tx_chainmask,
 555                   common->rx_chainmask);
 556 }
 557
 558 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 559 {
 560         struct ath_node *an;
 561
 562         an = (struct ath_node *)sta->drv_priv;
 563
 564         if (sc->sc_flags & SC_OP_TXAGGR) {
 565                 ath_tx_node_init(sc, an);
 566                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 567                                      sta->ht_cap.ampdu_factor);
 568                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 569                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 570         }
 571 }
 572
 573 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 574 {
 575         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 576
 577         if (sc->sc_flags & SC_OP_TXAGGR)
 578                 ath_tx_node_cleanup(sc, an);
 579 }
 580
 581 void ath_hw_check(struct work_struct *work)
 582 {
 583         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 584         int i;
 585
 586         ath9k_ps_wakeup(sc);
 587
 588         for (i = 0; i < 3; i++) {
 589                 if (ath9k_hw_check_alive(sc->sc_ah))
 590                         goto out;
 591
 592                 msleep(1);
 593         }
 594         ath_reset(sc, false);
 595
 596 out:
 597         ath9k_ps_restore(sc);
 598 }
 599
 600 void ath9k_tasklet(unsigned long data)
 601 {
 602         struct ath_softc *sc = (struct ath_softc *)data;
 603         struct ath_hw *ah = sc->sc_ah;
 604         struct ath_common *common = ath9k_hw_common(ah);
 605
 606         u32 status = sc->intrstatus;
 607         u32 rxmask;
 608
 609         ath9k_ps_wakeup(sc);
 610
 611         if (status & ATH9K_INT_FATAL) {
 612                 ath_reset(sc, false);
 613                 ath9k_ps_restore(sc);
 614                 return;
 615         }
 616
 617         if (!ath9k_hw_check_alive(ah))
 618                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 619
 620         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 621                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 622                           ATH9K_INT_RXORN);
 623         else
 624                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 625
 626         if (status & rxmask) {
 627                 spin_lock_bh(&sc->rx.rxflushlock);
 628
 629                 /* Check for high priority Rx first */
 630                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 631                     (status & ATH9K_INT_RXHP))
 632                         ath_rx_tasklet(sc, 0, true);
 633
 634                 ath_rx_tasklet(sc, 0, false);
 635                 spin_unlock_bh(&sc->rx.rxflushlock);
 636         }
 637
 638         if (status & ATH9K_INT_TX) {
 639                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 640                         ath_tx_edma_tasklet(sc);
 641                 else
 642                         ath_tx_tasklet(sc);
 643         }
 644
 645         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 646                 /*
 647                  * TSF sync does not look correct; remain awake to sync with
 648                  * the next Beacon.
 649                  */
 650                 ath_print(common, ATH_DBG_PS,
 651                           "TSFOOR - Sync with next Beacon\n");
 652                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 653         }
 654
 655         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 656                 if (status & ATH9K_INT_GENTIMER)
 657                         ath_gen_timer_isr(sc->sc_ah);
 658
 659         /* re-enable hardware interrupt */
 660         ath9k_hw_set_interrupts(ah, ah->imask);
 661         ath9k_ps_restore(sc);
 662 }
 663
 664 irqreturn_t ath_isr(int irq, void *dev)
 665 {
 666 #define SCHED_INTR (                            \
 667                 ATH9K_INT_FATAL |               \
 668                 ATH9K_INT_RXORN |               \
 669                 ATH9K_INT_RXEOL |               \
 670                 ATH9K_INT_RX |                  \
 671                 ATH9K_INT_RXLP |                \
 672                 ATH9K_INT_RXHP |                \
 673                 ATH9K_INT_TX |                  \
 674                 ATH9K_INT_BMISS |               \
 675                 ATH9K_INT_CST |                 \
 676                 ATH9K_INT_TSFOOR |              \
 677                 ATH9K_INT_GENTIMER)
 678
 679         struct ath_softc *sc = dev;
 680         struct ath_hw *ah = sc->sc_ah;
 681         struct ath_common *common = ath9k_hw_common(ah);
 682         enum ath9k_int status;
 683         bool sched = false;
 684
 685         /*
 686          * The hardware is not ready/present, don't
 687          * touch anything. Note this can happen early
 688          * on if the IRQ is shared.
 689          */
 690         if (sc->sc_flags & SC_OP_INVALID)
 691                 return IRQ_NONE;
 692
 693
 694         /* shared irq, not for us */
 695
 696         if (!ath9k_hw_intrpend(ah))
 697                 return IRQ_NONE;
 698
 699         /*
 700          * Figure out the reason(s) for the interrupt.  Note
 701          * that the hal returns a pseudo-ISR that may include
 702          * bits we haven't explicitly enabled so we mask the
 703          * value to insure we only process bits we requested.
 704          */
 705         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 706         status &= ah->imask;    /* discard unasked-for bits */
 707
 708         /*
 709          * If there are no status bits set, then this interrupt was not
 710          * for me (should have been caught above).
 711          */
 712         if (!status)
 713                 return IRQ_NONE;
 714
 715         /* Cache the status */
 716         sc->intrstatus = status;
 717
 718         if (status & SCHED_INTR)
 719                 sched = true;
 720
 721         /*
 722          * If a FATAL or RXORN interrupt is received, we have to reset the
 723          * chip immediately.
 724          */
 725         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 726             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 727                 goto chip_reset;
 728
 729         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 730             (status & ATH9K_INT_BB_WATCHDOG)) {
 731
 732                 spin_lock(&common->cc_lock);
 733                 ath_hw_cycle_counters_update(common);
 734                 ar9003_hw_bb_watchdog_dbg_info(ah);
 735                 spin_unlock(&common->cc_lock);
 736
 737                 goto chip_reset;
 738         }
 739
 740         if (status & ATH9K_INT_SWBA)
 741                 tasklet_schedule(&sc->bcon_tasklet);
 742
 743         if (status & ATH9K_INT_TXURN)
 744                 ath9k_hw_updatetxtriglevel(ah, true);
 745
 746         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 747                 if (status & ATH9K_INT_RXEOL) {
 748                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 749                         ath9k_hw_set_interrupts(ah, ah->imask);
 750                 }
 751         }
 752
 753         if (status & ATH9K_INT_MIB) {
 754                 /*
 755                  * Disable interrupts until we service the MIB
 756                  * interrupt; otherwise it will continue to
 757                  * fire.
 758                  */
 759                 ath9k_hw_set_interrupts(ah, 0);
 760                 /*
 761                  * Let the hal handle the event. We assume
 762                  * it will clear whatever condition caused
 763                  * the interrupt.
 764                  */
 765                 ath9k_hw_proc_mib_event(ah);
 766                 ath9k_hw_set_interrupts(ah, ah->imask);
 767         }
 768
 769         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 770                 if (status & ATH9K_INT_TIM_TIMER) {
 771                         /* Clear RxAbort bit so that we can
 772                          * receive frames */
 773                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 774                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 775                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 776                 }
 777
 778 chip_reset:
 779
 780         ath_debug_stat_interrupt(sc, status);
 781
 782         if (sched) {
 783                 /* turn off every interrupt except SWBA */
 784                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 785                 tasklet_schedule(&sc->intr_tq);
 786         }
 787
 788         return IRQ_HANDLED;
 789
 790 #undef SCHED_INTR
 791 }
 792
 793 static u32 ath_get_extchanmode(struct ath_softc *sc,
 794                                struct ieee80211_channel *chan,
 795                                enum nl80211_channel_type channel_type)
 796 {
 797         u32 chanmode = 0;
 798
 799         switch (chan->band) {
 800         case IEEE80211_BAND_2GHZ:
 801                 switch(channel_type) {
 802                 case NL80211_CHAN_NO_HT:
 803                 case NL80211_CHAN_HT20:
 804                         chanmode = CHANNEL_G_HT20;
 805                         break;
 806                 case NL80211_CHAN_HT40PLUS:
 807                         chanmode = CHANNEL_G_HT40PLUS;
 808                         break;
 809                 case NL80211_CHAN_HT40MINUS:
 810                         chanmode = CHANNEL_G_HT40MINUS;
 811                         break;
 812                 }
 813                 break;
 814         case IEEE80211_BAND_5GHZ:
 815                 switch(channel_type) {
 816                 case NL80211_CHAN_NO_HT:
 817                 case NL80211_CHAN_HT20:
 818                         chanmode = CHANNEL_A_HT20;
 819                         break;
 820                 case NL80211_CHAN_HT40PLUS:
 821                         chanmode = CHANNEL_A_HT40PLUS;
 822                         break;
 823                 case NL80211_CHAN_HT40MINUS:
 824                         chanmode = CHANNEL_A_HT40MINUS;
 825                         break;
 826                 }
 827                 break;
 828         default:
 829                 break;
 830         }
 831
 832         return chanmode;
 833 }
 834
 835 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 836                                  struct ieee80211_vif *vif,
 837                                  struct ieee80211_bss_conf *bss_conf)
 838 {
 839         struct ath_hw *ah = sc->sc_ah;
 840         struct ath_common *common = ath9k_hw_common(ah);
 841
 842         if (bss_conf->assoc) {
 843                 ath_print(common, ATH_DBG_CONFIG,
 844                           "Bss Info ASSOC %d, bssid: %pM\n",
 845                            bss_conf->aid, common->curbssid);
 846
 847                 /* New association, store aid */
 848                 common->curaid = bss_conf->aid;
 849                 ath9k_hw_write_associd(ah);
 850
 851                 /*
 852                  * Request a re-configuration of Beacon related timers
 853                  * on the receipt of the first Beacon frame (i.e.,
 854                  * after time sync with the AP).
 855                  */
 856                 sc->ps_flags |= PS_BEACON_SYNC;
 857
 858                 /* Configure the beacon */
 859                 ath_beacon_config(sc, vif);
 860
 861                 /* Reset rssi stats */
 862                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 863
 864                 sc->sc_flags |= SC_OP_ANI_RUN;
 865                 ath_start_ani(common);
 866         } else {
 867                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 868                 common->curaid = 0;
 869                 /* Stop ANI */
 870                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 871                 del_timer_sync(&common->ani.timer);
 872         }
 873 }
 874
 875 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 876 {
 877         struct ath_hw *ah = sc->sc_ah;
 878         struct ath_common *common = ath9k_hw_common(ah);
 879         struct ieee80211_channel *channel = hw->conf.channel;
 880         int r;
 881
 882         ath9k_ps_wakeup(sc);
 883         ath9k_hw_configpcipowersave(ah, 0, 0);
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 887
 888         spin_lock_bh(&sc->sc_resetlock);
 889         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 890         if (r) {
 891                 ath_print(common, ATH_DBG_FATAL,
 892                           "Unable to reset channel (%u MHz), "
 893                           "reset status %d\n",
 894                           channel->center_freq, r);
 895         }
 896         spin_unlock_bh(&sc->sc_resetlock);
 897
 898         ath_update_txpow(sc);
 899         if (ath_startrecv(sc) != 0) {
 900                 ath_print(common, ATH_DBG_FATAL,
 901                           "Unable to restart recv logic\n");
 902                 return;
 903         }
 904
 905         if (sc->sc_flags & SC_OP_BEACONS)
 906                 ath_beacon_config(sc, NULL);    /* restart beacons */
 907
 908         /* Re-Enable  interrupts */
 909         ath9k_hw_set_interrupts(ah, ah->imask);
 910
 911         /* Enable LED */
 912         ath9k_hw_cfg_output(ah, ah->led_pin,
 913                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 914         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 915
 916         ieee80211_wake_queues(hw);
 917         ath9k_ps_restore(sc);
 918 }
 919
 920 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 921 {
 922         struct ath_hw *ah = sc->sc_ah;
 923         struct ieee80211_channel *channel = hw->conf.channel;
 924         int r;
 925
 926         ath9k_ps_wakeup(sc);
 927         ieee80211_stop_queues(hw);
 928
 929         /*
 930          * Keep the LED on when the radio is disabled
 931          * during idle unassociated state.
 932          */
 933         if (!sc->ps_idle) {
 934                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 935                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 936         }
 937
 938         /* Disable interrupts */
 939         ath9k_hw_set_interrupts(ah, 0);
 940
 941         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 942         ath_stoprecv(sc);               /* turn off frame recv */
 943         ath_flushrecv(sc);              /* flush recv queue */
 944
 945         if (!ah->curchan)
 946                 ah->curchan = ath_get_curchannel(sc, hw);
 947
 948         spin_lock_bh(&sc->sc_resetlock);
 949         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 950         if (r) {
 951                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 952                           "Unable to reset channel (%u MHz), "
 953                           "reset status %d\n",
 954                           channel->center_freq, r);
 955         }
 956         spin_unlock_bh(&sc->sc_resetlock);
 957
 958         ath9k_hw_phy_disable(ah);
 959         ath9k_hw_configpcipowersave(ah, 1, 1);
 960         ath9k_ps_restore(sc);
 961         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 962 }
 963
 964 int ath_reset(struct ath_softc *sc, bool retry_tx)
 965 {
 966         struct ath_hw *ah = sc->sc_ah;
 967         struct ath_common *common = ath9k_hw_common(ah);
 968         struct ieee80211_hw *hw = sc->hw;
 969         int r;
 970
 971         /* Stop ANI */
 972         del_timer_sync(&common->ani.timer);
 973
 974         ieee80211_stop_queues(hw);
 975
 976         ath9k_hw_set_interrupts(ah, 0);
 977         ath_drain_all_txq(sc, retry_tx);
 978         ath_stoprecv(sc);
 979         ath_flushrecv(sc);
 980
 981         spin_lock_bh(&sc->sc_resetlock);
 982         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 983         if (r)
 984                 ath_print(common, ATH_DBG_FATAL,
 985                           "Unable to reset hardware; reset status %d\n", r);
 986         spin_unlock_bh(&sc->sc_resetlock);
 987
 988         if (ath_startrecv(sc) != 0)
 989                 ath_print(common, ATH_DBG_FATAL,
 990                           "Unable to start recv logic\n");
 991
 992         /*
 993          * We may be doing a reset in response to a request
 994          * that changes the channel so update any state that
 995          * might change as a result.
 996          */
 997         ath_cache_conf_rate(sc, &hw->conf);
 998
 999         ath_update_txpow(sc);
1000
1001         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1002                 ath_beacon_config(sc, NULL);    /* restart beacons */
1003
1004         ath9k_hw_set_interrupts(ah, ah->imask);
1005
1006         if (retry_tx) {
1007                 int i;
1008                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1009                         if (ATH_TXQ_SETUP(sc, i)) {
1010                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1011                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1012                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1013                         }
1014                 }
1015         }
1016
1017         ieee80211_wake_queues(hw);
1018
1019         /* Start ANI */
1020         ath_start_ani(common);
1021
1022         return r;
1023 }
1024
1025 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1026 {
1027         int qnum;
1028
1029         switch (queue) {
1030         case 0:
1031                 qnum = sc->tx.hwq_map[WME_AC_VO];
1032                 break;
1033         case 1:
1034                 qnum = sc->tx.hwq_map[WME_AC_VI];
1035                 break;
1036         case 2:
1037                 qnum = sc->tx.hwq_map[WME_AC_BE];
1038                 break;
1039         case 3:
1040                 qnum = sc->tx.hwq_map[WME_AC_BK];
1041                 break;
1042         default:
1043                 qnum = sc->tx.hwq_map[WME_AC_BE];
1044                 break;
1045         }
1046
1047         return qnum;
1048 }
1049
1050 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1051 {
1052         int qnum;
1053
1054         switch (queue) {
1055         case WME_AC_VO:
1056                 qnum = 0;
1057                 break;
1058         case WME_AC_VI:
1059                 qnum = 1;
1060                 break;
1061         case WME_AC_BE:
1062                 qnum = 2;
1063                 break;
1064         case WME_AC_BK:
1065                 qnum = 3;
1066                 break;
1067         default:
1068                 qnum = -1;
1069                 break;
1070         }
1071
1072         return qnum;
1073 }
1074
1075 /* XXX: Remove me once we don't depend on ath9k_channel for all
1076  * this redundant data */
1077 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1078                            struct ath9k_channel *ichan)
1079 {
1080         struct ieee80211_channel *chan = hw->conf.channel;
1081         struct ieee80211_conf *conf = &hw->conf;
1082
1083         ichan->channel = chan->center_freq;
1084         ichan->chan = chan;
1085
1086         if (chan->band == IEEE80211_BAND_2GHZ) {
1087                 ichan->chanmode = CHANNEL_G;
1088                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1089         } else {
1090                 ichan->chanmode = CHANNEL_A;
1091                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1092         }
1093
1094         if (conf_is_ht(conf))
1095                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1096                                             conf->channel_type);
1097 }
1098
1099 /**********************/
1100 /* mac80211 callbacks */
1101 /**********************/
1102
1103 static int ath9k_start(struct ieee80211_hw *hw)
1104 {
1105         struct ath_wiphy *aphy = hw->priv;
1106         struct ath_softc *sc = aphy->sc;
1107         struct ath_hw *ah = sc->sc_ah;
1108         struct ath_common *common = ath9k_hw_common(ah);
1109         struct ieee80211_channel *curchan = hw->conf.channel;
1110         struct ath9k_channel *init_channel;
1111         int r;
1112
1113         ath_print(common, ATH_DBG_CONFIG,
1114                   "Starting driver with initial channel: %d MHz\n",
1115                   curchan->center_freq);
1116
1117         mutex_lock(&sc->mutex);
1118
1119         if (ath9k_wiphy_started(sc)) {
1120                 if (sc->chan_idx == curchan->hw_value) {
1121                         /*
1122                          * Already on the operational channel, the new wiphy
1123                          * can be marked active.
1124                          */
1125                         aphy->state = ATH_WIPHY_ACTIVE;
1126                         ieee80211_wake_queues(hw);
1127                 } else {
1128                         /*
1129                          * Another wiphy is on another channel, start the new
1130                          * wiphy in paused state.
1131                          */
1132                         aphy->state = ATH_WIPHY_PAUSED;
1133                         ieee80211_stop_queues(hw);
1134                 }
1135                 mutex_unlock(&sc->mutex);
1136                 return 0;
1137         }
1138         aphy->state = ATH_WIPHY_ACTIVE;
1139
1140         /* setup initial channel */
1141
1142         sc->chan_idx = curchan->hw_value;
1143
1144         init_channel = ath_get_curchannel(sc, hw);
1145
1146         /* Reset SERDES registers */
1147         ath9k_hw_configpcipowersave(ah, 0, 0);
1148
1149         /*
1150          * The basic interface to setting the hardware in a good
1151          * state is ``reset''.  On return the hardware is known to
1152          * be powered up and with interrupts disabled.  This must
1153          * be followed by initialization of the appropriate bits
1154          * and then setup of the interrupt mask.
1155          */
1156         spin_lock_bh(&sc->sc_resetlock);
1157         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1158         if (r) {
1159                 ath_print(common, ATH_DBG_FATAL,
1160                           "Unable to reset hardware; reset status %d "
1161                           "(freq %u MHz)\n", r,
1162                           curchan->center_freq);
1163                 spin_unlock_bh(&sc->sc_resetlock);
1164                 goto mutex_unlock;
1165         }
1166         spin_unlock_bh(&sc->sc_resetlock);
1167
1168         /*
1169          * This is needed only to setup initial state
1170          * but it's best done after a reset.
1171          */
1172         ath_update_txpow(sc);
1173
1174         /*
1175          * Setup the hardware after reset:
1176          * The receive engine is set going.
1177          * Frame transmit is handled entirely
1178          * in the frame output path; there's nothing to do
1179          * here except setup the interrupt mask.
1180          */
1181         if (ath_startrecv(sc) != 0) {
1182                 ath_print(common, ATH_DBG_FATAL,
1183                           "Unable to start recv logic\n");
1184                 r = -EIO;
1185                 goto mutex_unlock;
1186         }
1187
1188         /* Setup our intr mask. */
1189         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1190                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1191                     ATH9K_INT_GLOBAL;
1192
1193         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1194                 ah->imask |= ATH9K_INT_RXHP |
1195                              ATH9K_INT_RXLP |
1196                              ATH9K_INT_BB_WATCHDOG;
1197         else
1198                 ah->imask |= ATH9K_INT_RX;
1199
1200         ah->imask |= ATH9K_INT_GTT;
1201
1202         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1203                 ah->imask |= ATH9K_INT_CST;
1204
1205         ath_cache_conf_rate(sc, &hw->conf);
1206
1207         sc->sc_flags &= ~SC_OP_INVALID;
1208
1209         /* Disable BMISS interrupt when we're not associated */
1210         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1211         ath9k_hw_set_interrupts(ah, ah->imask);
1212
1213         ieee80211_wake_queues(hw);
1214
1215         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1216
1217         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1218             !ah->btcoex_hw.enabled) {
1219                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1220                                            AR_STOMP_LOW_WLAN_WGHT);
1221                 ath9k_hw_btcoex_enable(ah);
1222
1223                 if (common->bus_ops->bt_coex_prep)
1224                         common->bus_ops->bt_coex_prep(common);
1225                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1226                         ath9k_btcoex_timer_resume(sc);
1227         }
1228
1229 mutex_unlock:
1230         mutex_unlock(&sc->mutex);
1231
1232         return r;
1233 }
1234
1235 static int ath9k_tx(struct ieee80211_hw *hw,
1236                     struct sk_buff *skb)
1237 {
1238         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1239         struct ath_wiphy *aphy = hw->priv;
1240         struct ath_softc *sc = aphy->sc;
1241         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1242         struct ath_tx_control txctl;
1243         int padpos, padsize;
1244         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1245         int qnum;
1246
1247         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1248                 ath_print(common, ATH_DBG_XMIT,
1249                           "ath9k: %s: TX in unexpected wiphy state "
1250                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1251                 goto exit;
1252         }
1253
1254         if (sc->ps_enabled) {
1255                 /*
1256                  * mac80211 does not set PM field for normal data frames, so we
1257                  * need to update that based on the current PS mode.
1258                  */
1259                 if (ieee80211_is_data(hdr->frame_control) &&
1260                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1261                     !ieee80211_has_pm(hdr->frame_control)) {
1262                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1263                                   "while in PS mode\n");
1264                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1265                 }
1266         }
1267
1268         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1269                 /*
1270                  * We are using PS-Poll and mac80211 can request TX while in
1271                  * power save mode. Need to wake up hardware for the TX to be
1272                  * completed and if needed, also for RX of buffered frames.
1273                  */
1274                 ath9k_ps_wakeup(sc);
1275                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1276                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1277                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1278                         ath_print(common, ATH_DBG_PS,
1279                                   "Sending PS-Poll to pick a buffered frame\n");
1280                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1281                 } else {
1282                         ath_print(common, ATH_DBG_PS,
1283                                   "Wake up to complete TX\n");
1284                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1285                 }
1286                 /*
1287                  * The actual restore operation will happen only after
1288                  * the sc_flags bit is cleared. We are just dropping
1289                  * the ps_usecount here.
1290                  */
1291                 ath9k_ps_restore(sc);
1292         }
1293
1294         memset(&txctl, 0, sizeof(struct ath_tx_control));
1295
1296         /*
1297          * As a temporary workaround, assign seq# here; this will likely need
1298          * to be cleaned up to work better with Beacon transmission and virtual
1299          * BSSes.
1300          */
1301         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1302                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1303                         sc->tx.seq_no += 0x10;
1304                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1305                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1306         }
1307
1308         /* Add the padding after the header if this is not already done */
1309         padpos = ath9k_cmn_padpos(hdr->frame_control);
1310         padsize = padpos & 3;
1311         if (padsize && skb->len>padpos) {
1312                 if (skb_headroom(skb) < padsize)
1313                         return -1;
1314                 skb_push(skb, padsize);
1315                 memmove(skb->data, skb->data + padsize, padpos);
1316         }
1317
1318         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1319         txctl.txq = &sc->tx.txq[qnum];
1320
1321         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1322
1323         if (ath_tx_start(hw, skb, &txctl) != 0) {
1324                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1325                 goto exit;
1326         }
1327
1328         return 0;
1329 exit:
1330         dev_kfree_skb_any(skb);
1331         return 0;
1332 }
1333
1334 static void ath9k_stop(struct ieee80211_hw *hw)
1335 {
1336         struct ath_wiphy *aphy = hw->priv;
1337         struct ath_softc *sc = aphy->sc;
1338         struct ath_hw *ah = sc->sc_ah;
1339         struct ath_common *common = ath9k_hw_common(ah);
1340         int i;
1341
1342         mutex_lock(&sc->mutex);
1343
1344         aphy->state = ATH_WIPHY_INACTIVE;
1345
1346         if (led_blink)
1347                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1348
1349         cancel_delayed_work_sync(&sc->tx_complete_work);
1350         cancel_work_sync(&sc->paprd_work);
1351         cancel_work_sync(&sc->hw_check_work);
1352
1353         for (i = 0; i < sc->num_sec_wiphy; i++) {
1354                 if (sc->sec_wiphy[i])
1355                         break;
1356         }
1357
1358         if (i == sc->num_sec_wiphy) {
1359                 cancel_delayed_work_sync(&sc->wiphy_work);
1360                 cancel_work_sync(&sc->chan_work);
1361         }
1362
1363         if (sc->sc_flags & SC_OP_INVALID) {
1364                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1365                 mutex_unlock(&sc->mutex);
1366                 return;
1367         }
1368
1369         if (ath9k_wiphy_started(sc)) {
1370                 mutex_unlock(&sc->mutex);
1371                 return; /* another wiphy still in use */
1372         }
1373
1374         /* Ensure HW is awake when we try to shut it down. */
1375         ath9k_ps_wakeup(sc);
1376
1377         if (ah->btcoex_hw.enabled) {
1378                 ath9k_hw_btcoex_disable(ah);
1379                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1380                         ath9k_btcoex_timer_pause(sc);
1381         }
1382
1383         /* make sure h/w will not generate any interrupt
1384          * before setting the invalid flag. */
1385         ath9k_hw_set_interrupts(ah, 0);
1386
1387         if (!(sc->sc_flags & SC_OP_INVALID)) {
1388                 ath_drain_all_txq(sc, false);
1389                 ath_stoprecv(sc);
1390                 ath9k_hw_phy_disable(ah);
1391         } else
1392                 sc->rx.rxlink = NULL;
1393
1394         /* disable HAL and put h/w to sleep */
1395         ath9k_hw_disable(ah);
1396         ath9k_hw_configpcipowersave(ah, 1, 1);
1397         ath9k_ps_restore(sc);
1398
1399         /* Finally, put the chip in FULL SLEEP mode */
1400         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1401
1402         sc->sc_flags |= SC_OP_INVALID;
1403
1404         mutex_unlock(&sc->mutex);
1405
1406         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1407 }
1408
1409 static int ath9k_add_interface(struct ieee80211_hw *hw,
1410                                struct ieee80211_vif *vif)
1411 {
1412         struct ath_wiphy *aphy = hw->priv;
1413         struct ath_softc *sc = aphy->sc;
1414         struct ath_hw *ah = sc->sc_ah;
1415         struct ath_common *common = ath9k_hw_common(ah);
1416         struct ath_vif *avp = (void *)vif->drv_priv;
1417         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1418         int ret = 0;
1419
1420         mutex_lock(&sc->mutex);
1421
1422         switch (vif->type) {
1423         case NL80211_IFTYPE_STATION:
1424                 ic_opmode = NL80211_IFTYPE_STATION;
1425                 break;
1426         case NL80211_IFTYPE_WDS:
1427                 ic_opmode = NL80211_IFTYPE_WDS;
1428                 break;
1429         case NL80211_IFTYPE_ADHOC:
1430         case NL80211_IFTYPE_AP:
1431         case NL80211_IFTYPE_MESH_POINT:
1432                 if (sc->nbcnvifs >= ATH_BCBUF) {
1433                         ret = -ENOBUFS;
1434                         goto out;
1435                 }
1436                 ic_opmode = vif->type;
1437                 break;
1438         default:
1439                 ath_print(common, ATH_DBG_FATAL,
1440                         "Interface type %d not yet supported\n", vif->type);
1441                 ret = -EOPNOTSUPP;
1442                 goto out;
1443         }
1444
1445         ath_print(common, ATH_DBG_CONFIG,
1446                   "Attach a VIF of type: %d\n", ic_opmode);
1447
1448         /* Set the VIF opmode */
1449         avp->av_opmode = ic_opmode;
1450         avp->av_bslot = -1;
1451
1452         sc->nvifs++;
1453
1454         ath9k_set_bssid_mask(hw, vif);
1455
1456         if (sc->nvifs > 1)
1457                 goto out; /* skip global settings for secondary vif */
1458
1459         if (ic_opmode == NL80211_IFTYPE_AP) {
1460                 ath9k_hw_set_tsfadjust(ah, 1);
1461                 sc->sc_flags |= SC_OP_TSF_RESET;
1462         }
1463
1464         /* Set the device opmode */
1465         ah->opmode = ic_opmode;
1466
1467         /*
1468          * Enable MIB interrupts when there are hardware phy counters.
1469          * Note we only do this (at the moment) for station mode.
1470          */
1471         if ((vif->type == NL80211_IFTYPE_STATION) ||
1472             (vif->type == NL80211_IFTYPE_ADHOC) ||
1473             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1474                 if (ah->config.enable_ani)
1475                         ah->imask |= ATH9K_INT_MIB;
1476                 ah->imask |= ATH9K_INT_TSFOOR;
1477         }
1478
1479         ath9k_hw_set_interrupts(ah, ah->imask);
1480
1481         if (vif->type == NL80211_IFTYPE_AP    ||
1482             vif->type == NL80211_IFTYPE_ADHOC ||
1483             vif->type == NL80211_IFTYPE_MONITOR) {
1484                 sc->sc_flags |= SC_OP_ANI_RUN;
1485                 ath_start_ani(common);
1486         }
1487
1488 out:
1489         mutex_unlock(&sc->mutex);
1490         return ret;
1491 }
1492
1493 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1494                                    struct ieee80211_vif *vif)
1495 {
1496         struct ath_wiphy *aphy = hw->priv;
1497         struct ath_softc *sc = aphy->sc;
1498         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1499         struct ath_vif *avp = (void *)vif->drv_priv;
1500         int i;
1501
1502         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1503
1504         mutex_lock(&sc->mutex);
1505
1506         /* Stop ANI */
1507         sc->sc_flags &= ~SC_OP_ANI_RUN;
1508         del_timer_sync(&common->ani.timer);
1509
1510         /* Reclaim beacon resources */
1511         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1512             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1513             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1514                 ath9k_ps_wakeup(sc);
1515                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1516                 ath9k_ps_restore(sc);
1517         }
1518
1519         ath_beacon_return(sc, avp);
1520         sc->sc_flags &= ~SC_OP_BEACONS;
1521
1522         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1523                 if (sc->beacon.bslot[i] == vif) {
1524                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1525                                "slot\n", __func__);
1526                         sc->beacon.bslot[i] = NULL;
1527                         sc->beacon.bslot_aphy[i] = NULL;
1528                 }
1529         }
1530
1531         sc->nvifs--;
1532
1533         mutex_unlock(&sc->mutex);
1534 }
1535
1536 static void ath9k_enable_ps(struct ath_softc *sc)
1537 {
1538         struct ath_hw *ah = sc->sc_ah;
1539
1540         sc->ps_enabled = true;
1541         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1542                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1543                         ah->imask |= ATH9K_INT_TIM_TIMER;
1544                         ath9k_hw_set_interrupts(ah, ah->imask);
1545                 }
1546                 ath9k_hw_setrxabort(ah, 1);
1547         }
1548 }
1549
1550 static void ath9k_disable_ps(struct ath_softc *sc)
1551 {
1552         struct ath_hw *ah = sc->sc_ah;
1553
1554         sc->ps_enabled = false;
1555         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1556         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1557                 ath9k_hw_setrxabort(ah, 0);
1558                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1559                                   PS_WAIT_FOR_CAB |
1560                                   PS_WAIT_FOR_PSPOLL_DATA |
1561                                   PS_WAIT_FOR_TX_ACK);
1562                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1563                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1564                         ath9k_hw_set_interrupts(ah, ah->imask);
1565                 }
1566         }
1567
1568 }
1569
1570 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1571 {
1572         struct ath_wiphy *aphy = hw->priv;
1573         struct ath_softc *sc = aphy->sc;
1574         struct ath_hw *ah = sc->sc_ah;
1575         struct ath_common *common = ath9k_hw_common(ah);
1576         struct ieee80211_conf *conf = &hw->conf;
1577         bool disable_radio;
1578
1579         mutex_lock(&sc->mutex);
1580
1581         /*
1582          * Leave this as the first check because we need to turn on the
1583          * radio if it was disabled before prior to processing the rest
1584          * of the changes. Likewise we must only disable the radio towards
1585          * the end.
1586          */
1587         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1588                 bool enable_radio;
1589                 bool all_wiphys_idle;
1590                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1591
1592                 spin_lock_bh(&sc->wiphy_lock);
1593                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1594                 ath9k_set_wiphy_idle(aphy, idle);
1595
1596                 enable_radio = (!idle && all_wiphys_idle);
1597
1598                 /*
1599                  * After we unlock here its possible another wiphy
1600                  * can be re-renabled so to account for that we will
1601                  * only disable the radio toward the end of this routine
1602                  * if by then all wiphys are still idle.
1603                  */
1604                 spin_unlock_bh(&sc->wiphy_lock);
1605
1606                 if (enable_radio) {
1607                         sc->ps_idle = false;
1608                         ath_radio_enable(sc, hw);
1609                         ath_print(common, ATH_DBG_CONFIG,
1610                                   "not-idle: enabling radio\n");
1611                 }
1612         }
1613
1614         /*
1615          * We just prepare to enable PS. We have to wait until our AP has
1616          * ACK'd our null data frame to disable RX otherwise we'll ignore
1617          * those ACKs and end up retransmitting the same null data frames.
1618          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1619          */
1620         if (changed & IEEE80211_CONF_CHANGE_PS) {
1621                 unsigned long flags;
1622                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1623                 if (conf->flags & IEEE80211_CONF_PS)
1624                         ath9k_enable_ps(sc);
1625                 else
1626                         ath9k_disable_ps(sc);
1627                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1628         }
1629
1630         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1631                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1632                         ath_print(common, ATH_DBG_CONFIG,
1633                                   "HW opmode set to Monitor mode\n");
1634                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1635                 }
1636         }
1637
1638         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1639                 struct ieee80211_channel *curchan = hw->conf.channel;
1640                 int pos = curchan->hw_value;
1641                 int old_pos = -1;
1642                 unsigned long flags;
1643
1644                 if (ah->curchan)
1645                         old_pos = ah->curchan - &ah->channels[0];
1646
1647                 aphy->chan_idx = pos;
1648                 aphy->chan_is_ht = conf_is_ht(conf);
1649                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1650                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1651                 else
1652                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1653
1654                 if (aphy->state == ATH_WIPHY_SCAN ||
1655                     aphy->state == ATH_WIPHY_ACTIVE)
1656                         ath9k_wiphy_pause_all_forced(sc, aphy);
1657                 else {
1658                         /*
1659                          * Do not change operational channel based on a paused
1660                          * wiphy changes.
1661                          */
1662                         goto skip_chan_change;
1663                 }
1664
1665                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1666                           curchan->center_freq);
1667
1668                 /* XXX: remove me eventualy */
1669                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1670
1671                 ath_update_chainmask(sc, conf_is_ht(conf));
1672
1673                 /* update survey stats for the old channel before switching */
1674                 spin_lock_irqsave(&common->cc_lock, flags);
1675                 ath_update_survey_stats(sc);
1676                 spin_unlock_irqrestore(&common->cc_lock, flags);
1677
1678                 /*
1679                  * If the operating channel changes, change the survey in-use flags
1680                  * along with it.
1681                  * Reset the survey data for the new channel, unless we're switching
1682                  * back to the operating channel from an off-channel operation.
1683                  */
1684                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1685                     sc->cur_survey != &sc->survey[pos]) {
1686
1687                         if (sc->cur_survey)
1688                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1689
1690                         sc->cur_survey = &sc->survey[pos];
1691
1692                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1693                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1694                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1695                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1696                 }
1697
1698                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1699                         ath_print(common, ATH_DBG_FATAL,
1700                                   "Unable to set channel\n");
1701                         mutex_unlock(&sc->mutex);
1702                         return -EINVAL;
1703                 }
1704
1705                 /*
1706                  * The most recent snapshot of channel->noisefloor for the old
1707                  * channel is only available after the hardware reset. Copy it to
1708                  * the survey stats now.
1709                  */
1710                 if (old_pos >= 0)
1711                         ath_update_survey_nf(sc, old_pos);
1712         }
1713
1714 skip_chan_change:
1715         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1716                 sc->config.txpowlimit = 2 * conf->power_level;
1717                 ath_update_txpow(sc);
1718         }
1719
1720         spin_lock_bh(&sc->wiphy_lock);
1721         disable_radio = ath9k_all_wiphys_idle(sc);
1722         spin_unlock_bh(&sc->wiphy_lock);
1723
1724         if (disable_radio) {
1725                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1726                 sc->ps_idle = true;
1727                 ath_radio_disable(sc, hw);
1728         }
1729
1730         mutex_unlock(&sc->mutex);
1731
1732         return 0;
1733 }
1734
1735 #define SUPPORTED_FILTERS                       \
1736         (FIF_PROMISC_IN_BSS |                   \
1737         FIF_ALLMULTI |                          \
1738         FIF_CONTROL |                           \
1739         FIF_PSPOLL |                            \
1740         FIF_OTHER_BSS |                         \
1741         FIF_BCN_PRBRESP_PROMISC |               \
1742         FIF_PROBE_REQ |                         \
1743         FIF_FCSFAIL)
1744
1745 /* FIXME: sc->sc_full_reset ? */
1746 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1747                                    unsigned int changed_flags,
1748                                    unsigned int *total_flags,
1749                                    u64 multicast)
1750 {
1751         struct ath_wiphy *aphy = hw->priv;
1752         struct ath_softc *sc = aphy->sc;
1753         u32 rfilt;
1754
1755         changed_flags &= SUPPORTED_FILTERS;
1756         *total_flags &= SUPPORTED_FILTERS;
1757
1758         sc->rx.rxfilter = *total_flags;
1759         ath9k_ps_wakeup(sc);
1760         rfilt = ath_calcrxfilter(sc);
1761         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1762         ath9k_ps_restore(sc);
1763
1764         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1765                   "Set HW RX filter: 0x%x\n", rfilt);
1766 }
1767
1768 static int ath9k_sta_add(struct ieee80211_hw *hw,
1769                          struct ieee80211_vif *vif,
1770                          struct ieee80211_sta *sta)
1771 {
1772         struct ath_wiphy *aphy = hw->priv;
1773         struct ath_softc *sc = aphy->sc;
1774
1775         ath_node_attach(sc, sta);
1776
1777         return 0;
1778 }
1779
1780 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1781                             struct ieee80211_vif *vif,
1782                             struct ieee80211_sta *sta)
1783 {
1784         struct ath_wiphy *aphy = hw->priv;
1785         struct ath_softc *sc = aphy->sc;
1786
1787         ath_node_detach(sc, sta);
1788
1789         return 0;
1790 }
1791
1792 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1793                          const struct ieee80211_tx_queue_params *params)
1794 {
1795         struct ath_wiphy *aphy = hw->priv;
1796         struct ath_softc *sc = aphy->sc;
1797         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1798         struct ath9k_tx_queue_info qi;
1799         int ret = 0, qnum;
1800
1801         if (queue >= WME_NUM_AC)
1802                 return 0;
1803
1804         mutex_lock(&sc->mutex);
1805
1806         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1807
1808         qi.tqi_aifs = params->aifs;
1809         qi.tqi_cwmin = params->cw_min;
1810         qi.tqi_cwmax = params->cw_max;
1811         qi.tqi_burstTime = params->txop;
1812         qnum = ath_get_hal_qnum(queue, sc);
1813
1814         ath_print(common, ATH_DBG_CONFIG,
1815                   "Configure tx [queue/halq] [%d/%d],  "
1816                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1817                   queue, qnum, params->aifs, params->cw_min,
1818                   params->cw_max, params->txop);
1819
1820         ret = ath_txq_update(sc, qnum, &qi);
1821         if (ret)
1822                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1823
1824         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1825                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1826                         ath_beaconq_config(sc);
1827
1828         mutex_unlock(&sc->mutex);
1829
1830         return ret;
1831 }
1832
1833 static int ath9k_set_key(struct ieee80211_hw *hw,
1834                          enum set_key_cmd cmd,
1835                          struct ieee80211_vif *vif,
1836                          struct ieee80211_sta *sta,
1837                          struct ieee80211_key_conf *key)
1838 {
1839         struct ath_wiphy *aphy = hw->priv;
1840         struct ath_softc *sc = aphy->sc;
1841         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1842         int ret = 0;
1843
1844         if (modparam_nohwcrypt)
1845                 return -ENOSPC;
1846
1847         mutex_lock(&sc->mutex);
1848         ath9k_ps_wakeup(sc);
1849         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1850
1851         switch (cmd) {
1852         case SET_KEY:
1853                 ret = ath_key_config(common, vif, sta, key);
1854                 if (ret >= 0) {
1855                         key->hw_key_idx = ret;
1856                         /* push IV and Michael MIC generation to stack */
1857                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1858                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1859                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1860                         if (sc->sc_ah->sw_mgmt_crypto &&
1861                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1862                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1863                         ret = 0;
1864                 }
1865                 break;
1866         case DISABLE_KEY:
1867                 ath_key_delete(common, key);
1868                 break;
1869         default:
1870                 ret = -EINVAL;
1871         }
1872
1873         ath9k_ps_restore(sc);
1874         mutex_unlock(&sc->mutex);
1875
1876         return ret;
1877 }
1878
1879 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1880                                    struct ieee80211_vif *vif,
1881                                    struct ieee80211_bss_conf *bss_conf,
1882                                    u32 changed)
1883 {
1884         struct ath_wiphy *aphy = hw->priv;
1885         struct ath_softc *sc = aphy->sc;
1886         struct ath_hw *ah = sc->sc_ah;
1887         struct ath_common *common = ath9k_hw_common(ah);
1888         struct ath_vif *avp = (void *)vif->drv_priv;
1889         int slottime;
1890         int error;
1891
1892         mutex_lock(&sc->mutex);
1893
1894         if (changed & BSS_CHANGED_BSSID) {
1895                 /* Set BSSID */
1896                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1897                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1898                 common->curaid = 0;
1899                 ath9k_hw_write_associd(ah);
1900
1901                 /* Set aggregation protection mode parameters */
1902                 sc->config.ath_aggr_prot = 0;
1903
1904                 /* Only legacy IBSS for now */
1905                 if (vif->type == NL80211_IFTYPE_ADHOC)
1906                         ath_update_chainmask(sc, 0);
1907
1908                 ath_print(common, ATH_DBG_CONFIG,
1909                           "BSSID: %pM aid: 0x%x\n",
1910                           common->curbssid, common->curaid);
1911
1912                 /* need to reconfigure the beacon */
1913                 sc->sc_flags &= ~SC_OP_BEACONS ;
1914         }
1915
1916         /* Enable transmission of beacons (AP, IBSS, MESH) */
1917         if ((changed & BSS_CHANGED_BEACON) ||
1918             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1919                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1920                 error = ath_beacon_alloc(aphy, vif);
1921                 if (!error)
1922                         ath_beacon_config(sc, vif);
1923         }
1924
1925         if (changed & BSS_CHANGED_ERP_SLOT) {
1926                 if (bss_conf->use_short_slot)
1927                         slottime = 9;
1928                 else
1929                         slottime = 20;
1930                 if (vif->type == NL80211_IFTYPE_AP) {
1931                         /*
1932                          * Defer update, so that connected stations can adjust
1933                          * their settings at the same time.
1934                          * See beacon.c for more details
1935                          */
1936                         sc->beacon.slottime = slottime;
1937                         sc->beacon.updateslot = UPDATE;
1938                 } else {
1939                         ah->slottime = slottime;
1940                         ath9k_hw_init_global_settings(ah);
1941                 }
1942         }
1943
1944         /* Disable transmission of beacons */
1945         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1946                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1947
1948         if (changed & BSS_CHANGED_BEACON_INT) {
1949                 sc->beacon_interval = bss_conf->beacon_int;
1950                 /*
1951                  * In case of AP mode, the HW TSF has to be reset
1952                  * when the beacon interval changes.
1953                  */
1954                 if (vif->type == NL80211_IFTYPE_AP) {
1955                         sc->sc_flags |= SC_OP_TSF_RESET;
1956                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1957                         error = ath_beacon_alloc(aphy, vif);
1958                         if (!error)
1959                                 ath_beacon_config(sc, vif);
1960                 } else {
1961                         ath_beacon_config(sc, vif);
1962                 }
1963         }
1964
1965         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1966                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1967                           bss_conf->use_short_preamble);
1968                 if (bss_conf->use_short_preamble)
1969                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1970                 else
1971                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1972         }
1973
1974         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1975                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1976                           bss_conf->use_cts_prot);
1977                 if (bss_conf->use_cts_prot &&
1978                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1979                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1980                 else
1981                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1982         }
1983
1984         if (changed & BSS_CHANGED_ASSOC) {
1985                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1986                         bss_conf->assoc);
1987                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1988         }
1989
1990         mutex_unlock(&sc->mutex);
1991 }
1992
1993 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1994 {
1995         u64 tsf;
1996         struct ath_wiphy *aphy = hw->priv;
1997         struct ath_softc *sc = aphy->sc;
1998
1999         mutex_lock(&sc->mutex);
2000         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2001         mutex_unlock(&sc->mutex);
2002
2003         return tsf;
2004 }
2005
2006 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2007 {
2008         struct ath_wiphy *aphy = hw->priv;
2009         struct ath_softc *sc = aphy->sc;
2010
2011         mutex_lock(&sc->mutex);
2012         ath9k_hw_settsf64(sc->sc_ah, tsf);
2013         mutex_unlock(&sc->mutex);
2014 }
2015
2016 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2017 {
2018         struct ath_wiphy *aphy = hw->priv;
2019         struct ath_softc *sc = aphy->sc;
2020
2021         mutex_lock(&sc->mutex);
2022
2023         ath9k_ps_wakeup(sc);
2024         ath9k_hw_reset_tsf(sc->sc_ah);
2025         ath9k_ps_restore(sc);
2026
2027         mutex_unlock(&sc->mutex);
2028 }
2029
2030 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2031                               struct ieee80211_vif *vif,
2032                               enum ieee80211_ampdu_mlme_action action,
2033                               struct ieee80211_sta *sta,
2034                               u16 tid, u16 *ssn)
2035 {
2036         struct ath_wiphy *aphy = hw->priv;
2037         struct ath_softc *sc = aphy->sc;
2038         int ret = 0;
2039
2040         local_bh_disable();
2041
2042         switch (action) {
2043         case IEEE80211_AMPDU_RX_START:
2044                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2045                         ret = -ENOTSUPP;
2046                 break;
2047         case IEEE80211_AMPDU_RX_STOP:
2048                 break;
2049         case IEEE80211_AMPDU_TX_START:
2050                 ath9k_ps_wakeup(sc);
2051                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2052                 if (!ret)
2053                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2054                 ath9k_ps_restore(sc);
2055                 break;
2056         case IEEE80211_AMPDU_TX_STOP:
2057                 ath9k_ps_wakeup(sc);
2058                 ath_tx_aggr_stop(sc, sta, tid);
2059                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2060                 ath9k_ps_restore(sc);
2061                 break;
2062         case IEEE80211_AMPDU_TX_OPERATIONAL:
2063                 ath9k_ps_wakeup(sc);
2064                 ath_tx_aggr_resume(sc, sta, tid);
2065                 ath9k_ps_restore(sc);
2066                 break;
2067         default:
2068                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2069                           "Unknown AMPDU action\n");
2070         }
2071
2072         local_bh_enable();
2073
2074         return ret;
2075 }
2076
2077 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2078                              struct survey_info *survey)
2079 {
2080         struct ath_wiphy *aphy = hw->priv;
2081         struct ath_softc *sc = aphy->sc;
2082         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2083         struct ieee80211_supported_band *sband;
2084         struct ieee80211_channel *chan;
2085         unsigned long flags;
2086         int pos;
2087
2088         spin_lock_irqsave(&common->cc_lock, flags);
2089         if (idx == 0)
2090                 ath_update_survey_stats(sc);
2091
2092         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2093         if (sband && idx >= sband->n_channels) {
2094                 idx -= sband->n_channels;
2095                 sband = NULL;
2096         }
2097
2098         if (!sband)
2099                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2100
2101         if (!sband || idx >= sband->n_channels) {
2102                 spin_unlock_irqrestore(&common->cc_lock, flags);
2103                 return -ENOENT;
2104         }
2105
2106         chan = &sband->channels[idx];
2107         pos = chan->hw_value;
2108         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2109         survey->channel = chan;
2110         spin_unlock_irqrestore(&common->cc_lock, flags);
2111
2112         return 0;
2113 }
2114
2115 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2116 {
2117         struct ath_wiphy *aphy = hw->priv;
2118         struct ath_softc *sc = aphy->sc;
2119
2120         mutex_lock(&sc->mutex);
2121         if (ath9k_wiphy_scanning(sc)) {
2122                 /*
2123                  * There is a race here in mac80211 but fixing it requires
2124                  * we revisit how we handle the scan complete callback.
2125                  * After mac80211 fixes we will not have configured hardware
2126                  * to the home channel nor would we have configured the RX
2127                  * filter yet.
2128                  */
2129                 mutex_unlock(&sc->mutex);
2130                 return;
2131         }
2132
2133         aphy->state = ATH_WIPHY_SCAN;
2134         ath9k_wiphy_pause_all_forced(sc, aphy);
2135         mutex_unlock(&sc->mutex);
2136 }
2137
2138 /*
2139  * XXX: this requires a revisit after the driver
2140  * scan_complete gets moved to another place/removed in mac80211.
2141  */
2142 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2143 {
2144         struct ath_wiphy *aphy = hw->priv;
2145         struct ath_softc *sc = aphy->sc;
2146
2147         mutex_lock(&sc->mutex);
2148         aphy->state = ATH_WIPHY_ACTIVE;
2149         mutex_unlock(&sc->mutex);
2150 }
2151
2152 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2153 {
2154         struct ath_wiphy *aphy = hw->priv;
2155         struct ath_softc *sc = aphy->sc;
2156         struct ath_hw *ah = sc->sc_ah;
2157
2158         mutex_lock(&sc->mutex);
2159         ah->coverage_class = coverage_class;
2160         ath9k_hw_init_global_settings(ah);
2161         mutex_unlock(&sc->mutex);
2162 }
2163
2164 struct ieee80211_ops ath9k_ops = {
2165         .tx                 = ath9k_tx,
2166         .start              = ath9k_start,
2167         .stop               = ath9k_stop,
2168         .add_interface      = ath9k_add_interface,
2169         .remove_interface   = ath9k_remove_interface,
2170         .config             = ath9k_config,
2171         .configure_filter   = ath9k_configure_filter,
2172         .sta_add            = ath9k_sta_add,
2173         .sta_remove         = ath9k_sta_remove,
2174         .conf_tx            = ath9k_conf_tx,
2175         .bss_info_changed   = ath9k_bss_info_changed,
2176         .set_key            = ath9k_set_key,
2177         .get_tsf            = ath9k_get_tsf,
2178         .set_tsf            = ath9k_set_tsf,
2179         .reset_tsf          = ath9k_reset_tsf,
2180         .ampdu_action       = ath9k_ampdu_action,
2181         .get_survey         = ath9k_get_survey,
2182         .sw_scan_start      = ath9k_sw_scan_start,
2183         .sw_scan_complete   = ath9k_sw_scan_complete,
2184         .rfkill_poll        = ath9k_rfkill_poll_state,
2185         .set_coverage_class = ath9k_set_coverage_class,
2186 };