drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 /*
 158  * Set/change channels.  If the channel is really being changed, it's done
 159  * by reseting the chip.  To accomplish this we must first cleanup any pending
 160  * DMA, then restart stuff.
 161 */
 162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 163                     struct ath9k_channel *hchan)
 164 {
 165         struct ath_hw *ah = sc->sc_ah;
 166         struct ath_common *common = ath9k_hw_common(ah);
 167         struct ieee80211_conf *conf = &common->hw->conf;
 168         bool fastcc = true, stopped;
 169         struct ieee80211_channel *channel = hw->conf.channel;
 170         int r;
 171
 172         if (sc->sc_flags & SC_OP_INVALID)
 173                 return -EIO;
 174
 175         ath9k_ps_wakeup(sc);
 176
 177         /*
 178          * This is only performed if the channel settings have
 179          * actually changed.
 180          *
 181          * To switch channels clear any pending DMA operations;
 182          * wait long enough for the RX fifo to drain, reset the
 183          * hardware at the new frequency, and then re-enable
 184          * the relevant bits of the h/w.
 185          */
 186         ath9k_hw_set_interrupts(ah, 0);
 187         ath_drain_all_txq(sc, false);
 188         stopped = ath_stoprecv(sc);
 189
 190         /* XXX: do not flush receive queue here. We don't want
 191          * to flush data frames already in queue because of
 192          * changing channel. */
 193
 194         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 195                 fastcc = false;
 196
 197         ath_print(common, ATH_DBG_CONFIG,
 198                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 199                   sc->sc_ah->curchan->channel,
 200                   channel->center_freq, conf_is_ht40(conf));
 201
 202         spin_lock_bh(&sc->sc_resetlock);
 203
 204         r = ath9k_hw_reset(ah, hchan, fastcc);
 205         if (r) {
 206                 ath_print(common, ATH_DBG_FATAL,
 207                           "Unable to reset channel (%u MHz), "
 208                           "reset status %d\n",
 209                           channel->center_freq, r);
 210                 spin_unlock_bh(&sc->sc_resetlock);
 211                 goto ps_restore;
 212         }
 213         spin_unlock_bh(&sc->sc_resetlock);
 214
 215         sc->sc_flags &= ~SC_OP_FULL_RESET;
 216
 217         if (ath_startrecv(sc) != 0) {
 218                 ath_print(common, ATH_DBG_FATAL,
 219                           "Unable to restart recv logic\n");
 220                 r = -EIO;
 221                 goto ps_restore;
 222         }
 223
 224         ath_cache_conf_rate(sc, &hw->conf);
 225         ath_update_txpow(sc);
 226         ath9k_hw_set_interrupts(ah, ah->imask);
 227
 228  ps_restore:
 229         ath9k_ps_restore(sc);
 230         return r;
 231 }
 232
 233 static void ath_paprd_activate(struct ath_softc *sc)
 234 {
 235         struct ath_hw *ah = sc->sc_ah;
 236         int chain;
 237
 238         if (!ah->curchan->paprd_done)
 239                 return;
 240
 241         ath9k_ps_wakeup(sc);
 242         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 243                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 244                         continue;
 245
 246                 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
 247         }
 248
 249         ar9003_paprd_enable(ah, true);
 250         ath9k_ps_restore(sc);
 251 }
 252
 253 void ath_paprd_calibrate(struct work_struct *work)
 254 {
 255         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 256         struct ieee80211_hw *hw = sc->hw;
 257         struct ath_hw *ah = sc->sc_ah;
 258         struct ieee80211_hdr *hdr;
 259         struct sk_buff *skb = NULL;
 260         struct ieee80211_tx_info *tx_info;
 261         int band = hw->conf.channel->band;
 262         struct ieee80211_supported_band *sband = &sc->sbands[band];
 263         struct ath_tx_control txctl;
 264         int qnum, ftype;
 265         int chain_ok = 0;
 266         int chain;
 267         int len = 1800;
 268         int time_left;
 269         int i;
 270
 271         ath9k_ps_wakeup(sc);
 272         skb = alloc_skb(len, GFP_KERNEL);
 273         if (!skb)
 274                 return;
 275
 276         tx_info = IEEE80211_SKB_CB(skb);
 277
 278         skb_put(skb, len);
 279         memset(skb->data, 0, len);
 280         hdr = (struct ieee80211_hdr *)skb->data;
 281         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 282         hdr->frame_control = cpu_to_le16(ftype);
 283         hdr->duration_id = 10;
 284         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 285         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 286         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 287
 288         memset(&txctl, 0, sizeof(txctl));
 289         qnum = sc->tx.hwq_map[WME_AC_BE];
 290         txctl.txq = &sc->tx.txq[qnum];
 291
 292         ar9003_paprd_init_table(ah);
 293         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 294                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 295                         continue;
 296
 297                 chain_ok = 0;
 298                 memset(tx_info, 0, sizeof(*tx_info));
 299                 tx_info->band = band;
 300
 301                 for (i = 0; i < 4; i++) {
 302                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 303                         tx_info->control.rates[i].count = 6;
 304                 }
 305
 306                 init_completion(&sc->paprd_complete);
 307                 ar9003_paprd_setup_gain_table(ah, chain);
 308                 txctl.paprd = BIT(chain);
 309                 if (ath_tx_start(hw, skb, &txctl) != 0)
 310                         break;
 311
 312                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 313                                                         100);
 314                 if (!time_left) {
 315                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 316                                   "Timeout waiting for paprd training on "
 317                                   "TX chain %d\n",
 318                                   chain);
 319                         break;
 320                 }
 321
 322                 if (!ar9003_paprd_is_done(ah))
 323                         break;
 324
 325                 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
 326                         break;
 327
 328                 chain_ok = 1;
 329         }
 330         kfree_skb(skb);
 331
 332         if (chain_ok) {
 333                 ah->curchan->paprd_done = true;
 334                 ath_paprd_activate(sc);
 335         }
 336
 337         ath9k_ps_restore(sc);
 338 }
 339
 340 /*
 341  *  This routine performs the periodic noise floor calibration function
 342  *  that is used to adjust and optimize the chip performance.  This
 343  *  takes environmental changes (location, temperature) into account.
 344  *  When the task is complete, it reschedules itself depending on the
 345  *  appropriate interval that was calculated.
 346  */
 347 void ath_ani_calibrate(unsigned long data)
 348 {
 349         struct ath_softc *sc = (struct ath_softc *)data;
 350         struct ath_hw *ah = sc->sc_ah;
 351         struct ath_common *common = ath9k_hw_common(ah);
 352         bool longcal = false;
 353         bool shortcal = false;
 354         bool aniflag = false;
 355         unsigned int timestamp = jiffies_to_msecs(jiffies);
 356         u32 cal_interval, short_cal_interval;
 357
 358         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 359                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 360
 361         /* Only calibrate if awake */
 362         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 363                 goto set_timer;
 364
 365         ath9k_ps_wakeup(sc);
 366
 367         /* Long calibration runs independently of short calibration. */
 368         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 369                 longcal = true;
 370                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 371                 common->ani.longcal_timer = timestamp;
 372         }
 373
 374         /* Short calibration applies only while caldone is false */
 375         if (!common->ani.caldone) {
 376                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 377                         shortcal = true;
 378                         ath_print(common, ATH_DBG_ANI,
 379                                   "shortcal @%lu\n", jiffies);
 380                         common->ani.shortcal_timer = timestamp;
 381                         common->ani.resetcal_timer = timestamp;
 382                 }
 383         } else {
 384                 if ((timestamp - common->ani.resetcal_timer) >=
 385                     ATH_RESTART_CALINTERVAL) {
 386                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 387                         if (common->ani.caldone)
 388                                 common->ani.resetcal_timer = timestamp;
 389                 }
 390         }
 391
 392         /* Verify whether we must check ANI */
 393         if ((timestamp - common->ani.checkani_timer) >=
 394              ah->config.ani_poll_interval) {
 395                 aniflag = true;
 396                 common->ani.checkani_timer = timestamp;
 397         }
 398
 399         /* Skip all processing if there's nothing to do. */
 400         if (longcal || shortcal || aniflag) {
 401                 /* Call ANI routine if necessary */
 402                 if (aniflag)
 403                         ath9k_hw_ani_monitor(ah, ah->curchan);
 404
 405                 /* Perform calibration if necessary */
 406                 if (longcal || shortcal) {
 407                         common->ani.caldone =
 408                                 ath9k_hw_calibrate(ah,
 409                                                    ah->curchan,
 410                                                    common->rx_chainmask,
 411                                                    longcal);
 412
 413                         if (longcal)
 414                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 415                                                                      ah->curchan);
 416
 417                         ath_print(common, ATH_DBG_ANI,
 418                                   " calibrate chan %u/%x nf: %d\n",
 419                                   ah->curchan->channel,
 420                                   ah->curchan->channelFlags,
 421                                   common->ani.noise_floor);
 422                 }
 423         }
 424
 425         ath9k_ps_restore(sc);
 426
 427 set_timer:
 428         /*
 429         * Set timer interval based on previous results.
 430         * The interval must be the shortest necessary to satisfy ANI,
 431         * short calibration and long calibration.
 432         */
 433         cal_interval = ATH_LONG_CALINTERVAL;
 434         if (sc->sc_ah->config.enable_ani)
 435                 cal_interval = min(cal_interval,
 436                                    (u32)ah->config.ani_poll_interval);
 437         if (!common->ani.caldone)
 438                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 439
 440         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 441         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) &&
 442             !(sc->sc_flags & SC_OP_SCANNING)) {
 443                 if (!sc->sc_ah->curchan->paprd_done)
 444                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 445                 else
 446                         ath_paprd_activate(sc);
 447         }
 448 }
 449
 450 static void ath_start_ani(struct ath_common *common)
 451 {
 452         struct ath_hw *ah = common->ah;
 453         unsigned long timestamp = jiffies_to_msecs(jiffies);
 454
 455         common->ani.longcal_timer = timestamp;
 456         common->ani.shortcal_timer = timestamp;
 457         common->ani.checkani_timer = timestamp;
 458
 459         mod_timer(&common->ani.timer,
 460                   jiffies +
 461                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 462 }
 463
 464 /*
 465  * Update tx/rx chainmask. For legacy association,
 466  * hard code chainmask to 1x1, for 11n association, use
 467  * the chainmask configuration, for bt coexistence, use
 468  * the chainmask configuration even in legacy mode.
 469  */
 470 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 471 {
 472         struct ath_hw *ah = sc->sc_ah;
 473         struct ath_common *common = ath9k_hw_common(ah);
 474
 475         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 476             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 477                 common->tx_chainmask = ah->caps.tx_chainmask;
 478                 common->rx_chainmask = ah->caps.rx_chainmask;
 479         } else {
 480                 common->tx_chainmask = 1;
 481                 common->rx_chainmask = 1;
 482         }
 483
 484         ath_print(common, ATH_DBG_CONFIG,
 485                   "tx chmask: %d, rx chmask: %d\n",
 486                   common->tx_chainmask,
 487                   common->rx_chainmask);
 488 }
 489
 490 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 491 {
 492         struct ath_node *an;
 493
 494         an = (struct ath_node *)sta->drv_priv;
 495
 496         if (sc->sc_flags & SC_OP_TXAGGR) {
 497                 ath_tx_node_init(sc, an);
 498                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 499                                      sta->ht_cap.ampdu_factor);
 500                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 501                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 502         }
 503 }
 504
 505 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 506 {
 507         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 508
 509         if (sc->sc_flags & SC_OP_TXAGGR)
 510                 ath_tx_node_cleanup(sc, an);
 511 }
 512
 513 void ath9k_tasklet(unsigned long data)
 514 {
 515         struct ath_softc *sc = (struct ath_softc *)data;
 516         struct ath_hw *ah = sc->sc_ah;
 517         struct ath_common *common = ath9k_hw_common(ah);
 518
 519         u32 status = sc->intrstatus;
 520         u32 rxmask;
 521
 522         ath9k_ps_wakeup(sc);
 523
 524         if ((status & ATH9K_INT_FATAL) ||
 525             !ath9k_hw_check_alive(ah)) {
 526                 ath_reset(sc, false);
 527                 ath9k_ps_restore(sc);
 528                 return;
 529         }
 530
 531         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 532                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 533                           ATH9K_INT_RXORN);
 534         else
 535                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 536
 537         if (status & rxmask) {
 538                 spin_lock_bh(&sc->rx.rxflushlock);
 539
 540                 /* Check for high priority Rx first */
 541                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 542                     (status & ATH9K_INT_RXHP))
 543                         ath_rx_tasklet(sc, 0, true);
 544
 545                 ath_rx_tasklet(sc, 0, false);
 546                 spin_unlock_bh(&sc->rx.rxflushlock);
 547         }
 548
 549         if (status & ATH9K_INT_TX) {
 550                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 551                         ath_tx_edma_tasklet(sc);
 552                 else
 553                         ath_tx_tasklet(sc);
 554         }
 555
 556         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 557                 /*
 558                  * TSF sync does not look correct; remain awake to sync with
 559                  * the next Beacon.
 560                  */
 561                 ath_print(common, ATH_DBG_PS,
 562                           "TSFOOR - Sync with next Beacon\n");
 563                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 564         }
 565
 566         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 567                 if (status & ATH9K_INT_GENTIMER)
 568                         ath_gen_timer_isr(sc->sc_ah);
 569
 570         /* re-enable hardware interrupt */
 571         ath9k_hw_set_interrupts(ah, ah->imask);
 572         ath9k_ps_restore(sc);
 573 }
 574
 575 irqreturn_t ath_isr(int irq, void *dev)
 576 {
 577 #define SCHED_INTR (                            \
 578                 ATH9K_INT_FATAL |               \
 579                 ATH9K_INT_RXORN |               \
 580                 ATH9K_INT_RXEOL |               \
 581                 ATH9K_INT_RX |                  \
 582                 ATH9K_INT_RXLP |                \
 583                 ATH9K_INT_RXHP |                \
 584                 ATH9K_INT_TX |                  \
 585                 ATH9K_INT_BMISS |               \
 586                 ATH9K_INT_CST |                 \
 587                 ATH9K_INT_TSFOOR |              \
 588                 ATH9K_INT_GENTIMER)
 589
 590         struct ath_softc *sc = dev;
 591         struct ath_hw *ah = sc->sc_ah;
 592         enum ath9k_int status;
 593         bool sched = false;
 594
 595         /*
 596          * The hardware is not ready/present, don't
 597          * touch anything. Note this can happen early
 598          * on if the IRQ is shared.
 599          */
 600         if (sc->sc_flags & SC_OP_INVALID)
 601                 return IRQ_NONE;
 602
 603
 604         /* shared irq, not for us */
 605
 606         if (!ath9k_hw_intrpend(ah))
 607                 return IRQ_NONE;
 608
 609         /*
 610          * Figure out the reason(s) for the interrupt.  Note
 611          * that the hal returns a pseudo-ISR that may include
 612          * bits we haven't explicitly enabled so we mask the
 613          * value to insure we only process bits we requested.
 614          */
 615         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 616         status &= ah->imask;    /* discard unasked-for bits */
 617
 618         /*
 619          * If there are no status bits set, then this interrupt was not
 620          * for me (should have been caught above).
 621          */
 622         if (!status)
 623                 return IRQ_NONE;
 624
 625         /* Cache the status */
 626         sc->intrstatus = status;
 627
 628         if (status & SCHED_INTR)
 629                 sched = true;
 630
 631         /*
 632          * If a FATAL or RXORN interrupt is received, we have to reset the
 633          * chip immediately.
 634          */
 635         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 636             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 637                 goto chip_reset;
 638
 639         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 640             (status & ATH9K_INT_BB_WATCHDOG)) {
 641                 ar9003_hw_bb_watchdog_dbg_info(ah);
 642                 goto chip_reset;
 643         }
 644
 645         if (status & ATH9K_INT_SWBA)
 646                 tasklet_schedule(&sc->bcon_tasklet);
 647
 648         if (status & ATH9K_INT_TXURN)
 649                 ath9k_hw_updatetxtriglevel(ah, true);
 650
 651         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 652                 if (status & ATH9K_INT_RXEOL) {
 653                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 654                         ath9k_hw_set_interrupts(ah, ah->imask);
 655                 }
 656         }
 657
 658         if (status & ATH9K_INT_MIB) {
 659                 /*
 660                  * Disable interrupts until we service the MIB
 661                  * interrupt; otherwise it will continue to
 662                  * fire.
 663                  */
 664                 ath9k_hw_set_interrupts(ah, 0);
 665                 /*
 666                  * Let the hal handle the event. We assume
 667                  * it will clear whatever condition caused
 668                  * the interrupt.
 669                  */
 670                 ath9k_hw_procmibevent(ah);
 671                 ath9k_hw_set_interrupts(ah, ah->imask);
 672         }
 673
 674         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 675                 if (status & ATH9K_INT_TIM_TIMER) {
 676                         /* Clear RxAbort bit so that we can
 677                          * receive frames */
 678                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 679                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 680                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 681                 }
 682
 683 chip_reset:
 684
 685         ath_debug_stat_interrupt(sc, status);
 686
 687         if (sched) {
 688                 /* turn off every interrupt except SWBA */
 689                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 690                 tasklet_schedule(&sc->intr_tq);
 691         }
 692
 693         return IRQ_HANDLED;
 694
 695 #undef SCHED_INTR
 696 }
 697
 698 static u32 ath_get_extchanmode(struct ath_softc *sc,
 699                                struct ieee80211_channel *chan,
 700                                enum nl80211_channel_type channel_type)
 701 {
 702         u32 chanmode = 0;
 703
 704         switch (chan->band) {
 705         case IEEE80211_BAND_2GHZ:
 706                 switch(channel_type) {
 707                 case NL80211_CHAN_NO_HT:
 708                 case NL80211_CHAN_HT20:
 709                         chanmode = CHANNEL_G_HT20;
 710                         break;
 711                 case NL80211_CHAN_HT40PLUS:
 712                         chanmode = CHANNEL_G_HT40PLUS;
 713                         break;
 714                 case NL80211_CHAN_HT40MINUS:
 715                         chanmode = CHANNEL_G_HT40MINUS;
 716                         break;
 717                 }
 718                 break;
 719         case IEEE80211_BAND_5GHZ:
 720                 switch(channel_type) {
 721                 case NL80211_CHAN_NO_HT:
 722                 case NL80211_CHAN_HT20:
 723                         chanmode = CHANNEL_A_HT20;
 724                         break;
 725                 case NL80211_CHAN_HT40PLUS:
 726                         chanmode = CHANNEL_A_HT40PLUS;
 727                         break;
 728                 case NL80211_CHAN_HT40MINUS:
 729                         chanmode = CHANNEL_A_HT40MINUS;
 730                         break;
 731                 }
 732                 break;
 733         default:
 734                 break;
 735         }
 736
 737         return chanmode;
 738 }
 739
 740 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 741                                  struct ieee80211_vif *vif,
 742                                  struct ieee80211_bss_conf *bss_conf)
 743 {
 744         struct ath_hw *ah = sc->sc_ah;
 745         struct ath_common *common = ath9k_hw_common(ah);
 746
 747         if (bss_conf->assoc) {
 748                 ath_print(common, ATH_DBG_CONFIG,
 749                           "Bss Info ASSOC %d, bssid: %pM\n",
 750                            bss_conf->aid, common->curbssid);
 751
 752                 /* New association, store aid */
 753                 common->curaid = bss_conf->aid;
 754                 ath9k_hw_write_associd(ah);
 755
 756                 /*
 757                  * Request a re-configuration of Beacon related timers
 758                  * on the receipt of the first Beacon frame (i.e.,
 759                  * after time sync with the AP).
 760                  */
 761                 sc->ps_flags |= PS_BEACON_SYNC;
 762
 763                 /* Configure the beacon */
 764                 ath_beacon_config(sc, vif);
 765
 766                 /* Reset rssi stats */
 767                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 768
 769                 ath_start_ani(common);
 770         } else {
 771                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 772                 common->curaid = 0;
 773                 /* Stop ANI */
 774                 del_timer_sync(&common->ani.timer);
 775         }
 776 }
 777
 778 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 779 {
 780         struct ath_hw *ah = sc->sc_ah;
 781         struct ath_common *common = ath9k_hw_common(ah);
 782         struct ieee80211_channel *channel = hw->conf.channel;
 783         int r;
 784
 785         ath9k_ps_wakeup(sc);
 786         ath9k_hw_configpcipowersave(ah, 0, 0);
 787
 788         if (!ah->curchan)
 789                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 790
 791         spin_lock_bh(&sc->sc_resetlock);
 792         r = ath9k_hw_reset(ah, ah->curchan, false);
 793         if (r) {
 794                 ath_print(common, ATH_DBG_FATAL,
 795                           "Unable to reset channel (%u MHz), "
 796                           "reset status %d\n",
 797                           channel->center_freq, r);
 798         }
 799         spin_unlock_bh(&sc->sc_resetlock);
 800
 801         ath_update_txpow(sc);
 802         if (ath_startrecv(sc) != 0) {
 803                 ath_print(common, ATH_DBG_FATAL,
 804                           "Unable to restart recv logic\n");
 805                 return;
 806         }
 807
 808         if (sc->sc_flags & SC_OP_BEACONS)
 809                 ath_beacon_config(sc, NULL);    /* restart beacons */
 810
 811         /* Re-Enable  interrupts */
 812         ath9k_hw_set_interrupts(ah, ah->imask);
 813
 814         /* Enable LED */
 815         ath9k_hw_cfg_output(ah, ah->led_pin,
 816                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 817         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 818
 819         ieee80211_wake_queues(hw);
 820         ath9k_ps_restore(sc);
 821 }
 822
 823 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 824 {
 825         struct ath_hw *ah = sc->sc_ah;
 826         struct ieee80211_channel *channel = hw->conf.channel;
 827         int r;
 828
 829         ath9k_ps_wakeup(sc);
 830         ieee80211_stop_queues(hw);
 831
 832         /* Disable LED */
 833         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 834         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 835
 836         /* Disable interrupts */
 837         ath9k_hw_set_interrupts(ah, 0);
 838
 839         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 840         ath_stoprecv(sc);               /* turn off frame recv */
 841         ath_flushrecv(sc);              /* flush recv queue */
 842
 843         if (!ah->curchan)
 844                 ah->curchan = ath_get_curchannel(sc, hw);
 845
 846         spin_lock_bh(&sc->sc_resetlock);
 847         r = ath9k_hw_reset(ah, ah->curchan, false);
 848         if (r) {
 849                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 850                           "Unable to reset channel (%u MHz), "
 851                           "reset status %d\n",
 852                           channel->center_freq, r);
 853         }
 854         spin_unlock_bh(&sc->sc_resetlock);
 855
 856         ath9k_hw_phy_disable(ah);
 857         ath9k_hw_configpcipowersave(ah, 1, 1);
 858         ath9k_ps_restore(sc);
 859         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 860 }
 861
 862 int ath_reset(struct ath_softc *sc, bool retry_tx)
 863 {
 864         struct ath_hw *ah = sc->sc_ah;
 865         struct ath_common *common = ath9k_hw_common(ah);
 866         struct ieee80211_hw *hw = sc->hw;
 867         int r;
 868
 869         /* Stop ANI */
 870         del_timer_sync(&common->ani.timer);
 871
 872         ieee80211_stop_queues(hw);
 873
 874         ath9k_hw_set_interrupts(ah, 0);
 875         ath_drain_all_txq(sc, retry_tx);
 876         ath_stoprecv(sc);
 877         ath_flushrecv(sc);
 878
 879         spin_lock_bh(&sc->sc_resetlock);
 880         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 881         if (r)
 882                 ath_print(common, ATH_DBG_FATAL,
 883                           "Unable to reset hardware; reset status %d\n", r);
 884         spin_unlock_bh(&sc->sc_resetlock);
 885
 886         if (ath_startrecv(sc) != 0)
 887                 ath_print(common, ATH_DBG_FATAL,
 888                           "Unable to start recv logic\n");
 889
 890         /*
 891          * We may be doing a reset in response to a request
 892          * that changes the channel so update any state that
 893          * might change as a result.
 894          */
 895         ath_cache_conf_rate(sc, &hw->conf);
 896
 897         ath_update_txpow(sc);
 898
 899         if (sc->sc_flags & SC_OP_BEACONS)
 900                 ath_beacon_config(sc, NULL);    /* restart beacons */
 901
 902         ath9k_hw_set_interrupts(ah, ah->imask);
 903
 904         if (retry_tx) {
 905                 int i;
 906                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 907                         if (ATH_TXQ_SETUP(sc, i)) {
 908                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 909                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 910                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 911                         }
 912                 }
 913         }
 914
 915         ieee80211_wake_queues(hw);
 916
 917         /* Start ANI */
 918         ath_start_ani(common);
 919
 920         return r;
 921 }
 922
 923 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 924 {
 925         int qnum;
 926
 927         switch (queue) {
 928         case 0:
 929                 qnum = sc->tx.hwq_map[WME_AC_VO];
 930                 break;
 931         case 1:
 932                 qnum = sc->tx.hwq_map[WME_AC_VI];
 933                 break;
 934         case 2:
 935                 qnum = sc->tx.hwq_map[WME_AC_BE];
 936                 break;
 937         case 3:
 938                 qnum = sc->tx.hwq_map[WME_AC_BK];
 939                 break;
 940         default:
 941                 qnum = sc->tx.hwq_map[WME_AC_BE];
 942                 break;
 943         }
 944
 945         return qnum;
 946 }
 947
 948 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 949 {
 950         int qnum;
 951
 952         switch (queue) {
 953         case WME_AC_VO:
 954                 qnum = 0;
 955                 break;
 956         case WME_AC_VI:
 957                 qnum = 1;
 958                 break;
 959         case WME_AC_BE:
 960                 qnum = 2;
 961                 break;
 962         case WME_AC_BK:
 963                 qnum = 3;
 964                 break;
 965         default:
 966                 qnum = -1;
 967                 break;
 968         }
 969
 970         return qnum;
 971 }
 972
 973 /* XXX: Remove me once we don't depend on ath9k_channel for all
 974  * this redundant data */
 975 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 976                            struct ath9k_channel *ichan)
 977 {
 978         struct ieee80211_channel *chan = hw->conf.channel;
 979         struct ieee80211_conf *conf = &hw->conf;
 980
 981         ichan->channel = chan->center_freq;
 982         ichan->chan = chan;
 983
 984         if (chan->band == IEEE80211_BAND_2GHZ) {
 985                 ichan->chanmode = CHANNEL_G;
 986                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
 987         } else {
 988                 ichan->chanmode = CHANNEL_A;
 989                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
 990         }
 991
 992         if (conf_is_ht(conf))
 993                 ichan->chanmode = ath_get_extchanmode(sc, chan,
 994                                             conf->channel_type);
 995 }
 996
 997 /**********************/
 998 /* mac80211 callbacks */
 999 /**********************/
1000
1001 static int ath9k_start(struct ieee80211_hw *hw)
1002 {
1003         struct ath_wiphy *aphy = hw->priv;
1004         struct ath_softc *sc = aphy->sc;
1005         struct ath_hw *ah = sc->sc_ah;
1006         struct ath_common *common = ath9k_hw_common(ah);
1007         struct ieee80211_channel *curchan = hw->conf.channel;
1008         struct ath9k_channel *init_channel;
1009         int r;
1010
1011         ath_print(common, ATH_DBG_CONFIG,
1012                   "Starting driver with initial channel: %d MHz\n",
1013                   curchan->center_freq);
1014
1015         mutex_lock(&sc->mutex);
1016
1017         if (ath9k_wiphy_started(sc)) {
1018                 if (sc->chan_idx == curchan->hw_value) {
1019                         /*
1020                          * Already on the operational channel, the new wiphy
1021                          * can be marked active.
1022                          */
1023                         aphy->state = ATH_WIPHY_ACTIVE;
1024                         ieee80211_wake_queues(hw);
1025                 } else {
1026                         /*
1027                          * Another wiphy is on another channel, start the new
1028                          * wiphy in paused state.
1029                          */
1030                         aphy->state = ATH_WIPHY_PAUSED;
1031                         ieee80211_stop_queues(hw);
1032                 }
1033                 mutex_unlock(&sc->mutex);
1034                 return 0;
1035         }
1036         aphy->state = ATH_WIPHY_ACTIVE;
1037
1038         /* setup initial channel */
1039
1040         sc->chan_idx = curchan->hw_value;
1041
1042         init_channel = ath_get_curchannel(sc, hw);
1043
1044         /* Reset SERDES registers */
1045         ath9k_hw_configpcipowersave(ah, 0, 0);
1046
1047         /*
1048          * The basic interface to setting the hardware in a good
1049          * state is ``reset''.  On return the hardware is known to
1050          * be powered up and with interrupts disabled.  This must
1051          * be followed by initialization of the appropriate bits
1052          * and then setup of the interrupt mask.
1053          */
1054         spin_lock_bh(&sc->sc_resetlock);
1055         r = ath9k_hw_reset(ah, init_channel, false);
1056         if (r) {
1057                 ath_print(common, ATH_DBG_FATAL,
1058                           "Unable to reset hardware; reset status %d "
1059                           "(freq %u MHz)\n", r,
1060                           curchan->center_freq);
1061                 spin_unlock_bh(&sc->sc_resetlock);
1062                 goto mutex_unlock;
1063         }
1064         spin_unlock_bh(&sc->sc_resetlock);
1065
1066         /*
1067          * This is needed only to setup initial state
1068          * but it's best done after a reset.
1069          */
1070         ath_update_txpow(sc);
1071
1072         /*
1073          * Setup the hardware after reset:
1074          * The receive engine is set going.
1075          * Frame transmit is handled entirely
1076          * in the frame output path; there's nothing to do
1077          * here except setup the interrupt mask.
1078          */
1079         if (ath_startrecv(sc) != 0) {
1080                 ath_print(common, ATH_DBG_FATAL,
1081                           "Unable to start recv logic\n");
1082                 r = -EIO;
1083                 goto mutex_unlock;
1084         }
1085
1086         /* Setup our intr mask. */
1087         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1088                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1089                     ATH9K_INT_GLOBAL;
1090
1091         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1092                 ah->imask |= ATH9K_INT_RXHP |
1093                              ATH9K_INT_RXLP |
1094                              ATH9K_INT_BB_WATCHDOG;
1095         else
1096                 ah->imask |= ATH9K_INT_RX;
1097
1098         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1099                 ah->imask |= ATH9K_INT_GTT;
1100
1101         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1102                 ah->imask |= ATH9K_INT_CST;
1103
1104         ath_cache_conf_rate(sc, &hw->conf);
1105
1106         sc->sc_flags &= ~SC_OP_INVALID;
1107
1108         /* Disable BMISS interrupt when we're not associated */
1109         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1110         ath9k_hw_set_interrupts(ah, ah->imask);
1111
1112         ieee80211_wake_queues(hw);
1113
1114         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1115
1116         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1117             !ah->btcoex_hw.enabled) {
1118                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1119                                            AR_STOMP_LOW_WLAN_WGHT);
1120                 ath9k_hw_btcoex_enable(ah);
1121
1122                 if (common->bus_ops->bt_coex_prep)
1123                         common->bus_ops->bt_coex_prep(common);
1124                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1125                         ath9k_btcoex_timer_resume(sc);
1126         }
1127
1128 mutex_unlock:
1129         mutex_unlock(&sc->mutex);
1130
1131         return r;
1132 }
1133
1134 static int ath9k_tx(struct ieee80211_hw *hw,
1135                     struct sk_buff *skb)
1136 {
1137         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1138         struct ath_wiphy *aphy = hw->priv;
1139         struct ath_softc *sc = aphy->sc;
1140         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1141         struct ath_tx_control txctl;
1142         int padpos, padsize;
1143         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1144         int qnum;
1145
1146         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1147                 ath_print(common, ATH_DBG_XMIT,
1148                           "ath9k: %s: TX in unexpected wiphy state "
1149                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1150                 goto exit;
1151         }
1152
1153         if (sc->ps_enabled) {
1154                 /*
1155                  * mac80211 does not set PM field for normal data frames, so we
1156                  * need to update that based on the current PS mode.
1157                  */
1158                 if (ieee80211_is_data(hdr->frame_control) &&
1159                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1160                     !ieee80211_has_pm(hdr->frame_control)) {
1161                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1162                                   "while in PS mode\n");
1163                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1164                 }
1165         }
1166
1167         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1168                 /*
1169                  * We are using PS-Poll and mac80211 can request TX while in
1170                  * power save mode. Need to wake up hardware for the TX to be
1171                  * completed and if needed, also for RX of buffered frames.
1172                  */
1173                 ath9k_ps_wakeup(sc);
1174                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1175                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1176                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1177                         ath_print(common, ATH_DBG_PS,
1178                                   "Sending PS-Poll to pick a buffered frame\n");
1179                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1180                 } else {
1181                         ath_print(common, ATH_DBG_PS,
1182                                   "Wake up to complete TX\n");
1183                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1184                 }
1185                 /*
1186                  * The actual restore operation will happen only after
1187                  * the sc_flags bit is cleared. We are just dropping
1188                  * the ps_usecount here.
1189                  */
1190                 ath9k_ps_restore(sc);
1191         }
1192
1193         memset(&txctl, 0, sizeof(struct ath_tx_control));
1194
1195         /*
1196          * As a temporary workaround, assign seq# here; this will likely need
1197          * to be cleaned up to work better with Beacon transmission and virtual
1198          * BSSes.
1199          */
1200         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1201                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1202                         sc->tx.seq_no += 0x10;
1203                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1204                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1205         }
1206
1207         /* Add the padding after the header if this is not already done */
1208         padpos = ath9k_cmn_padpos(hdr->frame_control);
1209         padsize = padpos & 3;
1210         if (padsize && skb->len>padpos) {
1211                 if (skb_headroom(skb) < padsize)
1212                         return -1;
1213                 skb_push(skb, padsize);
1214                 memmove(skb->data, skb->data + padsize, padpos);
1215         }
1216
1217         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1218         txctl.txq = &sc->tx.txq[qnum];
1219
1220         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1221
1222         if (ath_tx_start(hw, skb, &txctl) != 0) {
1223                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1224                 goto exit;
1225         }
1226
1227         return 0;
1228 exit:
1229         dev_kfree_skb_any(skb);
1230         return 0;
1231 }
1232
1233 static void ath9k_stop(struct ieee80211_hw *hw)
1234 {
1235         struct ath_wiphy *aphy = hw->priv;
1236         struct ath_softc *sc = aphy->sc;
1237         struct ath_hw *ah = sc->sc_ah;
1238         struct ath_common *common = ath9k_hw_common(ah);
1239
1240         mutex_lock(&sc->mutex);
1241
1242         aphy->state = ATH_WIPHY_INACTIVE;
1243
1244         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1245         cancel_delayed_work_sync(&sc->tx_complete_work);
1246         cancel_work_sync(&sc->paprd_work);
1247
1248         if (!sc->num_sec_wiphy) {
1249                 cancel_delayed_work_sync(&sc->wiphy_work);
1250                 cancel_work_sync(&sc->chan_work);
1251         }
1252
1253         if (sc->sc_flags & SC_OP_INVALID) {
1254                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1255                 mutex_unlock(&sc->mutex);
1256                 return;
1257         }
1258
1259         if (ath9k_wiphy_started(sc)) {
1260                 mutex_unlock(&sc->mutex);
1261                 return; /* another wiphy still in use */
1262         }
1263
1264         /* Ensure HW is awake when we try to shut it down. */
1265         ath9k_ps_wakeup(sc);
1266
1267         if (ah->btcoex_hw.enabled) {
1268                 ath9k_hw_btcoex_disable(ah);
1269                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1270                         ath9k_btcoex_timer_pause(sc);
1271         }
1272
1273         /* make sure h/w will not generate any interrupt
1274          * before setting the invalid flag. */
1275         ath9k_hw_set_interrupts(ah, 0);
1276
1277         if (!(sc->sc_flags & SC_OP_INVALID)) {
1278                 ath_drain_all_txq(sc, false);
1279                 ath_stoprecv(sc);
1280                 ath9k_hw_phy_disable(ah);
1281         } else
1282                 sc->rx.rxlink = NULL;
1283
1284         /* disable HAL and put h/w to sleep */
1285         ath9k_hw_disable(ah);
1286         ath9k_hw_configpcipowersave(ah, 1, 1);
1287         ath9k_ps_restore(sc);
1288
1289         /* Finally, put the chip in FULL SLEEP mode */
1290         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1291
1292         sc->sc_flags |= SC_OP_INVALID;
1293
1294         mutex_unlock(&sc->mutex);
1295
1296         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1297 }
1298
1299 static int ath9k_add_interface(struct ieee80211_hw *hw,
1300                                struct ieee80211_vif *vif)
1301 {
1302         struct ath_wiphy *aphy = hw->priv;
1303         struct ath_softc *sc = aphy->sc;
1304         struct ath_hw *ah = sc->sc_ah;
1305         struct ath_common *common = ath9k_hw_common(ah);
1306         struct ath_vif *avp = (void *)vif->drv_priv;
1307         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1308         int ret = 0;
1309
1310         mutex_lock(&sc->mutex);
1311
1312         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1313             sc->nvifs > 0) {
1314                 ret = -ENOBUFS;
1315                 goto out;
1316         }
1317
1318         switch (vif->type) {
1319         case NL80211_IFTYPE_STATION:
1320                 ic_opmode = NL80211_IFTYPE_STATION;
1321                 break;
1322         case NL80211_IFTYPE_ADHOC:
1323         case NL80211_IFTYPE_AP:
1324         case NL80211_IFTYPE_MESH_POINT:
1325                 if (sc->nbcnvifs >= ATH_BCBUF) {
1326                         ret = -ENOBUFS;
1327                         goto out;
1328                 }
1329                 ic_opmode = vif->type;
1330                 break;
1331         default:
1332                 ath_print(common, ATH_DBG_FATAL,
1333                         "Interface type %d not yet supported\n", vif->type);
1334                 ret = -EOPNOTSUPP;
1335                 goto out;
1336         }
1337
1338         ath_print(common, ATH_DBG_CONFIG,
1339                   "Attach a VIF of type: %d\n", ic_opmode);
1340
1341         /* Set the VIF opmode */
1342         avp->av_opmode = ic_opmode;
1343         avp->av_bslot = -1;
1344
1345         sc->nvifs++;
1346
1347         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1348                 ath9k_set_bssid_mask(hw);
1349
1350         if (sc->nvifs > 1)
1351                 goto out; /* skip global settings for secondary vif */
1352
1353         if (ic_opmode == NL80211_IFTYPE_AP) {
1354                 ath9k_hw_set_tsfadjust(ah, 1);
1355                 sc->sc_flags |= SC_OP_TSF_RESET;
1356         }
1357
1358         /* Set the device opmode */
1359         ah->opmode = ic_opmode;
1360
1361         /*
1362          * Enable MIB interrupts when there are hardware phy counters.
1363          * Note we only do this (at the moment) for station mode.
1364          */
1365         if ((vif->type == NL80211_IFTYPE_STATION) ||
1366             (vif->type == NL80211_IFTYPE_ADHOC) ||
1367             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1368                 if (ah->config.enable_ani)
1369                         ah->imask |= ATH9K_INT_MIB;
1370                 ah->imask |= ATH9K_INT_TSFOOR;
1371         }
1372
1373         ath9k_hw_set_interrupts(ah, ah->imask);
1374
1375         if (vif->type == NL80211_IFTYPE_AP    ||
1376             vif->type == NL80211_IFTYPE_ADHOC ||
1377             vif->type == NL80211_IFTYPE_MONITOR)
1378                 ath_start_ani(common);
1379
1380 out:
1381         mutex_unlock(&sc->mutex);
1382         return ret;
1383 }
1384
1385 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1386                                    struct ieee80211_vif *vif)
1387 {
1388         struct ath_wiphy *aphy = hw->priv;
1389         struct ath_softc *sc = aphy->sc;
1390         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1391         struct ath_vif *avp = (void *)vif->drv_priv;
1392         int i;
1393
1394         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1395
1396         mutex_lock(&sc->mutex);
1397
1398         /* Stop ANI */
1399         del_timer_sync(&common->ani.timer);
1400
1401         /* Reclaim beacon resources */
1402         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1403             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1404             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1405                 ath9k_ps_wakeup(sc);
1406                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1407                 ath9k_ps_restore(sc);
1408         }
1409
1410         ath_beacon_return(sc, avp);
1411         sc->sc_flags &= ~SC_OP_BEACONS;
1412
1413         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1414                 if (sc->beacon.bslot[i] == vif) {
1415                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1416                                "slot\n", __func__);
1417                         sc->beacon.bslot[i] = NULL;
1418                         sc->beacon.bslot_aphy[i] = NULL;
1419                 }
1420         }
1421
1422         sc->nvifs--;
1423
1424         mutex_unlock(&sc->mutex);
1425 }
1426
1427 void ath9k_enable_ps(struct ath_softc *sc)
1428 {
1429         struct ath_hw *ah = sc->sc_ah;
1430
1431         sc->ps_enabled = true;
1432         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1433                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1434                         ah->imask |= ATH9K_INT_TIM_TIMER;
1435                         ath9k_hw_set_interrupts(ah, ah->imask);
1436                 }
1437                 ath9k_hw_setrxabort(ah, 1);
1438         }
1439 }
1440
1441 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1442 {
1443         struct ath_wiphy *aphy = hw->priv;
1444         struct ath_softc *sc = aphy->sc;
1445         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1446         struct ieee80211_conf *conf = &hw->conf;
1447         struct ath_hw *ah = sc->sc_ah;
1448         bool disable_radio;
1449
1450         mutex_lock(&sc->mutex);
1451
1452         /*
1453          * Leave this as the first check because we need to turn on the
1454          * radio if it was disabled before prior to processing the rest
1455          * of the changes. Likewise we must only disable the radio towards
1456          * the end.
1457          */
1458         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1459                 bool enable_radio;
1460                 bool all_wiphys_idle;
1461                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1462
1463                 spin_lock_bh(&sc->wiphy_lock);
1464                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1465                 ath9k_set_wiphy_idle(aphy, idle);
1466
1467                 enable_radio = (!idle && all_wiphys_idle);
1468
1469                 /*
1470                  * After we unlock here its possible another wiphy
1471                  * can be re-renabled so to account for that we will
1472                  * only disable the radio toward the end of this routine
1473                  * if by then all wiphys are still idle.
1474                  */
1475                 spin_unlock_bh(&sc->wiphy_lock);
1476
1477                 if (enable_radio) {
1478                         sc->ps_idle = false;
1479                         ath_radio_enable(sc, hw);
1480                         ath_print(common, ATH_DBG_CONFIG,
1481                                   "not-idle: enabling radio\n");
1482                 }
1483         }
1484
1485         /*
1486          * We just prepare to enable PS. We have to wait until our AP has
1487          * ACK'd our null data frame to disable RX otherwise we'll ignore
1488          * those ACKs and end up retransmitting the same null data frames.
1489          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1490          */
1491         if (changed & IEEE80211_CONF_CHANGE_PS) {
1492                 if (conf->flags & IEEE80211_CONF_PS) {
1493                         sc->ps_flags |= PS_ENABLED;
1494                         /*
1495                          * At this point we know hardware has received an ACK
1496                          * of a previously sent null data frame.
1497                          */
1498                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1499                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1500                                 ath9k_enable_ps(sc);
1501                         }
1502                 } else {
1503                         sc->ps_enabled = false;
1504                         sc->ps_flags &= ~(PS_ENABLED |
1505                                           PS_NULLFUNC_COMPLETED);
1506                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1507                         if (!(ah->caps.hw_caps &
1508                               ATH9K_HW_CAP_AUTOSLEEP)) {
1509                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1510                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1511                                                   PS_WAIT_FOR_CAB |
1512                                                   PS_WAIT_FOR_PSPOLL_DATA |
1513                                                   PS_WAIT_FOR_TX_ACK);
1514                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1515                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1516                                         ath9k_hw_set_interrupts(sc->sc_ah,
1517                                                         ah->imask);
1518                                 }
1519                         }
1520                 }
1521         }
1522
1523         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1524                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1525                         ath_print(common, ATH_DBG_CONFIG,
1526                                   "HW opmode set to Monitor mode\n");
1527                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1528                 }
1529         }
1530
1531         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1532                 struct ieee80211_channel *curchan = hw->conf.channel;
1533                 int pos = curchan->hw_value;
1534
1535                 aphy->chan_idx = pos;
1536                 aphy->chan_is_ht = conf_is_ht(conf);
1537
1538                 if (aphy->state == ATH_WIPHY_SCAN ||
1539                     aphy->state == ATH_WIPHY_ACTIVE)
1540                         ath9k_wiphy_pause_all_forced(sc, aphy);
1541                 else {
1542                         /*
1543                          * Do not change operational channel based on a paused
1544                          * wiphy changes.
1545                          */
1546                         goto skip_chan_change;
1547                 }
1548
1549                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1550                           curchan->center_freq);
1551
1552                 /* XXX: remove me eventualy */
1553                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1554
1555                 ath_update_chainmask(sc, conf_is_ht(conf));
1556
1557                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1558                         ath_print(common, ATH_DBG_FATAL,
1559                                   "Unable to set channel\n");
1560                         mutex_unlock(&sc->mutex);
1561                         return -EINVAL;
1562                 }
1563         }
1564
1565 skip_chan_change:
1566         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1567                 sc->config.txpowlimit = 2 * conf->power_level;
1568                 ath_update_txpow(sc);
1569         }
1570
1571         spin_lock_bh(&sc->wiphy_lock);
1572         disable_radio = ath9k_all_wiphys_idle(sc);
1573         spin_unlock_bh(&sc->wiphy_lock);
1574
1575         if (disable_radio) {
1576                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1577                 sc->ps_idle = true;
1578                 ath_radio_disable(sc, hw);
1579         }
1580
1581         mutex_unlock(&sc->mutex);
1582
1583         return 0;
1584 }
1585
1586 #define SUPPORTED_FILTERS                       \
1587         (FIF_PROMISC_IN_BSS |                   \
1588         FIF_ALLMULTI |                          \
1589         FIF_CONTROL |                           \
1590         FIF_PSPOLL |                            \
1591         FIF_OTHER_BSS |                         \
1592         FIF_BCN_PRBRESP_PROMISC |               \
1593         FIF_FCSFAIL)
1594
1595 /* FIXME: sc->sc_full_reset ? */
1596 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1597                                    unsigned int changed_flags,
1598                                    unsigned int *total_flags,
1599                                    u64 multicast)
1600 {
1601         struct ath_wiphy *aphy = hw->priv;
1602         struct ath_softc *sc = aphy->sc;
1603         u32 rfilt;
1604
1605         changed_flags &= SUPPORTED_FILTERS;
1606         *total_flags &= SUPPORTED_FILTERS;
1607
1608         sc->rx.rxfilter = *total_flags;
1609         ath9k_ps_wakeup(sc);
1610         rfilt = ath_calcrxfilter(sc);
1611         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1612         ath9k_ps_restore(sc);
1613
1614         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1615                   "Set HW RX filter: 0x%x\n", rfilt);
1616 }
1617
1618 static int ath9k_sta_add(struct ieee80211_hw *hw,
1619                          struct ieee80211_vif *vif,
1620                          struct ieee80211_sta *sta)
1621 {
1622         struct ath_wiphy *aphy = hw->priv;
1623         struct ath_softc *sc = aphy->sc;
1624
1625         ath_node_attach(sc, sta);
1626
1627         return 0;
1628 }
1629
1630 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1631                             struct ieee80211_vif *vif,
1632                             struct ieee80211_sta *sta)
1633 {
1634         struct ath_wiphy *aphy = hw->priv;
1635         struct ath_softc *sc = aphy->sc;
1636
1637         ath_node_detach(sc, sta);
1638
1639         return 0;
1640 }
1641
1642 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1643                          const struct ieee80211_tx_queue_params *params)
1644 {
1645         struct ath_wiphy *aphy = hw->priv;
1646         struct ath_softc *sc = aphy->sc;
1647         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1648         struct ath9k_tx_queue_info qi;
1649         int ret = 0, qnum;
1650
1651         if (queue >= WME_NUM_AC)
1652                 return 0;
1653
1654         mutex_lock(&sc->mutex);
1655
1656         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1657
1658         qi.tqi_aifs = params->aifs;
1659         qi.tqi_cwmin = params->cw_min;
1660         qi.tqi_cwmax = params->cw_max;
1661         qi.tqi_burstTime = params->txop;
1662         qnum = ath_get_hal_qnum(queue, sc);
1663
1664         ath_print(common, ATH_DBG_CONFIG,
1665                   "Configure tx [queue/halq] [%d/%d],  "
1666                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1667                   queue, qnum, params->aifs, params->cw_min,
1668                   params->cw_max, params->txop);
1669
1670         ret = ath_txq_update(sc, qnum, &qi);
1671         if (ret)
1672                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1673
1674         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1675                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1676                         ath_beaconq_config(sc);
1677
1678         mutex_unlock(&sc->mutex);
1679
1680         return ret;
1681 }
1682
1683 static int ath9k_set_key(struct ieee80211_hw *hw,
1684                          enum set_key_cmd cmd,
1685                          struct ieee80211_vif *vif,
1686                          struct ieee80211_sta *sta,
1687                          struct ieee80211_key_conf *key)
1688 {
1689         struct ath_wiphy *aphy = hw->priv;
1690         struct ath_softc *sc = aphy->sc;
1691         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1692         int ret = 0;
1693
1694         if (modparam_nohwcrypt)
1695                 return -ENOSPC;
1696
1697         mutex_lock(&sc->mutex);
1698         ath9k_ps_wakeup(sc);
1699         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1700
1701         switch (cmd) {
1702         case SET_KEY:
1703                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1704                 if (ret >= 0) {
1705                         key->hw_key_idx = ret;
1706                         /* push IV and Michael MIC generation to stack */
1707                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1708                         if (key->alg == ALG_TKIP)
1709                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1710                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1711                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1712                         ret = 0;
1713                 }
1714                 break;
1715         case DISABLE_KEY:
1716                 ath9k_cmn_key_delete(common, key);
1717                 break;
1718         default:
1719                 ret = -EINVAL;
1720         }
1721
1722         ath9k_ps_restore(sc);
1723         mutex_unlock(&sc->mutex);
1724
1725         return ret;
1726 }
1727
1728 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1729                                    struct ieee80211_vif *vif,
1730                                    struct ieee80211_bss_conf *bss_conf,
1731                                    u32 changed)
1732 {
1733         struct ath_wiphy *aphy = hw->priv;
1734         struct ath_softc *sc = aphy->sc;
1735         struct ath_hw *ah = sc->sc_ah;
1736         struct ath_common *common = ath9k_hw_common(ah);
1737         struct ath_vif *avp = (void *)vif->drv_priv;
1738         int slottime;
1739         int error;
1740
1741         mutex_lock(&sc->mutex);
1742
1743         if (changed & BSS_CHANGED_BSSID) {
1744                 /* Set BSSID */
1745                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1746                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1747                 common->curaid = 0;
1748                 ath9k_hw_write_associd(ah);
1749
1750                 /* Set aggregation protection mode parameters */
1751                 sc->config.ath_aggr_prot = 0;
1752
1753                 /* Only legacy IBSS for now */
1754                 if (vif->type == NL80211_IFTYPE_ADHOC)
1755                         ath_update_chainmask(sc, 0);
1756
1757                 ath_print(common, ATH_DBG_CONFIG,
1758                           "BSSID: %pM aid: 0x%x\n",
1759                           common->curbssid, common->curaid);
1760
1761                 /* need to reconfigure the beacon */
1762                 sc->sc_flags &= ~SC_OP_BEACONS ;
1763         }
1764
1765         /* Enable transmission of beacons (AP, IBSS, MESH) */
1766         if ((changed & BSS_CHANGED_BEACON) ||
1767             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1768                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1769                 error = ath_beacon_alloc(aphy, vif);
1770                 if (!error)
1771                         ath_beacon_config(sc, vif);
1772         }
1773
1774         if (changed & BSS_CHANGED_ERP_SLOT) {
1775                 if (bss_conf->use_short_slot)
1776                         slottime = 9;
1777                 else
1778                         slottime = 20;
1779                 if (vif->type == NL80211_IFTYPE_AP) {
1780                         /*
1781                          * Defer update, so that connected stations can adjust
1782                          * their settings at the same time.
1783                          * See beacon.c for more details
1784                          */
1785                         sc->beacon.slottime = slottime;
1786                         sc->beacon.updateslot = UPDATE;
1787                 } else {
1788                         ah->slottime = slottime;
1789                         ath9k_hw_init_global_settings(ah);
1790                 }
1791         }
1792
1793         /* Disable transmission of beacons */
1794         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1795                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1796
1797         if (changed & BSS_CHANGED_BEACON_INT) {
1798                 sc->beacon_interval = bss_conf->beacon_int;
1799                 /*
1800                  * In case of AP mode, the HW TSF has to be reset
1801                  * when the beacon interval changes.
1802                  */
1803                 if (vif->type == NL80211_IFTYPE_AP) {
1804                         sc->sc_flags |= SC_OP_TSF_RESET;
1805                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1806                         error = ath_beacon_alloc(aphy, vif);
1807                         if (!error)
1808                                 ath_beacon_config(sc, vif);
1809                 } else {
1810                         ath_beacon_config(sc, vif);
1811                 }
1812         }
1813
1814         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1815                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1816                           bss_conf->use_short_preamble);
1817                 if (bss_conf->use_short_preamble)
1818                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1819                 else
1820                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1821         }
1822
1823         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1824                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1825                           bss_conf->use_cts_prot);
1826                 if (bss_conf->use_cts_prot &&
1827                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1828                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1829                 else
1830                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1831         }
1832
1833         if (changed & BSS_CHANGED_ASSOC) {
1834                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1835                         bss_conf->assoc);
1836                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1837         }
1838
1839         mutex_unlock(&sc->mutex);
1840 }
1841
1842 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1843 {
1844         u64 tsf;
1845         struct ath_wiphy *aphy = hw->priv;
1846         struct ath_softc *sc = aphy->sc;
1847
1848         mutex_lock(&sc->mutex);
1849         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1850         mutex_unlock(&sc->mutex);
1851
1852         return tsf;
1853 }
1854
1855 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1856 {
1857         struct ath_wiphy *aphy = hw->priv;
1858         struct ath_softc *sc = aphy->sc;
1859
1860         mutex_lock(&sc->mutex);
1861         ath9k_hw_settsf64(sc->sc_ah, tsf);
1862         mutex_unlock(&sc->mutex);
1863 }
1864
1865 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1866 {
1867         struct ath_wiphy *aphy = hw->priv;
1868         struct ath_softc *sc = aphy->sc;
1869
1870         mutex_lock(&sc->mutex);
1871
1872         ath9k_ps_wakeup(sc);
1873         ath9k_hw_reset_tsf(sc->sc_ah);
1874         ath9k_ps_restore(sc);
1875
1876         mutex_unlock(&sc->mutex);
1877 }
1878
1879 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1880                               struct ieee80211_vif *vif,
1881                               enum ieee80211_ampdu_mlme_action action,
1882                               struct ieee80211_sta *sta,
1883                               u16 tid, u16 *ssn)
1884 {
1885         struct ath_wiphy *aphy = hw->priv;
1886         struct ath_softc *sc = aphy->sc;
1887         int ret = 0;
1888
1889         local_bh_disable();
1890
1891         switch (action) {
1892         case IEEE80211_AMPDU_RX_START:
1893                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1894                         ret = -ENOTSUPP;
1895                 break;
1896         case IEEE80211_AMPDU_RX_STOP:
1897                 break;
1898         case IEEE80211_AMPDU_TX_START:
1899                 ath9k_ps_wakeup(sc);
1900                 ath_tx_aggr_start(sc, sta, tid, ssn);
1901                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1902                 ath9k_ps_restore(sc);
1903                 break;
1904         case IEEE80211_AMPDU_TX_STOP:
1905                 ath9k_ps_wakeup(sc);
1906                 ath_tx_aggr_stop(sc, sta, tid);
1907                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1908                 ath9k_ps_restore(sc);
1909                 break;
1910         case IEEE80211_AMPDU_TX_OPERATIONAL:
1911                 ath9k_ps_wakeup(sc);
1912                 ath_tx_aggr_resume(sc, sta, tid);
1913                 ath9k_ps_restore(sc);
1914                 break;
1915         default:
1916                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1917                           "Unknown AMPDU action\n");
1918         }
1919
1920         local_bh_enable();
1921
1922         return ret;
1923 }
1924
1925 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1926                              struct survey_info *survey)
1927 {
1928         struct ath_wiphy *aphy = hw->priv;
1929         struct ath_softc *sc = aphy->sc;
1930         struct ath_hw *ah = sc->sc_ah;
1931         struct ath_common *common = ath9k_hw_common(ah);
1932         struct ieee80211_conf *conf = &hw->conf;
1933
1934          if (idx != 0)
1935                 return -ENOENT;
1936
1937         survey->channel = conf->channel;
1938         survey->filled = SURVEY_INFO_NOISE_DBM;
1939         survey->noise = common->ani.noise_floor;
1940
1941         return 0;
1942 }
1943
1944 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1945 {
1946         struct ath_wiphy *aphy = hw->priv;
1947         struct ath_softc *sc = aphy->sc;
1948         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1949
1950         mutex_lock(&sc->mutex);
1951         if (ath9k_wiphy_scanning(sc)) {
1952                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1953                        "same time\n");
1954                 /*
1955                  * Do not allow the concurrent scanning state for now. This
1956                  * could be improved with scanning control moved into ath9k.
1957                  */
1958                 mutex_unlock(&sc->mutex);
1959                 return;
1960         }
1961
1962         aphy->state = ATH_WIPHY_SCAN;
1963         ath9k_wiphy_pause_all_forced(sc, aphy);
1964         sc->sc_flags |= SC_OP_SCANNING;
1965         del_timer_sync(&common->ani.timer);
1966         cancel_work_sync(&sc->paprd_work);
1967         cancel_delayed_work_sync(&sc->tx_complete_work);
1968         mutex_unlock(&sc->mutex);
1969 }
1970
1971 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1972 {
1973         struct ath_wiphy *aphy = hw->priv;
1974         struct ath_softc *sc = aphy->sc;
1975         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1976
1977         mutex_lock(&sc->mutex);
1978         aphy->state = ATH_WIPHY_ACTIVE;
1979         sc->sc_flags &= ~SC_OP_SCANNING;
1980         sc->sc_flags |= SC_OP_FULL_RESET;
1981         ath_start_ani(common);
1982         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1983         ath_beacon_config(sc, NULL);
1984         mutex_unlock(&sc->mutex);
1985 }
1986
1987 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1988 {
1989         struct ath_wiphy *aphy = hw->priv;
1990         struct ath_softc *sc = aphy->sc;
1991         struct ath_hw *ah = sc->sc_ah;
1992
1993         mutex_lock(&sc->mutex);
1994         ah->coverage_class = coverage_class;
1995         ath9k_hw_init_global_settings(ah);
1996         mutex_unlock(&sc->mutex);
1997 }
1998
1999 struct ieee80211_ops ath9k_ops = {
2000         .tx                 = ath9k_tx,
2001         .start              = ath9k_start,
2002         .stop               = ath9k_stop,
2003         .add_interface      = ath9k_add_interface,
2004         .remove_interface   = ath9k_remove_interface,
2005         .config             = ath9k_config,
2006         .configure_filter   = ath9k_configure_filter,
2007         .sta_add            = ath9k_sta_add,
2008         .sta_remove         = ath9k_sta_remove,
2009         .conf_tx            = ath9k_conf_tx,
2010         .bss_info_changed   = ath9k_bss_info_changed,
2011         .set_key            = ath9k_set_key,
2012         .get_tsf            = ath9k_get_tsf,
2013         .set_tsf            = ath9k_set_tsf,
2014         .reset_tsf          = ath9k_reset_tsf,
2015         .ampdu_action       = ath9k_ampdu_action,
2016         .get_survey         = ath9k_get_survey,
2017         .sw_scan_start      = ath9k_sw_scan_start,
2018         .sw_scan_complete   = ath9k_sw_scan_complete,
2019         .rfkill_poll        = ath9k_rfkill_poll_state,
2020         .set_coverage_class = ath9k_set_coverage_class,
2021 };