2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
157 static void ath_start_ani(struct ath_common *common)
159 struct ath_hw *ah = common->ah;
160 unsigned long timestamp = jiffies_to_msecs(jiffies);
161 struct ath_softc *sc = (struct ath_softc *) common->priv;
163 if (!(sc->sc_flags & SC_OP_ANI_RUN))
166 if (sc->sc_flags & SC_OP_OFFCHANNEL)
169 common->ani.longcal_timer = timestamp;
170 common->ani.shortcal_timer = timestamp;
171 common->ani.checkani_timer = timestamp;
173 mod_timer(&common->ani.timer,
175 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
179 * Set/change channels. If the channel is really being changed, it's done
180 * by reseting the chip. To accomplish this we must first cleanup any pending
181 * DMA, then restart stuff.
183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
184 struct ath9k_channel *hchan)
186 struct ath_wiphy *aphy = hw->priv;
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 bool fastcc = true, stopped;
191 struct ieee80211_channel *channel = hw->conf.channel;
192 struct ath9k_hw_cal_data *caldata = NULL;
195 if (sc->sc_flags & SC_OP_INVALID)
198 del_timer_sync(&common->ani.timer);
199 cancel_work_sync(&sc->paprd_work);
200 cancel_work_sync(&sc->hw_check_work);
201 cancel_delayed_work_sync(&sc->tx_complete_work);
206 * This is only performed if the channel settings have
209 * To switch channels clear any pending DMA operations;
210 * wait long enough for the RX fifo to drain, reset the
211 * hardware at the new frequency, and then re-enable
212 * the relevant bits of the h/w.
214 ath9k_hw_set_interrupts(ah, 0);
215 ath_drain_all_txq(sc, false);
216 stopped = ath_stoprecv(sc);
218 /* XXX: do not flush receive queue here. We don't want
219 * to flush data frames already in queue because of
220 * changing channel. */
222 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
225 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
226 caldata = &aphy->caldata;
228 ath_print(common, ATH_DBG_CONFIG,
229 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
230 sc->sc_ah->curchan->channel,
231 channel->center_freq, conf_is_ht40(conf),
234 spin_lock_bh(&sc->sc_resetlock);
236 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
238 ath_print(common, ATH_DBG_FATAL,
239 "Unable to reset channel (%u MHz), "
241 channel->center_freq, r);
242 spin_unlock_bh(&sc->sc_resetlock);
245 spin_unlock_bh(&sc->sc_resetlock);
247 if (ath_startrecv(sc) != 0) {
248 ath_print(common, ATH_DBG_FATAL,
249 "Unable to restart recv logic\n");
254 ath_cache_conf_rate(sc, &hw->conf);
255 ath_update_txpow(sc);
256 ath9k_hw_set_interrupts(ah, ah->imask);
258 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
259 ath_beacon_config(sc, NULL);
260 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
261 ath_start_ani(common);
265 ath9k_ps_restore(sc);
269 static void ath_paprd_activate(struct ath_softc *sc)
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath9k_hw_cal_data *caldata = ah->caldata;
273 struct ath_common *common = ath9k_hw_common(ah);
276 if (!caldata || !caldata->paprd_done)
280 ar9003_paprd_enable(ah, false);
281 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
282 if (!(common->tx_chainmask & BIT(chain)))
285 ar9003_paprd_populate_single_table(ah, caldata, chain);
288 ar9003_paprd_enable(ah, true);
289 ath9k_ps_restore(sc);
292 void ath_paprd_calibrate(struct work_struct *work)
294 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
295 struct ieee80211_hw *hw = sc->hw;
296 struct ath_hw *ah = sc->sc_ah;
297 struct ieee80211_hdr *hdr;
298 struct sk_buff *skb = NULL;
299 struct ieee80211_tx_info *tx_info;
300 int band = hw->conf.channel->band;
301 struct ieee80211_supported_band *sband = &sc->sbands[band];
302 struct ath_tx_control txctl;
303 struct ath9k_hw_cal_data *caldata = ah->caldata;
304 struct ath_common *common = ath9k_hw_common(ah);
315 skb = alloc_skb(len, GFP_KERNEL);
319 tx_info = IEEE80211_SKB_CB(skb);
322 memset(skb->data, 0, len);
323 hdr = (struct ieee80211_hdr *)skb->data;
324 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
325 hdr->frame_control = cpu_to_le16(ftype);
326 hdr->duration_id = cpu_to_le16(10);
327 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
328 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
329 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
331 memset(&txctl, 0, sizeof(txctl));
332 qnum = sc->tx.hwq_map[WME_AC_BE];
333 txctl.txq = &sc->tx.txq[qnum];
336 ar9003_paprd_init_table(ah);
337 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
338 if (!(common->tx_chainmask & BIT(chain)))
342 memset(tx_info, 0, sizeof(*tx_info));
343 tx_info->band = band;
345 for (i = 0; i < 4; i++) {
346 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
347 tx_info->control.rates[i].count = 6;
350 init_completion(&sc->paprd_complete);
351 ar9003_paprd_setup_gain_table(ah, chain);
352 txctl.paprd = BIT(chain);
353 if (ath_tx_start(hw, skb, &txctl) != 0)
356 time_left = wait_for_completion_timeout(&sc->paprd_complete,
357 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
359 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
360 "Timeout waiting for paprd training on "
366 if (!ar9003_paprd_is_done(ah))
369 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
377 caldata->paprd_done = true;
378 ath_paprd_activate(sc);
382 ath9k_ps_restore(sc);
386 * This routine performs the periodic noise floor calibration function
387 * that is used to adjust and optimize the chip performance. This
388 * takes environmental changes (location, temperature) into account.
389 * When the task is complete, it reschedules itself depending on the
390 * appropriate interval that was calculated.
392 void ath_ani_calibrate(unsigned long data)
394 struct ath_softc *sc = (struct ath_softc *)data;
395 struct ath_hw *ah = sc->sc_ah;
396 struct ath_common *common = ath9k_hw_common(ah);
397 bool longcal = false;
398 bool shortcal = false;
399 bool aniflag = false;
400 unsigned int timestamp = jiffies_to_msecs(jiffies);
401 u32 cal_interval, short_cal_interval, long_cal_interval;
404 if (ah->caldata && ah->caldata->nfcal_interference)
405 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
407 long_cal_interval = ATH_LONG_CALINTERVAL;
409 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
410 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
412 /* Only calibrate if awake */
413 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
418 /* Long calibration runs independently of short calibration. */
419 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
421 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
422 common->ani.longcal_timer = timestamp;
425 /* Short calibration applies only while caldone is false */
426 if (!common->ani.caldone) {
427 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
429 ath_print(common, ATH_DBG_ANI,
430 "shortcal @%lu\n", jiffies);
431 common->ani.shortcal_timer = timestamp;
432 common->ani.resetcal_timer = timestamp;
435 if ((timestamp - common->ani.resetcal_timer) >=
436 ATH_RESTART_CALINTERVAL) {
437 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
438 if (common->ani.caldone)
439 common->ani.resetcal_timer = timestamp;
443 /* Verify whether we must check ANI */
444 if ((timestamp - common->ani.checkani_timer) >=
445 ah->config.ani_poll_interval) {
447 common->ani.checkani_timer = timestamp;
450 /* Skip all processing if there's nothing to do. */
451 if (longcal || shortcal || aniflag) {
452 /* Call ANI routine if necessary */
454 spin_lock_irqsave(&common->cc_lock, flags);
455 ath9k_hw_ani_monitor(ah, ah->curchan);
456 spin_unlock_irqrestore(&common->cc_lock, flags);
459 /* Perform calibration if necessary */
460 if (longcal || shortcal) {
461 common->ani.caldone =
462 ath9k_hw_calibrate(ah,
464 common->rx_chainmask,
469 ath9k_ps_restore(sc);
473 * Set timer interval based on previous results.
474 * The interval must be the shortest necessary to satisfy ANI,
475 * short calibration and long calibration.
477 cal_interval = ATH_LONG_CALINTERVAL;
478 if (sc->sc_ah->config.enable_ani)
479 cal_interval = min(cal_interval,
480 (u32)ah->config.ani_poll_interval);
481 if (!common->ani.caldone)
482 cal_interval = min(cal_interval, (u32)short_cal_interval);
484 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
485 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
486 if (!ah->caldata->paprd_done)
487 ieee80211_queue_work(sc->hw, &sc->paprd_work);
489 ath_paprd_activate(sc);
494 * Update tx/rx chainmask. For legacy association,
495 * hard code chainmask to 1x1, for 11n association, use
496 * the chainmask configuration, for bt coexistence, use
497 * the chainmask configuration even in legacy mode.
499 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
501 struct ath_hw *ah = sc->sc_ah;
502 struct ath_common *common = ath9k_hw_common(ah);
504 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
505 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
506 common->tx_chainmask = ah->caps.tx_chainmask;
507 common->rx_chainmask = ah->caps.rx_chainmask;
509 common->tx_chainmask = 1;
510 common->rx_chainmask = 1;
513 ath_print(common, ATH_DBG_CONFIG,
514 "tx chmask: %d, rx chmask: %d\n",
515 common->tx_chainmask,
516 common->rx_chainmask);
519 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
523 an = (struct ath_node *)sta->drv_priv;
525 if (sc->sc_flags & SC_OP_TXAGGR) {
526 ath_tx_node_init(sc, an);
527 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
528 sta->ht_cap.ampdu_factor);
529 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
530 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
534 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
536 struct ath_node *an = (struct ath_node *)sta->drv_priv;
538 if (sc->sc_flags & SC_OP_TXAGGR)
539 ath_tx_node_cleanup(sc, an);
542 void ath_hw_check(struct work_struct *work)
544 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
549 for (i = 0; i < 3; i++) {
550 if (ath9k_hw_check_alive(sc->sc_ah))
555 ath_reset(sc, false);
558 ath9k_ps_restore(sc);
561 void ath9k_tasklet(unsigned long data)
563 struct ath_softc *sc = (struct ath_softc *)data;
564 struct ath_hw *ah = sc->sc_ah;
565 struct ath_common *common = ath9k_hw_common(ah);
567 u32 status = sc->intrstatus;
572 if (status & ATH9K_INT_FATAL) {
573 ath_reset(sc, false);
574 ath9k_ps_restore(sc);
578 if (!ath9k_hw_check_alive(ah))
579 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
581 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
582 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
585 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
587 if (status & rxmask) {
588 spin_lock_bh(&sc->rx.rxflushlock);
590 /* Check for high priority Rx first */
591 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
592 (status & ATH9K_INT_RXHP))
593 ath_rx_tasklet(sc, 0, true);
595 ath_rx_tasklet(sc, 0, false);
596 spin_unlock_bh(&sc->rx.rxflushlock);
599 if (status & ATH9K_INT_TX) {
600 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
601 ath_tx_edma_tasklet(sc);
606 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
608 * TSF sync does not look correct; remain awake to sync with
611 ath_print(common, ATH_DBG_PS,
612 "TSFOOR - Sync with next Beacon\n");
613 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
616 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
617 if (status & ATH9K_INT_GENTIMER)
618 ath_gen_timer_isr(sc->sc_ah);
620 /* re-enable hardware interrupt */
621 ath9k_hw_set_interrupts(ah, ah->imask);
622 ath9k_ps_restore(sc);
625 irqreturn_t ath_isr(int irq, void *dev)
627 #define SCHED_INTR ( \
640 struct ath_softc *sc = dev;
641 struct ath_hw *ah = sc->sc_ah;
642 struct ath_common *common = ath9k_hw_common(ah);
643 enum ath9k_int status;
647 * The hardware is not ready/present, don't
648 * touch anything. Note this can happen early
649 * on if the IRQ is shared.
651 if (sc->sc_flags & SC_OP_INVALID)
655 /* shared irq, not for us */
657 if (!ath9k_hw_intrpend(ah))
661 * Figure out the reason(s) for the interrupt. Note
662 * that the hal returns a pseudo-ISR that may include
663 * bits we haven't explicitly enabled so we mask the
664 * value to insure we only process bits we requested.
666 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
667 status &= ah->imask; /* discard unasked-for bits */
670 * If there are no status bits set, then this interrupt was not
671 * for me (should have been caught above).
676 /* Cache the status */
677 sc->intrstatus = status;
679 if (status & SCHED_INTR)
683 * If a FATAL or RXORN interrupt is received, we have to reset the
686 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
687 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
690 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
691 (status & ATH9K_INT_BB_WATCHDOG)) {
693 spin_lock(&common->cc_lock);
694 ath_hw_cycle_counters_update(common);
695 ar9003_hw_bb_watchdog_dbg_info(ah);
696 spin_unlock(&common->cc_lock);
701 if (status & ATH9K_INT_SWBA)
702 tasklet_schedule(&sc->bcon_tasklet);
704 if (status & ATH9K_INT_TXURN)
705 ath9k_hw_updatetxtriglevel(ah, true);
707 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
708 if (status & ATH9K_INT_RXEOL) {
709 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
710 ath9k_hw_set_interrupts(ah, ah->imask);
714 if (status & ATH9K_INT_MIB) {
716 * Disable interrupts until we service the MIB
717 * interrupt; otherwise it will continue to
720 ath9k_hw_set_interrupts(ah, 0);
722 * Let the hal handle the event. We assume
723 * it will clear whatever condition caused
726 ath9k_hw_proc_mib_event(ah);
727 ath9k_hw_set_interrupts(ah, ah->imask);
730 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
731 if (status & ATH9K_INT_TIM_TIMER) {
732 /* Clear RxAbort bit so that we can
734 ath9k_setpower(sc, ATH9K_PM_AWAKE);
735 ath9k_hw_setrxabort(sc->sc_ah, 0);
736 sc->ps_flags |= PS_WAIT_FOR_BEACON;
741 ath_debug_stat_interrupt(sc, status);
744 /* turn off every interrupt except SWBA */
745 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
746 tasklet_schedule(&sc->intr_tq);
754 static u32 ath_get_extchanmode(struct ath_softc *sc,
755 struct ieee80211_channel *chan,
756 enum nl80211_channel_type channel_type)
760 switch (chan->band) {
761 case IEEE80211_BAND_2GHZ:
762 switch(channel_type) {
763 case NL80211_CHAN_NO_HT:
764 case NL80211_CHAN_HT20:
765 chanmode = CHANNEL_G_HT20;
767 case NL80211_CHAN_HT40PLUS:
768 chanmode = CHANNEL_G_HT40PLUS;
770 case NL80211_CHAN_HT40MINUS:
771 chanmode = CHANNEL_G_HT40MINUS;
775 case IEEE80211_BAND_5GHZ:
776 switch(channel_type) {
777 case NL80211_CHAN_NO_HT:
778 case NL80211_CHAN_HT20:
779 chanmode = CHANNEL_A_HT20;
781 case NL80211_CHAN_HT40PLUS:
782 chanmode = CHANNEL_A_HT40PLUS;
784 case NL80211_CHAN_HT40MINUS:
785 chanmode = CHANNEL_A_HT40MINUS;
796 static void ath9k_bss_assoc_info(struct ath_softc *sc,
797 struct ieee80211_vif *vif,
798 struct ieee80211_bss_conf *bss_conf)
800 struct ath_hw *ah = sc->sc_ah;
801 struct ath_common *common = ath9k_hw_common(ah);
803 if (bss_conf->assoc) {
804 ath_print(common, ATH_DBG_CONFIG,
805 "Bss Info ASSOC %d, bssid: %pM\n",
806 bss_conf->aid, common->curbssid);
808 /* New association, store aid */
809 common->curaid = bss_conf->aid;
810 ath9k_hw_write_associd(ah);
813 * Request a re-configuration of Beacon related timers
814 * on the receipt of the first Beacon frame (i.e.,
815 * after time sync with the AP).
817 sc->ps_flags |= PS_BEACON_SYNC;
819 /* Configure the beacon */
820 ath_beacon_config(sc, vif);
822 /* Reset rssi stats */
823 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
825 sc->sc_flags |= SC_OP_ANI_RUN;
826 ath_start_ani(common);
828 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
831 sc->sc_flags &= ~SC_OP_ANI_RUN;
832 del_timer_sync(&common->ani.timer);
836 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
838 struct ath_hw *ah = sc->sc_ah;
839 struct ath_common *common = ath9k_hw_common(ah);
840 struct ieee80211_channel *channel = hw->conf.channel;
844 ath9k_hw_configpcipowersave(ah, 0, 0);
847 ah->curchan = ath_get_curchannel(sc, sc->hw);
849 spin_lock_bh(&sc->sc_resetlock);
850 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
852 ath_print(common, ATH_DBG_FATAL,
853 "Unable to reset channel (%u MHz), "
855 channel->center_freq, r);
857 spin_unlock_bh(&sc->sc_resetlock);
859 ath_update_txpow(sc);
860 if (ath_startrecv(sc) != 0) {
861 ath_print(common, ATH_DBG_FATAL,
862 "Unable to restart recv logic\n");
866 if (sc->sc_flags & SC_OP_BEACONS)
867 ath_beacon_config(sc, NULL); /* restart beacons */
869 /* Re-Enable interrupts */
870 ath9k_hw_set_interrupts(ah, ah->imask);
873 ath9k_hw_cfg_output(ah, ah->led_pin,
874 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
875 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
877 ieee80211_wake_queues(hw);
878 ath9k_ps_restore(sc);
881 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
883 struct ath_hw *ah = sc->sc_ah;
884 struct ieee80211_channel *channel = hw->conf.channel;
888 ieee80211_stop_queues(hw);
891 * Keep the LED on when the radio is disabled
892 * during idle unassociated state.
895 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
896 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
899 /* Disable interrupts */
900 ath9k_hw_set_interrupts(ah, 0);
902 ath_drain_all_txq(sc, false); /* clear pending tx frames */
903 ath_stoprecv(sc); /* turn off frame recv */
904 ath_flushrecv(sc); /* flush recv queue */
907 ah->curchan = ath_get_curchannel(sc, hw);
909 spin_lock_bh(&sc->sc_resetlock);
910 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
912 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
913 "Unable to reset channel (%u MHz), "
915 channel->center_freq, r);
917 spin_unlock_bh(&sc->sc_resetlock);
919 ath9k_hw_phy_disable(ah);
920 ath9k_hw_configpcipowersave(ah, 1, 1);
921 ath9k_ps_restore(sc);
922 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
925 int ath_reset(struct ath_softc *sc, bool retry_tx)
927 struct ath_hw *ah = sc->sc_ah;
928 struct ath_common *common = ath9k_hw_common(ah);
929 struct ieee80211_hw *hw = sc->hw;
933 del_timer_sync(&common->ani.timer);
935 ieee80211_stop_queues(hw);
937 ath9k_hw_set_interrupts(ah, 0);
938 ath_drain_all_txq(sc, retry_tx);
942 spin_lock_bh(&sc->sc_resetlock);
943 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
945 ath_print(common, ATH_DBG_FATAL,
946 "Unable to reset hardware; reset status %d\n", r);
947 spin_unlock_bh(&sc->sc_resetlock);
949 if (ath_startrecv(sc) != 0)
950 ath_print(common, ATH_DBG_FATAL,
951 "Unable to start recv logic\n");
954 * We may be doing a reset in response to a request
955 * that changes the channel so update any state that
956 * might change as a result.
958 ath_cache_conf_rate(sc, &hw->conf);
960 ath_update_txpow(sc);
962 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
963 ath_beacon_config(sc, NULL); /* restart beacons */
965 ath9k_hw_set_interrupts(ah, ah->imask);
969 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
970 if (ATH_TXQ_SETUP(sc, i)) {
971 spin_lock_bh(&sc->tx.txq[i].axq_lock);
972 ath_txq_schedule(sc, &sc->tx.txq[i]);
973 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
978 ieee80211_wake_queues(hw);
981 ath_start_ani(common);
986 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
992 qnum = sc->tx.hwq_map[WME_AC_VO];
995 qnum = sc->tx.hwq_map[WME_AC_VI];
998 qnum = sc->tx.hwq_map[WME_AC_BE];
1001 qnum = sc->tx.hwq_map[WME_AC_BK];
1004 qnum = sc->tx.hwq_map[WME_AC_BE];
1011 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1036 /* XXX: Remove me once we don't depend on ath9k_channel for all
1037 * this redundant data */
1038 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1039 struct ath9k_channel *ichan)
1041 struct ieee80211_channel *chan = hw->conf.channel;
1042 struct ieee80211_conf *conf = &hw->conf;
1044 ichan->channel = chan->center_freq;
1047 if (chan->band == IEEE80211_BAND_2GHZ) {
1048 ichan->chanmode = CHANNEL_G;
1049 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1051 ichan->chanmode = CHANNEL_A;
1052 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1055 if (conf_is_ht(conf))
1056 ichan->chanmode = ath_get_extchanmode(sc, chan,
1057 conf->channel_type);
1060 /**********************/
1061 /* mac80211 callbacks */
1062 /**********************/
1064 static int ath9k_start(struct ieee80211_hw *hw)
1066 struct ath_wiphy *aphy = hw->priv;
1067 struct ath_softc *sc = aphy->sc;
1068 struct ath_hw *ah = sc->sc_ah;
1069 struct ath_common *common = ath9k_hw_common(ah);
1070 struct ieee80211_channel *curchan = hw->conf.channel;
1071 struct ath9k_channel *init_channel;
1074 ath_print(common, ATH_DBG_CONFIG,
1075 "Starting driver with initial channel: %d MHz\n",
1076 curchan->center_freq);
1078 mutex_lock(&sc->mutex);
1080 if (ath9k_wiphy_started(sc)) {
1081 if (sc->chan_idx == curchan->hw_value) {
1083 * Already on the operational channel, the new wiphy
1084 * can be marked active.
1086 aphy->state = ATH_WIPHY_ACTIVE;
1087 ieee80211_wake_queues(hw);
1090 * Another wiphy is on another channel, start the new
1091 * wiphy in paused state.
1093 aphy->state = ATH_WIPHY_PAUSED;
1094 ieee80211_stop_queues(hw);
1096 mutex_unlock(&sc->mutex);
1099 aphy->state = ATH_WIPHY_ACTIVE;
1101 /* setup initial channel */
1103 sc->chan_idx = curchan->hw_value;
1105 init_channel = ath_get_curchannel(sc, hw);
1107 /* Reset SERDES registers */
1108 ath9k_hw_configpcipowersave(ah, 0, 0);
1111 * The basic interface to setting the hardware in a good
1112 * state is ``reset''. On return the hardware is known to
1113 * be powered up and with interrupts disabled. This must
1114 * be followed by initialization of the appropriate bits
1115 * and then setup of the interrupt mask.
1117 spin_lock_bh(&sc->sc_resetlock);
1118 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1120 ath_print(common, ATH_DBG_FATAL,
1121 "Unable to reset hardware; reset status %d "
1122 "(freq %u MHz)\n", r,
1123 curchan->center_freq);
1124 spin_unlock_bh(&sc->sc_resetlock);
1127 spin_unlock_bh(&sc->sc_resetlock);
1130 * This is needed only to setup initial state
1131 * but it's best done after a reset.
1133 ath_update_txpow(sc);
1136 * Setup the hardware after reset:
1137 * The receive engine is set going.
1138 * Frame transmit is handled entirely
1139 * in the frame output path; there's nothing to do
1140 * here except setup the interrupt mask.
1142 if (ath_startrecv(sc) != 0) {
1143 ath_print(common, ATH_DBG_FATAL,
1144 "Unable to start recv logic\n");
1149 /* Setup our intr mask. */
1150 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1151 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1154 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1155 ah->imask |= ATH9K_INT_RXHP |
1157 ATH9K_INT_BB_WATCHDOG;
1159 ah->imask |= ATH9K_INT_RX;
1161 ah->imask |= ATH9K_INT_GTT;
1163 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1164 ah->imask |= ATH9K_INT_CST;
1166 ath_cache_conf_rate(sc, &hw->conf);
1168 sc->sc_flags &= ~SC_OP_INVALID;
1170 /* Disable BMISS interrupt when we're not associated */
1171 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1172 ath9k_hw_set_interrupts(ah, ah->imask);
1174 ieee80211_wake_queues(hw);
1176 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1178 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1179 !ah->btcoex_hw.enabled) {
1180 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1181 AR_STOMP_LOW_WLAN_WGHT);
1182 ath9k_hw_btcoex_enable(ah);
1184 if (common->bus_ops->bt_coex_prep)
1185 common->bus_ops->bt_coex_prep(common);
1186 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1187 ath9k_btcoex_timer_resume(sc);
1191 mutex_unlock(&sc->mutex);
1196 static int ath9k_tx(struct ieee80211_hw *hw,
1197 struct sk_buff *skb)
1199 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1200 struct ath_wiphy *aphy = hw->priv;
1201 struct ath_softc *sc = aphy->sc;
1202 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1203 struct ath_tx_control txctl;
1204 int padpos, padsize;
1205 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1208 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1209 ath_print(common, ATH_DBG_XMIT,
1210 "ath9k: %s: TX in unexpected wiphy state "
1211 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1215 if (sc->ps_enabled) {
1217 * mac80211 does not set PM field for normal data frames, so we
1218 * need to update that based on the current PS mode.
1220 if (ieee80211_is_data(hdr->frame_control) &&
1221 !ieee80211_is_nullfunc(hdr->frame_control) &&
1222 !ieee80211_has_pm(hdr->frame_control)) {
1223 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1224 "while in PS mode\n");
1225 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1229 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1231 * We are using PS-Poll and mac80211 can request TX while in
1232 * power save mode. Need to wake up hardware for the TX to be
1233 * completed and if needed, also for RX of buffered frames.
1235 ath9k_ps_wakeup(sc);
1236 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1237 ath9k_hw_setrxabort(sc->sc_ah, 0);
1238 if (ieee80211_is_pspoll(hdr->frame_control)) {
1239 ath_print(common, ATH_DBG_PS,
1240 "Sending PS-Poll to pick a buffered frame\n");
1241 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1243 ath_print(common, ATH_DBG_PS,
1244 "Wake up to complete TX\n");
1245 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1248 * The actual restore operation will happen only after
1249 * the sc_flags bit is cleared. We are just dropping
1250 * the ps_usecount here.
1252 ath9k_ps_restore(sc);
1255 memset(&txctl, 0, sizeof(struct ath_tx_control));
1258 * As a temporary workaround, assign seq# here; this will likely need
1259 * to be cleaned up to work better with Beacon transmission and virtual
1262 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1263 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1264 sc->tx.seq_no += 0x10;
1265 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1266 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1269 /* Add the padding after the header if this is not already done */
1270 padpos = ath9k_cmn_padpos(hdr->frame_control);
1271 padsize = padpos & 3;
1272 if (padsize && skb->len>padpos) {
1273 if (skb_headroom(skb) < padsize)
1275 skb_push(skb, padsize);
1276 memmove(skb->data, skb->data + padsize, padpos);
1279 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1280 txctl.txq = &sc->tx.txq[qnum];
1282 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1284 if (ath_tx_start(hw, skb, &txctl) != 0) {
1285 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1291 dev_kfree_skb_any(skb);
1295 static void ath9k_stop(struct ieee80211_hw *hw)
1297 struct ath_wiphy *aphy = hw->priv;
1298 struct ath_softc *sc = aphy->sc;
1299 struct ath_hw *ah = sc->sc_ah;
1300 struct ath_common *common = ath9k_hw_common(ah);
1303 mutex_lock(&sc->mutex);
1305 aphy->state = ATH_WIPHY_INACTIVE;
1308 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1310 cancel_delayed_work_sync(&sc->tx_complete_work);
1311 cancel_work_sync(&sc->paprd_work);
1312 cancel_work_sync(&sc->hw_check_work);
1314 for (i = 0; i < sc->num_sec_wiphy; i++) {
1315 if (sc->sec_wiphy[i])
1319 if (i == sc->num_sec_wiphy) {
1320 cancel_delayed_work_sync(&sc->wiphy_work);
1321 cancel_work_sync(&sc->chan_work);
1324 if (sc->sc_flags & SC_OP_INVALID) {
1325 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1326 mutex_unlock(&sc->mutex);
1330 if (ath9k_wiphy_started(sc)) {
1331 mutex_unlock(&sc->mutex);
1332 return; /* another wiphy still in use */
1335 /* Ensure HW is awake when we try to shut it down. */
1336 ath9k_ps_wakeup(sc);
1338 if (ah->btcoex_hw.enabled) {
1339 ath9k_hw_btcoex_disable(ah);
1340 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1341 ath9k_btcoex_timer_pause(sc);
1344 /* make sure h/w will not generate any interrupt
1345 * before setting the invalid flag. */
1346 ath9k_hw_set_interrupts(ah, 0);
1348 if (!(sc->sc_flags & SC_OP_INVALID)) {
1349 ath_drain_all_txq(sc, false);
1351 ath9k_hw_phy_disable(ah);
1353 sc->rx.rxlink = NULL;
1355 /* disable HAL and put h/w to sleep */
1356 ath9k_hw_disable(ah);
1357 ath9k_hw_configpcipowersave(ah, 1, 1);
1358 ath9k_ps_restore(sc);
1360 /* Finally, put the chip in FULL SLEEP mode */
1361 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1363 sc->sc_flags |= SC_OP_INVALID;
1365 mutex_unlock(&sc->mutex);
1367 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1370 static int ath9k_add_interface(struct ieee80211_hw *hw,
1371 struct ieee80211_vif *vif)
1373 struct ath_wiphy *aphy = hw->priv;
1374 struct ath_softc *sc = aphy->sc;
1375 struct ath_hw *ah = sc->sc_ah;
1376 struct ath_common *common = ath9k_hw_common(ah);
1377 struct ath_vif *avp = (void *)vif->drv_priv;
1378 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1381 mutex_lock(&sc->mutex);
1383 switch (vif->type) {
1384 case NL80211_IFTYPE_STATION:
1385 ic_opmode = NL80211_IFTYPE_STATION;
1387 case NL80211_IFTYPE_WDS:
1388 ic_opmode = NL80211_IFTYPE_WDS;
1390 case NL80211_IFTYPE_ADHOC:
1391 case NL80211_IFTYPE_AP:
1392 case NL80211_IFTYPE_MESH_POINT:
1393 if (sc->nbcnvifs >= ATH_BCBUF) {
1397 ic_opmode = vif->type;
1400 ath_print(common, ATH_DBG_FATAL,
1401 "Interface type %d not yet supported\n", vif->type);
1406 ath_print(common, ATH_DBG_CONFIG,
1407 "Attach a VIF of type: %d\n", ic_opmode);
1409 /* Set the VIF opmode */
1410 avp->av_opmode = ic_opmode;
1415 ath9k_set_bssid_mask(hw, vif);
1418 goto out; /* skip global settings for secondary vif */
1420 if (ic_opmode == NL80211_IFTYPE_AP) {
1421 ath9k_hw_set_tsfadjust(ah, 1);
1422 sc->sc_flags |= SC_OP_TSF_RESET;
1425 /* Set the device opmode */
1426 ah->opmode = ic_opmode;
1429 * Enable MIB interrupts when there are hardware phy counters.
1430 * Note we only do this (at the moment) for station mode.
1432 if ((vif->type == NL80211_IFTYPE_STATION) ||
1433 (vif->type == NL80211_IFTYPE_ADHOC) ||
1434 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1435 if (ah->config.enable_ani)
1436 ah->imask |= ATH9K_INT_MIB;
1437 ah->imask |= ATH9K_INT_TSFOOR;
1440 ath9k_hw_set_interrupts(ah, ah->imask);
1442 if (vif->type == NL80211_IFTYPE_AP ||
1443 vif->type == NL80211_IFTYPE_ADHOC ||
1444 vif->type == NL80211_IFTYPE_MONITOR) {
1445 sc->sc_flags |= SC_OP_ANI_RUN;
1446 ath_start_ani(common);
1450 mutex_unlock(&sc->mutex);
1454 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1455 struct ieee80211_vif *vif)
1457 struct ath_wiphy *aphy = hw->priv;
1458 struct ath_softc *sc = aphy->sc;
1459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1460 struct ath_vif *avp = (void *)vif->drv_priv;
1463 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1465 mutex_lock(&sc->mutex);
1468 sc->sc_flags &= ~SC_OP_ANI_RUN;
1469 del_timer_sync(&common->ani.timer);
1471 /* Reclaim beacon resources */
1472 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1473 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1474 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1475 ath9k_ps_wakeup(sc);
1476 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1477 ath9k_ps_restore(sc);
1480 ath_beacon_return(sc, avp);
1481 sc->sc_flags &= ~SC_OP_BEACONS;
1483 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1484 if (sc->beacon.bslot[i] == vif) {
1485 printk(KERN_DEBUG "%s: vif had allocated beacon "
1486 "slot\n", __func__);
1487 sc->beacon.bslot[i] = NULL;
1488 sc->beacon.bslot_aphy[i] = NULL;
1494 mutex_unlock(&sc->mutex);
1497 static void ath9k_enable_ps(struct ath_softc *sc)
1499 struct ath_hw *ah = sc->sc_ah;
1501 sc->ps_enabled = true;
1502 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1503 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1504 ah->imask |= ATH9K_INT_TIM_TIMER;
1505 ath9k_hw_set_interrupts(ah, ah->imask);
1507 ath9k_hw_setrxabort(ah, 1);
1511 static void ath9k_disable_ps(struct ath_softc *sc)
1513 struct ath_hw *ah = sc->sc_ah;
1515 sc->ps_enabled = false;
1516 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1517 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1518 ath9k_hw_setrxabort(ah, 0);
1519 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1521 PS_WAIT_FOR_PSPOLL_DATA |
1522 PS_WAIT_FOR_TX_ACK);
1523 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1524 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1525 ath9k_hw_set_interrupts(ah, ah->imask);
1531 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1533 struct ath_wiphy *aphy = hw->priv;
1534 struct ath_softc *sc = aphy->sc;
1535 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1536 struct ieee80211_conf *conf = &hw->conf;
1539 mutex_lock(&sc->mutex);
1542 * Leave this as the first check because we need to turn on the
1543 * radio if it was disabled before prior to processing the rest
1544 * of the changes. Likewise we must only disable the radio towards
1547 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1549 bool all_wiphys_idle;
1550 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1552 spin_lock_bh(&sc->wiphy_lock);
1553 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1554 ath9k_set_wiphy_idle(aphy, idle);
1556 enable_radio = (!idle && all_wiphys_idle);
1559 * After we unlock here its possible another wiphy
1560 * can be re-renabled so to account for that we will
1561 * only disable the radio toward the end of this routine
1562 * if by then all wiphys are still idle.
1564 spin_unlock_bh(&sc->wiphy_lock);
1567 sc->ps_idle = false;
1568 ath_radio_enable(sc, hw);
1569 ath_print(common, ATH_DBG_CONFIG,
1570 "not-idle: enabling radio\n");
1575 * We just prepare to enable PS. We have to wait until our AP has
1576 * ACK'd our null data frame to disable RX otherwise we'll ignore
1577 * those ACKs and end up retransmitting the same null data frames.
1578 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1580 if (changed & IEEE80211_CONF_CHANGE_PS) {
1581 unsigned long flags;
1582 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1583 if (conf->flags & IEEE80211_CONF_PS)
1584 ath9k_enable_ps(sc);
1586 ath9k_disable_ps(sc);
1587 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1590 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1591 if (conf->flags & IEEE80211_CONF_MONITOR) {
1592 ath_print(common, ATH_DBG_CONFIG,
1593 "HW opmode set to Monitor mode\n");
1594 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1598 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1599 struct ieee80211_channel *curchan = hw->conf.channel;
1600 int pos = curchan->hw_value;
1602 aphy->chan_idx = pos;
1603 aphy->chan_is_ht = conf_is_ht(conf);
1604 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1605 sc->sc_flags |= SC_OP_OFFCHANNEL;
1607 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1609 if (aphy->state == ATH_WIPHY_SCAN ||
1610 aphy->state == ATH_WIPHY_ACTIVE)
1611 ath9k_wiphy_pause_all_forced(sc, aphy);
1614 * Do not change operational channel based on a paused
1617 goto skip_chan_change;
1620 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1621 curchan->center_freq);
1623 /* XXX: remove me eventualy */
1624 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1626 ath_update_chainmask(sc, conf_is_ht(conf));
1628 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1629 ath_print(common, ATH_DBG_FATAL,
1630 "Unable to set channel\n");
1631 mutex_unlock(&sc->mutex);
1637 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1638 sc->config.txpowlimit = 2 * conf->power_level;
1639 ath_update_txpow(sc);
1642 spin_lock_bh(&sc->wiphy_lock);
1643 disable_radio = ath9k_all_wiphys_idle(sc);
1644 spin_unlock_bh(&sc->wiphy_lock);
1646 if (disable_radio) {
1647 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1649 ath_radio_disable(sc, hw);
1652 mutex_unlock(&sc->mutex);
1657 #define SUPPORTED_FILTERS \
1658 (FIF_PROMISC_IN_BSS | \
1663 FIF_BCN_PRBRESP_PROMISC | \
1666 /* FIXME: sc->sc_full_reset ? */
1667 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1668 unsigned int changed_flags,
1669 unsigned int *total_flags,
1672 struct ath_wiphy *aphy = hw->priv;
1673 struct ath_softc *sc = aphy->sc;
1676 changed_flags &= SUPPORTED_FILTERS;
1677 *total_flags &= SUPPORTED_FILTERS;
1679 sc->rx.rxfilter = *total_flags;
1680 ath9k_ps_wakeup(sc);
1681 rfilt = ath_calcrxfilter(sc);
1682 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1683 ath9k_ps_restore(sc);
1685 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1686 "Set HW RX filter: 0x%x\n", rfilt);
1689 static int ath9k_sta_add(struct ieee80211_hw *hw,
1690 struct ieee80211_vif *vif,
1691 struct ieee80211_sta *sta)
1693 struct ath_wiphy *aphy = hw->priv;
1694 struct ath_softc *sc = aphy->sc;
1696 ath_node_attach(sc, sta);
1701 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1702 struct ieee80211_vif *vif,
1703 struct ieee80211_sta *sta)
1705 struct ath_wiphy *aphy = hw->priv;
1706 struct ath_softc *sc = aphy->sc;
1708 ath_node_detach(sc, sta);
1713 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1714 const struct ieee80211_tx_queue_params *params)
1716 struct ath_wiphy *aphy = hw->priv;
1717 struct ath_softc *sc = aphy->sc;
1718 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1719 struct ath9k_tx_queue_info qi;
1722 if (queue >= WME_NUM_AC)
1725 mutex_lock(&sc->mutex);
1727 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1729 qi.tqi_aifs = params->aifs;
1730 qi.tqi_cwmin = params->cw_min;
1731 qi.tqi_cwmax = params->cw_max;
1732 qi.tqi_burstTime = params->txop;
1733 qnum = ath_get_hal_qnum(queue, sc);
1735 ath_print(common, ATH_DBG_CONFIG,
1736 "Configure tx [queue/halq] [%d/%d], "
1737 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1738 queue, qnum, params->aifs, params->cw_min,
1739 params->cw_max, params->txop);
1741 ret = ath_txq_update(sc, qnum, &qi);
1743 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1745 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1746 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1747 ath_beaconq_config(sc);
1749 mutex_unlock(&sc->mutex);
1754 static int ath9k_set_key(struct ieee80211_hw *hw,
1755 enum set_key_cmd cmd,
1756 struct ieee80211_vif *vif,
1757 struct ieee80211_sta *sta,
1758 struct ieee80211_key_conf *key)
1760 struct ath_wiphy *aphy = hw->priv;
1761 struct ath_softc *sc = aphy->sc;
1762 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1765 if (modparam_nohwcrypt)
1768 mutex_lock(&sc->mutex);
1769 ath9k_ps_wakeup(sc);
1770 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1774 ret = ath_key_config(common, vif, sta, key);
1776 key->hw_key_idx = ret;
1777 /* push IV and Michael MIC generation to stack */
1778 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1779 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1780 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1781 if (sc->sc_ah->sw_mgmt_crypto &&
1782 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1783 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1788 ath_key_delete(common, key);
1794 ath9k_ps_restore(sc);
1795 mutex_unlock(&sc->mutex);
1800 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1801 struct ieee80211_vif *vif,
1802 struct ieee80211_bss_conf *bss_conf,
1805 struct ath_wiphy *aphy = hw->priv;
1806 struct ath_softc *sc = aphy->sc;
1807 struct ath_hw *ah = sc->sc_ah;
1808 struct ath_common *common = ath9k_hw_common(ah);
1809 struct ath_vif *avp = (void *)vif->drv_priv;
1813 mutex_lock(&sc->mutex);
1815 if (changed & BSS_CHANGED_BSSID) {
1817 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1818 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1820 ath9k_hw_write_associd(ah);
1822 /* Set aggregation protection mode parameters */
1823 sc->config.ath_aggr_prot = 0;
1825 /* Only legacy IBSS for now */
1826 if (vif->type == NL80211_IFTYPE_ADHOC)
1827 ath_update_chainmask(sc, 0);
1829 ath_print(common, ATH_DBG_CONFIG,
1830 "BSSID: %pM aid: 0x%x\n",
1831 common->curbssid, common->curaid);
1833 /* need to reconfigure the beacon */
1834 sc->sc_flags &= ~SC_OP_BEACONS ;
1837 /* Enable transmission of beacons (AP, IBSS, MESH) */
1838 if ((changed & BSS_CHANGED_BEACON) ||
1839 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1840 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1841 error = ath_beacon_alloc(aphy, vif);
1843 ath_beacon_config(sc, vif);
1846 if (changed & BSS_CHANGED_ERP_SLOT) {
1847 if (bss_conf->use_short_slot)
1851 if (vif->type == NL80211_IFTYPE_AP) {
1853 * Defer update, so that connected stations can adjust
1854 * their settings at the same time.
1855 * See beacon.c for more details
1857 sc->beacon.slottime = slottime;
1858 sc->beacon.updateslot = UPDATE;
1860 ah->slottime = slottime;
1861 ath9k_hw_init_global_settings(ah);
1865 /* Disable transmission of beacons */
1866 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1867 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1869 if (changed & BSS_CHANGED_BEACON_INT) {
1870 sc->beacon_interval = bss_conf->beacon_int;
1872 * In case of AP mode, the HW TSF has to be reset
1873 * when the beacon interval changes.
1875 if (vif->type == NL80211_IFTYPE_AP) {
1876 sc->sc_flags |= SC_OP_TSF_RESET;
1877 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1878 error = ath_beacon_alloc(aphy, vif);
1880 ath_beacon_config(sc, vif);
1882 ath_beacon_config(sc, vif);
1886 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1887 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1888 bss_conf->use_short_preamble);
1889 if (bss_conf->use_short_preamble)
1890 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1892 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1895 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1896 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1897 bss_conf->use_cts_prot);
1898 if (bss_conf->use_cts_prot &&
1899 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1900 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1902 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1905 if (changed & BSS_CHANGED_ASSOC) {
1906 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1908 ath9k_bss_assoc_info(sc, vif, bss_conf);
1911 mutex_unlock(&sc->mutex);
1914 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1917 struct ath_wiphy *aphy = hw->priv;
1918 struct ath_softc *sc = aphy->sc;
1920 mutex_lock(&sc->mutex);
1921 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1922 mutex_unlock(&sc->mutex);
1927 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1929 struct ath_wiphy *aphy = hw->priv;
1930 struct ath_softc *sc = aphy->sc;
1932 mutex_lock(&sc->mutex);
1933 ath9k_hw_settsf64(sc->sc_ah, tsf);
1934 mutex_unlock(&sc->mutex);
1937 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1939 struct ath_wiphy *aphy = hw->priv;
1940 struct ath_softc *sc = aphy->sc;
1942 mutex_lock(&sc->mutex);
1944 ath9k_ps_wakeup(sc);
1945 ath9k_hw_reset_tsf(sc->sc_ah);
1946 ath9k_ps_restore(sc);
1948 mutex_unlock(&sc->mutex);
1951 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1952 struct ieee80211_vif *vif,
1953 enum ieee80211_ampdu_mlme_action action,
1954 struct ieee80211_sta *sta,
1957 struct ath_wiphy *aphy = hw->priv;
1958 struct ath_softc *sc = aphy->sc;
1964 case IEEE80211_AMPDU_RX_START:
1965 if (!(sc->sc_flags & SC_OP_RXAGGR))
1968 case IEEE80211_AMPDU_RX_STOP:
1970 case IEEE80211_AMPDU_TX_START:
1971 ath9k_ps_wakeup(sc);
1972 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1974 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1975 ath9k_ps_restore(sc);
1977 case IEEE80211_AMPDU_TX_STOP:
1978 ath9k_ps_wakeup(sc);
1979 ath_tx_aggr_stop(sc, sta, tid);
1980 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1981 ath9k_ps_restore(sc);
1983 case IEEE80211_AMPDU_TX_OPERATIONAL:
1984 ath9k_ps_wakeup(sc);
1985 ath_tx_aggr_resume(sc, sta, tid);
1986 ath9k_ps_restore(sc);
1989 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1990 "Unknown AMPDU action\n");
1998 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1999 struct survey_info *survey)
2001 struct ath_wiphy *aphy = hw->priv;
2002 struct ath_softc *sc = aphy->sc;
2003 struct ath_hw *ah = sc->sc_ah;
2004 struct ieee80211_supported_band *sband;
2005 struct ath9k_channel *chan;
2007 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2008 if (sband && idx >= sband->n_channels) {
2009 idx -= sband->n_channels;
2014 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2016 if (!sband || idx >= sband->n_channels)
2019 survey->channel = &sband->channels[idx];
2020 chan = &ah->channels[survey->channel->hw_value];
2023 if (chan == ah->curchan)
2024 survey->filled |= SURVEY_INFO_IN_USE;
2026 if (chan->noisefloor) {
2027 survey->filled |= SURVEY_INFO_NOISE_DBM;
2028 survey->noise = chan->noisefloor;
2034 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2036 struct ath_wiphy *aphy = hw->priv;
2037 struct ath_softc *sc = aphy->sc;
2039 mutex_lock(&sc->mutex);
2040 if (ath9k_wiphy_scanning(sc)) {
2042 * There is a race here in mac80211 but fixing it requires
2043 * we revisit how we handle the scan complete callback.
2044 * After mac80211 fixes we will not have configured hardware
2045 * to the home channel nor would we have configured the RX
2048 mutex_unlock(&sc->mutex);
2052 aphy->state = ATH_WIPHY_SCAN;
2053 ath9k_wiphy_pause_all_forced(sc, aphy);
2054 mutex_unlock(&sc->mutex);
2058 * XXX: this requires a revisit after the driver
2059 * scan_complete gets moved to another place/removed in mac80211.
2061 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2063 struct ath_wiphy *aphy = hw->priv;
2064 struct ath_softc *sc = aphy->sc;
2066 mutex_lock(&sc->mutex);
2067 aphy->state = ATH_WIPHY_ACTIVE;
2068 mutex_unlock(&sc->mutex);
2071 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2073 struct ath_wiphy *aphy = hw->priv;
2074 struct ath_softc *sc = aphy->sc;
2075 struct ath_hw *ah = sc->sc_ah;
2077 mutex_lock(&sc->mutex);
2078 ah->coverage_class = coverage_class;
2079 ath9k_hw_init_global_settings(ah);
2080 mutex_unlock(&sc->mutex);
2083 struct ieee80211_ops ath9k_ops = {
2085 .start = ath9k_start,
2087 .add_interface = ath9k_add_interface,
2088 .remove_interface = ath9k_remove_interface,
2089 .config = ath9k_config,
2090 .configure_filter = ath9k_configure_filter,
2091 .sta_add = ath9k_sta_add,
2092 .sta_remove = ath9k_sta_remove,
2093 .conf_tx = ath9k_conf_tx,
2094 .bss_info_changed = ath9k_bss_info_changed,
2095 .set_key = ath9k_set_key,
2096 .get_tsf = ath9k_get_tsf,
2097 .set_tsf = ath9k_set_tsf,
2098 .reset_tsf = ath9k_reset_tsf,
2099 .ampdu_action = ath9k_ampdu_action,
2100 .get_survey = ath9k_get_survey,
2101 .sw_scan_start = ath9k_sw_scan_start,
2102 .sw_scan_complete = ath9k_sw_scan_complete,
2103 .rfkill_poll = ath9k_rfkill_poll_state,
2104 .set_coverage_class = ath9k_set_coverage_class,