2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
55 if (sc->curtxpow != sc->config.txpowlimit) {
56 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
57 /* read back in case value is clamped */
58 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
62 static u8 parse_mpdudensity(u8 mpdudensity)
65 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
66 * 0 for no restriction
75 switch (mpdudensity) {
81 /* Our lower layer calculations limit our precision to
97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
98 struct ieee80211_hw *hw)
100 struct ieee80211_channel *curchan = hw->conf.channel;
101 struct ath9k_channel *channel;
104 chan_idx = curchan->hw_value;
105 channel = &sc->sc_ah->channels[chan_idx];
106 ath9k_update_ichannel(sc, hw, channel);
110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
115 spin_lock_irqsave(&sc->sc_pm_lock, flags);
116 ret = ath9k_hw_setpower(sc->sc_ah, mode);
117 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
122 void ath9k_ps_wakeup(struct ath_softc *sc)
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (++sc->ps_usecount != 1)
130 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
140 spin_lock_irqsave(&sc->sc_pm_lock, flags);
141 if (--sc->ps_usecount != 0)
145 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
146 else if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
157 static void ath_start_ani(struct ath_common *common)
159 struct ath_hw *ah = common->ah;
160 unsigned long timestamp = jiffies_to_msecs(jiffies);
161 struct ath_softc *sc = (struct ath_softc *) common->priv;
163 if (!(sc->sc_flags & SC_OP_ANI_RUN))
166 if (sc->sc_flags & SC_OP_OFFCHANNEL)
169 common->ani.longcal_timer = timestamp;
170 common->ani.shortcal_timer = timestamp;
171 common->ani.checkani_timer = timestamp;
173 mod_timer(&common->ani.timer,
175 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
179 * Set/change channels. If the channel is really being changed, it's done
180 * by reseting the chip. To accomplish this we must first cleanup any pending
181 * DMA, then restart stuff.
183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
184 struct ath9k_channel *hchan)
186 struct ath_wiphy *aphy = hw->priv;
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 bool fastcc = true, stopped;
191 struct ieee80211_channel *channel = hw->conf.channel;
192 struct ath9k_hw_cal_data *caldata = NULL;
195 if (sc->sc_flags & SC_OP_INVALID)
198 del_timer_sync(&common->ani.timer);
199 cancel_work_sync(&sc->paprd_work);
200 cancel_work_sync(&sc->hw_check_work);
201 cancel_delayed_work_sync(&sc->tx_complete_work);
206 * This is only performed if the channel settings have
209 * To switch channels clear any pending DMA operations;
210 * wait long enough for the RX fifo to drain, reset the
211 * hardware at the new frequency, and then re-enable
212 * the relevant bits of the h/w.
214 ath9k_hw_set_interrupts(ah, 0);
215 ath_drain_all_txq(sc, false);
216 stopped = ath_stoprecv(sc);
218 /* XXX: do not flush receive queue here. We don't want
219 * to flush data frames already in queue because of
220 * changing channel. */
222 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
225 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
226 caldata = &aphy->caldata;
228 ath_print(common, ATH_DBG_CONFIG,
229 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
230 sc->sc_ah->curchan->channel,
231 channel->center_freq, conf_is_ht40(conf),
234 spin_lock_bh(&sc->sc_resetlock);
236 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
238 ath_print(common, ATH_DBG_FATAL,
239 "Unable to reset channel (%u MHz), "
241 channel->center_freq, r);
242 spin_unlock_bh(&sc->sc_resetlock);
245 spin_unlock_bh(&sc->sc_resetlock);
247 if (ath_startrecv(sc) != 0) {
248 ath_print(common, ATH_DBG_FATAL,
249 "Unable to restart recv logic\n");
254 ath_cache_conf_rate(sc, &hw->conf);
255 ath_update_txpow(sc);
256 ath9k_hw_set_interrupts(ah, ah->imask);
258 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
259 ath_beacon_config(sc, NULL);
260 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
261 ath_start_ani(common);
265 ath9k_ps_restore(sc);
269 static void ath_paprd_activate(struct ath_softc *sc)
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath9k_hw_cal_data *caldata = ah->caldata;
273 struct ath_common *common = ath9k_hw_common(ah);
276 if (!caldata || !caldata->paprd_done)
280 ar9003_paprd_enable(ah, false);
281 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
282 if (!(common->tx_chainmask & BIT(chain)))
285 ar9003_paprd_populate_single_table(ah, caldata, chain);
288 ar9003_paprd_enable(ah, true);
289 ath9k_ps_restore(sc);
292 void ath_paprd_calibrate(struct work_struct *work)
294 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
295 struct ieee80211_hw *hw = sc->hw;
296 struct ath_hw *ah = sc->sc_ah;
297 struct ieee80211_hdr *hdr;
298 struct sk_buff *skb = NULL;
299 struct ieee80211_tx_info *tx_info;
300 int band = hw->conf.channel->band;
301 struct ieee80211_supported_band *sband = &sc->sbands[band];
302 struct ath_tx_control txctl;
303 struct ath9k_hw_cal_data *caldata = ah->caldata;
304 struct ath_common *common = ath9k_hw_common(ah);
315 skb = alloc_skb(len, GFP_KERNEL);
319 tx_info = IEEE80211_SKB_CB(skb);
322 memset(skb->data, 0, len);
323 hdr = (struct ieee80211_hdr *)skb->data;
324 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
325 hdr->frame_control = cpu_to_le16(ftype);
326 hdr->duration_id = cpu_to_le16(10);
327 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
328 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
329 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
331 memset(&txctl, 0, sizeof(txctl));
332 qnum = sc->tx.hwq_map[WME_AC_BE];
333 txctl.txq = &sc->tx.txq[qnum];
336 ar9003_paprd_init_table(ah);
337 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
338 if (!(common->tx_chainmask & BIT(chain)))
342 memset(tx_info, 0, sizeof(*tx_info));
343 tx_info->band = band;
345 for (i = 0; i < 4; i++) {
346 tx_info->control.rates[i].idx = sband->n_bitrates - 1;
347 tx_info->control.rates[i].count = 6;
350 init_completion(&sc->paprd_complete);
351 ar9003_paprd_setup_gain_table(ah, chain);
352 txctl.paprd = BIT(chain);
353 if (ath_tx_start(hw, skb, &txctl) != 0)
356 time_left = wait_for_completion_timeout(&sc->paprd_complete,
357 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
359 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
360 "Timeout waiting for paprd training on "
366 if (!ar9003_paprd_is_done(ah))
369 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
377 caldata->paprd_done = true;
378 ath_paprd_activate(sc);
382 ath9k_ps_restore(sc);
386 * This routine performs the periodic noise floor calibration function
387 * that is used to adjust and optimize the chip performance. This
388 * takes environmental changes (location, temperature) into account.
389 * When the task is complete, it reschedules itself depending on the
390 * appropriate interval that was calculated.
392 void ath_ani_calibrate(unsigned long data)
394 struct ath_softc *sc = (struct ath_softc *)data;
395 struct ath_hw *ah = sc->sc_ah;
396 struct ath_common *common = ath9k_hw_common(ah);
397 bool longcal = false;
398 bool shortcal = false;
399 bool aniflag = false;
400 unsigned int timestamp = jiffies_to_msecs(jiffies);
401 u32 cal_interval, short_cal_interval, long_cal_interval;
403 if (ah->caldata && ah->caldata->nfcal_interference)
404 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
406 long_cal_interval = ATH_LONG_CALINTERVAL;
408 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
409 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
411 /* Only calibrate if awake */
412 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
417 /* Long calibration runs independently of short calibration. */
418 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
420 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
421 common->ani.longcal_timer = timestamp;
424 /* Short calibration applies only while caldone is false */
425 if (!common->ani.caldone) {
426 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
428 ath_print(common, ATH_DBG_ANI,
429 "shortcal @%lu\n", jiffies);
430 common->ani.shortcal_timer = timestamp;
431 common->ani.resetcal_timer = timestamp;
434 if ((timestamp - common->ani.resetcal_timer) >=
435 ATH_RESTART_CALINTERVAL) {
436 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
437 if (common->ani.caldone)
438 common->ani.resetcal_timer = timestamp;
442 /* Verify whether we must check ANI */
443 if ((timestamp - common->ani.checkani_timer) >=
444 ah->config.ani_poll_interval) {
446 common->ani.checkani_timer = timestamp;
449 /* Skip all processing if there's nothing to do. */
450 if (longcal || shortcal || aniflag) {
451 /* Call ANI routine if necessary */
453 ath9k_hw_ani_monitor(ah, ah->curchan);
455 /* Perform calibration if necessary */
456 if (longcal || shortcal) {
457 common->ani.caldone =
458 ath9k_hw_calibrate(ah,
460 common->rx_chainmask,
465 ath9k_ps_restore(sc);
469 * Set timer interval based on previous results.
470 * The interval must be the shortest necessary to satisfy ANI,
471 * short calibration and long calibration.
473 cal_interval = ATH_LONG_CALINTERVAL;
474 if (sc->sc_ah->config.enable_ani)
475 cal_interval = min(cal_interval,
476 (u32)ah->config.ani_poll_interval);
477 if (!common->ani.caldone)
478 cal_interval = min(cal_interval, (u32)short_cal_interval);
480 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
481 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
482 if (!ah->caldata->paprd_done)
483 ieee80211_queue_work(sc->hw, &sc->paprd_work);
485 ath_paprd_activate(sc);
490 * Update tx/rx chainmask. For legacy association,
491 * hard code chainmask to 1x1, for 11n association, use
492 * the chainmask configuration, for bt coexistence, use
493 * the chainmask configuration even in legacy mode.
495 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
497 struct ath_hw *ah = sc->sc_ah;
498 struct ath_common *common = ath9k_hw_common(ah);
500 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
501 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
502 common->tx_chainmask = ah->caps.tx_chainmask;
503 common->rx_chainmask = ah->caps.rx_chainmask;
505 common->tx_chainmask = 1;
506 common->rx_chainmask = 1;
509 ath_print(common, ATH_DBG_CONFIG,
510 "tx chmask: %d, rx chmask: %d\n",
511 common->tx_chainmask,
512 common->rx_chainmask);
515 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
519 an = (struct ath_node *)sta->drv_priv;
521 if (sc->sc_flags & SC_OP_TXAGGR) {
522 ath_tx_node_init(sc, an);
523 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
524 sta->ht_cap.ampdu_factor);
525 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
526 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
530 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
532 struct ath_node *an = (struct ath_node *)sta->drv_priv;
534 if (sc->sc_flags & SC_OP_TXAGGR)
535 ath_tx_node_cleanup(sc, an);
538 void ath_hw_check(struct work_struct *work)
540 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
545 for (i = 0; i < 3; i++) {
546 if (ath9k_hw_check_alive(sc->sc_ah))
551 ath_reset(sc, false);
554 ath9k_ps_restore(sc);
557 void ath9k_tasklet(unsigned long data)
559 struct ath_softc *sc = (struct ath_softc *)data;
560 struct ath_hw *ah = sc->sc_ah;
561 struct ath_common *common = ath9k_hw_common(ah);
563 u32 status = sc->intrstatus;
568 if (status & ATH9K_INT_FATAL) {
569 ath_reset(sc, false);
570 ath9k_ps_restore(sc);
574 if (!ath9k_hw_check_alive(ah))
575 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
577 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
578 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
581 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
583 if (status & rxmask) {
584 spin_lock_bh(&sc->rx.rxflushlock);
586 /* Check for high priority Rx first */
587 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
588 (status & ATH9K_INT_RXHP))
589 ath_rx_tasklet(sc, 0, true);
591 ath_rx_tasklet(sc, 0, false);
592 spin_unlock_bh(&sc->rx.rxflushlock);
595 if (status & ATH9K_INT_TX) {
596 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
597 ath_tx_edma_tasklet(sc);
602 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
604 * TSF sync does not look correct; remain awake to sync with
607 ath_print(common, ATH_DBG_PS,
608 "TSFOOR - Sync with next Beacon\n");
609 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
612 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
613 if (status & ATH9K_INT_GENTIMER)
614 ath_gen_timer_isr(sc->sc_ah);
616 /* re-enable hardware interrupt */
617 ath9k_hw_set_interrupts(ah, ah->imask);
618 ath9k_ps_restore(sc);
621 irqreturn_t ath_isr(int irq, void *dev)
623 #define SCHED_INTR ( \
636 struct ath_softc *sc = dev;
637 struct ath_hw *ah = sc->sc_ah;
638 enum ath9k_int status;
642 * The hardware is not ready/present, don't
643 * touch anything. Note this can happen early
644 * on if the IRQ is shared.
646 if (sc->sc_flags & SC_OP_INVALID)
650 /* shared irq, not for us */
652 if (!ath9k_hw_intrpend(ah))
656 * Figure out the reason(s) for the interrupt. Note
657 * that the hal returns a pseudo-ISR that may include
658 * bits we haven't explicitly enabled so we mask the
659 * value to insure we only process bits we requested.
661 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
662 status &= ah->imask; /* discard unasked-for bits */
665 * If there are no status bits set, then this interrupt was not
666 * for me (should have been caught above).
671 /* Cache the status */
672 sc->intrstatus = status;
674 if (status & SCHED_INTR)
678 * If a FATAL or RXORN interrupt is received, we have to reset the
681 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
682 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
685 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
686 (status & ATH9K_INT_BB_WATCHDOG)) {
687 ar9003_hw_bb_watchdog_dbg_info(ah);
691 if (status & ATH9K_INT_SWBA)
692 tasklet_schedule(&sc->bcon_tasklet);
694 if (status & ATH9K_INT_TXURN)
695 ath9k_hw_updatetxtriglevel(ah, true);
697 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
698 if (status & ATH9K_INT_RXEOL) {
699 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
700 ath9k_hw_set_interrupts(ah, ah->imask);
704 if (status & ATH9K_INT_MIB) {
706 * Disable interrupts until we service the MIB
707 * interrupt; otherwise it will continue to
710 ath9k_hw_set_interrupts(ah, 0);
712 * Let the hal handle the event. We assume
713 * it will clear whatever condition caused
716 ath9k_hw_procmibevent(ah);
717 ath9k_hw_set_interrupts(ah, ah->imask);
720 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
721 if (status & ATH9K_INT_TIM_TIMER) {
722 /* Clear RxAbort bit so that we can
724 ath9k_setpower(sc, ATH9K_PM_AWAKE);
725 ath9k_hw_setrxabort(sc->sc_ah, 0);
726 sc->ps_flags |= PS_WAIT_FOR_BEACON;
731 ath_debug_stat_interrupt(sc, status);
734 /* turn off every interrupt except SWBA */
735 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
736 tasklet_schedule(&sc->intr_tq);
744 static u32 ath_get_extchanmode(struct ath_softc *sc,
745 struct ieee80211_channel *chan,
746 enum nl80211_channel_type channel_type)
750 switch (chan->band) {
751 case IEEE80211_BAND_2GHZ:
752 switch(channel_type) {
753 case NL80211_CHAN_NO_HT:
754 case NL80211_CHAN_HT20:
755 chanmode = CHANNEL_G_HT20;
757 case NL80211_CHAN_HT40PLUS:
758 chanmode = CHANNEL_G_HT40PLUS;
760 case NL80211_CHAN_HT40MINUS:
761 chanmode = CHANNEL_G_HT40MINUS;
765 case IEEE80211_BAND_5GHZ:
766 switch(channel_type) {
767 case NL80211_CHAN_NO_HT:
768 case NL80211_CHAN_HT20:
769 chanmode = CHANNEL_A_HT20;
771 case NL80211_CHAN_HT40PLUS:
772 chanmode = CHANNEL_A_HT40PLUS;
774 case NL80211_CHAN_HT40MINUS:
775 chanmode = CHANNEL_A_HT40MINUS;
786 static void ath9k_bss_assoc_info(struct ath_softc *sc,
787 struct ieee80211_vif *vif,
788 struct ieee80211_bss_conf *bss_conf)
790 struct ath_hw *ah = sc->sc_ah;
791 struct ath_common *common = ath9k_hw_common(ah);
793 if (bss_conf->assoc) {
794 ath_print(common, ATH_DBG_CONFIG,
795 "Bss Info ASSOC %d, bssid: %pM\n",
796 bss_conf->aid, common->curbssid);
798 /* New association, store aid */
799 common->curaid = bss_conf->aid;
800 ath9k_hw_write_associd(ah);
803 * Request a re-configuration of Beacon related timers
804 * on the receipt of the first Beacon frame (i.e.,
805 * after time sync with the AP).
807 sc->ps_flags |= PS_BEACON_SYNC;
809 /* Configure the beacon */
810 ath_beacon_config(sc, vif);
812 /* Reset rssi stats */
813 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
815 sc->sc_flags |= SC_OP_ANI_RUN;
816 ath_start_ani(common);
818 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
821 sc->sc_flags &= ~SC_OP_ANI_RUN;
822 del_timer_sync(&common->ani.timer);
826 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
828 struct ath_hw *ah = sc->sc_ah;
829 struct ath_common *common = ath9k_hw_common(ah);
830 struct ieee80211_channel *channel = hw->conf.channel;
834 ath9k_hw_configpcipowersave(ah, 0, 0);
837 ah->curchan = ath_get_curchannel(sc, sc->hw);
839 spin_lock_bh(&sc->sc_resetlock);
840 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
842 ath_print(common, ATH_DBG_FATAL,
843 "Unable to reset channel (%u MHz), "
845 channel->center_freq, r);
847 spin_unlock_bh(&sc->sc_resetlock);
849 ath_update_txpow(sc);
850 if (ath_startrecv(sc) != 0) {
851 ath_print(common, ATH_DBG_FATAL,
852 "Unable to restart recv logic\n");
856 if (sc->sc_flags & SC_OP_BEACONS)
857 ath_beacon_config(sc, NULL); /* restart beacons */
859 /* Re-Enable interrupts */
860 ath9k_hw_set_interrupts(ah, ah->imask);
863 ath9k_hw_cfg_output(ah, ah->led_pin,
864 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
865 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
867 ieee80211_wake_queues(hw);
868 ath9k_ps_restore(sc);
871 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
873 struct ath_hw *ah = sc->sc_ah;
874 struct ieee80211_channel *channel = hw->conf.channel;
878 ieee80211_stop_queues(hw);
881 * Keep the LED on when the radio is disabled
882 * during idle unassociated state.
885 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
886 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
889 /* Disable interrupts */
890 ath9k_hw_set_interrupts(ah, 0);
892 ath_drain_all_txq(sc, false); /* clear pending tx frames */
893 ath_stoprecv(sc); /* turn off frame recv */
894 ath_flushrecv(sc); /* flush recv queue */
897 ah->curchan = ath_get_curchannel(sc, hw);
899 spin_lock_bh(&sc->sc_resetlock);
900 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
902 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
903 "Unable to reset channel (%u MHz), "
905 channel->center_freq, r);
907 spin_unlock_bh(&sc->sc_resetlock);
909 ath9k_hw_phy_disable(ah);
910 ath9k_hw_configpcipowersave(ah, 1, 1);
911 ath9k_ps_restore(sc);
912 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
915 int ath_reset(struct ath_softc *sc, bool retry_tx)
917 struct ath_hw *ah = sc->sc_ah;
918 struct ath_common *common = ath9k_hw_common(ah);
919 struct ieee80211_hw *hw = sc->hw;
923 del_timer_sync(&common->ani.timer);
925 ieee80211_stop_queues(hw);
927 ath9k_hw_set_interrupts(ah, 0);
928 ath_drain_all_txq(sc, retry_tx);
932 spin_lock_bh(&sc->sc_resetlock);
933 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
935 ath_print(common, ATH_DBG_FATAL,
936 "Unable to reset hardware; reset status %d\n", r);
937 spin_unlock_bh(&sc->sc_resetlock);
939 if (ath_startrecv(sc) != 0)
940 ath_print(common, ATH_DBG_FATAL,
941 "Unable to start recv logic\n");
944 * We may be doing a reset in response to a request
945 * that changes the channel so update any state that
946 * might change as a result.
948 ath_cache_conf_rate(sc, &hw->conf);
950 ath_update_txpow(sc);
952 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
953 ath_beacon_config(sc, NULL); /* restart beacons */
955 ath9k_hw_set_interrupts(ah, ah->imask);
959 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
960 if (ATH_TXQ_SETUP(sc, i)) {
961 spin_lock_bh(&sc->tx.txq[i].axq_lock);
962 ath_txq_schedule(sc, &sc->tx.txq[i]);
963 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
968 ieee80211_wake_queues(hw);
971 ath_start_ani(common);
976 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
982 qnum = sc->tx.hwq_map[WME_AC_VO];
985 qnum = sc->tx.hwq_map[WME_AC_VI];
988 qnum = sc->tx.hwq_map[WME_AC_BE];
991 qnum = sc->tx.hwq_map[WME_AC_BK];
994 qnum = sc->tx.hwq_map[WME_AC_BE];
1001 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1026 /* XXX: Remove me once we don't depend on ath9k_channel for all
1027 * this redundant data */
1028 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1029 struct ath9k_channel *ichan)
1031 struct ieee80211_channel *chan = hw->conf.channel;
1032 struct ieee80211_conf *conf = &hw->conf;
1034 ichan->channel = chan->center_freq;
1037 if (chan->band == IEEE80211_BAND_2GHZ) {
1038 ichan->chanmode = CHANNEL_G;
1039 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1041 ichan->chanmode = CHANNEL_A;
1042 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1045 if (conf_is_ht(conf))
1046 ichan->chanmode = ath_get_extchanmode(sc, chan,
1047 conf->channel_type);
1050 /**********************/
1051 /* mac80211 callbacks */
1052 /**********************/
1054 static int ath9k_start(struct ieee80211_hw *hw)
1056 struct ath_wiphy *aphy = hw->priv;
1057 struct ath_softc *sc = aphy->sc;
1058 struct ath_hw *ah = sc->sc_ah;
1059 struct ath_common *common = ath9k_hw_common(ah);
1060 struct ieee80211_channel *curchan = hw->conf.channel;
1061 struct ath9k_channel *init_channel;
1064 ath_print(common, ATH_DBG_CONFIG,
1065 "Starting driver with initial channel: %d MHz\n",
1066 curchan->center_freq);
1068 mutex_lock(&sc->mutex);
1070 if (ath9k_wiphy_started(sc)) {
1071 if (sc->chan_idx == curchan->hw_value) {
1073 * Already on the operational channel, the new wiphy
1074 * can be marked active.
1076 aphy->state = ATH_WIPHY_ACTIVE;
1077 ieee80211_wake_queues(hw);
1080 * Another wiphy is on another channel, start the new
1081 * wiphy in paused state.
1083 aphy->state = ATH_WIPHY_PAUSED;
1084 ieee80211_stop_queues(hw);
1086 mutex_unlock(&sc->mutex);
1089 aphy->state = ATH_WIPHY_ACTIVE;
1091 /* setup initial channel */
1093 sc->chan_idx = curchan->hw_value;
1095 init_channel = ath_get_curchannel(sc, hw);
1097 /* Reset SERDES registers */
1098 ath9k_hw_configpcipowersave(ah, 0, 0);
1101 * The basic interface to setting the hardware in a good
1102 * state is ``reset''. On return the hardware is known to
1103 * be powered up and with interrupts disabled. This must
1104 * be followed by initialization of the appropriate bits
1105 * and then setup of the interrupt mask.
1107 spin_lock_bh(&sc->sc_resetlock);
1108 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1110 ath_print(common, ATH_DBG_FATAL,
1111 "Unable to reset hardware; reset status %d "
1112 "(freq %u MHz)\n", r,
1113 curchan->center_freq);
1114 spin_unlock_bh(&sc->sc_resetlock);
1117 spin_unlock_bh(&sc->sc_resetlock);
1120 * This is needed only to setup initial state
1121 * but it's best done after a reset.
1123 ath_update_txpow(sc);
1126 * Setup the hardware after reset:
1127 * The receive engine is set going.
1128 * Frame transmit is handled entirely
1129 * in the frame output path; there's nothing to do
1130 * here except setup the interrupt mask.
1132 if (ath_startrecv(sc) != 0) {
1133 ath_print(common, ATH_DBG_FATAL,
1134 "Unable to start recv logic\n");
1139 /* Setup our intr mask. */
1140 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1141 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1144 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1145 ah->imask |= ATH9K_INT_RXHP |
1147 ATH9K_INT_BB_WATCHDOG;
1149 ah->imask |= ATH9K_INT_RX;
1151 ah->imask |= ATH9K_INT_GTT;
1153 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1154 ah->imask |= ATH9K_INT_CST;
1156 ath_cache_conf_rate(sc, &hw->conf);
1158 sc->sc_flags &= ~SC_OP_INVALID;
1160 /* Disable BMISS interrupt when we're not associated */
1161 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1162 ath9k_hw_set_interrupts(ah, ah->imask);
1164 ieee80211_wake_queues(hw);
1166 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1168 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1169 !ah->btcoex_hw.enabled) {
1170 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1171 AR_STOMP_LOW_WLAN_WGHT);
1172 ath9k_hw_btcoex_enable(ah);
1174 if (common->bus_ops->bt_coex_prep)
1175 common->bus_ops->bt_coex_prep(common);
1176 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1177 ath9k_btcoex_timer_resume(sc);
1181 mutex_unlock(&sc->mutex);
1186 static int ath9k_tx(struct ieee80211_hw *hw,
1187 struct sk_buff *skb)
1189 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1190 struct ath_wiphy *aphy = hw->priv;
1191 struct ath_softc *sc = aphy->sc;
1192 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1193 struct ath_tx_control txctl;
1194 int padpos, padsize;
1195 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1198 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199 ath_print(common, ATH_DBG_XMIT,
1200 "ath9k: %s: TX in unexpected wiphy state "
1201 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1205 if (sc->ps_enabled) {
1207 * mac80211 does not set PM field for normal data frames, so we
1208 * need to update that based on the current PS mode.
1210 if (ieee80211_is_data(hdr->frame_control) &&
1211 !ieee80211_is_nullfunc(hdr->frame_control) &&
1212 !ieee80211_has_pm(hdr->frame_control)) {
1213 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1214 "while in PS mode\n");
1215 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1219 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1221 * We are using PS-Poll and mac80211 can request TX while in
1222 * power save mode. Need to wake up hardware for the TX to be
1223 * completed and if needed, also for RX of buffered frames.
1225 ath9k_ps_wakeup(sc);
1226 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227 ath9k_hw_setrxabort(sc->sc_ah, 0);
1228 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229 ath_print(common, ATH_DBG_PS,
1230 "Sending PS-Poll to pick a buffered frame\n");
1231 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1233 ath_print(common, ATH_DBG_PS,
1234 "Wake up to complete TX\n");
1235 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1238 * The actual restore operation will happen only after
1239 * the sc_flags bit is cleared. We are just dropping
1240 * the ps_usecount here.
1242 ath9k_ps_restore(sc);
1245 memset(&txctl, 0, sizeof(struct ath_tx_control));
1248 * As a temporary workaround, assign seq# here; this will likely need
1249 * to be cleaned up to work better with Beacon transmission and virtual
1252 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1253 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1254 sc->tx.seq_no += 0x10;
1255 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1256 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1259 /* Add the padding after the header if this is not already done */
1260 padpos = ath9k_cmn_padpos(hdr->frame_control);
1261 padsize = padpos & 3;
1262 if (padsize && skb->len>padpos) {
1263 if (skb_headroom(skb) < padsize)
1265 skb_push(skb, padsize);
1266 memmove(skb->data, skb->data + padsize, padpos);
1269 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1270 txctl.txq = &sc->tx.txq[qnum];
1272 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1274 if (ath_tx_start(hw, skb, &txctl) != 0) {
1275 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1281 dev_kfree_skb_any(skb);
1285 static void ath9k_stop(struct ieee80211_hw *hw)
1287 struct ath_wiphy *aphy = hw->priv;
1288 struct ath_softc *sc = aphy->sc;
1289 struct ath_hw *ah = sc->sc_ah;
1290 struct ath_common *common = ath9k_hw_common(ah);
1293 mutex_lock(&sc->mutex);
1295 aphy->state = ATH_WIPHY_INACTIVE;
1298 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1300 cancel_delayed_work_sync(&sc->tx_complete_work);
1301 cancel_work_sync(&sc->paprd_work);
1302 cancel_work_sync(&sc->hw_check_work);
1304 for (i = 0; i < sc->num_sec_wiphy; i++) {
1305 if (sc->sec_wiphy[i])
1309 if (i == sc->num_sec_wiphy) {
1310 cancel_delayed_work_sync(&sc->wiphy_work);
1311 cancel_work_sync(&sc->chan_work);
1314 if (sc->sc_flags & SC_OP_INVALID) {
1315 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1316 mutex_unlock(&sc->mutex);
1320 if (ath9k_wiphy_started(sc)) {
1321 mutex_unlock(&sc->mutex);
1322 return; /* another wiphy still in use */
1325 /* Ensure HW is awake when we try to shut it down. */
1326 ath9k_ps_wakeup(sc);
1328 if (ah->btcoex_hw.enabled) {
1329 ath9k_hw_btcoex_disable(ah);
1330 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1331 ath9k_btcoex_timer_pause(sc);
1334 /* make sure h/w will not generate any interrupt
1335 * before setting the invalid flag. */
1336 ath9k_hw_set_interrupts(ah, 0);
1338 if (!(sc->sc_flags & SC_OP_INVALID)) {
1339 ath_drain_all_txq(sc, false);
1341 ath9k_hw_phy_disable(ah);
1343 sc->rx.rxlink = NULL;
1345 /* disable HAL and put h/w to sleep */
1346 ath9k_hw_disable(ah);
1347 ath9k_hw_configpcipowersave(ah, 1, 1);
1348 ath9k_ps_restore(sc);
1350 /* Finally, put the chip in FULL SLEEP mode */
1351 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1353 sc->sc_flags |= SC_OP_INVALID;
1355 mutex_unlock(&sc->mutex);
1357 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1360 static int ath9k_add_interface(struct ieee80211_hw *hw,
1361 struct ieee80211_vif *vif)
1363 struct ath_wiphy *aphy = hw->priv;
1364 struct ath_softc *sc = aphy->sc;
1365 struct ath_hw *ah = sc->sc_ah;
1366 struct ath_common *common = ath9k_hw_common(ah);
1367 struct ath_vif *avp = (void *)vif->drv_priv;
1368 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1371 mutex_lock(&sc->mutex);
1373 switch (vif->type) {
1374 case NL80211_IFTYPE_STATION:
1375 ic_opmode = NL80211_IFTYPE_STATION;
1377 case NL80211_IFTYPE_WDS:
1378 ic_opmode = NL80211_IFTYPE_WDS;
1380 case NL80211_IFTYPE_ADHOC:
1381 case NL80211_IFTYPE_AP:
1382 case NL80211_IFTYPE_MESH_POINT:
1383 if (sc->nbcnvifs >= ATH_BCBUF) {
1387 ic_opmode = vif->type;
1390 ath_print(common, ATH_DBG_FATAL,
1391 "Interface type %d not yet supported\n", vif->type);
1396 ath_print(common, ATH_DBG_CONFIG,
1397 "Attach a VIF of type: %d\n", ic_opmode);
1399 /* Set the VIF opmode */
1400 avp->av_opmode = ic_opmode;
1405 ath9k_set_bssid_mask(hw, vif);
1408 goto out; /* skip global settings for secondary vif */
1410 if (ic_opmode == NL80211_IFTYPE_AP) {
1411 ath9k_hw_set_tsfadjust(ah, 1);
1412 sc->sc_flags |= SC_OP_TSF_RESET;
1415 /* Set the device opmode */
1416 ah->opmode = ic_opmode;
1419 * Enable MIB interrupts when there are hardware phy counters.
1420 * Note we only do this (at the moment) for station mode.
1422 if ((vif->type == NL80211_IFTYPE_STATION) ||
1423 (vif->type == NL80211_IFTYPE_ADHOC) ||
1424 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1425 if (ah->config.enable_ani)
1426 ah->imask |= ATH9K_INT_MIB;
1427 ah->imask |= ATH9K_INT_TSFOOR;
1430 ath9k_hw_set_interrupts(ah, ah->imask);
1432 if (vif->type == NL80211_IFTYPE_AP ||
1433 vif->type == NL80211_IFTYPE_ADHOC ||
1434 vif->type == NL80211_IFTYPE_MONITOR) {
1435 sc->sc_flags |= SC_OP_ANI_RUN;
1436 ath_start_ani(common);
1440 mutex_unlock(&sc->mutex);
1444 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1445 struct ieee80211_vif *vif)
1447 struct ath_wiphy *aphy = hw->priv;
1448 struct ath_softc *sc = aphy->sc;
1449 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1450 struct ath_vif *avp = (void *)vif->drv_priv;
1453 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1455 mutex_lock(&sc->mutex);
1458 sc->sc_flags &= ~SC_OP_ANI_RUN;
1459 del_timer_sync(&common->ani.timer);
1461 /* Reclaim beacon resources */
1462 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1463 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1464 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1465 ath9k_ps_wakeup(sc);
1466 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1467 ath9k_ps_restore(sc);
1470 ath_beacon_return(sc, avp);
1471 sc->sc_flags &= ~SC_OP_BEACONS;
1473 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1474 if (sc->beacon.bslot[i] == vif) {
1475 printk(KERN_DEBUG "%s: vif had allocated beacon "
1476 "slot\n", __func__);
1477 sc->beacon.bslot[i] = NULL;
1478 sc->beacon.bslot_aphy[i] = NULL;
1484 mutex_unlock(&sc->mutex);
1487 void ath9k_enable_ps(struct ath_softc *sc)
1489 struct ath_hw *ah = sc->sc_ah;
1491 sc->ps_enabled = true;
1492 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1493 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1494 ah->imask |= ATH9K_INT_TIM_TIMER;
1495 ath9k_hw_set_interrupts(ah, ah->imask);
1497 ath9k_hw_setrxabort(ah, 1);
1501 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1503 struct ath_wiphy *aphy = hw->priv;
1504 struct ath_softc *sc = aphy->sc;
1505 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1506 struct ieee80211_conf *conf = &hw->conf;
1507 struct ath_hw *ah = sc->sc_ah;
1510 mutex_lock(&sc->mutex);
1513 * Leave this as the first check because we need to turn on the
1514 * radio if it was disabled before prior to processing the rest
1515 * of the changes. Likewise we must only disable the radio towards
1518 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1520 bool all_wiphys_idle;
1521 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1523 spin_lock_bh(&sc->wiphy_lock);
1524 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1525 ath9k_set_wiphy_idle(aphy, idle);
1527 enable_radio = (!idle && all_wiphys_idle);
1530 * After we unlock here its possible another wiphy
1531 * can be re-renabled so to account for that we will
1532 * only disable the radio toward the end of this routine
1533 * if by then all wiphys are still idle.
1535 spin_unlock_bh(&sc->wiphy_lock);
1538 sc->ps_idle = false;
1539 ath_radio_enable(sc, hw);
1540 ath_print(common, ATH_DBG_CONFIG,
1541 "not-idle: enabling radio\n");
1546 * We just prepare to enable PS. We have to wait until our AP has
1547 * ACK'd our null data frame to disable RX otherwise we'll ignore
1548 * those ACKs and end up retransmitting the same null data frames.
1549 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1551 if (changed & IEEE80211_CONF_CHANGE_PS) {
1552 unsigned long flags;
1553 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1554 if (conf->flags & IEEE80211_CONF_PS) {
1555 sc->ps_flags |= PS_ENABLED;
1557 * At this point we know hardware has received an ACK
1558 * of a previously sent null data frame.
1560 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1561 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1562 ath9k_enable_ps(sc);
1565 sc->ps_enabled = false;
1566 sc->ps_flags &= ~(PS_ENABLED |
1567 PS_NULLFUNC_COMPLETED);
1568 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
1569 if (!(ah->caps.hw_caps &
1570 ATH9K_HW_CAP_AUTOSLEEP)) {
1571 ath9k_hw_setrxabort(sc->sc_ah, 0);
1572 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1574 PS_WAIT_FOR_PSPOLL_DATA |
1575 PS_WAIT_FOR_TX_ACK);
1576 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1577 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1578 ath9k_hw_set_interrupts(sc->sc_ah,
1583 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1586 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1587 if (conf->flags & IEEE80211_CONF_MONITOR) {
1588 ath_print(common, ATH_DBG_CONFIG,
1589 "HW opmode set to Monitor mode\n");
1590 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1594 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1595 struct ieee80211_channel *curchan = hw->conf.channel;
1596 int pos = curchan->hw_value;
1598 aphy->chan_idx = pos;
1599 aphy->chan_is_ht = conf_is_ht(conf);
1600 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1601 sc->sc_flags |= SC_OP_OFFCHANNEL;
1603 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1605 if (aphy->state == ATH_WIPHY_SCAN ||
1606 aphy->state == ATH_WIPHY_ACTIVE)
1607 ath9k_wiphy_pause_all_forced(sc, aphy);
1610 * Do not change operational channel based on a paused
1613 goto skip_chan_change;
1616 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1617 curchan->center_freq);
1619 /* XXX: remove me eventualy */
1620 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1622 ath_update_chainmask(sc, conf_is_ht(conf));
1624 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1625 ath_print(common, ATH_DBG_FATAL,
1626 "Unable to set channel\n");
1627 mutex_unlock(&sc->mutex);
1633 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1634 sc->config.txpowlimit = 2 * conf->power_level;
1635 ath_update_txpow(sc);
1638 spin_lock_bh(&sc->wiphy_lock);
1639 disable_radio = ath9k_all_wiphys_idle(sc);
1640 spin_unlock_bh(&sc->wiphy_lock);
1642 if (disable_radio) {
1643 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1645 ath_radio_disable(sc, hw);
1648 mutex_unlock(&sc->mutex);
1653 #define SUPPORTED_FILTERS \
1654 (FIF_PROMISC_IN_BSS | \
1659 FIF_BCN_PRBRESP_PROMISC | \
1662 /* FIXME: sc->sc_full_reset ? */
1663 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1664 unsigned int changed_flags,
1665 unsigned int *total_flags,
1668 struct ath_wiphy *aphy = hw->priv;
1669 struct ath_softc *sc = aphy->sc;
1672 changed_flags &= SUPPORTED_FILTERS;
1673 *total_flags &= SUPPORTED_FILTERS;
1675 sc->rx.rxfilter = *total_flags;
1676 ath9k_ps_wakeup(sc);
1677 rfilt = ath_calcrxfilter(sc);
1678 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1679 ath9k_ps_restore(sc);
1681 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1682 "Set HW RX filter: 0x%x\n", rfilt);
1685 static int ath9k_sta_add(struct ieee80211_hw *hw,
1686 struct ieee80211_vif *vif,
1687 struct ieee80211_sta *sta)
1689 struct ath_wiphy *aphy = hw->priv;
1690 struct ath_softc *sc = aphy->sc;
1692 ath_node_attach(sc, sta);
1697 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1698 struct ieee80211_vif *vif,
1699 struct ieee80211_sta *sta)
1701 struct ath_wiphy *aphy = hw->priv;
1702 struct ath_softc *sc = aphy->sc;
1704 ath_node_detach(sc, sta);
1709 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1710 const struct ieee80211_tx_queue_params *params)
1712 struct ath_wiphy *aphy = hw->priv;
1713 struct ath_softc *sc = aphy->sc;
1714 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1715 struct ath9k_tx_queue_info qi;
1718 if (queue >= WME_NUM_AC)
1721 mutex_lock(&sc->mutex);
1723 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1725 qi.tqi_aifs = params->aifs;
1726 qi.tqi_cwmin = params->cw_min;
1727 qi.tqi_cwmax = params->cw_max;
1728 qi.tqi_burstTime = params->txop;
1729 qnum = ath_get_hal_qnum(queue, sc);
1731 ath_print(common, ATH_DBG_CONFIG,
1732 "Configure tx [queue/halq] [%d/%d], "
1733 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1734 queue, qnum, params->aifs, params->cw_min,
1735 params->cw_max, params->txop);
1737 ret = ath_txq_update(sc, qnum, &qi);
1739 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1741 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1742 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1743 ath_beaconq_config(sc);
1745 mutex_unlock(&sc->mutex);
1750 static int ath9k_set_key(struct ieee80211_hw *hw,
1751 enum set_key_cmd cmd,
1752 struct ieee80211_vif *vif,
1753 struct ieee80211_sta *sta,
1754 struct ieee80211_key_conf *key)
1756 struct ath_wiphy *aphy = hw->priv;
1757 struct ath_softc *sc = aphy->sc;
1758 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1761 if (modparam_nohwcrypt)
1764 mutex_lock(&sc->mutex);
1765 ath9k_ps_wakeup(sc);
1766 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1770 ret = ath_key_config(common, vif, sta, key);
1772 key->hw_key_idx = ret;
1773 /* push IV and Michael MIC generation to stack */
1774 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1775 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1776 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1777 if (sc->sc_ah->sw_mgmt_crypto &&
1778 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1779 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1784 ath_key_delete(common, key);
1790 ath9k_ps_restore(sc);
1791 mutex_unlock(&sc->mutex);
1796 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1797 struct ieee80211_vif *vif,
1798 struct ieee80211_bss_conf *bss_conf,
1801 struct ath_wiphy *aphy = hw->priv;
1802 struct ath_softc *sc = aphy->sc;
1803 struct ath_hw *ah = sc->sc_ah;
1804 struct ath_common *common = ath9k_hw_common(ah);
1805 struct ath_vif *avp = (void *)vif->drv_priv;
1809 mutex_lock(&sc->mutex);
1811 if (changed & BSS_CHANGED_BSSID) {
1813 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1814 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1816 ath9k_hw_write_associd(ah);
1818 /* Set aggregation protection mode parameters */
1819 sc->config.ath_aggr_prot = 0;
1821 /* Only legacy IBSS for now */
1822 if (vif->type == NL80211_IFTYPE_ADHOC)
1823 ath_update_chainmask(sc, 0);
1825 ath_print(common, ATH_DBG_CONFIG,
1826 "BSSID: %pM aid: 0x%x\n",
1827 common->curbssid, common->curaid);
1829 /* need to reconfigure the beacon */
1830 sc->sc_flags &= ~SC_OP_BEACONS ;
1833 /* Enable transmission of beacons (AP, IBSS, MESH) */
1834 if ((changed & BSS_CHANGED_BEACON) ||
1835 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1836 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1837 error = ath_beacon_alloc(aphy, vif);
1839 ath_beacon_config(sc, vif);
1842 if (changed & BSS_CHANGED_ERP_SLOT) {
1843 if (bss_conf->use_short_slot)
1847 if (vif->type == NL80211_IFTYPE_AP) {
1849 * Defer update, so that connected stations can adjust
1850 * their settings at the same time.
1851 * See beacon.c for more details
1853 sc->beacon.slottime = slottime;
1854 sc->beacon.updateslot = UPDATE;
1856 ah->slottime = slottime;
1857 ath9k_hw_init_global_settings(ah);
1861 /* Disable transmission of beacons */
1862 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1863 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1865 if (changed & BSS_CHANGED_BEACON_INT) {
1866 sc->beacon_interval = bss_conf->beacon_int;
1868 * In case of AP mode, the HW TSF has to be reset
1869 * when the beacon interval changes.
1871 if (vif->type == NL80211_IFTYPE_AP) {
1872 sc->sc_flags |= SC_OP_TSF_RESET;
1873 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1874 error = ath_beacon_alloc(aphy, vif);
1876 ath_beacon_config(sc, vif);
1878 ath_beacon_config(sc, vif);
1882 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1883 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1884 bss_conf->use_short_preamble);
1885 if (bss_conf->use_short_preamble)
1886 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1888 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1891 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1892 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1893 bss_conf->use_cts_prot);
1894 if (bss_conf->use_cts_prot &&
1895 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1896 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1898 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1901 if (changed & BSS_CHANGED_ASSOC) {
1902 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1904 ath9k_bss_assoc_info(sc, vif, bss_conf);
1907 mutex_unlock(&sc->mutex);
1910 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1913 struct ath_wiphy *aphy = hw->priv;
1914 struct ath_softc *sc = aphy->sc;
1916 mutex_lock(&sc->mutex);
1917 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1918 mutex_unlock(&sc->mutex);
1923 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1925 struct ath_wiphy *aphy = hw->priv;
1926 struct ath_softc *sc = aphy->sc;
1928 mutex_lock(&sc->mutex);
1929 ath9k_hw_settsf64(sc->sc_ah, tsf);
1930 mutex_unlock(&sc->mutex);
1933 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1935 struct ath_wiphy *aphy = hw->priv;
1936 struct ath_softc *sc = aphy->sc;
1938 mutex_lock(&sc->mutex);
1940 ath9k_ps_wakeup(sc);
1941 ath9k_hw_reset_tsf(sc->sc_ah);
1942 ath9k_ps_restore(sc);
1944 mutex_unlock(&sc->mutex);
1947 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1948 struct ieee80211_vif *vif,
1949 enum ieee80211_ampdu_mlme_action action,
1950 struct ieee80211_sta *sta,
1953 struct ath_wiphy *aphy = hw->priv;
1954 struct ath_softc *sc = aphy->sc;
1960 case IEEE80211_AMPDU_RX_START:
1961 if (!(sc->sc_flags & SC_OP_RXAGGR))
1964 case IEEE80211_AMPDU_RX_STOP:
1966 case IEEE80211_AMPDU_TX_START:
1967 ath9k_ps_wakeup(sc);
1968 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1970 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1971 ath9k_ps_restore(sc);
1973 case IEEE80211_AMPDU_TX_STOP:
1974 ath9k_ps_wakeup(sc);
1975 ath_tx_aggr_stop(sc, sta, tid);
1976 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1977 ath9k_ps_restore(sc);
1979 case IEEE80211_AMPDU_TX_OPERATIONAL:
1980 ath9k_ps_wakeup(sc);
1981 ath_tx_aggr_resume(sc, sta, tid);
1982 ath9k_ps_restore(sc);
1985 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1986 "Unknown AMPDU action\n");
1994 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1995 struct survey_info *survey)
1997 struct ath_wiphy *aphy = hw->priv;
1998 struct ath_softc *sc = aphy->sc;
1999 struct ath_hw *ah = sc->sc_ah;
2000 struct ieee80211_supported_band *sband;
2001 struct ath9k_channel *chan;
2003 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2004 if (sband && idx >= sband->n_channels) {
2005 idx -= sband->n_channels;
2010 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2012 if (!sband || idx >= sband->n_channels)
2015 survey->channel = &sband->channels[idx];
2016 chan = &ah->channels[survey->channel->hw_value];
2019 if (chan == ah->curchan)
2020 survey->filled |= SURVEY_INFO_IN_USE;
2022 if (chan->noisefloor) {
2023 survey->filled |= SURVEY_INFO_NOISE_DBM;
2024 survey->noise = chan->noisefloor;
2030 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2032 struct ath_wiphy *aphy = hw->priv;
2033 struct ath_softc *sc = aphy->sc;
2035 mutex_lock(&sc->mutex);
2036 if (ath9k_wiphy_scanning(sc)) {
2038 * There is a race here in mac80211 but fixing it requires
2039 * we revisit how we handle the scan complete callback.
2040 * After mac80211 fixes we will not have configured hardware
2041 * to the home channel nor would we have configured the RX
2044 mutex_unlock(&sc->mutex);
2048 aphy->state = ATH_WIPHY_SCAN;
2049 ath9k_wiphy_pause_all_forced(sc, aphy);
2050 mutex_unlock(&sc->mutex);
2054 * XXX: this requires a revisit after the driver
2055 * scan_complete gets moved to another place/removed in mac80211.
2057 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2059 struct ath_wiphy *aphy = hw->priv;
2060 struct ath_softc *sc = aphy->sc;
2062 mutex_lock(&sc->mutex);
2063 aphy->state = ATH_WIPHY_ACTIVE;
2064 mutex_unlock(&sc->mutex);
2067 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2069 struct ath_wiphy *aphy = hw->priv;
2070 struct ath_softc *sc = aphy->sc;
2071 struct ath_hw *ah = sc->sc_ah;
2073 mutex_lock(&sc->mutex);
2074 ah->coverage_class = coverage_class;
2075 ath9k_hw_init_global_settings(ah);
2076 mutex_unlock(&sc->mutex);
2079 struct ieee80211_ops ath9k_ops = {
2081 .start = ath9k_start,
2083 .add_interface = ath9k_add_interface,
2084 .remove_interface = ath9k_remove_interface,
2085 .config = ath9k_config,
2086 .configure_filter = ath9k_configure_filter,
2087 .sta_add = ath9k_sta_add,
2088 .sta_remove = ath9k_sta_remove,
2089 .conf_tx = ath9k_conf_tx,
2090 .bss_info_changed = ath9k_bss_info_changed,
2091 .set_key = ath9k_set_key,
2092 .get_tsf = ath9k_get_tsf,
2093 .set_tsf = ath9k_set_tsf,
2094 .reset_tsf = ath9k_reset_tsf,
2095 .ampdu_action = ath9k_ampdu_action,
2096 .get_survey = ath9k_get_survey,
2097 .sw_scan_start = ath9k_sw_scan_start,
2098 .sw_scan_complete = ath9k_sw_scan_complete,
2099 .rfkill_poll = ath9k_rfkill_poll_state,
2100 .set_coverage_class = ath9k_set_coverage_class,