2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
19 #include "ar9003_mac.h"
21 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24 int mindelta, int main_rssi_avg,
25 int alt_rssi_avg, int pkt_count)
27 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33 int curr_main_set, int curr_alt_set,
34 int alt_rssi_avg, int main_rssi_avg)
39 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
44 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
60 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
62 return sc->ps_enabled &&
63 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
67 * Setup and link descriptors.
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
74 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
76 struct ath_hw *ah = sc->sc_ah;
77 struct ath_common *common = ath9k_hw_common(ah);
84 ds->ds_link = 0; /* link to null */
85 ds->ds_data = bf->bf_buf_addr;
87 /* virtual addr of the beginning of the buffer. */
90 ds->ds_vdata = skb->data;
93 * setup rx descriptors. The rx_bufsize here tells the hardware
94 * how much data it can DMA to us and that we are prepared
97 ath9k_hw_setuprxdesc(ah, ds,
101 if (sc->rx.rxlink == NULL)
102 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
104 *sc->rx.rxlink = bf->bf_daddr;
106 sc->rx.rxlink = &ds->ds_link;
109 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc->sc_ah, antenna);
113 sc->rx.defant = antenna;
114 sc->rx.rxotherant = 0;
117 static void ath_opmode_init(struct ath_softc *sc)
119 struct ath_hw *ah = sc->sc_ah;
120 struct ath_common *common = ath9k_hw_common(ah);
124 /* configure rx filter */
125 rfilt = ath_calcrxfilter(sc);
126 ath9k_hw_setrxfilter(ah, rfilt);
128 /* configure bssid mask */
129 ath_hw_setbssidmask(common);
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah);
134 /* calculate and install multicast filter */
135 mfilt[0] = mfilt[1] = ~0;
136 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
139 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140 enum ath9k_rx_qtype qtype)
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_rx_edma *rx_edma;
147 rx_edma = &sc->rx.rx_edma[qtype];
148 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
151 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152 list_del_init(&bf->list);
157 memset(skb->data, 0, ah->caps.rx_status_len);
158 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159 ah->caps.rx_status_len, DMA_TO_DEVICE);
161 SKB_CB_ATHBUF(skb) = bf;
162 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163 skb_queue_tail(&rx_edma->rx_fifo, skb);
168 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169 enum ath9k_rx_qtype qtype, int size)
171 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
174 if (list_empty(&sc->rx.rxbuf)) {
175 ath_dbg(common, QUEUE, "No free rx buf available\n");
179 while (!list_empty(&sc->rx.rxbuf)) {
182 if (!ath_rx_edma_buf_link(sc, qtype))
190 static void ath_rx_remove_buffer(struct ath_softc *sc,
191 enum ath9k_rx_qtype qtype)
194 struct ath_rx_edma *rx_edma;
197 rx_edma = &sc->rx.rx_edma[qtype];
199 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
200 bf = SKB_CB_ATHBUF(skb);
202 list_add_tail(&bf->list, &sc->rx.rxbuf);
206 static void ath_rx_edma_cleanup(struct ath_softc *sc)
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
212 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
213 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
215 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
217 dma_unmap_single(sc->dev, bf->bf_buf_addr,
220 dev_kfree_skb_any(bf->bf_mpdu);
226 INIT_LIST_HEAD(&sc->rx.rxbuf);
228 kfree(sc->rx.rx_bufptr);
229 sc->rx.rx_bufptr = NULL;
232 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
234 skb_queue_head_init(&rx_edma->rx_fifo);
235 skb_queue_head_init(&rx_edma->rx_buffers);
236 rx_edma->rx_fifo_hwsize = size;
239 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
241 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
242 struct ath_hw *ah = sc->sc_ah;
248 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
249 ah->caps.rx_status_len);
251 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
252 ah->caps.rx_lp_qdepth);
253 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
254 ah->caps.rx_hp_qdepth);
256 size = sizeof(struct ath_buf) * nbufs;
257 bf = kzalloc(size, GFP_KERNEL);
261 INIT_LIST_HEAD(&sc->rx.rxbuf);
262 sc->rx.rx_bufptr = bf;
264 for (i = 0; i < nbufs; i++, bf++) {
265 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
271 memset(skb->data, 0, common->rx_bufsize);
274 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
277 if (unlikely(dma_mapping_error(sc->dev,
279 dev_kfree_skb_any(skb);
283 "dma_mapping_error() on RX init\n");
288 list_add_tail(&bf->list, &sc->rx.rxbuf);
294 ath_rx_edma_cleanup(sc);
298 static void ath_edma_start_recv(struct ath_softc *sc)
300 spin_lock_bh(&sc->rx.rxbuflock);
302 ath9k_hw_rxena(sc->sc_ah);
304 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
305 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
307 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
308 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
312 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
314 spin_unlock_bh(&sc->rx.rxbuflock);
317 static void ath_edma_stop_recv(struct ath_softc *sc)
319 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
320 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
323 int ath_rx_init(struct ath_softc *sc, int nbufs)
325 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
330 spin_lock_init(&sc->sc_pcu_lock);
331 sc->sc_flags &= ~SC_OP_RXFLUSH;
332 spin_lock_init(&sc->rx.rxbuflock);
334 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
335 sc->sc_ah->caps.rx_status_len;
337 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
338 return ath_rx_edma_init(sc, nbufs);
340 ath_dbg(common, CONFIG, "cachelsz %u rxbufsize %u\n",
341 common->cachelsz, common->rx_bufsize);
343 /* Initialize rx descriptors */
345 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
349 "failed to allocate rx descriptors: %d\n",
354 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
355 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
363 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
366 if (unlikely(dma_mapping_error(sc->dev,
368 dev_kfree_skb_any(skb);
372 "dma_mapping_error() on RX init\n");
377 sc->rx.rxlink = NULL;
387 void ath_rx_cleanup(struct ath_softc *sc)
389 struct ath_hw *ah = sc->sc_ah;
390 struct ath_common *common = ath9k_hw_common(ah);
394 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
395 ath_rx_edma_cleanup(sc);
398 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
401 dma_unmap_single(sc->dev, bf->bf_buf_addr,
410 if (sc->rx.rxdma.dd_desc_len != 0)
411 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
416 * Calculate the receive filter according to the
417 * operating mode and state:
419 * o always accept unicast, broadcast, and multicast traffic
420 * o maintain current state of phy error reception (the hal
421 * may enable phy error frames for noise immunity work)
422 * o probe request frames are accepted only when operating in
423 * hostap, adhoc, or monitor modes
424 * o enable promiscuous mode according to the interface state
426 * - when operating in adhoc mode so the 802.11 layer creates
427 * node table entries for peers,
428 * - when operating in station mode for collecting rssi data when
429 * the station is otherwise quiet, or
430 * - when operating as a repeater so we see repeater-sta beacons
434 u32 ath_calcrxfilter(struct ath_softc *sc)
438 rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
439 | ATH9K_RX_FILTER_MCAST;
441 if (sc->rx.rxfilter & FIF_PROBE_REQ)
442 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
445 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
446 * mode interface or when in monitor mode. AP mode does not need this
447 * since it receives all in-BSS frames anyway.
449 if (sc->sc_ah->is_monitoring)
450 rfilt |= ATH9K_RX_FILTER_PROM;
452 if (sc->rx.rxfilter & FIF_CONTROL)
453 rfilt |= ATH9K_RX_FILTER_CONTROL;
455 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
457 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
458 rfilt |= ATH9K_RX_FILTER_MYBEACON;
460 rfilt |= ATH9K_RX_FILTER_BEACON;
462 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
463 (sc->rx.rxfilter & FIF_PSPOLL))
464 rfilt |= ATH9K_RX_FILTER_PSPOLL;
466 if (conf_is_ht(&sc->hw->conf))
467 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
469 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
470 /* The following may also be needed for other older chips */
471 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
472 rfilt |= ATH9K_RX_FILTER_PROM;
473 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
480 int ath_startrecv(struct ath_softc *sc)
482 struct ath_hw *ah = sc->sc_ah;
483 struct ath_buf *bf, *tbf;
485 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
486 ath_edma_start_recv(sc);
490 spin_lock_bh(&sc->rx.rxbuflock);
491 if (list_empty(&sc->rx.rxbuf))
494 sc->rx.rxlink = NULL;
495 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
496 ath_rx_buf_link(sc, bf);
499 /* We could have deleted elements so the list may be empty now */
500 if (list_empty(&sc->rx.rxbuf))
503 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
504 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
509 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
511 spin_unlock_bh(&sc->rx.rxbuflock);
516 bool ath_stoprecv(struct ath_softc *sc)
518 struct ath_hw *ah = sc->sc_ah;
519 bool stopped, reset = false;
521 spin_lock_bh(&sc->rx.rxbuflock);
522 ath9k_hw_abortpcurecv(ah);
523 ath9k_hw_setrxfilter(ah, 0);
524 stopped = ath9k_hw_stopdmarecv(ah, &reset);
526 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
527 ath_edma_stop_recv(sc);
529 sc->rx.rxlink = NULL;
530 spin_unlock_bh(&sc->rx.rxbuflock);
532 if (!(ah->ah_flags & AH_UNPLUGGED) &&
533 unlikely(!stopped)) {
534 ath_err(ath9k_hw_common(sc->sc_ah),
535 "Could not stop RX, we could be "
536 "confusing the DMA engine when we start RX up\n");
537 ATH_DBG_WARN_ON_ONCE(!stopped);
539 return stopped && !reset;
542 void ath_flushrecv(struct ath_softc *sc)
544 sc->sc_flags |= SC_OP_RXFLUSH;
545 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
546 ath_rx_tasklet(sc, 1, true);
547 ath_rx_tasklet(sc, 1, false);
548 sc->sc_flags &= ~SC_OP_RXFLUSH;
551 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
553 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
554 struct ieee80211_mgmt *mgmt;
555 u8 *pos, *end, id, elen;
556 struct ieee80211_tim_ie *tim;
558 mgmt = (struct ieee80211_mgmt *)skb->data;
559 pos = mgmt->u.beacon.variable;
560 end = skb->data + skb->len;
562 while (pos + 2 < end) {
565 if (pos + elen > end)
568 if (id == WLAN_EID_TIM) {
569 if (elen < sizeof(*tim))
571 tim = (struct ieee80211_tim_ie *) pos;
572 if (tim->dtim_count != 0)
574 return tim->bitmap_ctrl & 0x01;
583 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
585 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
587 if (skb->len < 24 + 8 + 2 + 2)
590 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
592 if (sc->ps_flags & PS_BEACON_SYNC) {
593 sc->ps_flags &= ~PS_BEACON_SYNC;
595 "Reconfigure Beacon timers based on timestamp from the AP\n");
599 if (ath_beacon_dtim_pending_cab(skb)) {
601 * Remain awake waiting for buffered broadcast/multicast
602 * frames. If the last broadcast/multicast frame is not
603 * received properly, the next beacon frame will work as
604 * a backup trigger for returning into NETWORK SLEEP state,
605 * so we are waiting for it as well.
608 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
609 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
613 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
615 * This can happen if a broadcast frame is dropped or the AP
616 * fails to send a frame indicating that all CAB frames have
619 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
620 ath_dbg(common, PS, "PS wait for CAB frames timed out\n");
624 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb, bool mybeacon)
626 struct ieee80211_hdr *hdr;
627 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
629 hdr = (struct ieee80211_hdr *)skb->data;
631 /* Process Beacon and CAB receive in PS state */
632 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
634 ath_rx_ps_beacon(sc, skb);
635 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
636 (ieee80211_is_data(hdr->frame_control) ||
637 ieee80211_is_action(hdr->frame_control)) &&
638 is_multicast_ether_addr(hdr->addr1) &&
639 !ieee80211_has_moredata(hdr->frame_control)) {
641 * No more broadcast/multicast frames to be received at this
644 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
646 "All PS CAB frames received, back to sleep\n");
647 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
648 !is_multicast_ether_addr(hdr->addr1) &&
649 !ieee80211_has_morefrags(hdr->frame_control)) {
650 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
652 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
653 sc->ps_flags & (PS_WAIT_FOR_BEACON |
655 PS_WAIT_FOR_PSPOLL_DATA |
656 PS_WAIT_FOR_TX_ACK));
660 static bool ath_edma_get_buffers(struct ath_softc *sc,
661 enum ath9k_rx_qtype qtype)
663 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
664 struct ath_hw *ah = sc->sc_ah;
665 struct ath_common *common = ath9k_hw_common(ah);
670 skb = skb_peek(&rx_edma->rx_fifo);
674 bf = SKB_CB_ATHBUF(skb);
677 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
678 common->rx_bufsize, DMA_FROM_DEVICE);
680 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
681 if (ret == -EINPROGRESS) {
682 /*let device gain the buffer again*/
683 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
684 common->rx_bufsize, DMA_FROM_DEVICE);
688 __skb_unlink(skb, &rx_edma->rx_fifo);
689 if (ret == -EINVAL) {
690 /* corrupt descriptor, skip this one and the following one */
691 list_add_tail(&bf->list, &sc->rx.rxbuf);
692 ath_rx_edma_buf_link(sc, qtype);
693 skb = skb_peek(&rx_edma->rx_fifo);
697 bf = SKB_CB_ATHBUF(skb);
700 __skb_unlink(skb, &rx_edma->rx_fifo);
701 list_add_tail(&bf->list, &sc->rx.rxbuf);
702 ath_rx_edma_buf_link(sc, qtype);
705 skb_queue_tail(&rx_edma->rx_buffers, skb);
710 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
711 struct ath_rx_status *rs,
712 enum ath9k_rx_qtype qtype)
714 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
718 while (ath_edma_get_buffers(sc, qtype));
719 skb = __skb_dequeue(&rx_edma->rx_buffers);
723 bf = SKB_CB_ATHBUF(skb);
724 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
728 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
729 struct ath_rx_status *rs)
731 struct ath_hw *ah = sc->sc_ah;
732 struct ath_common *common = ath9k_hw_common(ah);
737 if (list_empty(&sc->rx.rxbuf)) {
738 sc->rx.rxlink = NULL;
742 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
746 * Must provide the virtual address of the current
747 * descriptor, the physical address, and the virtual
748 * address of the next descriptor in the h/w chain.
749 * This allows the HAL to look ahead to see if the
750 * hardware is done with a descriptor by checking the
751 * done bit in the following descriptor and the address
752 * of the current descriptor the DMA engine is working
753 * on. All this is necessary because of our use of
754 * a self-linked list to avoid rx overruns.
756 ret = ath9k_hw_rxprocdesc(ah, ds, rs);
757 if (ret == -EINPROGRESS) {
758 struct ath_rx_status trs;
760 struct ath_desc *tds;
762 memset(&trs, 0, sizeof(trs));
763 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
764 sc->rx.rxlink = NULL;
768 tbf = list_entry(bf->list.next, struct ath_buf, list);
771 * On some hardware the descriptor status words could
772 * get corrupted, including the done bit. Because of
773 * this, check if the next descriptor's done bit is
776 * If the next descriptor's done bit is set, the current
777 * descriptor has been corrupted. Force s/w to discard
778 * this descriptor and continue...
782 ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
783 if (ret == -EINPROGRESS)
791 * Synchronize the DMA transfer with CPU before
792 * 1. accessing the frame
793 * 2. requeueing the same buffer to h/w
795 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
802 /* Assumes you've already done the endian to CPU conversion */
803 static bool ath9k_rx_accept(struct ath_common *common,
804 struct ieee80211_hdr *hdr,
805 struct ieee80211_rx_status *rxs,
806 struct ath_rx_status *rx_stats,
809 struct ath_softc *sc = (struct ath_softc *) common->priv;
810 bool is_mc, is_valid_tkip, strip_mic, mic_error;
811 struct ath_hw *ah = common->ah;
813 u8 rx_status_len = ah->caps.rx_status_len;
815 fc = hdr->frame_control;
817 is_mc = !!is_multicast_ether_addr(hdr->addr1);
818 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
819 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
820 strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
821 !(rx_stats->rs_status &
822 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
823 ATH9K_RXERR_KEYMISS));
825 if (!rx_stats->rs_datalen)
828 * rs_status follows rs_datalen so if rs_datalen is too large
829 * we can take a hint that hardware corrupted it, so ignore
832 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
835 /* Only use error bits from the last fragment */
836 if (rx_stats->rs_more)
839 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
840 !ieee80211_has_morefrags(fc) &&
841 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
842 (rx_stats->rs_status & ATH9K_RXERR_MIC);
845 * The rx_stats->rs_status will not be set until the end of the
846 * chained descriptors so it can be ignored if rs_more is set. The
847 * rs_more will be false at the last element of the chained
850 if (rx_stats->rs_status != 0) {
853 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
854 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
857 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
860 if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
861 (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
862 *decrypt_error = true;
867 * Reject error frames with the exception of
868 * decryption and MIC failures. For monitor mode,
869 * we also ignore the CRC error.
871 status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
874 if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
875 status_mask |= ATH9K_RXERR_CRC;
877 if (rx_stats->rs_status & ~status_mask)
882 * For unicast frames the MIC error bit can have false positives,
883 * so all MIC error reports need to be validated in software.
884 * False negatives are not common, so skip software verification
885 * if the hardware considers the MIC valid.
888 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
889 else if (is_mc && mic_error)
890 rxs->flag |= RX_FLAG_MMIC_ERROR;
895 static int ath9k_process_rate(struct ath_common *common,
896 struct ieee80211_hw *hw,
897 struct ath_rx_status *rx_stats,
898 struct ieee80211_rx_status *rxs)
900 struct ieee80211_supported_band *sband;
901 enum ieee80211_band band;
904 band = hw->conf.channel->band;
905 sband = hw->wiphy->bands[band];
907 if (rx_stats->rs_rate & 0x80) {
909 rxs->flag |= RX_FLAG_HT;
910 if (rx_stats->rs_flags & ATH9K_RX_2040)
911 rxs->flag |= RX_FLAG_40MHZ;
912 if (rx_stats->rs_flags & ATH9K_RX_GI)
913 rxs->flag |= RX_FLAG_SHORT_GI;
914 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
918 for (i = 0; i < sband->n_bitrates; i++) {
919 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
923 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
924 rxs->flag |= RX_FLAG_SHORTPRE;
931 * No valid hardware bitrate found -- we should not get here
932 * because hardware has already validated this frame as OK.
935 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
941 static void ath9k_process_rssi(struct ath_common *common,
942 struct ieee80211_hw *hw,
943 struct ieee80211_hdr *hdr,
944 struct ath_rx_status *rx_stats)
946 struct ath_softc *sc = hw->priv;
947 struct ath_hw *ah = common->ah;
950 if (!rx_stats->is_mybeacon ||
951 ((ah->opmode != NL80211_IFTYPE_STATION) &&
952 (ah->opmode != NL80211_IFTYPE_ADHOC)))
955 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
956 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
958 last_rssi = sc->last_rssi;
959 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
960 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
961 ATH_RSSI_EP_MULTIPLIER);
962 if (rx_stats->rs_rssi < 0)
963 rx_stats->rs_rssi = 0;
965 /* Update Beacon RSSI, this is used by ANI. */
966 ah->stats.avgbrssi = rx_stats->rs_rssi;
970 * For Decrypt or Demic errors, we only mark packet status here and always push
971 * up the frame up to let mac80211 handle the actual error case, be it no
972 * decryption key or real decryption error. This let us keep statistics there.
974 static int ath9k_rx_skb_preprocess(struct ath_common *common,
975 struct ieee80211_hw *hw,
976 struct ieee80211_hdr *hdr,
977 struct ath_rx_status *rx_stats,
978 struct ieee80211_rx_status *rx_status,
981 struct ath_hw *ah = common->ah;
983 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
986 * everything but the rate is checked here, the rate check is done
987 * separately to avoid doing two lookups for a rate for each frame.
989 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
992 /* Only use status info from the last fragment */
993 if (rx_stats->rs_more)
996 ath9k_process_rssi(common, hw, hdr, rx_stats);
998 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1001 rx_status->band = hw->conf.channel->band;
1002 rx_status->freq = hw->conf.channel->center_freq;
1003 rx_status->signal = ah->noise + rx_stats->rs_rssi;
1004 rx_status->antenna = rx_stats->rs_antenna;
1005 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1010 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1011 struct sk_buff *skb,
1012 struct ath_rx_status *rx_stats,
1013 struct ieee80211_rx_status *rxs,
1016 struct ath_hw *ah = common->ah;
1017 struct ieee80211_hdr *hdr;
1018 int hdrlen, padpos, padsize;
1022 /* see if any padding is done by the hw and remove it */
1023 hdr = (struct ieee80211_hdr *) skb->data;
1024 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1025 fc = hdr->frame_control;
1026 padpos = ath9k_cmn_padpos(hdr->frame_control);
1028 /* The MAC header is padded to have 32-bit boundary if the
1029 * packet payload is non-zero. The general calculation for
1030 * padsize would take into account odd header lengths:
1031 * padsize = (4 - padpos % 4) % 4; However, since only
1032 * even-length headers are used, padding can only be 0 or 2
1033 * bytes and we can optimize this a bit. In addition, we must
1034 * not try to remove padding from short control frames that do
1035 * not have payload. */
1036 padsize = padpos & 3;
1037 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1038 memmove(skb->data + padsize, skb->data, padpos);
1039 skb_pull(skb, padsize);
1042 keyix = rx_stats->rs_keyix;
1044 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1045 ieee80211_has_protected(fc)) {
1046 rxs->flag |= RX_FLAG_DECRYPTED;
1047 } else if (ieee80211_has_protected(fc)
1048 && !decrypt_error && skb->len >= hdrlen + 4) {
1049 keyix = skb->data[hdrlen + 3] >> 6;
1051 if (test_bit(keyix, common->keymap))
1052 rxs->flag |= RX_FLAG_DECRYPTED;
1054 if (ah->sw_mgmt_crypto &&
1055 (rxs->flag & RX_FLAG_DECRYPTED) &&
1056 ieee80211_is_mgmt(fc))
1057 /* Use software decrypt for management frames. */
1058 rxs->flag &= ~RX_FLAG_DECRYPTED;
1061 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1062 struct ath_hw_antcomb_conf ant_conf,
1065 antcomb->quick_scan_cnt = 0;
1067 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1068 antcomb->rssi_lna2 = main_rssi_avg;
1069 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1070 antcomb->rssi_lna1 = main_rssi_avg;
1072 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1073 case 0x10: /* LNA2 A-B */
1074 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1075 antcomb->first_quick_scan_conf =
1076 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1077 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1079 case 0x20: /* LNA1 A-B */
1080 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1081 antcomb->first_quick_scan_conf =
1082 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1083 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1085 case 0x21: /* LNA1 LNA2 */
1086 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1087 antcomb->first_quick_scan_conf =
1088 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1089 antcomb->second_quick_scan_conf =
1090 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1092 case 0x12: /* LNA2 LNA1 */
1093 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1094 antcomb->first_quick_scan_conf =
1095 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1096 antcomb->second_quick_scan_conf =
1097 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1099 case 0x13: /* LNA2 A+B */
1100 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1101 antcomb->first_quick_scan_conf =
1102 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1103 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1105 case 0x23: /* LNA1 A+B */
1106 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1107 antcomb->first_quick_scan_conf =
1108 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1109 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1116 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1117 struct ath_hw_antcomb_conf *div_ant_conf,
1118 int main_rssi_avg, int alt_rssi_avg,
1122 switch (antcomb->quick_scan_cnt) {
1124 /* set alt to main, and alt to first conf */
1125 div_ant_conf->main_lna_conf = antcomb->main_conf;
1126 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1129 /* set alt to main, and alt to first conf */
1130 div_ant_conf->main_lna_conf = antcomb->main_conf;
1131 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1132 antcomb->rssi_first = main_rssi_avg;
1133 antcomb->rssi_second = alt_rssi_avg;
1135 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1137 if (ath_is_alt_ant_ratio_better(alt_ratio,
1138 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1139 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1140 main_rssi_avg, alt_rssi_avg,
1141 antcomb->total_pkt_count))
1142 antcomb->first_ratio = true;
1144 antcomb->first_ratio = false;
1145 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1146 if (ath_is_alt_ant_ratio_better(alt_ratio,
1147 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1148 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1149 main_rssi_avg, alt_rssi_avg,
1150 antcomb->total_pkt_count))
1151 antcomb->first_ratio = true;
1153 antcomb->first_ratio = false;
1155 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1156 (alt_rssi_avg > main_rssi_avg +
1157 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1158 (alt_rssi_avg > main_rssi_avg)) &&
1159 (antcomb->total_pkt_count > 50))
1160 antcomb->first_ratio = true;
1162 antcomb->first_ratio = false;
1166 antcomb->alt_good = false;
1167 antcomb->scan_not_start = false;
1168 antcomb->scan = false;
1169 antcomb->rssi_first = main_rssi_avg;
1170 antcomb->rssi_third = alt_rssi_avg;
1172 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1173 antcomb->rssi_lna1 = alt_rssi_avg;
1174 else if (antcomb->second_quick_scan_conf ==
1175 ATH_ANT_DIV_COMB_LNA2)
1176 antcomb->rssi_lna2 = alt_rssi_avg;
1177 else if (antcomb->second_quick_scan_conf ==
1178 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1179 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1180 antcomb->rssi_lna2 = main_rssi_avg;
1181 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1182 antcomb->rssi_lna1 = main_rssi_avg;
1185 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1186 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1187 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1189 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1191 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1192 if (ath_is_alt_ant_ratio_better(alt_ratio,
1193 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1194 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1195 main_rssi_avg, alt_rssi_avg,
1196 antcomb->total_pkt_count))
1197 antcomb->second_ratio = true;
1199 antcomb->second_ratio = false;
1200 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1201 if (ath_is_alt_ant_ratio_better(alt_ratio,
1202 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1203 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1204 main_rssi_avg, alt_rssi_avg,
1205 antcomb->total_pkt_count))
1206 antcomb->second_ratio = true;
1208 antcomb->second_ratio = false;
1210 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1211 (alt_rssi_avg > main_rssi_avg +
1212 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1213 (alt_rssi_avg > main_rssi_avg)) &&
1214 (antcomb->total_pkt_count > 50))
1215 antcomb->second_ratio = true;
1217 antcomb->second_ratio = false;
1220 /* set alt to the conf with maximun ratio */
1221 if (antcomb->first_ratio && antcomb->second_ratio) {
1222 if (antcomb->rssi_second > antcomb->rssi_third) {
1224 if ((antcomb->first_quick_scan_conf ==
1225 ATH_ANT_DIV_COMB_LNA1) ||
1226 (antcomb->first_quick_scan_conf ==
1227 ATH_ANT_DIV_COMB_LNA2))
1228 /* Set alt LNA1 or LNA2*/
1229 if (div_ant_conf->main_lna_conf ==
1230 ATH_ANT_DIV_COMB_LNA2)
1231 div_ant_conf->alt_lna_conf =
1232 ATH_ANT_DIV_COMB_LNA1;
1234 div_ant_conf->alt_lna_conf =
1235 ATH_ANT_DIV_COMB_LNA2;
1237 /* Set alt to A+B or A-B */
1238 div_ant_conf->alt_lna_conf =
1239 antcomb->first_quick_scan_conf;
1240 } else if ((antcomb->second_quick_scan_conf ==
1241 ATH_ANT_DIV_COMB_LNA1) ||
1242 (antcomb->second_quick_scan_conf ==
1243 ATH_ANT_DIV_COMB_LNA2)) {
1244 /* Set alt LNA1 or LNA2 */
1245 if (div_ant_conf->main_lna_conf ==
1246 ATH_ANT_DIV_COMB_LNA2)
1247 div_ant_conf->alt_lna_conf =
1248 ATH_ANT_DIV_COMB_LNA1;
1250 div_ant_conf->alt_lna_conf =
1251 ATH_ANT_DIV_COMB_LNA2;
1253 /* Set alt to A+B or A-B */
1254 div_ant_conf->alt_lna_conf =
1255 antcomb->second_quick_scan_conf;
1257 } else if (antcomb->first_ratio) {
1259 if ((antcomb->first_quick_scan_conf ==
1260 ATH_ANT_DIV_COMB_LNA1) ||
1261 (antcomb->first_quick_scan_conf ==
1262 ATH_ANT_DIV_COMB_LNA2))
1263 /* Set alt LNA1 or LNA2 */
1264 if (div_ant_conf->main_lna_conf ==
1265 ATH_ANT_DIV_COMB_LNA2)
1266 div_ant_conf->alt_lna_conf =
1267 ATH_ANT_DIV_COMB_LNA1;
1269 div_ant_conf->alt_lna_conf =
1270 ATH_ANT_DIV_COMB_LNA2;
1272 /* Set alt to A+B or A-B */
1273 div_ant_conf->alt_lna_conf =
1274 antcomb->first_quick_scan_conf;
1275 } else if (antcomb->second_ratio) {
1277 if ((antcomb->second_quick_scan_conf ==
1278 ATH_ANT_DIV_COMB_LNA1) ||
1279 (antcomb->second_quick_scan_conf ==
1280 ATH_ANT_DIV_COMB_LNA2))
1281 /* Set alt LNA1 or LNA2 */
1282 if (div_ant_conf->main_lna_conf ==
1283 ATH_ANT_DIV_COMB_LNA2)
1284 div_ant_conf->alt_lna_conf =
1285 ATH_ANT_DIV_COMB_LNA1;
1287 div_ant_conf->alt_lna_conf =
1288 ATH_ANT_DIV_COMB_LNA2;
1290 /* Set alt to A+B or A-B */
1291 div_ant_conf->alt_lna_conf =
1292 antcomb->second_quick_scan_conf;
1294 /* main is largest */
1295 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1296 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1297 /* Set alt LNA1 or LNA2 */
1298 if (div_ant_conf->main_lna_conf ==
1299 ATH_ANT_DIV_COMB_LNA2)
1300 div_ant_conf->alt_lna_conf =
1301 ATH_ANT_DIV_COMB_LNA1;
1303 div_ant_conf->alt_lna_conf =
1304 ATH_ANT_DIV_COMB_LNA2;
1306 /* Set alt to A+B or A-B */
1307 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1315 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1316 struct ath_ant_comb *antcomb, int alt_ratio)
1318 if (ant_conf->div_group == 0) {
1319 /* Adjust the fast_div_bias based on main and alt lna conf */
1320 switch ((ant_conf->main_lna_conf << 4) |
1321 ant_conf->alt_lna_conf) {
1322 case 0x01: /* A-B LNA2 */
1323 ant_conf->fast_div_bias = 0x3b;
1325 case 0x02: /* A-B LNA1 */
1326 ant_conf->fast_div_bias = 0x3d;
1328 case 0x03: /* A-B A+B */
1329 ant_conf->fast_div_bias = 0x1;
1331 case 0x10: /* LNA2 A-B */
1332 ant_conf->fast_div_bias = 0x7;
1334 case 0x12: /* LNA2 LNA1 */
1335 ant_conf->fast_div_bias = 0x2;
1337 case 0x13: /* LNA2 A+B */
1338 ant_conf->fast_div_bias = 0x7;
1340 case 0x20: /* LNA1 A-B */
1341 ant_conf->fast_div_bias = 0x6;
1343 case 0x21: /* LNA1 LNA2 */
1344 ant_conf->fast_div_bias = 0x0;
1346 case 0x23: /* LNA1 A+B */
1347 ant_conf->fast_div_bias = 0x6;
1349 case 0x30: /* A+B A-B */
1350 ant_conf->fast_div_bias = 0x1;
1352 case 0x31: /* A+B LNA2 */
1353 ant_conf->fast_div_bias = 0x3b;
1355 case 0x32: /* A+B LNA1 */
1356 ant_conf->fast_div_bias = 0x3d;
1361 } else if (ant_conf->div_group == 1) {
1362 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1363 switch ((ant_conf->main_lna_conf << 4) |
1364 ant_conf->alt_lna_conf) {
1365 case 0x01: /* A-B LNA2 */
1366 ant_conf->fast_div_bias = 0x1;
1367 ant_conf->main_gaintb = 0;
1368 ant_conf->alt_gaintb = 0;
1370 case 0x02: /* A-B LNA1 */
1371 ant_conf->fast_div_bias = 0x1;
1372 ant_conf->main_gaintb = 0;
1373 ant_conf->alt_gaintb = 0;
1375 case 0x03: /* A-B A+B */
1376 ant_conf->fast_div_bias = 0x1;
1377 ant_conf->main_gaintb = 0;
1378 ant_conf->alt_gaintb = 0;
1380 case 0x10: /* LNA2 A-B */
1381 if (!(antcomb->scan) &&
1382 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1383 ant_conf->fast_div_bias = 0x3f;
1385 ant_conf->fast_div_bias = 0x1;
1386 ant_conf->main_gaintb = 0;
1387 ant_conf->alt_gaintb = 0;
1389 case 0x12: /* LNA2 LNA1 */
1390 ant_conf->fast_div_bias = 0x1;
1391 ant_conf->main_gaintb = 0;
1392 ant_conf->alt_gaintb = 0;
1394 case 0x13: /* LNA2 A+B */
1395 if (!(antcomb->scan) &&
1396 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1397 ant_conf->fast_div_bias = 0x3f;
1399 ant_conf->fast_div_bias = 0x1;
1400 ant_conf->main_gaintb = 0;
1401 ant_conf->alt_gaintb = 0;
1403 case 0x20: /* LNA1 A-B */
1404 if (!(antcomb->scan) &&
1405 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1406 ant_conf->fast_div_bias = 0x3f;
1408 ant_conf->fast_div_bias = 0x1;
1409 ant_conf->main_gaintb = 0;
1410 ant_conf->alt_gaintb = 0;
1412 case 0x21: /* LNA1 LNA2 */
1413 ant_conf->fast_div_bias = 0x1;
1414 ant_conf->main_gaintb = 0;
1415 ant_conf->alt_gaintb = 0;
1417 case 0x23: /* LNA1 A+B */
1418 if (!(antcomb->scan) &&
1419 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1420 ant_conf->fast_div_bias = 0x3f;
1422 ant_conf->fast_div_bias = 0x1;
1423 ant_conf->main_gaintb = 0;
1424 ant_conf->alt_gaintb = 0;
1426 case 0x30: /* A+B A-B */
1427 ant_conf->fast_div_bias = 0x1;
1428 ant_conf->main_gaintb = 0;
1429 ant_conf->alt_gaintb = 0;
1431 case 0x31: /* A+B LNA2 */
1432 ant_conf->fast_div_bias = 0x1;
1433 ant_conf->main_gaintb = 0;
1434 ant_conf->alt_gaintb = 0;
1436 case 0x32: /* A+B LNA1 */
1437 ant_conf->fast_div_bias = 0x1;
1438 ant_conf->main_gaintb = 0;
1439 ant_conf->alt_gaintb = 0;
1444 } else if (ant_conf->div_group == 2) {
1445 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1446 switch ((ant_conf->main_lna_conf << 4) |
1447 ant_conf->alt_lna_conf) {
1448 case 0x01: /* A-B LNA2 */
1449 ant_conf->fast_div_bias = 0x1;
1450 ant_conf->main_gaintb = 0;
1451 ant_conf->alt_gaintb = 0;
1453 case 0x02: /* A-B LNA1 */
1454 ant_conf->fast_div_bias = 0x1;
1455 ant_conf->main_gaintb = 0;
1456 ant_conf->alt_gaintb = 0;
1458 case 0x03: /* A-B A+B */
1459 ant_conf->fast_div_bias = 0x1;
1460 ant_conf->main_gaintb = 0;
1461 ant_conf->alt_gaintb = 0;
1463 case 0x10: /* LNA2 A-B */
1464 if (!(antcomb->scan) &&
1465 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1466 ant_conf->fast_div_bias = 0x1;
1468 ant_conf->fast_div_bias = 0x2;
1469 ant_conf->main_gaintb = 0;
1470 ant_conf->alt_gaintb = 0;
1472 case 0x12: /* LNA2 LNA1 */
1473 ant_conf->fast_div_bias = 0x1;
1474 ant_conf->main_gaintb = 0;
1475 ant_conf->alt_gaintb = 0;
1477 case 0x13: /* LNA2 A+B */
1478 if (!(antcomb->scan) &&
1479 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1480 ant_conf->fast_div_bias = 0x1;
1482 ant_conf->fast_div_bias = 0x2;
1483 ant_conf->main_gaintb = 0;
1484 ant_conf->alt_gaintb = 0;
1486 case 0x20: /* LNA1 A-B */
1487 if (!(antcomb->scan) &&
1488 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1489 ant_conf->fast_div_bias = 0x1;
1491 ant_conf->fast_div_bias = 0x2;
1492 ant_conf->main_gaintb = 0;
1493 ant_conf->alt_gaintb = 0;
1495 case 0x21: /* LNA1 LNA2 */
1496 ant_conf->fast_div_bias = 0x1;
1497 ant_conf->main_gaintb = 0;
1498 ant_conf->alt_gaintb = 0;
1500 case 0x23: /* LNA1 A+B */
1501 if (!(antcomb->scan) &&
1502 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1503 ant_conf->fast_div_bias = 0x1;
1505 ant_conf->fast_div_bias = 0x2;
1506 ant_conf->main_gaintb = 0;
1507 ant_conf->alt_gaintb = 0;
1509 case 0x30: /* A+B A-B */
1510 ant_conf->fast_div_bias = 0x1;
1511 ant_conf->main_gaintb = 0;
1512 ant_conf->alt_gaintb = 0;
1514 case 0x31: /* A+B LNA2 */
1515 ant_conf->fast_div_bias = 0x1;
1516 ant_conf->main_gaintb = 0;
1517 ant_conf->alt_gaintb = 0;
1519 case 0x32: /* A+B LNA1 */
1520 ant_conf->fast_div_bias = 0x1;
1521 ant_conf->main_gaintb = 0;
1522 ant_conf->alt_gaintb = 0;
1530 /* Antenna diversity and combining */
1531 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1533 struct ath_hw_antcomb_conf div_ant_conf;
1534 struct ath_ant_comb *antcomb = &sc->ant_comb;
1535 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1537 int main_rssi = rs->rs_rssi_ctl0;
1538 int alt_rssi = rs->rs_rssi_ctl1;
1539 int rx_ant_conf, main_ant_conf;
1540 bool short_scan = false;
1542 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1544 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1547 /* Record packet only when both main_rssi and alt_rssi is positive */
1548 if (main_rssi > 0 && alt_rssi > 0) {
1549 antcomb->total_pkt_count++;
1550 antcomb->main_total_rssi += main_rssi;
1551 antcomb->alt_total_rssi += alt_rssi;
1552 if (main_ant_conf == rx_ant_conf)
1553 antcomb->main_recv_cnt++;
1555 antcomb->alt_recv_cnt++;
1558 /* Short scan check */
1559 if (antcomb->scan && antcomb->alt_good) {
1560 if (time_after(jiffies, antcomb->scan_start_time +
1561 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1564 if (antcomb->total_pkt_count ==
1565 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1566 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1567 antcomb->total_pkt_count);
1568 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1573 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1574 rs->rs_moreaggr) && !short_scan)
1577 if (antcomb->total_pkt_count) {
1578 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1579 antcomb->total_pkt_count);
1580 main_rssi_avg = (antcomb->main_total_rssi /
1581 antcomb->total_pkt_count);
1582 alt_rssi_avg = (antcomb->alt_total_rssi /
1583 antcomb->total_pkt_count);
1587 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1588 curr_alt_set = div_ant_conf.alt_lna_conf;
1589 curr_main_set = div_ant_conf.main_lna_conf;
1593 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1594 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1595 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1597 antcomb->alt_good = true;
1599 antcomb->alt_good = false;
1603 antcomb->scan = true;
1604 antcomb->scan_not_start = true;
1607 if (!antcomb->scan) {
1608 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1609 alt_ratio, curr_main_set, curr_alt_set,
1610 alt_rssi_avg, main_rssi_avg)) {
1611 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1612 /* Switch main and alt LNA */
1613 div_ant_conf.main_lna_conf =
1614 ATH_ANT_DIV_COMB_LNA2;
1615 div_ant_conf.alt_lna_conf =
1616 ATH_ANT_DIV_COMB_LNA1;
1617 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1618 div_ant_conf.main_lna_conf =
1619 ATH_ANT_DIV_COMB_LNA1;
1620 div_ant_conf.alt_lna_conf =
1621 ATH_ANT_DIV_COMB_LNA2;
1625 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1626 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1627 /* Set alt to another LNA */
1628 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1629 div_ant_conf.alt_lna_conf =
1630 ATH_ANT_DIV_COMB_LNA1;
1631 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1632 div_ant_conf.alt_lna_conf =
1633 ATH_ANT_DIV_COMB_LNA2;
1638 if ((alt_rssi_avg < (main_rssi_avg +
1639 div_ant_conf.lna1_lna2_delta)))
1643 if (!antcomb->scan_not_start) {
1644 switch (curr_alt_set) {
1645 case ATH_ANT_DIV_COMB_LNA2:
1646 antcomb->rssi_lna2 = alt_rssi_avg;
1647 antcomb->rssi_lna1 = main_rssi_avg;
1648 antcomb->scan = true;
1650 div_ant_conf.main_lna_conf =
1651 ATH_ANT_DIV_COMB_LNA1;
1652 div_ant_conf.alt_lna_conf =
1653 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1655 case ATH_ANT_DIV_COMB_LNA1:
1656 antcomb->rssi_lna1 = alt_rssi_avg;
1657 antcomb->rssi_lna2 = main_rssi_avg;
1658 antcomb->scan = true;
1660 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1661 div_ant_conf.alt_lna_conf =
1662 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1664 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1665 antcomb->rssi_add = alt_rssi_avg;
1666 antcomb->scan = true;
1668 div_ant_conf.alt_lna_conf =
1669 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1671 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1672 antcomb->rssi_sub = alt_rssi_avg;
1673 antcomb->scan = false;
1674 if (antcomb->rssi_lna2 >
1675 (antcomb->rssi_lna1 +
1676 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1677 /* use LNA2 as main LNA */
1678 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1679 (antcomb->rssi_add > antcomb->rssi_sub)) {
1681 div_ant_conf.main_lna_conf =
1682 ATH_ANT_DIV_COMB_LNA2;
1683 div_ant_conf.alt_lna_conf =
1684 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1685 } else if (antcomb->rssi_sub >
1686 antcomb->rssi_lna1) {
1688 div_ant_conf.main_lna_conf =
1689 ATH_ANT_DIV_COMB_LNA2;
1690 div_ant_conf.alt_lna_conf =
1691 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1694 div_ant_conf.main_lna_conf =
1695 ATH_ANT_DIV_COMB_LNA2;
1696 div_ant_conf.alt_lna_conf =
1697 ATH_ANT_DIV_COMB_LNA1;
1700 /* use LNA1 as main LNA */
1701 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1702 (antcomb->rssi_add > antcomb->rssi_sub)) {
1704 div_ant_conf.main_lna_conf =
1705 ATH_ANT_DIV_COMB_LNA1;
1706 div_ant_conf.alt_lna_conf =
1707 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1708 } else if (antcomb->rssi_sub >
1709 antcomb->rssi_lna1) {
1711 div_ant_conf.main_lna_conf =
1712 ATH_ANT_DIV_COMB_LNA1;
1713 div_ant_conf.alt_lna_conf =
1714 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1717 div_ant_conf.main_lna_conf =
1718 ATH_ANT_DIV_COMB_LNA1;
1719 div_ant_conf.alt_lna_conf =
1720 ATH_ANT_DIV_COMB_LNA2;
1728 if (!antcomb->alt_good) {
1729 antcomb->scan_not_start = false;
1730 /* Set alt to another LNA */
1731 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1732 div_ant_conf.main_lna_conf =
1733 ATH_ANT_DIV_COMB_LNA2;
1734 div_ant_conf.alt_lna_conf =
1735 ATH_ANT_DIV_COMB_LNA1;
1736 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1737 div_ant_conf.main_lna_conf =
1738 ATH_ANT_DIV_COMB_LNA1;
1739 div_ant_conf.alt_lna_conf =
1740 ATH_ANT_DIV_COMB_LNA2;
1746 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1747 main_rssi_avg, alt_rssi_avg,
1750 antcomb->quick_scan_cnt++;
1753 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1754 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1756 antcomb->scan_start_time = jiffies;
1757 antcomb->total_pkt_count = 0;
1758 antcomb->main_total_rssi = 0;
1759 antcomb->alt_total_rssi = 0;
1760 antcomb->main_recv_cnt = 0;
1761 antcomb->alt_recv_cnt = 0;
1764 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1767 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1768 struct ieee80211_rx_status *rxs;
1769 struct ath_hw *ah = sc->sc_ah;
1770 struct ath_common *common = ath9k_hw_common(ah);
1771 struct ieee80211_hw *hw = sc->hw;
1772 struct ieee80211_hdr *hdr;
1774 bool decrypt_error = false;
1775 struct ath_rx_status rs;
1776 enum ath9k_rx_qtype qtype;
1777 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1779 u8 rx_status_len = ah->caps.rx_status_len;
1782 unsigned long flags;
1785 dma_type = DMA_BIDIRECTIONAL;
1787 dma_type = DMA_FROM_DEVICE;
1789 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1790 spin_lock_bh(&sc->rx.rxbuflock);
1792 tsf = ath9k_hw_gettsf64(ah);
1793 tsf_lower = tsf & 0xffffffff;
1796 /* If handling rx interrupt and flush is in progress => exit */
1797 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1800 memset(&rs, 0, sizeof(rs));
1802 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1804 bf = ath_get_next_rx_buf(sc, &rs);
1814 * Take frame header from the first fragment and RX status from
1818 hdr_skb = sc->rx.frag;
1822 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1823 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1824 if (ieee80211_is_beacon(hdr->frame_control) &&
1825 !is_zero_ether_addr(common->curbssid) &&
1826 !compare_ether_addr(hdr->addr3, common->curbssid))
1827 rs.is_mybeacon = true;
1829 rs.is_mybeacon = false;
1831 ath_debug_stat_rx(sc, &rs);
1834 * If we're asked to flush receive queue, directly
1835 * chain it back at the queue without processing it.
1837 if (sc->sc_flags & SC_OP_RXFLUSH)
1838 goto requeue_drop_frag;
1840 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1841 if (rs.rs_tstamp > tsf_lower &&
1842 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1843 rxs->mactime -= 0x100000000ULL;
1845 if (rs.rs_tstamp < tsf_lower &&
1846 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1847 rxs->mactime += 0x100000000ULL;
1849 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1850 rxs, &decrypt_error);
1852 goto requeue_drop_frag;
1854 /* Ensure we always have an skb to requeue once we are done
1855 * processing the current buffer's skb */
1856 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1858 /* If there is no memory we ignore the current RX'd frame,
1859 * tell hardware it can give us a new frame using the old
1860 * skb and put it at the tail of the sc->rx.rxbuf list for
1863 goto requeue_drop_frag;
1865 /* Unmap the frame */
1866 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1870 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1871 if (ah->caps.rx_status_len)
1872 skb_pull(skb, ah->caps.rx_status_len);
1875 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1876 rxs, decrypt_error);
1878 /* We will now give hardware our shiny new allocated skb */
1879 bf->bf_mpdu = requeue_skb;
1880 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1883 if (unlikely(dma_mapping_error(sc->dev,
1884 bf->bf_buf_addr))) {
1885 dev_kfree_skb_any(requeue_skb);
1887 bf->bf_buf_addr = 0;
1888 ath_err(common, "dma_mapping_error() on RX\n");
1889 ieee80211_rx(hw, skb);
1895 * rs_more indicates chained descriptors which can be
1896 * used to link buffers together for a sort of
1897 * scatter-gather operation.
1900 /* too many fragments - cannot handle frame */
1901 dev_kfree_skb_any(sc->rx.frag);
1902 dev_kfree_skb_any(skb);
1910 int space = skb->len - skb_tailroom(hdr_skb);
1914 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1916 goto requeue_drop_frag;
1919 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1921 dev_kfree_skb_any(skb);
1926 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
1929 * change the default rx antenna if rx diversity
1930 * chooses the other antenna 3 times in a row.
1932 if (sc->rx.defant != rs.rs_antenna) {
1933 if (++sc->rx.rxotherant >= 3)
1934 ath_setdefantenna(sc, rs.rs_antenna);
1936 sc->rx.rxotherant = 0;
1941 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1942 skb_trim(skb, skb->len - 8);
1944 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1946 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1948 PS_WAIT_FOR_PSPOLL_DATA)) ||
1949 ath9k_check_auto_sleep(sc))
1950 ath_rx_ps(sc, skb, rs.is_mybeacon);
1951 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1953 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
1954 ath_ant_comb_scan(sc, &rs);
1956 ieee80211_rx(hw, skb);
1960 dev_kfree_skb_any(sc->rx.frag);
1965 list_add_tail(&bf->list, &sc->rx.rxbuf);
1966 ath_rx_edma_buf_link(sc, qtype);
1968 list_move_tail(&bf->list, &sc->rx.rxbuf);
1969 ath_rx_buf_link(sc, bf);
1975 spin_unlock_bh(&sc->rx.rxbuflock);
1977 if (!(ah->imask & ATH9K_INT_RXEOL)) {
1978 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
1979 ath9k_hw_set_interrupts(ah);