drivers/net/wireless/ath/ath9k/wmi.h

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef WMI_H
  18 #define WMI_H
  19
  20
  21 struct wmi_event_txrate {
  22         __be32 txrate;
  23         struct {
  24                 u8 rssi_thresh;
  25                 u8 per;
  26         } rc_stats;
  27 } __packed;
  28
  29 struct wmi_cmd_hdr {
  30         __be16 command_id;
  31         __be16 seq_no;
  32 } __packed;
  33
  34 struct wmi_fw_version {
  35         __be16 major;
  36         __be16 minor;
  37
  38 } __packed;
  39
  40 struct wmi_event_swba {
  41         __be64 tsf;
  42         u8 beacon_pending;
  43 };
  44 enum wmi_cmd_id {
  45         WMI_ECHO_CMDID = 0x0001,
  46         WMI_ACCESS_MEMORY_CMDID,
  47
  48         /* Commands to Target */
  49         WMI_GET_FW_VERSION,
  50         WMI_DISABLE_INTR_CMDID,
  51         WMI_ENABLE_INTR_CMDID,
  52         WMI_ATH_INIT_CMDID,
  53         WMI_ABORT_TXQ_CMDID,
  54         WMI_STOP_TX_DMA_CMDID,
  55         WMI_ABORT_TX_DMA_CMDID,
  56         WMI_DRAIN_TXQ_CMDID,
  57         WMI_DRAIN_TXQ_ALL_CMDID,
  58         WMI_START_RECV_CMDID,
  59         WMI_STOP_RECV_CMDID,
  60         WMI_FLUSH_RECV_CMDID,
  61         WMI_SET_MODE_CMDID,
  62         WMI_NODE_CREATE_CMDID,
  63         WMI_NODE_REMOVE_CMDID,
  64         WMI_VAP_REMOVE_CMDID,
  65         WMI_VAP_CREATE_CMDID,
  66         WMI_REG_READ_CMDID,
  67         WMI_REG_WRITE_CMDID,
  68         WMI_RC_STATE_CHANGE_CMDID,
  69         WMI_RC_RATE_UPDATE_CMDID,
  70         WMI_TARGET_IC_UPDATE_CMDID,
  71         WMI_TGT_STATS_CMDID,
  72         WMI_TX_AGGR_ENABLE_CMDID,
  73         WMI_TGT_DETACH_CMDID,
  74         WMI_AGGR_LIMIT_CMD = 0x0026,
  75 };
  76
  77 enum wmi_event_id {
  78         WMI_TGT_RDY_EVENTID = 0x1001,
  79         WMI_SWBA_EVENTID,
  80         WMI_FATAL_EVENTID,
  81         WMI_TXTO_EVENTID,
  82         WMI_BMISS_EVENTID,
  83         WMI_DELBA_EVENTID,
  84         WMI_TXRATE_EVENTID,
  85 };
  86
  87 #define MAX_CMD_NUMBER 62
  88
  89 struct register_write {
  90         __be32 reg;
  91         __be32 val;
  92 };
  93
  94 struct wmi {
  95         struct ath9k_htc_priv *drv_priv;
  96         struct htc_target *htc;
  97         enum htc_endpoint_id ctrl_epid;
  98         struct mutex op_mutex;
  99         struct completion cmd_wait;
 100         enum wmi_cmd_id last_cmd_id;
 101         struct sk_buff_head wmi_event_queue;
 102         struct tasklet_struct wmi_event_tasklet;
 103         u16 tx_seq_id;
 104         u8 *cmd_rsp_buf;
 105         u32 cmd_rsp_len;
 106         bool stopped;
 107
 108         spinlock_t wmi_lock;
 109
 110         atomic_t mwrite_cnt;
 111         struct register_write multi_write[MAX_CMD_NUMBER];
 112         u32 multi_write_idx;
 113         struct mutex multi_write_mutex;
 114 };
 115
 116 struct wmi *ath9k_init_wmi(struct ath9k_htc_priv *priv);
 117 void ath9k_deinit_wmi(struct ath9k_htc_priv *priv);
 118 int ath9k_wmi_connect(struct htc_target *htc, struct wmi *wmi,
 119                       enum htc_endpoint_id *wmi_ctrl_epid);
 120 int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
 121                   u8 *cmd_buf, u32 cmd_len,
 122                   u8 *rsp_buf, u32 rsp_len,
 123                   u32 timeout);
 124 void ath9k_wmi_event_tasklet(unsigned long data);
 125 void ath9k_fatal_work(struct work_struct *work);
 126 void ath9k_wmi_event_drain(struct ath9k_htc_priv *priv);
 127
 128 #define WMI_CMD(_wmi_cmd)                                               \
 129         do {                                                            \
 130                 ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd, NULL, 0,       \
 131                                     (u8 *) &cmd_rsp,                    \
 132                                     sizeof(cmd_rsp), HZ*2);             \
 133         } while (0)
 134
 135 #define WMI_CMD_BUF(_wmi_cmd, _buf)                                     \
 136         do {                                                            \
 137                 ret = ath9k_wmi_cmd(priv->wmi, _wmi_cmd,                \
 138                                     (u8 *) _buf, sizeof(*_buf),         \
 139                                     &cmd_rsp, sizeof(cmd_rsp), HZ*2);   \
 140         } while (0)
 141
 142 #endif /* WMI_H */