3 Broadcom B43 wireless driver
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
35 static u16 generate_cookie(struct b43_pio_txqueue *q,
36 struct b43_pio_txpacket *pack)
40 /* Use the upper 4 bits of the cookie as
41 * PIO controller ID and store the packet index number
42 * in the lower 12 bits.
43 * Note that the cookie must never be 0, as this
44 * is a special value used in RX path.
45 * It can also not be 0xFFFF because that is special
46 * for multicast frames.
48 cookie = (((u16)q->index + 1) << 12);
49 cookie |= pack->index;
55 struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
57 struct b43_pio_txpacket **pack)
59 struct b43_pio *pio = &dev->pio;
60 struct b43_pio_txqueue *q = NULL;
61 unsigned int pack_index;
63 switch (cookie & 0xF000) {
65 q = pio->tx_queue_AC_BK;
68 q = pio->tx_queue_AC_BE;
71 q = pio->tx_queue_AC_VI;
74 q = pio->tx_queue_AC_VO;
77 q = pio->tx_queue_mcast;
82 pack_index = (cookie & 0x0FFF);
83 if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
85 *pack = &q->packets[pack_index];
90 static u16 index_to_pioqueue_base(struct b43_wldev *dev,
93 static const u16 bases[] = {
103 static const u16 bases_rev11[] = {
104 B43_MMIO_PIO11_BASE0,
105 B43_MMIO_PIO11_BASE1,
106 B43_MMIO_PIO11_BASE2,
107 B43_MMIO_PIO11_BASE3,
108 B43_MMIO_PIO11_BASE4,
109 B43_MMIO_PIO11_BASE5,
112 if (dev->dev->id.revision >= 11) {
113 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
114 return bases_rev11[index];
116 B43_WARN_ON(index >= ARRAY_SIZE(bases));
120 static u16 pio_txqueue_offset(struct b43_wldev *dev)
122 if (dev->dev->id.revision >= 11)
127 static u16 pio_rxqueue_offset(struct b43_wldev *dev)
129 if (dev->dev->id.revision >= 11)
134 static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
137 struct b43_pio_txqueue *q;
138 struct b43_pio_txpacket *p;
141 q = kzalloc(sizeof(*q), GFP_KERNEL);
145 q->rev = dev->dev->id.revision;
146 q->mmio_base = index_to_pioqueue_base(dev, index) +
147 pio_txqueue_offset(dev);
150 q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
152 q->buffer_size = 1920; //FIXME this constant is wrong.
154 q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
155 q->buffer_size -= 80;
158 INIT_LIST_HEAD(&q->packets_list);
159 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
160 p = &(q->packets[i]);
161 INIT_LIST_HEAD(&p->list);
164 list_add(&p->list, &q->packets_list);
170 static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
173 struct b43_pio_rxqueue *q;
175 q = kzalloc(sizeof(*q), GFP_KERNEL);
179 q->rev = dev->dev->id.revision;
180 q->mmio_base = index_to_pioqueue_base(dev, index) +
181 pio_rxqueue_offset(dev);
183 /* Enable Direct FIFO RX (PIO) on the engine. */
184 b43_dma_direct_fifo_rx(dev, index, 1);
189 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
191 struct b43_pio_txpacket *pack;
194 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
195 pack = &(q->packets[i]);
197 dev_kfree_skb_any(pack->skb);
203 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
208 b43_pio_cancel_tx_packets(q);
212 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
220 #define destroy_queue_tx(pio, queue) do { \
221 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
222 (pio)->queue = NULL; \
225 #define destroy_queue_rx(pio, queue) do { \
226 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
227 (pio)->queue = NULL; \
230 void b43_pio_free(struct b43_wldev *dev)
234 if (!b43_using_pio_transfers(dev))
238 destroy_queue_rx(pio, rx_queue);
239 destroy_queue_tx(pio, tx_queue_mcast);
240 destroy_queue_tx(pio, tx_queue_AC_VO);
241 destroy_queue_tx(pio, tx_queue_AC_VI);
242 destroy_queue_tx(pio, tx_queue_AC_BE);
243 destroy_queue_tx(pio, tx_queue_AC_BK);
246 int b43_pio_init(struct b43_wldev *dev)
248 struct b43_pio *pio = &dev->pio;
251 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
253 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
255 pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
256 if (!pio->tx_queue_AC_BK)
259 pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
260 if (!pio->tx_queue_AC_BE)
263 pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
264 if (!pio->tx_queue_AC_VI)
267 pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
268 if (!pio->tx_queue_AC_VO)
271 pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
272 if (!pio->tx_queue_mcast)
275 pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
277 goto err_destroy_mcast;
279 b43dbg(dev->wl, "PIO initialized\n");
285 destroy_queue_tx(pio, tx_queue_mcast);
287 destroy_queue_tx(pio, tx_queue_AC_VO);
289 destroy_queue_tx(pio, tx_queue_AC_VI);
291 destroy_queue_tx(pio, tx_queue_AC_BE);
293 destroy_queue_tx(pio, tx_queue_AC_BK);
297 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
298 static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
301 struct b43_pio_txqueue *q;
303 if (dev->qos_enabled) {
304 /* 0 = highest priority */
305 switch (queue_prio) {
310 q = dev->pio.tx_queue_AC_VO;
313 q = dev->pio.tx_queue_AC_VI;
316 q = dev->pio.tx_queue_AC_BE;
319 q = dev->pio.tx_queue_AC_BK;
323 q = dev->pio.tx_queue_AC_BE;
328 static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
331 unsigned int data_len)
333 struct b43_wldev *dev = q->dev;
334 const u8 *data = _data;
336 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
337 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
339 ssb_block_write(dev->dev, data, (data_len & ~1),
340 q->mmio_base + B43_PIO_TXDATA,
343 /* Write the last byte. */
344 ctl &= ~B43_PIO_TXCTL_WRITEHI;
345 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
346 b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]);
352 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
353 const u8 *hdr, unsigned int hdrlen)
355 struct b43_pio_txqueue *q = pack->queue;
356 const char *frame = pack->skb->data;
357 unsigned int frame_len = pack->skb->len;
360 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
361 ctl |= B43_PIO_TXCTL_FREADY;
362 ctl &= ~B43_PIO_TXCTL_EOF;
364 /* Transfer the header data. */
365 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
366 /* Transfer the frame data. */
367 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
369 ctl |= B43_PIO_TXCTL_EOF;
370 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
373 static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
376 unsigned int data_len)
378 struct b43_wldev *dev = q->dev;
379 const u8 *data = _data;
381 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
382 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
383 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
385 ssb_block_write(dev->dev, data, (data_len & ~3),
386 q->mmio_base + B43_PIO8_TXDATA,
391 /* Write the last few bytes. */
392 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
393 B43_PIO8_TXCTL_24_31);
394 data = &(data[data_len - 1]);
395 switch (data_len & 3) {
397 ctl |= B43_PIO8_TXCTL_16_23;
398 value |= (u32)(*data) << 16;
401 ctl |= B43_PIO8_TXCTL_8_15;
402 value |= (u32)(*data) << 8;
405 value |= (u32)(*data);
407 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
408 b43_piotx_write32(q, B43_PIO8_TXDATA, value);
414 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
415 const u8 *hdr, unsigned int hdrlen)
417 struct b43_pio_txqueue *q = pack->queue;
418 const char *frame = pack->skb->data;
419 unsigned int frame_len = pack->skb->len;
422 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
423 ctl |= B43_PIO8_TXCTL_FREADY;
424 ctl &= ~B43_PIO8_TXCTL_EOF;
426 /* Transfer the header data. */
427 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
428 /* Transfer the frame data. */
429 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
431 ctl |= B43_PIO8_TXCTL_EOF;
432 b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
435 static int pio_tx_frame(struct b43_pio_txqueue *q,
438 struct b43_pio_txpacket *pack;
439 struct b43_txhdr txhdr;
443 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
445 B43_WARN_ON(list_empty(&q->packets_list));
446 pack = list_entry(q->packets_list.next,
447 struct b43_pio_txpacket, list);
449 cookie = generate_cookie(q, pack);
450 hdrlen = b43_txhdr_size(q->dev);
451 err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb,
456 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
457 /* Tell the firmware about the cookie of the last
458 * mcast frame, so it can clear the more-data bit in it. */
459 b43_shm_write16(q->dev, B43_SHM_SHARED,
460 B43_SHM_SH_MCASTCOOKIE, cookie);
465 pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
467 pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
469 /* Remove it from the list of available packet slots.
470 * It will be put back when we receive the status report. */
471 list_del(&pack->list);
473 /* Update the queue statistics. */
474 q->buffer_used += roundup(skb->len + hdrlen, 4);
475 q->free_packet_slots -= 1;
480 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
482 struct b43_pio_txqueue *q;
483 struct ieee80211_hdr *hdr;
484 unsigned int hdrlen, total_len;
486 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
488 hdr = (struct ieee80211_hdr *)skb->data;
490 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
491 /* The multicast queue will be sent after the DTIM. */
492 q = dev->pio.tx_queue_mcast;
493 /* Set the frame More-Data bit. Ucode will clear it
494 * for us on the last frame. */
495 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
497 /* Decide by priority where to put this frame. */
498 q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
501 hdrlen = b43_txhdr_size(dev);
502 total_len = roundup(skb->len + hdrlen, 4);
504 if (unlikely(total_len > q->buffer_size)) {
506 b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
509 if (unlikely(q->free_packet_slots == 0)) {
511 b43warn(dev->wl, "PIO: TX packet overflow.\n");
514 B43_WARN_ON(q->buffer_used > q->buffer_size);
516 if (total_len > (q->buffer_size - q->buffer_used)) {
517 /* Not enough memory on the queue. */
519 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
524 /* Assign the queue number to the ring (if not already done before)
525 * so TX status handling can use it. The mac80211-queue to b43-queue
526 * mapping is static, so we don't need to store it per frame. */
527 q->queue_prio = skb_get_queue_mapping(skb);
529 err = pio_tx_frame(q, skb);
530 if (unlikely(err == -ENOKEY)) {
531 /* Drop this packet, as we don't have the encryption key
532 * anymore and must not transmit it unencrypted. */
533 dev_kfree_skb_any(skb);
538 b43err(dev->wl, "PIO transmission failure\n");
543 B43_WARN_ON(q->buffer_used > q->buffer_size);
544 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
545 (q->free_packet_slots == 0)) {
546 /* The queue is full. */
547 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
555 void b43_pio_handle_txstatus(struct b43_wldev *dev,
556 const struct b43_txstatus *status)
558 struct b43_pio_txqueue *q;
559 struct b43_pio_txpacket *pack = NULL;
560 unsigned int total_len;
561 struct ieee80211_tx_info *info;
563 q = parse_cookie(dev, status->cookie, &pack);
568 info = IEEE80211_SKB_CB(pack->skb);
570 b43_fill_txstatus_report(dev, info, status);
572 total_len = pack->skb->len + b43_txhdr_size(dev);
573 total_len = roundup(total_len, 4);
574 q->buffer_used -= total_len;
575 q->free_packet_slots += 1;
577 ieee80211_tx_status(dev->wl->hw, pack->skb);
579 list_add(&pack->list, &q->packets_list);
582 ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
587 void b43_pio_get_tx_stats(struct b43_wldev *dev,
588 struct ieee80211_tx_queue_stats *stats)
590 const int nr_queues = dev->wl->hw->queues;
591 struct b43_pio_txqueue *q;
594 for (i = 0; i < nr_queues; i++) {
595 q = select_queue_by_priority(dev, i);
597 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
598 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
599 stats[i].count = q->nr_tx_packets;
603 /* Returns whether we should fetch another frame. */
604 static bool pio_rx_frame(struct b43_pio_rxqueue *q)
606 struct b43_wldev *dev = q->dev;
607 struct b43_rxhdr_fw4 rxhdr;
610 unsigned int i, padding;
612 const char *err_msg = NULL;
614 memset(&rxhdr, 0, sizeof(rxhdr));
616 /* Check if we have data and wait for it to get ready. */
620 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
621 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
623 b43_piorx_write32(q, B43_PIO8_RXCTL,
624 B43_PIO8_RXCTL_FRAMERDY);
625 for (i = 0; i < 10; i++) {
626 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
627 if (ctl & B43_PIO8_RXCTL_DATARDY)
634 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
635 if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
637 b43_piorx_write16(q, B43_PIO_RXCTL,
638 B43_PIO_RXCTL_FRAMERDY);
639 for (i = 0; i < 10; i++) {
640 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
641 if (ctl & B43_PIO_RXCTL_DATARDY)
646 b43dbg(q->dev->wl, "PIO RX timed out\n");
650 /* Get the preamble (RX header) */
652 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
653 q->mmio_base + B43_PIO8_RXDATA,
656 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
657 q->mmio_base + B43_PIO_RXDATA,
661 len = le16_to_cpu(rxhdr.frame_len);
662 if (unlikely(len > 0x700)) {
663 err_msg = "len > 0x700";
666 if (unlikely(len == 0)) {
667 err_msg = "len == 0";
671 macstat = le32_to_cpu(rxhdr.mac_status);
672 if (macstat & B43_RX_MAC_FCSERR) {
673 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
674 /* Drop frames with failed FCS. */
675 err_msg = "Frame FCS error";
680 /* We always pad 2 bytes, as that's what upstream code expects
681 * due to the RX-header being 30 bytes. In case the frame is
682 * unaligned, we pad another 2 bytes. */
683 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
684 skb = dev_alloc_skb(len + padding + 2);
685 if (unlikely(!skb)) {
686 err_msg = "Out of memory";
690 skb_put(skb, len + padding);
692 ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
693 q->mmio_base + B43_PIO8_RXDATA,
699 /* Read the last few bytes. */
700 value = b43_piorx_read32(q, B43_PIO8_RXDATA);
701 data = &(skb->data[len + padding - 1]);
704 *data = (value >> 16);
707 *data = (value >> 8);
714 ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
715 q->mmio_base + B43_PIO_RXDATA,
720 /* Read the last byte. */
721 value = b43_piorx_read16(q, B43_PIO_RXDATA);
722 skb->data[len + padding - 1] = value;
726 b43_rx(q->dev, skb, &rxhdr);
732 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
733 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
737 void b43_pio_rx(struct b43_pio_rxqueue *q)
739 unsigned int count = 0;
743 stop = (pio_rx_frame(q) == 0);
747 if (WARN_ON_ONCE(++count > 10000))
752 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
755 b43_piotx_write32(q, B43_PIO8_TXCTL,
756 b43_piotx_read32(q, B43_PIO8_TXCTL)
757 | B43_PIO8_TXCTL_SUSPREQ);
759 b43_piotx_write16(q, B43_PIO_TXCTL,
760 b43_piotx_read16(q, B43_PIO_TXCTL)
761 | B43_PIO_TXCTL_SUSPREQ);
765 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
768 b43_piotx_write32(q, B43_PIO8_TXCTL,
769 b43_piotx_read32(q, B43_PIO8_TXCTL)
770 & ~B43_PIO8_TXCTL_SUSPREQ);
772 b43_piotx_write16(q, B43_PIO_TXCTL,
773 b43_piotx_read16(q, B43_PIO_TXCTL)
774 & ~B43_PIO_TXCTL_SUSPREQ);
778 void b43_pio_tx_suspend(struct b43_wldev *dev)
780 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
781 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
782 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
783 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
784 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
785 b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
788 void b43_pio_tx_resume(struct b43_wldev *dev)
790 b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
791 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
792 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
793 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
794 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
795 b43_power_saving_ctl_bits(dev, 0);