3 Broadcom B43 wireless driver
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
35 static u16 generate_cookie(struct b43_pio_txqueue *q,
36 struct b43_pio_txpacket *pack)
40 /* Use the upper 4 bits of the cookie as
41 * PIO controller ID and store the packet index number
42 * in the lower 12 bits.
43 * Note that the cookie must never be 0, as this
44 * is a special value used in RX path.
45 * It can also not be 0xFFFF because that is special
46 * for multicast frames.
48 cookie = (((u16)q->index + 1) << 12);
49 cookie |= pack->index;
55 struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
57 struct b43_pio_txpacket **pack)
59 struct b43_pio *pio = &dev->pio;
60 struct b43_pio_txqueue *q = NULL;
61 unsigned int pack_index;
63 switch (cookie & 0xF000) {
65 q = pio->tx_queue_AC_BK;
68 q = pio->tx_queue_AC_BE;
71 q = pio->tx_queue_AC_VI;
74 q = pio->tx_queue_AC_VO;
77 q = pio->tx_queue_mcast;
82 pack_index = (cookie & 0x0FFF);
83 if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
85 *pack = &q->packets[pack_index];
90 static u16 index_to_pioqueue_base(struct b43_wldev *dev,
93 static const u16 bases[] = {
103 static const u16 bases_rev11[] = {
104 B43_MMIO_PIO11_BASE0,
105 B43_MMIO_PIO11_BASE1,
106 B43_MMIO_PIO11_BASE2,
107 B43_MMIO_PIO11_BASE3,
108 B43_MMIO_PIO11_BASE4,
109 B43_MMIO_PIO11_BASE5,
112 if (dev->dev->id.revision >= 11) {
113 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
114 return bases_rev11[index];
116 B43_WARN_ON(index >= ARRAY_SIZE(bases));
120 static u16 pio_txqueue_offset(struct b43_wldev *dev)
122 if (dev->dev->id.revision >= 11)
127 static u16 pio_rxqueue_offset(struct b43_wldev *dev)
129 if (dev->dev->id.revision >= 11)
134 static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
137 struct b43_pio_txqueue *q;
138 struct b43_pio_txpacket *p;
141 q = kzalloc(sizeof(*q), GFP_KERNEL);
145 q->rev = dev->dev->id.revision;
146 q->mmio_base = index_to_pioqueue_base(dev, index) +
147 pio_txqueue_offset(dev);
150 q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
152 q->buffer_size = 1920; //FIXME this constant is wrong.
154 q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
155 q->buffer_size -= 80;
158 INIT_LIST_HEAD(&q->packets_list);
159 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
160 p = &(q->packets[i]);
161 INIT_LIST_HEAD(&p->list);
164 list_add(&p->list, &q->packets_list);
170 static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
173 struct b43_pio_rxqueue *q;
175 q = kzalloc(sizeof(*q), GFP_KERNEL);
179 q->rev = dev->dev->id.revision;
180 q->mmio_base = index_to_pioqueue_base(dev, index) +
181 pio_rxqueue_offset(dev);
183 /* Enable Direct FIFO RX (PIO) on the engine. */
184 b43_dma_direct_fifo_rx(dev, index, 1);
189 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
191 struct b43_pio_txpacket *pack;
194 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
195 pack = &(q->packets[i]);
197 dev_kfree_skb_any(pack->skb);
203 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
208 b43_pio_cancel_tx_packets(q);
212 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
220 #define destroy_queue_tx(pio, queue) do { \
221 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
222 (pio)->queue = NULL; \
225 #define destroy_queue_rx(pio, queue) do { \
226 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
227 (pio)->queue = NULL; \
230 void b43_pio_free(struct b43_wldev *dev)
234 if (!b43_using_pio_transfers(dev))
238 destroy_queue_rx(pio, rx_queue);
239 destroy_queue_tx(pio, tx_queue_mcast);
240 destroy_queue_tx(pio, tx_queue_AC_VO);
241 destroy_queue_tx(pio, tx_queue_AC_VI);
242 destroy_queue_tx(pio, tx_queue_AC_BE);
243 destroy_queue_tx(pio, tx_queue_AC_BK);
246 int b43_pio_init(struct b43_wldev *dev)
248 struct b43_pio *pio = &dev->pio;
251 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
253 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
255 pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
256 if (!pio->tx_queue_AC_BK)
259 pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
260 if (!pio->tx_queue_AC_BE)
263 pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
264 if (!pio->tx_queue_AC_VI)
267 pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
268 if (!pio->tx_queue_AC_VO)
271 pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
272 if (!pio->tx_queue_mcast)
275 pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
277 goto err_destroy_mcast;
279 b43dbg(dev->wl, "PIO initialized\n");
285 destroy_queue_tx(pio, tx_queue_mcast);
287 destroy_queue_tx(pio, tx_queue_AC_VO);
289 destroy_queue_tx(pio, tx_queue_AC_VI);
291 destroy_queue_tx(pio, tx_queue_AC_BE);
293 destroy_queue_tx(pio, tx_queue_AC_BK);
297 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
298 static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
301 struct b43_pio_txqueue *q;
303 if (dev->qos_enabled) {
304 /* 0 = highest priority */
305 switch (queue_prio) {
310 q = dev->pio.tx_queue_AC_VO;
313 q = dev->pio.tx_queue_AC_VI;
316 q = dev->pio.tx_queue_AC_BE;
319 q = dev->pio.tx_queue_AC_BK;
323 q = dev->pio.tx_queue_AC_BE;
328 static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
331 unsigned int data_len)
333 struct b43_wldev *dev = q->dev;
334 struct b43_wl *wl = dev->wl;
335 const u8 *data = _data;
337 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
338 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
340 ssb_block_write(dev->dev, data, (data_len & ~1),
341 q->mmio_base + B43_PIO_TXDATA,
344 u8 *tail = wl->pio_tailspace;
345 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
347 /* Write the last byte. */
348 ctl &= ~B43_PIO_TXCTL_WRITEHI;
349 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
350 tail[0] = data[data_len - 1];
352 ssb_block_write(dev->dev, tail, 2,
353 q->mmio_base + B43_PIO_TXDATA,
360 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
361 const u8 *hdr, unsigned int hdrlen)
363 struct b43_pio_txqueue *q = pack->queue;
364 const char *frame = pack->skb->data;
365 unsigned int frame_len = pack->skb->len;
368 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
369 ctl |= B43_PIO_TXCTL_FREADY;
370 ctl &= ~B43_PIO_TXCTL_EOF;
372 /* Transfer the header data. */
373 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
374 /* Transfer the frame data. */
375 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
377 ctl |= B43_PIO_TXCTL_EOF;
378 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
381 static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
384 unsigned int data_len)
386 struct b43_wldev *dev = q->dev;
387 struct b43_wl *wl = dev->wl;
388 const u8 *data = _data;
390 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
391 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
392 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
394 ssb_block_write(dev->dev, data, (data_len & ~3),
395 q->mmio_base + B43_PIO8_TXDATA,
398 u8 *tail = wl->pio_tailspace;
399 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
402 /* Write the last few bytes. */
403 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
404 B43_PIO8_TXCTL_24_31);
405 switch (data_len & 3) {
407 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
408 tail[0] = data[data_len - 3];
409 tail[1] = data[data_len - 2];
410 tail[2] = data[data_len - 1];
413 ctl |= B43_PIO8_TXCTL_8_15;
414 tail[0] = data[data_len - 2];
415 tail[1] = data[data_len - 1];
418 tail[0] = data[data_len - 1];
421 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
422 ssb_block_write(dev->dev, tail, 4,
423 q->mmio_base + B43_PIO8_TXDATA,
430 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
431 const u8 *hdr, unsigned int hdrlen)
433 struct b43_pio_txqueue *q = pack->queue;
434 const char *frame = pack->skb->data;
435 unsigned int frame_len = pack->skb->len;
438 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
439 ctl |= B43_PIO8_TXCTL_FREADY;
440 ctl &= ~B43_PIO8_TXCTL_EOF;
442 /* Transfer the header data. */
443 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
444 /* Transfer the frame data. */
445 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
447 ctl |= B43_PIO8_TXCTL_EOF;
448 b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
451 static int pio_tx_frame(struct b43_pio_txqueue *q,
454 struct b43_wldev *dev = q->dev;
455 struct b43_wl *wl = dev->wl;
456 struct b43_pio_txpacket *pack;
460 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
461 struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
463 B43_WARN_ON(list_empty(&q->packets_list));
464 pack = list_entry(q->packets_list.next,
465 struct b43_pio_txpacket, list);
467 cookie = generate_cookie(q, pack);
468 hdrlen = b43_txhdr_size(dev);
469 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
470 B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
471 err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
476 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
477 /* Tell the firmware about the cookie of the last
478 * mcast frame, so it can clear the more-data bit in it. */
479 b43_shm_write16(dev, B43_SHM_SHARED,
480 B43_SHM_SH_MCASTCOOKIE, cookie);
485 pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
487 pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
489 /* Remove it from the list of available packet slots.
490 * It will be put back when we receive the status report. */
491 list_del(&pack->list);
493 /* Update the queue statistics. */
494 q->buffer_used += roundup(skb->len + hdrlen, 4);
495 q->free_packet_slots -= 1;
500 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
502 struct b43_pio_txqueue *q;
503 struct ieee80211_hdr *hdr;
504 unsigned int hdrlen, total_len;
506 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
508 hdr = (struct ieee80211_hdr *)skb->data;
510 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
511 /* The multicast queue will be sent after the DTIM. */
512 q = dev->pio.tx_queue_mcast;
513 /* Set the frame More-Data bit. Ucode will clear it
514 * for us on the last frame. */
515 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
517 /* Decide by priority where to put this frame. */
518 q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
521 hdrlen = b43_txhdr_size(dev);
522 total_len = roundup(skb->len + hdrlen, 4);
524 if (unlikely(total_len > q->buffer_size)) {
526 b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
529 if (unlikely(q->free_packet_slots == 0)) {
531 b43warn(dev->wl, "PIO: TX packet overflow.\n");
534 B43_WARN_ON(q->buffer_used > q->buffer_size);
536 if (total_len > (q->buffer_size - q->buffer_used)) {
537 /* Not enough memory on the queue. */
539 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
544 /* Assign the queue number to the ring (if not already done before)
545 * so TX status handling can use it. The mac80211-queue to b43-queue
546 * mapping is static, so we don't need to store it per frame. */
547 q->queue_prio = skb_get_queue_mapping(skb);
549 err = pio_tx_frame(q, skb);
550 if (unlikely(err == -ENOKEY)) {
551 /* Drop this packet, as we don't have the encryption key
552 * anymore and must not transmit it unencrypted. */
553 dev_kfree_skb_any(skb);
558 b43err(dev->wl, "PIO transmission failure\n");
563 B43_WARN_ON(q->buffer_used > q->buffer_size);
564 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
565 (q->free_packet_slots == 0)) {
566 /* The queue is full. */
567 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
575 void b43_pio_handle_txstatus(struct b43_wldev *dev,
576 const struct b43_txstatus *status)
578 struct b43_pio_txqueue *q;
579 struct b43_pio_txpacket *pack = NULL;
580 unsigned int total_len;
581 struct ieee80211_tx_info *info;
583 q = parse_cookie(dev, status->cookie, &pack);
588 info = IEEE80211_SKB_CB(pack->skb);
590 b43_fill_txstatus_report(dev, info, status);
592 total_len = pack->skb->len + b43_txhdr_size(dev);
593 total_len = roundup(total_len, 4);
594 q->buffer_used -= total_len;
595 q->free_packet_slots += 1;
597 ieee80211_tx_status(dev->wl->hw, pack->skb);
599 list_add(&pack->list, &q->packets_list);
602 ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
607 void b43_pio_get_tx_stats(struct b43_wldev *dev,
608 struct ieee80211_tx_queue_stats *stats)
610 const int nr_queues = dev->wl->hw->queues;
611 struct b43_pio_txqueue *q;
614 for (i = 0; i < nr_queues; i++) {
615 q = select_queue_by_priority(dev, i);
617 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
618 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
619 stats[i].count = q->nr_tx_packets;
623 /* Returns whether we should fetch another frame. */
624 static bool pio_rx_frame(struct b43_pio_rxqueue *q)
626 struct b43_wldev *dev = q->dev;
627 struct b43_wl *wl = dev->wl;
630 unsigned int i, padding;
632 const char *err_msg = NULL;
633 struct b43_rxhdr_fw4 *rxhdr =
634 (struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
636 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
637 memset(rxhdr, 0, sizeof(*rxhdr));
639 /* Check if we have data and wait for it to get ready. */
643 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
644 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
646 b43_piorx_write32(q, B43_PIO8_RXCTL,
647 B43_PIO8_RXCTL_FRAMERDY);
648 for (i = 0; i < 10; i++) {
649 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
650 if (ctl & B43_PIO8_RXCTL_DATARDY)
657 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
658 if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
660 b43_piorx_write16(q, B43_PIO_RXCTL,
661 B43_PIO_RXCTL_FRAMERDY);
662 for (i = 0; i < 10; i++) {
663 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
664 if (ctl & B43_PIO_RXCTL_DATARDY)
669 b43dbg(q->dev->wl, "PIO RX timed out\n");
673 /* Get the preamble (RX header) */
675 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
676 q->mmio_base + B43_PIO8_RXDATA,
679 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
680 q->mmio_base + B43_PIO_RXDATA,
684 len = le16_to_cpu(rxhdr->frame_len);
685 if (unlikely(len > 0x700)) {
686 err_msg = "len > 0x700";
689 if (unlikely(len == 0)) {
690 err_msg = "len == 0";
694 macstat = le32_to_cpu(rxhdr->mac_status);
695 if (macstat & B43_RX_MAC_FCSERR) {
696 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
697 /* Drop frames with failed FCS. */
698 err_msg = "Frame FCS error";
703 /* We always pad 2 bytes, as that's what upstream code expects
704 * due to the RX-header being 30 bytes. In case the frame is
705 * unaligned, we pad another 2 bytes. */
706 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
707 skb = dev_alloc_skb(len + padding + 2);
708 if (unlikely(!skb)) {
709 err_msg = "Out of memory";
713 skb_put(skb, len + padding);
715 ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
716 q->mmio_base + B43_PIO8_RXDATA,
719 u8 *tail = wl->pio_tailspace;
720 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
722 /* Read the last few bytes. */
723 ssb_block_read(dev->dev, tail, 4,
724 q->mmio_base + B43_PIO8_RXDATA,
728 skb->data[len + padding - 3] = tail[0];
729 skb->data[len + padding - 2] = tail[1];
730 skb->data[len + padding - 1] = tail[2];
733 skb->data[len + padding - 2] = tail[0];
734 skb->data[len + padding - 1] = tail[1];
737 skb->data[len + padding - 1] = tail[0];
742 ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
743 q->mmio_base + B43_PIO_RXDATA,
746 u8 *tail = wl->pio_tailspace;
747 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
749 /* Read the last byte. */
750 ssb_block_read(dev->dev, tail, 2,
751 q->mmio_base + B43_PIO_RXDATA,
753 skb->data[len + padding - 1] = tail[0];
757 b43_rx(q->dev, skb, rxhdr);
763 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
765 b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
767 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
772 void b43_pio_rx(struct b43_pio_rxqueue *q)
774 unsigned int count = 0;
778 stop = (pio_rx_frame(q) == 0);
782 if (WARN_ON_ONCE(++count > 10000))
787 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
790 b43_piotx_write32(q, B43_PIO8_TXCTL,
791 b43_piotx_read32(q, B43_PIO8_TXCTL)
792 | B43_PIO8_TXCTL_SUSPREQ);
794 b43_piotx_write16(q, B43_PIO_TXCTL,
795 b43_piotx_read16(q, B43_PIO_TXCTL)
796 | B43_PIO_TXCTL_SUSPREQ);
800 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
803 b43_piotx_write32(q, B43_PIO8_TXCTL,
804 b43_piotx_read32(q, B43_PIO8_TXCTL)
805 & ~B43_PIO8_TXCTL_SUSPREQ);
807 b43_piotx_write16(q, B43_PIO_TXCTL,
808 b43_piotx_read16(q, B43_PIO_TXCTL)
809 & ~B43_PIO_TXCTL_SUSPREQ);
813 void b43_pio_tx_suspend(struct b43_wldev *dev)
815 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
816 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
817 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
818 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
819 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
820 b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
823 void b43_pio_tx_resume(struct b43_wldev *dev)
825 b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
826 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
827 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
828 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
829 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
830 b43_power_saving_ctl_bits(dev, 0);