3 Broadcom B43 wireless driver
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/sched.h>
36 static u16 generate_cookie(struct b43_pio_txqueue *q,
37 struct b43_pio_txpacket *pack)
41 /* Use the upper 4 bits of the cookie as
42 * PIO controller ID and store the packet index number
43 * in the lower 12 bits.
44 * Note that the cookie must never be 0, as this
45 * is a special value used in RX path.
46 * It can also not be 0xFFFF because that is special
47 * for multicast frames.
49 cookie = (((u16)q->index + 1) << 12);
50 cookie |= pack->index;
56 struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
58 struct b43_pio_txpacket **pack)
60 struct b43_pio *pio = &dev->pio;
61 struct b43_pio_txqueue *q = NULL;
62 unsigned int pack_index;
64 switch (cookie & 0xF000) {
66 q = pio->tx_queue_AC_BK;
69 q = pio->tx_queue_AC_BE;
72 q = pio->tx_queue_AC_VI;
75 q = pio->tx_queue_AC_VO;
78 q = pio->tx_queue_mcast;
83 pack_index = (cookie & 0x0FFF);
84 if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
86 *pack = &q->packets[pack_index];
91 static u16 index_to_pioqueue_base(struct b43_wldev *dev,
94 static const u16 bases[] = {
104 static const u16 bases_rev11[] = {
105 B43_MMIO_PIO11_BASE0,
106 B43_MMIO_PIO11_BASE1,
107 B43_MMIO_PIO11_BASE2,
108 B43_MMIO_PIO11_BASE3,
109 B43_MMIO_PIO11_BASE4,
110 B43_MMIO_PIO11_BASE5,
113 if (dev->dev->id.revision >= 11) {
114 B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
115 return bases_rev11[index];
117 B43_WARN_ON(index >= ARRAY_SIZE(bases));
121 static u16 pio_txqueue_offset(struct b43_wldev *dev)
123 if (dev->dev->id.revision >= 11)
128 static u16 pio_rxqueue_offset(struct b43_wldev *dev)
130 if (dev->dev->id.revision >= 11)
135 static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
138 struct b43_pio_txqueue *q;
139 struct b43_pio_txpacket *p;
142 q = kzalloc(sizeof(*q), GFP_KERNEL);
146 q->rev = dev->dev->id.revision;
147 q->mmio_base = index_to_pioqueue_base(dev, index) +
148 pio_txqueue_offset(dev);
151 q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
153 q->buffer_size = 1920; //FIXME this constant is wrong.
155 q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
156 q->buffer_size -= 80;
159 INIT_LIST_HEAD(&q->packets_list);
160 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
161 p = &(q->packets[i]);
162 INIT_LIST_HEAD(&p->list);
165 list_add(&p->list, &q->packets_list);
171 static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
174 struct b43_pio_rxqueue *q;
176 q = kzalloc(sizeof(*q), GFP_KERNEL);
180 q->rev = dev->dev->id.revision;
181 q->mmio_base = index_to_pioqueue_base(dev, index) +
182 pio_rxqueue_offset(dev);
184 /* Enable Direct FIFO RX (PIO) on the engine. */
185 b43_dma_direct_fifo_rx(dev, index, 1);
190 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
192 struct b43_pio_txpacket *pack;
195 for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
196 pack = &(q->packets[i]);
198 dev_kfree_skb_any(pack->skb);
204 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
209 b43_pio_cancel_tx_packets(q);
213 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
221 #define destroy_queue_tx(pio, queue) do { \
222 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
223 (pio)->queue = NULL; \
226 #define destroy_queue_rx(pio, queue) do { \
227 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
228 (pio)->queue = NULL; \
231 void b43_pio_free(struct b43_wldev *dev)
235 if (!b43_using_pio_transfers(dev))
239 destroy_queue_rx(pio, rx_queue);
240 destroy_queue_tx(pio, tx_queue_mcast);
241 destroy_queue_tx(pio, tx_queue_AC_VO);
242 destroy_queue_tx(pio, tx_queue_AC_VI);
243 destroy_queue_tx(pio, tx_queue_AC_BE);
244 destroy_queue_tx(pio, tx_queue_AC_BK);
247 int b43_pio_init(struct b43_wldev *dev)
249 struct b43_pio *pio = &dev->pio;
252 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
254 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
256 pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
257 if (!pio->tx_queue_AC_BK)
260 pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
261 if (!pio->tx_queue_AC_BE)
264 pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
265 if (!pio->tx_queue_AC_VI)
268 pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
269 if (!pio->tx_queue_AC_VO)
272 pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
273 if (!pio->tx_queue_mcast)
276 pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
278 goto err_destroy_mcast;
280 b43dbg(dev->wl, "PIO initialized\n");
286 destroy_queue_tx(pio, tx_queue_mcast);
288 destroy_queue_tx(pio, tx_queue_AC_VO);
290 destroy_queue_tx(pio, tx_queue_AC_VI);
292 destroy_queue_tx(pio, tx_queue_AC_BE);
294 destroy_queue_tx(pio, tx_queue_AC_BK);
298 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
299 static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
302 struct b43_pio_txqueue *q;
304 if (dev->qos_enabled) {
305 /* 0 = highest priority */
306 switch (queue_prio) {
311 q = dev->pio.tx_queue_AC_VO;
314 q = dev->pio.tx_queue_AC_VI;
317 q = dev->pio.tx_queue_AC_BE;
320 q = dev->pio.tx_queue_AC_BK;
324 q = dev->pio.tx_queue_AC_BE;
329 static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
332 unsigned int data_len)
334 struct b43_wldev *dev = q->dev;
335 struct b43_wl *wl = dev->wl;
336 const u8 *data = _data;
338 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
339 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
341 ssb_block_write(dev->dev, data, (data_len & ~1),
342 q->mmio_base + B43_PIO_TXDATA,
345 u8 *tail = wl->pio_tailspace;
346 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
348 /* Write the last byte. */
349 ctl &= ~B43_PIO_TXCTL_WRITEHI;
350 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
351 tail[0] = data[data_len - 1];
353 ssb_block_write(dev->dev, tail, 2,
354 q->mmio_base + B43_PIO_TXDATA,
361 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
362 const u8 *hdr, unsigned int hdrlen)
364 struct b43_pio_txqueue *q = pack->queue;
365 const char *frame = pack->skb->data;
366 unsigned int frame_len = pack->skb->len;
369 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
370 ctl |= B43_PIO_TXCTL_FREADY;
371 ctl &= ~B43_PIO_TXCTL_EOF;
373 /* Transfer the header data. */
374 ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
375 /* Transfer the frame data. */
376 ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
378 ctl |= B43_PIO_TXCTL_EOF;
379 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
382 static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
385 unsigned int data_len)
387 struct b43_wldev *dev = q->dev;
388 struct b43_wl *wl = dev->wl;
389 const u8 *data = _data;
391 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
392 B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
393 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
395 ssb_block_write(dev->dev, data, (data_len & ~3),
396 q->mmio_base + B43_PIO8_TXDATA,
399 u8 *tail = wl->pio_tailspace;
400 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
403 /* Write the last few bytes. */
404 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
405 B43_PIO8_TXCTL_24_31);
406 switch (data_len & 3) {
408 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
409 tail[0] = data[data_len - 3];
410 tail[1] = data[data_len - 2];
411 tail[2] = data[data_len - 1];
414 ctl |= B43_PIO8_TXCTL_8_15;
415 tail[0] = data[data_len - 2];
416 tail[1] = data[data_len - 1];
419 tail[0] = data[data_len - 1];
422 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
423 ssb_block_write(dev->dev, tail, 4,
424 q->mmio_base + B43_PIO8_TXDATA,
431 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
432 const u8 *hdr, unsigned int hdrlen)
434 struct b43_pio_txqueue *q = pack->queue;
435 const char *frame = pack->skb->data;
436 unsigned int frame_len = pack->skb->len;
439 ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
440 ctl |= B43_PIO8_TXCTL_FREADY;
441 ctl &= ~B43_PIO8_TXCTL_EOF;
443 /* Transfer the header data. */
444 ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
445 /* Transfer the frame data. */
446 ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
448 ctl |= B43_PIO8_TXCTL_EOF;
449 b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
452 static int pio_tx_frame(struct b43_pio_txqueue *q,
455 struct b43_wldev *dev = q->dev;
456 struct b43_wl *wl = dev->wl;
457 struct b43_pio_txpacket *pack;
461 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
462 struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
464 B43_WARN_ON(list_empty(&q->packets_list));
465 pack = list_entry(q->packets_list.next,
466 struct b43_pio_txpacket, list);
468 cookie = generate_cookie(q, pack);
469 hdrlen = b43_txhdr_size(dev);
470 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
471 B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
472 err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
477 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
478 /* Tell the firmware about the cookie of the last
479 * mcast frame, so it can clear the more-data bit in it. */
480 b43_shm_write16(dev, B43_SHM_SHARED,
481 B43_SHM_SH_MCASTCOOKIE, cookie);
486 pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
488 pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
490 /* Remove it from the list of available packet slots.
491 * It will be put back when we receive the status report. */
492 list_del(&pack->list);
494 /* Update the queue statistics. */
495 q->buffer_used += roundup(skb->len + hdrlen, 4);
496 q->free_packet_slots -= 1;
501 int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
503 struct b43_pio_txqueue *q;
504 struct ieee80211_hdr *hdr;
505 unsigned int hdrlen, total_len;
507 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
509 hdr = (struct ieee80211_hdr *)skb->data;
511 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
512 /* The multicast queue will be sent after the DTIM. */
513 q = dev->pio.tx_queue_mcast;
514 /* Set the frame More-Data bit. Ucode will clear it
515 * for us on the last frame. */
516 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
518 /* Decide by priority where to put this frame. */
519 q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
522 hdrlen = b43_txhdr_size(dev);
523 total_len = roundup(skb->len + hdrlen, 4);
525 if (unlikely(total_len > q->buffer_size)) {
527 b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
530 if (unlikely(q->free_packet_slots == 0)) {
532 b43warn(dev->wl, "PIO: TX packet overflow.\n");
535 B43_WARN_ON(q->buffer_used > q->buffer_size);
537 if (total_len > (q->buffer_size - q->buffer_used)) {
538 /* Not enough memory on the queue. */
540 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
545 /* Assign the queue number to the ring (if not already done before)
546 * so TX status handling can use it. The mac80211-queue to b43-queue
547 * mapping is static, so we don't need to store it per frame. */
548 q->queue_prio = skb_get_queue_mapping(skb);
550 err = pio_tx_frame(q, skb);
551 if (unlikely(err == -ENOKEY)) {
552 /* Drop this packet, as we don't have the encryption key
553 * anymore and must not transmit it unencrypted. */
554 dev_kfree_skb_any(skb);
559 b43err(dev->wl, "PIO transmission failure\n");
564 B43_WARN_ON(q->buffer_used > q->buffer_size);
565 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
566 (q->free_packet_slots == 0)) {
567 /* The queue is full. */
568 ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
576 void b43_pio_handle_txstatus(struct b43_wldev *dev,
577 const struct b43_txstatus *status)
579 struct b43_pio_txqueue *q;
580 struct b43_pio_txpacket *pack = NULL;
581 unsigned int total_len;
582 struct ieee80211_tx_info *info;
584 q = parse_cookie(dev, status->cookie, &pack);
589 info = IEEE80211_SKB_CB(pack->skb);
591 b43_fill_txstatus_report(dev, info, status);
593 total_len = pack->skb->len + b43_txhdr_size(dev);
594 total_len = roundup(total_len, 4);
595 q->buffer_used -= total_len;
596 q->free_packet_slots += 1;
598 ieee80211_tx_status(dev->wl->hw, pack->skb);
600 list_add(&pack->list, &q->packets_list);
603 ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
608 void b43_pio_get_tx_stats(struct b43_wldev *dev,
609 struct ieee80211_tx_queue_stats *stats)
611 const int nr_queues = dev->wl->hw->queues;
612 struct b43_pio_txqueue *q;
615 for (i = 0; i < nr_queues; i++) {
616 q = select_queue_by_priority(dev, i);
618 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
619 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
620 stats[i].count = q->nr_tx_packets;
624 /* Returns whether we should fetch another frame. */
625 static bool pio_rx_frame(struct b43_pio_rxqueue *q)
627 struct b43_wldev *dev = q->dev;
628 struct b43_wl *wl = dev->wl;
631 unsigned int i, padding;
633 const char *err_msg = NULL;
634 struct b43_rxhdr_fw4 *rxhdr =
635 (struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
637 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
638 memset(rxhdr, 0, sizeof(*rxhdr));
640 /* Check if we have data and wait for it to get ready. */
644 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
645 if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
647 b43_piorx_write32(q, B43_PIO8_RXCTL,
648 B43_PIO8_RXCTL_FRAMERDY);
649 for (i = 0; i < 10; i++) {
650 ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
651 if (ctl & B43_PIO8_RXCTL_DATARDY)
658 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
659 if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
661 b43_piorx_write16(q, B43_PIO_RXCTL,
662 B43_PIO_RXCTL_FRAMERDY);
663 for (i = 0; i < 10; i++) {
664 ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
665 if (ctl & B43_PIO_RXCTL_DATARDY)
670 b43dbg(q->dev->wl, "PIO RX timed out\n");
674 /* Get the preamble (RX header) */
676 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
677 q->mmio_base + B43_PIO8_RXDATA,
680 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
681 q->mmio_base + B43_PIO_RXDATA,
685 len = le16_to_cpu(rxhdr->frame_len);
686 if (unlikely(len > 0x700)) {
687 err_msg = "len > 0x700";
690 if (unlikely(len == 0)) {
691 err_msg = "len == 0";
695 macstat = le32_to_cpu(rxhdr->mac_status);
696 if (macstat & B43_RX_MAC_FCSERR) {
697 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
698 /* Drop frames with failed FCS. */
699 err_msg = "Frame FCS error";
704 /* We always pad 2 bytes, as that's what upstream code expects
705 * due to the RX-header being 30 bytes. In case the frame is
706 * unaligned, we pad another 2 bytes. */
707 padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
708 skb = dev_alloc_skb(len + padding + 2);
709 if (unlikely(!skb)) {
710 err_msg = "Out of memory";
714 skb_put(skb, len + padding);
716 ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
717 q->mmio_base + B43_PIO8_RXDATA,
720 u8 *tail = wl->pio_tailspace;
721 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
723 /* Read the last few bytes. */
724 ssb_block_read(dev->dev, tail, 4,
725 q->mmio_base + B43_PIO8_RXDATA,
729 skb->data[len + padding - 3] = tail[0];
730 skb->data[len + padding - 2] = tail[1];
731 skb->data[len + padding - 1] = tail[2];
734 skb->data[len + padding - 2] = tail[0];
735 skb->data[len + padding - 1] = tail[1];
738 skb->data[len + padding - 1] = tail[0];
743 ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
744 q->mmio_base + B43_PIO_RXDATA,
747 u8 *tail = wl->pio_tailspace;
748 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
750 /* Read the last byte. */
751 ssb_block_read(dev->dev, tail, 2,
752 q->mmio_base + B43_PIO_RXDATA,
754 skb->data[len + padding - 1] = tail[0];
758 b43_rx(q->dev, skb, rxhdr);
764 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
766 b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
768 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
773 void b43_pio_rx(struct b43_pio_rxqueue *q)
775 unsigned int count = 0;
779 stop = (pio_rx_frame(q) == 0);
783 if (WARN_ON_ONCE(++count > 10000))
788 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
791 b43_piotx_write32(q, B43_PIO8_TXCTL,
792 b43_piotx_read32(q, B43_PIO8_TXCTL)
793 | B43_PIO8_TXCTL_SUSPREQ);
795 b43_piotx_write16(q, B43_PIO_TXCTL,
796 b43_piotx_read16(q, B43_PIO_TXCTL)
797 | B43_PIO_TXCTL_SUSPREQ);
801 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
804 b43_piotx_write32(q, B43_PIO8_TXCTL,
805 b43_piotx_read32(q, B43_PIO8_TXCTL)
806 & ~B43_PIO8_TXCTL_SUSPREQ);
808 b43_piotx_write16(q, B43_PIO_TXCTL,
809 b43_piotx_read16(q, B43_PIO_TXCTL)
810 & ~B43_PIO_TXCTL_SUSPREQ);
814 void b43_pio_tx_suspend(struct b43_wldev *dev)
816 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
817 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
818 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
819 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
820 b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
821 b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
824 void b43_pio_tx_resume(struct b43_wldev *dev)
826 b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
827 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
828 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
829 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
830 b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
831 b43_power_saving_ctl_bits(dev, 0);