drivers/net/wireless/bcm43xx/bcm43xx_phy.c

   1 /*
   2
   3   Broadcom BCM43xx wireless driver
   4
   5   Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
   6                      Stefano Brivio <st3@riseup.net>
   7                      Michael Buesch <mbuesch@freenet.de>
   8                      Danny van Dyk <kugelfang@gentoo.org>
   9                      Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10
  11   Some parts of the code in this file are derived from the ipw2200
  12   driver  Copyright(c) 2003 - 2004 Intel Corporation.
  13
  14   This program is free software; you can redistribute it and/or modify
  15   it under the terms of the GNU General Public License as published by
  16   the Free Software Foundation; either version 2 of the License, or
  17   (at your option) any later version.
  18
  19   This program is distributed in the hope that it will be useful,
  20   but WITHOUT ANY WARRANTY; without even the implied warranty of
  21   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22   GNU General Public License for more details.
  23
  24   You should have received a copy of the GNU General Public License
  25   along with this program; see the file COPYING.  If not, write to
  26   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  27   Boston, MA 02110-1301, USA.
  28
  29 */
  30
  31 #include <linux/delay.h>
  32 #include <linux/pci.h>
  33 #include <linux/types.h>
  34
  35 #include "bcm43xx.h"
  36 #include "bcm43xx_phy.h"
  37 #include "bcm43xx_main.h"
  38 #include "bcm43xx_radio.h"
  39 #include "bcm43xx_ilt.h"
  40 #include "bcm43xx_power.h"
  41
  42
  43 static const s8 bcm43xx_tssi2dbm_b_table[] = {
  44         0x4D, 0x4C, 0x4B, 0x4A,
  45         0x4A, 0x49, 0x48, 0x47,
  46         0x47, 0x46, 0x45, 0x45,
  47         0x44, 0x43, 0x42, 0x42,
  48         0x41, 0x40, 0x3F, 0x3E,
  49         0x3D, 0x3C, 0x3B, 0x3A,
  50         0x39, 0x38, 0x37, 0x36,
  51         0x35, 0x34, 0x32, 0x31,
  52         0x30, 0x2F, 0x2D, 0x2C,
  53         0x2B, 0x29, 0x28, 0x26,
  54         0x25, 0x23, 0x21, 0x1F,
  55         0x1D, 0x1A, 0x17, 0x14,
  56         0x10, 0x0C, 0x06, 0x00,
  57           -7,   -7,   -7,   -7,
  58           -7,   -7,   -7,   -7,
  59           -7,   -7,   -7,   -7,
  60 };
  61
  62 static const s8 bcm43xx_tssi2dbm_g_table[] = {
  63          77,  77,  77,  76,
  64          76,  76,  75,  75,
  65          74,  74,  73,  73,
  66          73,  72,  72,  71,
  67          71,  70,  70,  69,
  68          68,  68,  67,  67,
  69          66,  65,  65,  64,
  70          63,  63,  62,  61,
  71          60,  59,  58,  57,
  72          56,  55,  54,  53,
  73          52,  50,  49,  47,
  74          45,  43,  40,  37,
  75          33,  28,  22,  14,
  76           5,  -7, -20, -20,
  77         -20, -20, -20, -20,
  78         -20, -20, -20, -20,
  79 };
  80
  81 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
  82
  83
  84 void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
  85 {
  86         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
  87
  88         assert(irqs_disabled());
  89         if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
  90                 phy->is_locked = 0;
  91                 return;
  92         }
  93         if (bcm->current_core->rev < 3) {
  94                 bcm43xx_mac_suspend(bcm);
  95                 spin_lock(&phy->lock);
  96         } else {
  97                 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
  98                         bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
  99         }
 100         phy->is_locked = 1;
 101 }
 102
 103 void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
 104 {
 105         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 106
 107         assert(irqs_disabled());
 108         if (bcm->current_core->rev < 3) {
 109                 if (phy->is_locked) {
 110                         spin_unlock(&phy->lock);
 111                         bcm43xx_mac_enable(bcm);
 112                 }
 113         } else {
 114                 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
 115                         bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
 116         }
 117         phy->is_locked = 0;
 118 }
 119
 120 u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
 121 {
 122         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
 123         return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
 124 }
 125
 126 void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
 127 {
 128         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
 129         mmiowb();
 130         bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
 131 }
 132
 133 void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
 134 {
 135         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 136         unsigned long flags;
 137
 138         bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
 139         if (phy->calibrated)
 140                 return;
 141         if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
 142                 /* We do not want to be preempted while calibrating
 143                  * the hardware.
 144                  */
 145                 local_irq_save(flags);
 146
 147                 bcm43xx_wireless_core_reset(bcm, 0);
 148                 bcm43xx_phy_initg(bcm);
 149                 bcm43xx_wireless_core_reset(bcm, 1);
 150
 151                 local_irq_restore(flags);
 152         }
 153         phy->calibrated = 1;
 154 }
 155
 156 /* Connect the PHY
 157  * http://bcm-specs.sipsolutions.net/SetPHY
 158  */
 159 int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
 160 {
 161         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 162         u32 flags;
 163
 164         if (bcm->current_core->rev < 5)
 165                 goto out;
 166
 167         flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
 168         if (connect) {
 169                 if (!(flags & 0x00010000))
 170                         return -ENODEV;
 171                 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
 172                 flags |= (0x800 << 18);
 173                 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
 174         } else {
 175                 if (!(flags & 0x00020000))
 176                         return -ENODEV;
 177                 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
 178                 flags &= ~(0x800 << 18);
 179                 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
 180         }
 181 out:
 182         phy->connected = connect;
 183         if (connect)
 184                 dprintk(KERN_INFO PFX "PHY connected\n");
 185         else
 186                 dprintk(KERN_INFO PFX "PHY disconnected\n");
 187
 188         return 0;
 189 }
 190
 191 /* intialize B PHY power control
 192  * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
 193  */
 194 static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
 195 {
 196         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 197         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 198         u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
 199         int must_reset_txpower = 0;
 200
 201         assert(phy->type != BCM43xx_PHYTYPE_A);
 202         if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
 203             (bcm->board_type == 0x0416))
 204                 return;
 205
 206         bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
 207         bcm43xx_phy_write(bcm, 0x0028, 0x8018);
 208
 209         if (phy->type == BCM43xx_PHYTYPE_G) {
 210                 if (!phy->connected)
 211                         return;
 212                 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
 213         }
 214         if (phy->savedpctlreg != 0xFFFF)
 215                 return;
 216
 217         if (phy->type == BCM43xx_PHYTYPE_B &&
 218             phy->rev >= 2 &&
 219             radio->version == 0x2050) {
 220                 bcm43xx_radio_write16(bcm, 0x0076,
 221                                       bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
 222         } else {
 223                 saved_batt = radio->baseband_atten;
 224                 saved_ratt = radio->radio_atten;
 225                 saved_txctl1 = radio->txctl1;
 226                 if ((radio->revision >= 6) && (radio->revision <= 8)
 227                     && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
 228                         bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
 229                 else
 230                         bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
 231                 must_reset_txpower = 1;
 232         }
 233         bcm43xx_dummy_transmission(bcm);
 234
 235         phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
 236
 237         if (must_reset_txpower)
 238                 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
 239         else
 240                 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
 241         bcm43xx_radio_clear_tssi(bcm);
 242 }
 243
 244 static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
 245 {
 246         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 247         u16 offset = 0x0000;
 248
 249         if (phy->rev == 1)
 250                 offset = 0x4C00;
 251
 252         bcm43xx_ilt_write(bcm, offset, 0x00FE);
 253         bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
 254         bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
 255         bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
 256
 257         if (phy->rev == 1) {
 258                 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
 259                 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
 260                 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
 261                 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
 262                 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
 263         }
 264
 265         bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
 266         bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
 267         bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
 268         bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
 269
 270         bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
 271
 272         bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
 273         bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
 274         bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
 275         bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
 276
 277         if (phy->rev == 1)
 278                 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
 279
 280         bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
 281         bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
 282         bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
 283         bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
 284         bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
 285         bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
 286         bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
 287         bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
 288         bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
 289
 290         if (phy->rev == 1) {
 291                 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
 292                 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
 293         } else {
 294                 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
 295                 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
 296                 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
 297         }
 298
 299         if (phy->rev > 2) {
 300                 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
 301                 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
 302         }
 303
 304         bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
 305         bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
 306
 307         if (phy->rev == 1) {
 308                 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
 309                 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
 310                 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
 311                 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
 312         }
 313
 314         bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
 315         bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
 316         bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
 317         bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
 318 }
 319
 320 static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
 321 {
 322         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 323         u16 i;
 324
 325         assert(phy->type == BCM43xx_PHYTYPE_G);
 326         if (phy->rev == 1) {
 327                 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
 328                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
 329                                   (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
 330                 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
 331                 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
 332
 333                 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
 334                         bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
 335                 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
 336                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
 337                 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
 338                         bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
 339         } else {
 340                 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
 341                 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
 342
 343                 if (phy->rev == 2) {
 344                         bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
 345                         bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
 346                 } else if (phy->rev > 2) {
 347                         bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
 348                         bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
 349                         bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
 350                 }
 351                 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
 352
 353                 for (i = 0; i < 64; i++)
 354                         bcm43xx_ilt_write(bcm, 0x4000 + i, i);
 355                 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
 356                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
 357         }
 358
 359         if (phy->rev <= 2)
 360                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
 361                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
 362         else if ((phy->rev == 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
 363                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
 364                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
 365         else
 366                 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
 367                         bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
 368
 369         if (phy->rev == 2)
 370                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
 371                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
 372         else if ((phy->rev > 2) && (phy->rev <= 7))
 373                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
 374                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
 375
 376         if (phy->rev == 1) {
 377                 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
 378                         bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
 379                 for (i = 0; i < 4; i++) {
 380                         bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
 381                         bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
 382                         bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
 383                         bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
 384                 }
 385                 bcm43xx_phy_agcsetup(bcm);
 386
 387                 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
 388                     (bcm->board_type == 0x0416) &&
 389                     (bcm->board_revision == 0x0017))
 390                         return;
 391
 392                 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
 393                 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
 394         } else {
 395                 for (i = 0; i <= 0x2F; i++)
 396                         bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
 397                 bcm43xx_phy_agcsetup(bcm);
 398                 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
 399                 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
 400                 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
 401                 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
 402
 403                 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
 404                     (bcm->board_type == 0x0416) &&
 405                     (bcm->board_revision == 0x0017))
 406                         return;
 407
 408                 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
 409                 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
 410         }
 411 }
 412
 413 /* Initialize the noisescaletable for APHY */
 414 static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
 415 {
 416         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 417         int i;
 418
 419         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
 420         for (i = 0; i < 12; i++) {
 421                 if (phy->rev == 2)
 422                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
 423                 else
 424                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
 425         }
 426         if (phy->rev == 2)
 427                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
 428         else
 429                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
 430         for (i = 0; i < 11; i++) {
 431                 if (phy->rev == 2)
 432                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
 433                 else
 434                         bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
 435         }
 436         if (phy->rev == 2)
 437                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
 438         else
 439                 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
 440 }
 441
 442 static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
 443 {
 444         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 445         u16 i;
 446
 447         assert(phy->type == BCM43xx_PHYTYPE_A);
 448         switch (phy->rev) {
 449         case 2:
 450                 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
 451                 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
 452                 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
 453
 454                 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
 455
 456                 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
 457                 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
 458                 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
 459                 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
 460
 461                 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
 462                 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
 463                 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
 464                 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
 465
 466                 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
 467                 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
 468                 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
 469
 470                 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
 471                 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
 472                 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
 473                 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
 474                 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
 475
 476                 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
 477                 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
 478                 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
 479                 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
 480                 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
 481                 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
 482                 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
 483
 484                 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
 485                 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
 486                 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
 487
 488                 for (i = 0; i < 16; i++)
 489                         bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
 490
 491                 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
 492                 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
 493                 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
 494                 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
 495
 496                 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
 497                         bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
 498                 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
 499                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
 500                 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
 501                         bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
 502                 bcm43xx_phy_init_noisescaletbl(bcm);
 503                 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
 504                         bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
 505                 break;
 506         case 3:
 507                 for (i = 0; i < 64; i++)
 508                         bcm43xx_ilt_write(bcm, 0x4000 + i, i);
 509
 510                 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
 511
 512                 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
 513                 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
 514                 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
 515
 516                 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
 517                 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
 518                 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
 519                 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
 520                 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
 521
 522                 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
 523                 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
 524                         bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
 525                 bcm43xx_phy_init_noisescaletbl(bcm);
 526                 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
 527                         bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
 528
 529                 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
 530
 531                 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
 532                 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
 533                 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
 534                 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
 535                 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
 536
 537                 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
 538                 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
 539                 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
 540                 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
 541                 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
 542                 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
 543                 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
 544
 545                 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
 546                 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
 547                 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
 548
 549                 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
 550                 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
 551                 break;
 552         default:
 553                 assert(0);
 554         }
 555 }
 556
 557 /* Initialize APHY. This is also called for the GPHY in some cases. */
 558 static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
 559 {
 560         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 561         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 562         u16 tval;
 563
 564         if (phy->type == BCM43xx_PHYTYPE_A) {
 565                 bcm43xx_phy_setupa(bcm);
 566         } else {
 567                 bcm43xx_phy_setupg(bcm);
 568                 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
 569                         bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
 570                 return;
 571         }
 572
 573         bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
 574                           (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
 575         bcm43xx_phy_write(bcm, 0x0034, 0x0001);
 576
 577         TODO();//TODO: RSSI AGC
 578         bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
 579                           bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
 580         bcm43xx_radio_init2060(bcm);
 581
 582         if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
 583             && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
 584                 if (radio->lofcal == 0xFFFF) {
 585                         TODO();//TODO: LOF Cal
 586                         bcm43xx_radio_set_tx_iq(bcm);
 587                 } else
 588                         bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
 589         }
 590
 591         bcm43xx_phy_write(bcm, 0x007A, 0xF111);
 592
 593         if (phy->savedpctlreg == 0xFFFF) {
 594                 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
 595                 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
 596
 597                 tval = bcm43xx_ilt_read(bcm, 0x3001);
 598                 if (phy->rev == 1) {
 599                         bcm43xx_ilt_write(bcm, 0x3001,
 600                                           (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
 601                                           | 0x0058);
 602                 } else {
 603                         bcm43xx_ilt_write(bcm, 0x3001,
 604                                           (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
 605                                           | 0x002C);
 606                 }
 607                 bcm43xx_dummy_transmission(bcm);
 608                 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
 609                 bcm43xx_ilt_write(bcm, 0x3001, tval);
 610
 611                 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
 612         }
 613         bcm43xx_radio_clear_tssi(bcm);
 614 }
 615
 616 static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
 617 {
 618         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 619         u16 offset, val;
 620
 621         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
 622         bcm43xx_phy_write(bcm, 0x0020, 0x301C);
 623         bcm43xx_phy_write(bcm, 0x0026, 0x0000);
 624         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
 625         bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
 626         val = 0x3C3D;
 627         for (offset = 0x0089; offset < 0x00A7; offset++) {
 628                 bcm43xx_phy_write(bcm, offset, val);
 629                 val -= 0x0202;
 630         }
 631         bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
 632         if (radio->channel == 0xFF)
 633                 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
 634         else
 635                 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
 636         if (radio->version != 0x2050) {
 637                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
 638                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
 639         }
 640         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 641         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
 642         if (radio->version == 0x2050) {
 643                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 644                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
 645                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
 646                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
 647                 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
 648                 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
 649                 bcm43xx_radio_init2050(bcm);
 650         }
 651         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
 652         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
 653         bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
 654         bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
 655         bcm43xx_phy_lo_b_measure(bcm);
 656         bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
 657         if (radio->version != 0x2050)
 658                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
 659         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
 660         bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
 661         if (radio->version != 0x2050)
 662                 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
 663         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
 664         bcm43xx_phy_init_pctl(bcm);
 665 }
 666
 667 static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
 668 {
 669         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 670         u16 offset, val;
 671
 672         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
 673         bcm43xx_phy_write(bcm, 0x0020, 0x301C);
 674         bcm43xx_phy_write(bcm, 0x0026, 0x0000);
 675         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
 676         bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
 677         val = 0x3C3D;
 678         for (offset = 0x0089; offset < 0x00A7; offset++) {
 679                 bcm43xx_phy_write(bcm, offset, val);
 680                 val -= 0x0202;
 681         }
 682         bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
 683         if (radio->channel == 0xFF)
 684                 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
 685         else
 686                 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
 687         if (radio->version != 0x2050) {
 688                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
 689                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
 690         }
 691         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 692         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
 693         if (radio->version == 0x2050) {
 694                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 695                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
 696                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
 697                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
 698                 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
 699                 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
 700                 bcm43xx_radio_init2050(bcm);
 701         }
 702         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
 703         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
 704         if (radio->version == 0x2050)
 705                 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
 706         bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
 707
 708         bcm43xx_phy_lo_b_measure(bcm);
 709
 710         bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
 711         if (radio->version == 0x2050)
 712                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
 713         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
 714         bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
 715         if (radio->version == 0x2050)
 716                 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
 717         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
 718         if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
 719                 bcm43xx_calc_nrssi_slope(bcm);
 720                 bcm43xx_calc_nrssi_threshold(bcm);
 721         }
 722         bcm43xx_phy_init_pctl(bcm);
 723 }
 724
 725 static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
 726 {
 727         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 728         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 729         u16 offset;
 730
 731         if (phy->version == 1 &&
 732             radio->version == 0x2050) {
 733                 bcm43xx_radio_write16(bcm, 0x007A,
 734                                       bcm43xx_radio_read16(bcm, 0x007A)
 735                                       | 0x0050);
 736         }
 737         if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
 738             (bcm->board_type != 0x0416)) {
 739                 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
 740                         bcm43xx_phy_write(bcm, offset,
 741                                           (bcm43xx_phy_read(bcm, offset) + 0x2020)
 742                                           & 0x3F3F);
 743                 }
 744         }
 745         bcm43xx_phy_write(bcm, 0x0035,
 746                           (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
 747                           | 0x0700);
 748         if (radio->version == 0x2050)
 749                 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
 750
 751         if (phy->connected) {
 752                 if (radio->version == 0x2050) {
 753                         bcm43xx_radio_write16(bcm, 0x007A,
 754                                               bcm43xx_radio_read16(bcm, 0x007A)
 755                                               | 0x0020);
 756                         bcm43xx_radio_write16(bcm, 0x0051,
 757                                               bcm43xx_radio_read16(bcm, 0x0051)
 758                                               | 0x0004);
 759                 }
 760                 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
 761
 762                 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
 763                 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
 764
 765                 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
 766
 767                 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
 768                 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
 769                 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
 770         }
 771
 772         if (bcm->bad_frames_preempt) {
 773                 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
 774                                   bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
 775         }
 776
 777         if (phy->version == 1 && radio->version == 0x2050) {
 778                 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
 779                 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
 780                 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
 781                 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
 782                 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
 783         } else
 784                 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
 785         bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
 786         bcm43xx_write16(bcm, 0x03EC, 0x3F22);
 787
 788         if (phy->version == 1 && radio->version == 0x2050)
 789                 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
 790         else
 791                 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
 792
 793         if (phy->version == 0)
 794                 bcm43xx_write16(bcm, 0x03E4, 0x3000);
 795
 796         /* Force to channel 7, even if not supported. */
 797         bcm43xx_radio_selectchannel(bcm, 7, 0);
 798
 799         if (radio->version != 0x2050) {
 800                 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
 801                 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
 802         }
 803
 804         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 805         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
 806
 807         if (radio->version == 0x2050) {
 808                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 809                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
 810         }
 811
 812         bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
 813         bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
 814
 815         bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
 816
 817         bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
 818
 819         bcm43xx_phy_write(bcm, 0x0014, 0x0080);
 820         bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
 821         bcm43xx_phy_write(bcm, 0x88A3, 0x002A);
 822
 823         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
 824
 825         if (radio->version == 0x2050)
 826                 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
 827
 828         bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
 829 }
 830
 831 static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
 832 {
 833         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
 834         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
 835         u16 offset, val;
 836
 837         bcm43xx_phy_write(bcm, 0x003E, 0x817A);
 838         bcm43xx_radio_write16(bcm, 0x007A,
 839                               (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
 840         if ((radio->manufact == 0x17F) &&
 841             (radio->version == 0x2050) &&
 842             (radio->revision == 3 ||
 843              radio->revision == 4 ||
 844              radio->revision == 5)) {
 845                 bcm43xx_radio_write16(bcm, 0x0051, 0x001F);
 846                 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
 847                 bcm43xx_radio_write16(bcm, 0x0053, 0x005B);
 848                 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
 849                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
 850                 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
 851                 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
 852                 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
 853                 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
 854         }
 855         if ((radio->manufact == 0x17F) &&
 856             (radio->version == 0x2050) &&
 857             (radio->revision == 6)) {
 858                 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
 859                 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
 860                 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
 861                 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
 862                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
 863                 bcm43xx_radio_write16(bcm, 0x005B, 0x008B);
 864                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B5);
 865                 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
 866                 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
 867                 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
 868                 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
 869                 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
 870         }
 871         if ((radio->manufact == 0x17F) &&
 872             (radio->version == 0x2050) &&
 873             (radio->revision == 7)) {
 874                 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
 875                 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
 876                 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
 877                 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
 878                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
 879                 bcm43xx_radio_write16(bcm, 0x005B, 0x00A8);
 880                 bcm43xx_radio_write16(bcm, 0x005C, 0x0075);
 881                 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
 882                 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
 883                 bcm43xx_radio_write16(bcm, 0x007D, 0x00E8);
 884                 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
 885                 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
 886                 bcm43xx_radio_write16(bcm, 0x007B, 0x0000);
 887         }
 888         if ((radio->manufact == 0x17F) &&
 889             (radio->version == 0x2050) &&
 890             (radio->revision == 8)) {
 891                 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
 892                 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
 893                 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
 894                 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
 895                 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
 896                 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
 897                 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
 898                 if (bcm->sprom.boardflags & 0x8000) {
 899                         bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
 900                         bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
 901                 } else {
 902                         bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
 903                         bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
 904                 }
 905                 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
 906                 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
 907                 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
 908                 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
 909         }
 910         val = 0x1E1F;
 911         for (offset = 0x0088; offset < 0x0098; offset++) {
 912                 bcm43xx_phy_write(bcm, offset, val);
 913                 val -= 0x0202;
 914         }
 915         val = 0x3E3F;
 916         for (offset = 0x0098; offset < 0x00A8; offset++) {
 917                 bcm43xx_phy_write(bcm, offset, val);
 918                 val -= 0x0202;
 919         }
 920         val = 0x2120;
 921         for (offset = 0x00A8; offset < 0x00C8; offset++) {
 922                 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
 923                 val += 0x0202;
 924         }
 925         if (phy->type == BCM43xx_PHYTYPE_G) {
 926                 bcm43xx_radio_write16(bcm, 0x007A,
 927                                       bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
 928                 bcm43xx_radio_write16(bcm, 0x0051,
 929                                       bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
 930                 bcm43xx_phy_write(bcm, 0x0802,
 931                                   bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
 932                 bcm43xx_phy_write(bcm, 0x042B,
 933                                   bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
 934         }
 935
 936         /* Force to channel 7, even if not supported. */
 937         bcm43xx_radio_selectchannel(bcm, 7, 0);
 938
 939         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 940         bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
 941         udelay(40);
 942         bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C) | 0x0002));
 943         bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 944         if (radio->manufact == 0x17F &&
 945             radio->version == 0x2050 &&
 946             radio->revision <= 2) {
 947                 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
 948                 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
 949                 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
 950                 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
 951         }
 952         bcm43xx_radio_write16(bcm, 0x007A,
 953                               (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
 954
 955         bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
 956
 957         bcm43xx_phy_write(bcm, 0x0014, 0x0200);
 958         if (radio->version == 0x2050){
 959                 if (radio->revision == 3 ||
 960                     radio->revision == 4 ||
 961                     radio->revision == 5)
 962                         bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
 963                 else
 964                         bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
 965         }
 966         bcm43xx_phy_write(bcm, 0x0038, 0x0668);
 967         bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
 968         if (radio->version == 0x2050) {
 969                 if (radio->revision == 3 ||
 970                     radio->revision == 4 ||
 971                     radio->revision == 5)
 972                         bcm43xx_phy_write(bcm, 0x005D, bcm43xx_phy_read(bcm, 0x005D) | 0x0003);
 973                 else if (radio->revision <= 2)
 974                         bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
 975         }
 976
 977         if (phy->rev == 4)
 978                 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
 979         else
 980                 bcm43xx_write16(bcm, 0x03E4, 0x0009);
 981         if (phy->type == BCM43xx_PHYTYPE_B) {
 982                 bcm43xx_write16(bcm, 0x03E6, 0x8140);
 983                 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
 984                 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
 985                 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
 986                 (void) bcm43xx_radio_calibrationvalue(bcm);
 987                 bcm43xx_phy_lo_b_measure(bcm);
 988                 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
 989                         bcm43xx_calc_nrssi_slope(bcm);
 990                         bcm43xx_calc_nrssi_threshold(bcm);
 991                 }
 992                 bcm43xx_phy_init_pctl(bcm);
 993         } else
 994                 bcm43xx_write16(bcm, 0x03E6, 0x0);
 995 }
 996
 997 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
 998 {
 999         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1000         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1001         u16 tmp;
1002
1003         if (phy->rev == 1)
1004                 bcm43xx_phy_initb5(bcm);
1005         else if (phy->rev >= 2 && phy->rev <= 7)
1006                 bcm43xx_phy_initb6(bcm);
1007         if (phy->rev >= 2 || phy->connected)
1008                 bcm43xx_phy_inita(bcm);
1009
1010         if (phy->rev >= 2) {
1011                 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1012                 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1013                 if (phy->rev == 2)
1014                         bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1015                 else if (phy->rev >= 3)
1016                         bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1017                 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1018                 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1019                 if (tmp == 3) {
1020                         bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1021                         bcm43xx_phy_write(bcm, 0x04C3, 0x8606);
1022                 } else if (tmp == 4 || tmp == 5) {
1023                         bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1024                         bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1025                         bcm43xx_phy_write(bcm, 0x04CC, (bcm43xx_phy_read(bcm, 0x04CC)
1026                                           & 0x00FF) | 0x1F00);
1027                 }
1028         }
1029         if (radio->revision <= 3 && phy->connected)
1030                 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1031         if (radio->revision >= 6 && radio->revision <= 8) {
1032                 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1033                 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1034         }
1035         if (radio->initval == 0xFFFF) {
1036                 radio->initval = bcm43xx_radio_init2050(bcm);
1037                 bcm43xx_phy_lo_g_measure(bcm);
1038         } else {
1039                 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1040                 bcm43xx_radio_write16(bcm, 0x0052,
1041                                       (bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0)
1042                                       | radio->txctl2);
1043         }
1044
1045         if (phy->connected) {
1046                 bcm43xx_phy_lo_adjust(bcm, 0);
1047                 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1048
1049                 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1050                         bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1051                 else
1052                         bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1053
1054                 if (phy->rev < 2)
1055                         bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1056                 else
1057                         bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1058         }
1059
1060         if ((bcm->sprom.boardflags & BCM43xx_BFL_RSSI) == 0) {
1061                 FIXME();//FIXME: 0x7FFFFFFF should be 16-bit !
1062                 bcm43xx_nrssi_hw_update(bcm, (u16)0x7FFFFFFF);
1063                 bcm43xx_calc_nrssi_threshold(bcm);
1064         } else if (phy->connected) {
1065                 if (radio->nrssi[0] == -1000) {
1066                         assert(radio->nrssi[1] == -1000);
1067                         bcm43xx_calc_nrssi_slope(bcm);
1068                 } else
1069                         bcm43xx_calc_nrssi_threshold(bcm);
1070         }
1071         bcm43xx_phy_init_pctl(bcm);
1072 }
1073
1074 static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1075 {
1076         int i;
1077         u16 ret = 0;
1078
1079         for (i = 0; i < 10; i++){
1080                 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1081                 udelay(1);
1082                 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1083                 udelay(10);
1084                 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1085                 udelay(40);
1086                 ret += bcm43xx_phy_read(bcm, 0x002C);
1087         }
1088
1089         return ret;
1090 }
1091
1092 void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1093 {
1094         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1095         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1096         u16 regstack[12] = { 0 };
1097         u16 mls;
1098         u16 fval;
1099         int i, j;
1100
1101         regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1102         regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1103
1104         if (radio->version == 0x2053) {
1105                 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1106                 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1107                 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1108                 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1109                 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1110                 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1111
1112                 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1113                 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1114                 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1115                 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1116
1117                 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1118                 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1119                 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1120                 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1121         }
1122         bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1123         bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1124
1125         if (radio->version == 0x2053) {
1126                 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1127                 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1128         }
1129
1130         phy->minlowsig[0] = 0xFFFF;
1131
1132         for (i = 0; i < 4; i++) {
1133                 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1134                 bcm43xx_phy_lo_b_r15_loop(bcm);
1135         }
1136         for (i = 0; i < 10; i++) {
1137                 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1138                 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1139                 if (mls < phy->minlowsig[0]) {
1140                         phy->minlowsig[0] = mls;
1141                         phy->minlowsigpos[0] = i;
1142                 }
1143         }
1144         bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1145
1146         phy->minlowsig[1] = 0xFFFF;
1147
1148         for (i = -4; i < 5; i += 2) {
1149                 for (j = -4; j < 5; j += 2) {
1150                         if (j < 0)
1151                                 fval = (0x0100 * i) + j + 0x0100;
1152                         else
1153                                 fval = (0x0100 * i) + j;
1154                         bcm43xx_phy_write(bcm, 0x002F, fval);
1155                         mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1156                         if (mls < phy->minlowsig[1]) {
1157                                 phy->minlowsig[1] = mls;
1158                                 phy->minlowsigpos[1] = fval;
1159                         }
1160                 }
1161         }
1162         phy->minlowsigpos[1] += 0x0101;
1163
1164         bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1165         if (radio->version == 0x2053) {
1166                 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1167                 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1168                 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1169                 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1170                 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1171                 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1172
1173                 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1174                 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1175
1176                 bcm43xx_radio_write16(bcm, 0x0052,
1177                                       (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1178                                       | regstack[11]);
1179
1180                 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1181         }
1182         bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1183 }
1184
1185 static inline
1186 u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1187 {
1188         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1189
1190         if (phy->connected) {
1191                 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1192                 control <<= 8;
1193                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1194                 udelay(5);
1195                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1196                 udelay(2);
1197                 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1198                 udelay(4);
1199                 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1200                 udelay(8);
1201         } else {
1202                 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1203                 udelay(2);
1204                 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1205                 udelay(4);
1206                 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1207                 udelay(8);
1208         }
1209
1210         return bcm43xx_phy_read(bcm, 0x002D);
1211 }
1212
1213 static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1214 {
1215         int i;
1216         u32 ret = 0;
1217
1218         for (i = 0; i < 8; i++)
1219                 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1220
1221         return ret;
1222 }
1223
1224 /* Write the LocalOscillator CONTROL */
1225 static inline
1226 void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1227                       struct bcm43xx_lopair *pair)
1228 {
1229         u16 value;
1230
1231         value = (u8)(pair->low);
1232         value |= ((u8)(pair->high)) << 8;
1233
1234 #ifdef CONFIG_BCM43XX_DEBUG
1235         /* Sanity check. */
1236         if (pair->low < -8 || pair->low > 8 ||
1237             pair->high < -8 || pair->high > 8) {
1238                 printk(KERN_WARNING PFX
1239                        "WARNING: Writing invalid LOpair "
1240                        "(low: %d, high: %d, index: %lu)\n",
1241                        pair->low, pair->high,
1242                        (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1243                 dump_stack();
1244         }
1245 #endif
1246
1247         bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1248 }
1249
1250 static inline
1251 struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1252                                             u16 baseband_attenuation,
1253                                             u16 radio_attenuation,
1254                                             u16 tx)
1255 {
1256         static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1257         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1258
1259         if (baseband_attenuation > 6)
1260                 baseband_attenuation = 6;
1261         assert(radio_attenuation < 10);
1262
1263         if (tx == 3) {
1264                 return bcm43xx_get_lopair(phy,
1265                                           radio_attenuation,
1266                                           baseband_attenuation);
1267         }
1268         return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1269 }
1270
1271 static inline
1272 struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1273 {
1274         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1275
1276         return bcm43xx_find_lopair(bcm,
1277                                    radio->baseband_atten,
1278                                    radio->radio_atten,
1279                                    radio->txctl1);
1280 }
1281
1282 /* Adjust B/G LO */
1283 void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1284 {
1285         struct bcm43xx_lopair *pair;
1286
1287         if (fixed) {
1288                 /* Use fixed values. Only for initialization. */
1289                 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1290         } else
1291                 pair = bcm43xx_current_lopair(bcm);
1292         bcm43xx_lo_write(bcm, pair);
1293 }
1294
1295 static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1296 {
1297         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1298         u16 txctl2 = 0, i;
1299         u32 smallest, tmp;
1300
1301         bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1302         udelay(10);
1303         smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1304         for (i = 0; i < 16; i++) {
1305                 bcm43xx_radio_write16(bcm, 0x0052, i);
1306                 udelay(10);
1307                 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1308                 if (tmp < smallest) {
1309                         smallest = tmp;
1310                         txctl2 = i;
1311                 }
1312         }
1313         radio->txctl2 = txctl2;
1314 }
1315
1316 static
1317 void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1318                             const struct bcm43xx_lopair *in_pair,
1319                             struct bcm43xx_lopair *out_pair,
1320                             u16 r27)
1321 {
1322         static const struct bcm43xx_lopair transitions[8] = {
1323                 { .high =  1,  .low =  1, },
1324                 { .high =  1,  .low =  0, },
1325                 { .high =  1,  .low = -1, },
1326                 { .high =  0,  .low = -1, },
1327                 { .high = -1,  .low = -1, },
1328                 { .high = -1,  .low =  0, },
1329                 { .high = -1,  .low =  1, },
1330                 { .high =  0,  .low =  1, },
1331         };
1332         struct bcm43xx_lopair lowest_transition = {
1333                 .high = in_pair->high,
1334                 .low = in_pair->low,
1335         };
1336         struct bcm43xx_lopair tmp_pair;
1337         struct bcm43xx_lopair transition;
1338         int i = 12;
1339         int state = 0;
1340         int found_lower;
1341         int j, begin, end;
1342         u32 lowest_deviation;
1343         u32 tmp;
1344
1345         /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1346
1347         bcm43xx_lo_write(bcm, &lowest_transition);
1348         lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1349         do {
1350                 found_lower = 0;
1351                 assert(state >= 0 && state <= 8);
1352                 if (state == 0) {
1353                         begin = 1;
1354                         end = 8;
1355                 } else if (state % 2 == 0) {
1356                         begin = state - 1;
1357                         end = state + 1;
1358                 } else {
1359                         begin = state - 2;
1360                         end = state + 2;
1361                 }
1362                 if (begin < 1)
1363                         begin += 8;
1364                 if (end > 8)
1365                         end -= 8;
1366
1367                 j = begin;
1368                 tmp_pair.high = lowest_transition.high;
1369                 tmp_pair.low = lowest_transition.low;
1370                 while (1) {
1371                         assert(j >= 1 && j <= 8);
1372                         transition.high = tmp_pair.high + transitions[j - 1].high;
1373                         transition.low = tmp_pair.low + transitions[j - 1].low;
1374                         if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1375                                 bcm43xx_lo_write(bcm, &transition);
1376                                 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1377                                 if (tmp < lowest_deviation) {
1378                                         lowest_deviation = tmp;
1379                                         state = j;
1380                                         found_lower = 1;
1381
1382                                         lowest_transition.high = transition.high;
1383                                         lowest_transition.low = transition.low;
1384                                 }
1385                         }
1386                         if (j == end)
1387                                 break;
1388                         if (j == 8)
1389                                 j = 1;
1390                         else
1391                                 j++;
1392                 }
1393         } while (i-- && found_lower);
1394
1395         out_pair->high = lowest_transition.high;
1396         out_pair->low = lowest_transition.low;
1397 }
1398
1399 /* Set the baseband attenuation value on chip. */
1400 void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1401                                           u16 baseband_attenuation)
1402 {
1403         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1404         u16 value;
1405
1406         if (phy->version == 0) {
1407                 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1408                 value |= (baseband_attenuation & 0x000F);
1409                 bcm43xx_write16(bcm, 0x03E6, value);
1410                 return;
1411         }
1412
1413         if (phy->version > 1) {
1414                 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1415                 value |= (baseband_attenuation << 2) & 0x003C;
1416         } else {
1417                 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1418                 value |= (baseband_attenuation << 3) & 0x0078;
1419         }
1420         bcm43xx_phy_write(bcm, 0x0060, value);
1421 }
1422
1423 /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1424 void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1425 {
1426         static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1427         const int is_initializing = bcm43xx_is_initializing(bcm);
1428         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1429         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1430         u16 h, i, oldi = 0, j;
1431         struct bcm43xx_lopair control;
1432         struct bcm43xx_lopair *tmp_control;
1433         u16 tmp;
1434         u16 regstack[16] = { 0 };
1435         u8 oldchannel;
1436
1437         //XXX: What are these?
1438         u8 r27 = 0, r31;
1439
1440         oldchannel = radio->channel;
1441         /* Setup */
1442         if (phy->connected) {
1443                 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1444                 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1445                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1446                 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1447         }
1448         regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1449         bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1450         regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1451         regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1452         regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1453         regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1454         regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1455         regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1456         regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1457         regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1458         if (phy->connected) {
1459                 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1460                 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1461                 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1462                 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1463         }
1464         bcm43xx_radio_selectchannel(bcm, 6, 0);
1465         if (phy->connected) {
1466                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1467                 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1468                 bcm43xx_dummy_transmission(bcm);
1469         }
1470         bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1471
1472         bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1473
1474         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1475         bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1476         bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1477         bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1478         bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1479         bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1480         bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1481         if (phy->connected) {
1482                 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1483                 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1484                 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1485                 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1486         }
1487         if (is_initializing)
1488                 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1489         bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1490
1491         /* Measure */
1492         control.low = 0;
1493         control.high = 0;
1494         for (h = 0; h < 10; h++) {
1495                 /* Loop over each possible RadioAttenuation (0-9) */
1496                 i = pairorder[h];
1497                 if (is_initializing) {
1498                         if (i == 3) {
1499                                 control.low = 0;
1500                                 control.high = 0;
1501                         } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1502                                   ((i % 2 == 0) && (oldi % 2 == 0))) {
1503                                 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1504                                 memcpy(&control, tmp_control, sizeof(control));
1505                         } else {
1506                                 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1507                                 memcpy(&control, tmp_control, sizeof(control));
1508                         }
1509                 }
1510                 /* Loop over each possible BasebandAttenuation/2 */
1511                 for (j = 0; j < 4; j++) {
1512                         if (is_initializing) {
1513                                 tmp = i * 2 + j;
1514                                 r27 = 0;
1515                                 r31 = 0;
1516                                 if (tmp > 14) {
1517                                         r31 = 1;
1518                                         if (tmp > 17)
1519                                                 r27 = 1;
1520                                         if (tmp > 19)
1521                                                 r27 = 2;
1522                                 }
1523                         } else {
1524                                 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1525                                 if (!tmp_control->used)
1526                                         continue;
1527                                 memcpy(&control, tmp_control, sizeof(control));
1528                                 r27 = 3;
1529                                 r31 = 0;
1530                         }
1531                         bcm43xx_radio_write16(bcm, 0x43, i);
1532                         bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
1533                         udelay(10);
1534
1535                         bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1536
1537                         tmp = (regstack[10] & 0xFFF0);
1538                         if (r31)
1539                                 tmp |= 0x0008;
1540                         bcm43xx_radio_write16(bcm, 0x007A, tmp);
1541
1542                         tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1543                         bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1544                 }
1545                 oldi = i;
1546         }
1547         /* Loop over each possible RadioAttenuation (10-13) */
1548         for (i = 10; i < 14; i++) {
1549                 /* Loop over each possible BasebandAttenuation/2 */
1550                 for (j = 0; j < 4; j++) {
1551                         if (is_initializing) {
1552                                 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1553                                 memcpy(&control, tmp_control, sizeof(control));
1554                                 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1555                                 r27 = 0;
1556                                 r31 = 0;
1557                                 if (tmp > 14) {
1558                                         r31 = 1;
1559                                         if (tmp > 17)
1560                                                 r27 = 1;
1561                                         if (tmp > 19)
1562                                                 r27 = 2;
1563                                 }
1564                         } else {
1565                                 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1566                                 if (!tmp_control->used)
1567                                         continue;
1568                                 memcpy(&control, tmp_control, sizeof(control));
1569                                 r27 = 3;
1570                                 r31 = 0;
1571                         }
1572                         bcm43xx_radio_write16(bcm, 0x43, i - 9);
1573                         bcm43xx_radio_write16(bcm, 0x52,
1574                                               radio->txctl2
1575                                               | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1576                         udelay(10);
1577
1578                         bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1579
1580                         tmp = (regstack[10] & 0xFFF0);
1581                         if (r31)
1582                                 tmp |= 0x0008;
1583                         bcm43xx_radio_write16(bcm, 0x7A, tmp);
1584
1585                         tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1586                         bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1587                 }
1588         }
1589
1590         /* Restoration */
1591         if (phy->connected) {
1592                 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1593                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1594                 udelay(5);
1595                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1596                 udelay(2);
1597                 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1598         } else
1599                 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1600         bcm43xx_phy_lo_adjust(bcm, is_initializing);
1601         bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1602         if (phy->connected)
1603                 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1604         else
1605                 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1606         bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1607         bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1608         bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1609         bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1610         bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1611         bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1612         bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1613         regstack[11] &= 0x00F0;
1614         regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1615         bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1616         bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1617         if (phy->connected) {
1618                 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1619                 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1620                 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1621                 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1622                 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1623                 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1624         }
1625         bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1626
1627 #ifdef CONFIG_BCM43XX_DEBUG
1628         {
1629                 /* Sanity check for all lopairs. */
1630                 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1631                         tmp_control = phy->_lo_pairs + i;
1632                         if (tmp_control->low < -8 || tmp_control->low > 8 ||
1633                             tmp_control->high < -8 || tmp_control->high > 8) {
1634                                 printk(KERN_WARNING PFX
1635                                        "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1636                                        tmp_control->low, tmp_control->high, i);
1637                         }
1638                 }
1639         }
1640 #endif /* CONFIG_BCM43XX_DEBUG */
1641 }
1642
1643 static
1644 void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1645 {
1646         struct bcm43xx_lopair *pair;
1647
1648         pair = bcm43xx_current_lopair(bcm);
1649         pair->used = 1;
1650 }
1651
1652 void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1653 {
1654         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1655         struct bcm43xx_lopair *pair;
1656         int i;
1657
1658         for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1659                 pair = phy->_lo_pairs + i;
1660                 pair->used = 0;
1661         }
1662 }
1663
1664 /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1665  * This function converts a TSSI value to dBm in Q5.2
1666  */
1667 static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1668 {
1669         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1670         s8 dbm = 0;
1671         s32 tmp;
1672
1673         tmp = phy->idle_tssi;
1674         tmp += tssi;
1675         tmp -= phy->savedpctlreg;
1676
1677         switch (phy->type) {
1678                 case BCM43xx_PHYTYPE_A:
1679                         tmp += 0x80;
1680                         tmp = limit_value(tmp, 0x00, 0xFF);
1681                         dbm = phy->tssi2dbm[tmp];
1682                         TODO(); //TODO: There's a FIXME on the specs
1683                         break;
1684                 case BCM43xx_PHYTYPE_B:
1685                 case BCM43xx_PHYTYPE_G:
1686                         tmp = limit_value(tmp, 0x00, 0x3F);
1687                         dbm = phy->tssi2dbm[tmp];
1688                         break;
1689                 default:
1690                         assert(0);
1691         }
1692
1693         return dbm;
1694 }
1695
1696 /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1697 void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1698 {
1699         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1700         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1701
1702         if (phy->savedpctlreg == 0xFFFF)
1703                 return;
1704         if ((bcm->board_type == 0x0416) &&
1705             (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1706                 return;
1707
1708         switch (phy->type) {
1709         case BCM43xx_PHYTYPE_A: {
1710
1711                 TODO(); //TODO: Nothing for A PHYs yet :-/
1712
1713                 break;
1714         }
1715         case BCM43xx_PHYTYPE_B:
1716         case BCM43xx_PHYTYPE_G: {
1717                 u16 tmp;
1718                 u16 txpower;
1719                 s8 v0, v1, v2, v3;
1720                 s8 average;
1721                 u8 max_pwr;
1722                 s16 desired_pwr, estimated_pwr, pwr_adjust;
1723                 s16 radio_att_delta, baseband_att_delta;
1724                 s16 radio_attenuation, baseband_attenuation;
1725                 unsigned long phylock_flags;
1726
1727                 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1728                 v0 = (s8)(tmp & 0x00FF);
1729                 v1 = (s8)((tmp & 0xFF00) >> 8);
1730                 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1731                 v2 = (s8)(tmp & 0x00FF);
1732                 v3 = (s8)((tmp & 0xFF00) >> 8);
1733                 tmp = 0;
1734
1735                 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1736                         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1737                         v0 = (s8)(tmp & 0x00FF);
1738                         v1 = (s8)((tmp & 0xFF00) >> 8);
1739                         tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1740                         v2 = (s8)(tmp & 0x00FF);
1741                         v3 = (s8)((tmp & 0xFF00) >> 8);
1742                         if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1743                                 return;
1744                         v0 = (v0 + 0x20) & 0x3F;
1745                         v1 = (v1 + 0x20) & 0x3F;
1746                         v2 = (v2 + 0x20) & 0x3F;
1747                         v3 = (v3 + 0x20) & 0x3F;
1748                         tmp = 1;
1749                 }
1750                 bcm43xx_radio_clear_tssi(bcm);
1751
1752                 average = (v0 + v1 + v2 + v3 + 2) / 4;
1753
1754                 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1755                         average -= 13;
1756
1757                 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1758
1759                 max_pwr = bcm->sprom.maxpower_bgphy;
1760
1761                 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1762                     (phy->type == BCM43xx_PHYTYPE_G))
1763                         max_pwr -= 0x3;
1764
1765                 /*TODO:
1766                 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1767                         where REG is the max power as per the regulatory domain
1768                 */
1769
1770                 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
1771                 /* Check if we need to adjust the current power. */
1772                 pwr_adjust = desired_pwr - estimated_pwr;
1773                 radio_att_delta = -(pwr_adjust + 7) >> 3;
1774                 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
1775                 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
1776                         bcm43xx_phy_lo_mark_current_used(bcm);
1777                         return;
1778                 }
1779
1780                 /* Calculate the new attenuation values. */
1781                 baseband_attenuation = radio->baseband_atten;
1782                 baseband_attenuation += baseband_att_delta;
1783                 radio_attenuation = radio->radio_atten;
1784                 radio_attenuation += radio_att_delta;
1785
1786                 /* Get baseband and radio attenuation values into their permitted ranges.
1787                  * baseband 0-11, radio 0-9.
1788                  * Radio attenuation affects power level 4 times as much as baseband.
1789                  */
1790                 if (radio_attenuation < 0) {
1791                         baseband_attenuation -= (4 * -radio_attenuation);
1792                         radio_attenuation = 0;
1793                 } else if (radio_attenuation > 9) {
1794                         baseband_attenuation += (4 * (radio_attenuation - 9));
1795                         radio_attenuation = 9;
1796                 } else {
1797                         while (baseband_attenuation < 0 && radio_attenuation > 0) {
1798                                 baseband_attenuation += 4;
1799                                 radio_attenuation--;
1800                         }
1801                         while (baseband_attenuation > 11 && radio_attenuation < 9) {
1802                                 baseband_attenuation -= 4;
1803                                 radio_attenuation++;
1804                         }
1805                 }
1806                 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
1807
1808                 txpower = radio->txctl1;
1809                 if ((radio->version == 0x2050) && (radio->revision == 2)) {
1810                         if (radio_attenuation <= 1) {
1811                                 if (txpower == 0) {
1812                                         txpower = 3;
1813                                         radio_attenuation += 2;
1814                                         baseband_attenuation += 2;
1815                                 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
1816                                         baseband_attenuation += 4 * (radio_attenuation - 2);
1817                                         radio_attenuation = 2;
1818                                 }
1819                         } else if (radio_attenuation > 4 && txpower != 0) {
1820                                 txpower = 0;
1821                                 if (baseband_attenuation < 3) {
1822                                         radio_attenuation -= 3;
1823                                         baseband_attenuation += 2;
1824                                 } else {
1825                                         radio_attenuation -= 2;
1826                                         baseband_attenuation -= 2;
1827                                 }
1828                         }
1829                 }
1830                 radio->txctl1 = txpower;
1831                 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
1832                 radio_attenuation = limit_value(radio_attenuation, 0, 9);
1833
1834                 bcm43xx_phy_lock(bcm, phylock_flags);
1835                 bcm43xx_radio_lock(bcm);
1836                 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
1837                                              radio_attenuation, txpower);
1838                 bcm43xx_phy_lo_mark_current_used(bcm);
1839                 bcm43xx_radio_unlock(bcm);
1840                 bcm43xx_phy_unlock(bcm, phylock_flags);
1841                 break;
1842         }
1843         default:
1844                 assert(0);
1845         }
1846 }
1847
1848 static inline
1849 s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
1850 {
1851         if (num < 0)
1852                 return num/den;
1853         else
1854                 return (num+den/2)/den;
1855 }
1856
1857 static inline
1858 s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
1859 {
1860         s32 m1, m2, f = 256, q, delta;
1861         s8 i = 0;
1862
1863         m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
1864         m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
1865         do {
1866                 if (i > 15)
1867                         return -EINVAL;
1868                 q = bcm43xx_tssi2dbm_ad(f * 4096 -
1869                                         bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
1870                 delta = abs(q - f);
1871                 f = q;
1872                 i++;
1873         } while (delta >= 2);
1874         entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
1875         return 0;
1876 }
1877
1878 /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
1879 int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
1880 {
1881         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1882         struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1883         s16 pab0, pab1, pab2;
1884         u8 idx;
1885         s8 *dyn_tssi2dbm;
1886
1887         if (phy->type == BCM43xx_PHYTYPE_A) {
1888                 pab0 = (s16)(bcm->sprom.pa1b0);
1889                 pab1 = (s16)(bcm->sprom.pa1b1);
1890                 pab2 = (s16)(bcm->sprom.pa1b2);
1891         } else {
1892                 pab0 = (s16)(bcm->sprom.pa0b0);
1893                 pab1 = (s16)(bcm->sprom.pa0b1);
1894                 pab2 = (s16)(bcm->sprom.pa0b2);
1895         }
1896
1897         if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
1898                 phy->idle_tssi = 0x34;
1899                 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
1900                 return 0;
1901         }
1902
1903         if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
1904             pab0 != -1 && pab1 != -1 && pab2 != -1) {
1905                 /* The pabX values are set in SPROM. Use them. */
1906                 if (phy->type == BCM43xx_PHYTYPE_A) {
1907                         if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
1908                             (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
1909                                 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
1910                         else
1911                                 phy->idle_tssi = 62;
1912                 } else {
1913                         if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
1914                             (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
1915                                 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
1916                         else
1917                                 phy->idle_tssi = 62;
1918                 }
1919                 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
1920                 if (dyn_tssi2dbm == NULL) {
1921                         printk(KERN_ERR PFX "Could not allocate memory"
1922                                             "for tssi2dbm table\n");
1923                         return -ENOMEM;
1924                 }
1925                 for (idx = 0; idx < 64; idx++)
1926                         if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
1927                                 phy->tssi2dbm = NULL;
1928                                 printk(KERN_ERR PFX "Could not generate "
1929                                                     "tssi2dBm table\n");
1930                                 return -ENODEV;
1931                         }
1932                 phy->tssi2dbm = dyn_tssi2dbm;
1933                 phy->dyn_tssi_tbl = 1;
1934         } else {
1935                 /* pabX values not set in SPROM. */
1936                 switch (phy->type) {
1937                 case BCM43xx_PHYTYPE_A:
1938                         /* APHY needs a generated table. */
1939                         phy->tssi2dbm = NULL;
1940                         printk(KERN_ERR PFX "Could not generate tssi2dBm "
1941                                             "table (wrong SPROM info)!\n");
1942                         return -ENODEV;
1943                 case BCM43xx_PHYTYPE_B:
1944                         phy->idle_tssi = 0x34;
1945                         phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
1946                         break;
1947                 case BCM43xx_PHYTYPE_G:
1948                         phy->idle_tssi = 0x34;
1949                         phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
1950                         break;
1951                 }
1952         }
1953
1954         return 0;
1955 }
1956
1957 int bcm43xx_phy_init(struct bcm43xx_private *bcm)
1958 {
1959         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1960         int err = -ENODEV;
1961         unsigned long flags;
1962
1963         /* We do not want to be preempted while calibrating
1964          * the hardware.
1965          */
1966         local_irq_save(flags);
1967
1968         switch (phy->type) {
1969         case BCM43xx_PHYTYPE_A:
1970                 if (phy->rev == 2 || phy->rev == 3) {
1971                         bcm43xx_phy_inita(bcm);
1972                         err = 0;
1973                 }
1974                 break;
1975         case BCM43xx_PHYTYPE_B:
1976                 switch (phy->rev) {
1977                 case 2:
1978                         bcm43xx_phy_initb2(bcm);
1979                         err = 0;
1980                         break;
1981                 case 4:
1982                         bcm43xx_phy_initb4(bcm);
1983                         err = 0;
1984                         break;
1985                 case 5:
1986                         bcm43xx_phy_initb5(bcm);
1987                         err = 0;
1988                         break;
1989                 case 6:
1990                         bcm43xx_phy_initb6(bcm);
1991                         err = 0;
1992                         break;
1993                 }
1994                 break;
1995         case BCM43xx_PHYTYPE_G:
1996                 bcm43xx_phy_initg(bcm);
1997                 err = 0;
1998                 break;
1999         }
2000         local_irq_restore(flags);
2001         if (err)
2002                 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2003
2004         return err;
2005 }
2006
2007 void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2008 {
2009         struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2010         u16 antennadiv;
2011         u16 offset;
2012         u16 value;
2013         u32 ucodeflags;
2014
2015         antennadiv = phy->antenna_diversity;
2016
2017         if (antennadiv == 0xFFFF)
2018                 antennadiv = 3;
2019         assert(antennadiv <= 3);
2020
2021         ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2022                                         BCM43xx_UCODEFLAGS_OFFSET);
2023         bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2024                             BCM43xx_UCODEFLAGS_OFFSET,
2025                             ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2026
2027         switch (phy->type) {
2028         case BCM43xx_PHYTYPE_A:
2029         case BCM43xx_PHYTYPE_G:
2030                 if (phy->type == BCM43xx_PHYTYPE_A)
2031                         offset = 0x0000;
2032                 else
2033                         offset = 0x0400;
2034
2035                 if (antennadiv == 2)
2036                         value = (3/*automatic*/ << 7);
2037                 else
2038                         value = (antennadiv << 7);
2039                 bcm43xx_phy_write(bcm, offset + 1,
2040                                   (bcm43xx_phy_read(bcm, offset + 1)
2041                                    & 0x7E7F) | value);
2042
2043                 if (antennadiv >= 2) {
2044                         if (antennadiv == 2)
2045                                 value = (antennadiv << 7);
2046                         else
2047                                 value = (0/*force0*/ << 7);
2048                         bcm43xx_phy_write(bcm, offset + 0x2B,
2049                                           (bcm43xx_phy_read(bcm, offset + 0x2B)
2050                                            & 0xFEFF) | value);
2051                 }
2052
2053                 if (phy->type == BCM43xx_PHYTYPE_G) {
2054                         if (antennadiv >= 2)
2055                                 bcm43xx_phy_write(bcm, 0x048C,
2056                                                   bcm43xx_phy_read(bcm, 0x048C)
2057                                                    | 0x2000);
2058                         else
2059                                 bcm43xx_phy_write(bcm, 0x048C,
2060                                                   bcm43xx_phy_read(bcm, 0x048C)
2061                                                    & ~0x2000);
2062                         if (phy->rev >= 2) {
2063                                 bcm43xx_phy_write(bcm, 0x0461,
2064                                                   bcm43xx_phy_read(bcm, 0x0461)
2065                                                    | 0x0010);
2066                                 bcm43xx_phy_write(bcm, 0x04AD,
2067                                                   (bcm43xx_phy_read(bcm, 0x04AD)
2068                                                    & 0x00FF) | 0x0015);
2069                                 if (phy->rev == 2)
2070                                         bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2071                                 else
2072                                         bcm43xx_phy_write(bcm, 0x0427,
2073                                                 (bcm43xx_phy_read(bcm, 0x0427)
2074                                                  & 0x00FF) | 0x0008);
2075                         }
2076                         else if (phy->rev >= 6)
2077                                 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2078                 } else {
2079                         if (phy->rev < 3)
2080                                 bcm43xx_phy_write(bcm, 0x002B,
2081                                                   (bcm43xx_phy_read(bcm, 0x002B)
2082                                                    & 0x00FF) | 0x0024);
2083                         else {
2084                                 bcm43xx_phy_write(bcm, 0x0061,
2085                                                   bcm43xx_phy_read(bcm, 0x0061)
2086                                                    | 0x0010);
2087                                 if (phy->rev == 3) {
2088                                         bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2089                                         bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2090                                 } else {
2091                                         bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2092                                         bcm43xx_phy_write(bcm, 0x0027,
2093                                                 (bcm43xx_phy_read(bcm, 0x0027)
2094                                                  & 0x00FF) | 0x0008);
2095                                 }
2096                         }
2097                 }
2098                 break;
2099         case BCM43xx_PHYTYPE_B:
2100                 if (bcm->current_core->rev == 2)
2101                         value = (3/*automatic*/ << 7);
2102                 else
2103                         value = (antennadiv << 7);
2104                 bcm43xx_phy_write(bcm, 0x03E2,
2105                                   (bcm43xx_phy_read(bcm, 0x03E2)
2106                                    & 0xFE7F) | value);
2107                 break;
2108         default:
2109                 assert(0);
2110         }
2111
2112         if (antennadiv >= 2) {
2113                 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2114                                                 BCM43xx_UCODEFLAGS_OFFSET);
2115                 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2116                                     BCM43xx_UCODEFLAGS_OFFSET,
2117                                     ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2118         }
2119
2120         phy->antenna_diversity = antennadiv;
2121 }