2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <asm/unaligned.h>
36 #include <brcmu_wifi.h>
37 #include <brcmu_utils.h>
38 #include <brcm_hw_ids.h>
40 #include "sdio_host.h"
41 #include "sdio_chip.h"
43 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
47 #define BRCMF_TRAP_INFO_SIZE 80
49 #define CBUF_LEN (128)
51 /* Device console log buffer state */
52 #define CONSOLE_BUFFER_MAX 2024
55 __le32 buf; /* Can't be pointer on (64-bit) hosts */
58 char *_buf_compat; /* Redundant pointer for backward compat. */
63 * When there is no UART (e.g. Quickturn),
64 * the host should write a complete
65 * input line directly into cbuf and then write
66 * the length into vcons_in.
67 * This may also be used when there is a real UART
68 * (at risk of conflicting with
69 * the real UART). vcons_out is currently unused.
74 /* Output (logging) buffer
75 * Console output is written to a ring buffer log_buf at index log_idx.
76 * The host may read the output when it sees log_idx advance.
77 * Output will be lost if the output wraps around faster than the host
80 struct rte_log_le log_le;
82 /* Console input line buffer
83 * Characters are read one at a time into cbuf
84 * until <CR> is received, then
85 * the buffer is processed as a command line.
86 * Also used for virtual UART.
93 #include <chipcommon.h>
98 #define TXQLEN 2048 /* bulk tx queue length */
99 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
100 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
103 #define TXRETRIES 2 /* # of retries for tx frames */
105 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
108 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
111 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
113 #define MEMBLOCK 2048 /* Block size used for downloading
115 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
116 biggest possible glom */
118 #define BRCMF_FIRSTREAD (1 << 6)
121 /* SBSDIO_DEVICE_CTL */
123 /* 1: device will assert busy signal when receiving CMD53 */
124 #define SBSDIO_DEVCTL_SETBUSY 0x01
125 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
126 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
127 /* 1: mask all interrupts to host except the chipActive (rev 8) */
128 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
129 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
130 * sdio bus power cycle to clear (rev 9) */
131 #define SBSDIO_DEVCTL_PADS_ISO 0x08
132 /* Force SD->SB reset mapping (rev 11) */
133 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
134 /* Determined by CoreControl bit */
135 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
136 /* Force backplane reset */
137 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
138 /* Force no backplane reset */
139 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
141 /* direct(mapped) cis space */
143 /* MAPPED common CIS address */
144 #define SBSDIO_CIS_BASE_COMMON 0x1000
145 /* maximum bytes in one CIS */
146 #define SBSDIO_CIS_SIZE_LIMIT 0x200
147 /* cis offset addr is < 17 bits */
148 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
150 /* manfid tuple length, include tuple, link bytes */
151 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
154 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
155 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
156 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
157 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
158 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
159 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
160 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
161 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
162 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
163 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
164 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
165 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
166 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
167 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
168 #define I_PC (1 << 10) /* descriptor error */
169 #define I_PD (1 << 11) /* data error */
170 #define I_DE (1 << 12) /* Descriptor protocol Error */
171 #define I_RU (1 << 13) /* Receive descriptor Underflow */
172 #define I_RO (1 << 14) /* Receive fifo Overflow */
173 #define I_XU (1 << 15) /* Transmit fifo Underflow */
174 #define I_RI (1 << 16) /* Receive Interrupt */
175 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
176 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
177 #define I_XI (1 << 24) /* Transmit Interrupt */
178 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
179 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
180 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
181 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
182 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
183 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
184 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
185 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
186 #define I_DMA (I_RI | I_XI | I_ERRORS)
189 #define CC_CISRDY (1 << 0) /* CIS Ready */
190 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
191 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
192 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
193 #define CC_XMTDATAAVAIL_MODE (1 << 4)
194 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
197 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
198 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
199 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
200 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
203 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
205 /* Total length of frame header for dongle protocol */
206 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
207 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
210 * Software allocation of To SB Mailbox resources
213 /* tosbmailbox bits corresponding to intstatus bits */
214 #define SMB_NAK (1 << 0) /* Frame NAK */
215 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
216 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
217 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
219 /* tosbmailboxdata */
220 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
223 * Software allocation of To Host Mailbox resources
227 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
228 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
229 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
230 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
232 /* tohostmailboxdata */
233 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
234 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
235 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
236 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
238 #define HMB_DATA_FCDATA_MASK 0xff000000
239 #define HMB_DATA_FCDATA_SHIFT 24
241 #define HMB_DATA_VERSION_MASK 0x00ff0000
242 #define HMB_DATA_VERSION_SHIFT 16
245 * Software-defined protocol header
248 /* Current protocol version */
249 #define SDPCM_PROT_VERSION 4
251 /* SW frame header */
252 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
254 #define SDPCM_CHANNEL_MASK 0x00000f00
255 #define SDPCM_CHANNEL_SHIFT 8
256 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
258 #define SDPCM_NEXTLEN_OFFSET 2
260 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
261 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
262 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
263 #define SDPCM_DOFFSET_MASK 0xff000000
264 #define SDPCM_DOFFSET_SHIFT 24
265 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
266 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
267 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
268 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
270 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
272 /* logical channel numbers */
273 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
274 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
275 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
276 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
277 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
279 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
281 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
284 * Shared structure between dongle and the host.
285 * The structure contains pointers to trap or assert information.
287 #define SDPCM_SHARED_VERSION 0x0003
288 #define SDPCM_SHARED_VERSION_MASK 0x00FF
289 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
290 #define SDPCM_SHARED_ASSERT 0x0200
291 #define SDPCM_SHARED_TRAP 0x0400
293 /* Space for header read, limit for data packets */
294 #define MAX_HDR_READ (1 << 6)
295 #define MAX_RX_DATASZ 2048
297 /* Maximum milliseconds to wait for F2 to come up */
298 #define BRCMF_WAIT_F2RDY 3000
300 /* Bump up limit on waiting for HT to account for first startup;
301 * if the image is doing a CRC calculation before programming the PMU
302 * for HT availability, it could take a couple hundred ms more, so
303 * max out at a 1 second (1000000us).
305 #undef PMU_MAX_TRANSITION_DLY
306 #define PMU_MAX_TRANSITION_DLY 1000000
308 /* Value for ChipClockCSR during initial setup */
309 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
310 SBSDIO_ALP_AVAIL_REQ)
312 /* Flags for SDH calls */
313 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
315 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
316 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
317 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
318 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
320 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
321 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
324 #define BRCMF_IDLE_INTERVAL 1
327 * Conversion of 802.1D priority to precedence level
329 static uint prio2prec(u32 prio)
331 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
337 u32 corecontrol; /* 0x00, rev8 */
338 u32 corestatus; /* rev8 */
340 u32 biststatus; /* rev8 */
343 u16 pcmciamesportaladdr; /* 0x010, rev8 */
345 u16 pcmciamesportalmask; /* rev8 */
347 u16 pcmciawrframebc; /* rev8 */
349 u16 pcmciaunderflowtimer; /* rev8 */
353 u32 intstatus; /* 0x020, rev8 */
354 u32 hostintmask; /* rev8 */
355 u32 intmask; /* rev8 */
356 u32 sbintstatus; /* rev8 */
357 u32 sbintmask; /* rev8 */
358 u32 funcintmask; /* rev4 */
360 u32 tosbmailbox; /* 0x040, rev8 */
361 u32 tohostmailbox; /* rev8 */
362 u32 tosbmailboxdata; /* rev8 */
363 u32 tohostmailboxdata; /* rev8 */
365 /* synchronized access to registers in SDIO clock domain */
366 u32 sdioaccess; /* 0x050, rev8 */
369 /* PCMCIA frame control */
370 u8 pcmciaframectrl; /* 0x060, rev8 */
372 u8 pcmciawatermark; /* rev8 */
375 /* interrupt batching control */
376 u32 intrcvlazy; /* 0x100, rev8 */
380 u32 cmd52rd; /* 0x110, rev8 */
381 u32 cmd52wr; /* rev8 */
382 u32 cmd53rd; /* rev8 */
383 u32 cmd53wr; /* rev8 */
384 u32 abort; /* rev8 */
385 u32 datacrcerror; /* rev8 */
386 u32 rdoutofsync; /* rev8 */
387 u32 wroutofsync; /* rev8 */
388 u32 writebusy; /* rev8 */
389 u32 readwait; /* rev8 */
390 u32 readterm; /* rev8 */
391 u32 writeterm; /* rev8 */
393 u32 clockctlstatus; /* rev8 */
396 u32 PAD[128]; /* DMA engines */
398 /* SDIO/PCMCIA CIS region */
399 char cis[512]; /* 0x400-0x5ff, rev6 */
401 /* PCMCIA function control registers */
402 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
405 /* PCMCIA backplane access */
406 u16 backplanecsr; /* 0x76E, rev6 */
407 u16 backplaneaddr0; /* rev6 */
408 u16 backplaneaddr1; /* rev6 */
409 u16 backplaneaddr2; /* rev6 */
410 u16 backplaneaddr3; /* rev6 */
411 u16 backplanedata0; /* rev6 */
412 u16 backplanedata1; /* rev6 */
413 u16 backplanedata2; /* rev6 */
414 u16 backplanedata3; /* rev6 */
417 /* sprom "size" & "blank" info */
418 u16 spromstatus; /* 0x7BE, rev2 */
425 /* Device console log buffer state */
426 struct brcmf_console {
427 uint count; /* Poll interval msec counter */
428 uint log_addr; /* Log struct address (fixed) */
429 struct rte_log_le log_le; /* Log struct (host copy) */
430 uint bufsize; /* Size of log buffer */
431 u8 *buf; /* Log buffer (host copy) */
432 uint last; /* Last buffer read index */
435 struct brcmf_trap_info {
449 __le32 r9; /* sb/v6 */
450 __le32 r10; /* sl/v7 */
451 __le32 r11; /* fp/v8 */
459 struct sdpcm_shared {
463 u32 assert_file_addr;
465 u32 console_addr; /* Address of struct rte_console */
471 struct sdpcm_shared_le {
474 __le32 assert_exp_addr;
475 __le32 assert_file_addr;
477 __le32 console_addr; /* Address of struct rte_console */
478 __le32 msgtrace_addr;
483 /* SDIO read frame info */
484 struct brcmf_sdio_read {
493 /* misc chip info needed by some of the routines */
494 /* Private data for SDIO bus interaction */
496 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
497 struct chip_info *ci; /* Chip info struct */
498 char *vars; /* Variables (from CIS and/or other) */
499 uint varsz; /* Size of variables buffer */
501 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
503 u32 hostintmask; /* Copy of Host Interrupt Mask */
504 atomic_t intstatus; /* Intstatus bits (events) pending */
505 atomic_t fcstate; /* State of dongle flow-control */
507 uint blocksize; /* Block size of SDIO transfers */
508 uint roundup; /* Max roundup limit */
510 struct pktq txq; /* Queue length used for flow-control */
511 u8 flowcontrol; /* per prio flow control bitmask */
512 u8 tx_seq; /* Transmit sequence number (next) */
513 u8 tx_max; /* Maximum transmit sequence allowed */
515 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
516 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
517 u8 rx_seq; /* Receive sequence number (expected) */
518 struct brcmf_sdio_read cur_read;
519 /* info of current read frame */
520 bool rxskip; /* Skip receive (awaiting NAK ACK) */
521 bool rxpending; /* Data frame pending in dongle */
523 uint rxbound; /* Rx frames to read before resched */
524 uint txbound; /* Tx frames to send before resched */
527 struct sk_buff *glomd; /* Packet containing glomming descriptor */
528 struct sk_buff_head glom; /* Packet list for glommed superframe */
529 uint glomerr; /* Glom packet read errors */
531 u8 *rxbuf; /* Buffer for receiving control packets */
532 uint rxblen; /* Allocated length of rxbuf */
533 u8 *rxctl; /* Aligned pointer into rxbuf */
534 u8 *rxctl_orig; /* pointer for freeing rxctl */
535 u8 *databuf; /* Buffer for receiving big glom packet */
536 u8 *dataptr; /* Aligned pointer into databuf */
537 uint rxlen; /* Length of valid data in buffer */
538 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
540 u8 sdpcm_ver; /* Bus protocol reported by dongle */
542 bool intr; /* Use interrupts */
543 bool poll; /* Use polling */
544 atomic_t ipend; /* Device interrupt is pending */
545 uint spurious; /* Count of spurious interrupts */
546 uint pollrate; /* Ticks between device polls */
547 uint polltick; /* Tick counter */
550 uint console_interval;
551 struct brcmf_console console; /* Console output polling support */
552 uint console_addr; /* Console address from shared struct */
555 uint clkstate; /* State of sd and backplane clock(s) */
556 bool activity; /* Activity flag for clock down */
557 s32 idletime; /* Control for activity timeout */
558 s32 idlecount; /* Activity timeout counter */
559 s32 idleclock; /* How to set bus driver when idle */
561 bool use_rxchain; /* If brcmf should use PKT chains */
562 bool rxflow_mode; /* Rx flow control mode */
563 bool rxflow; /* Is rx flow control on */
564 bool alp_only; /* Don't use HT clock (ALP only) */
568 bool ctrl_frame_stat;
571 wait_queue_head_t ctrl_wait;
572 wait_queue_head_t dcmd_resp_wait;
574 struct timer_list timer;
575 struct completion watchdog_wait;
576 struct task_struct *watchdog_tsk;
580 struct workqueue_struct *brcmf_wq;
581 struct work_struct datawork;
582 struct list_head dpc_tsklst;
583 spinlock_t dpc_tl_lock;
585 const struct firmware *firmware;
588 bool txoff; /* Transmit flow-controlled */
589 struct brcmf_sdio_count sdcnt;
595 #define CLK_PENDING 2 /* Not used yet */
599 static int qcount[NUMPRIO];
600 static int tx_packets[NUMPRIO];
603 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
605 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
607 /* Retry count for register access failures */
608 static const uint retry_limit = 2;
610 /* Limit on rounding up frames */
611 static const uint max_roundup = 512;
615 enum brcmf_sdio_frmtype {
616 BRCMF_SDIO_FT_NORMAL,
621 static void pkt_align(struct sk_buff *p, int len, int align)
624 datalign = (unsigned long)(p->data);
625 datalign = roundup(datalign, (align)) - datalign;
627 skb_pull(p, datalign);
631 /* To check if there's window offered */
632 static bool data_ok(struct brcmf_sdio *bus)
634 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
635 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
639 * Reads a register in the SDIO hardware block. This block occupies a series of
640 * adresses on the 32 bit backplane bus.
643 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
645 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
648 *regvar = brcmf_sdio_regrl(bus->sdiodev,
649 bus->ci->c_inf[idx].base + offset, &ret);
655 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
657 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
660 brcmf_sdio_regwl(bus->sdiodev,
661 bus->ci->c_inf[idx].base + reg_offset,
667 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
669 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
671 /* Turn backplane clock on or off */
672 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
675 u8 clkctl, clkreq, devctl;
676 unsigned long timeout;
678 brcmf_dbg(TRACE, "Enter\n");
683 /* Request HT Avail */
685 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
687 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
690 brcmf_err("HT Avail request error: %d\n", err);
694 /* Check current status */
695 clkctl = brcmf_sdio_regrb(bus->sdiodev,
696 SBSDIO_FUNC1_CHIPCLKCSR, &err);
698 brcmf_err("HT Avail read error: %d\n", err);
702 /* Go to pending and await interrupt if appropriate */
703 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
704 /* Allow only clock-available interrupt */
705 devctl = brcmf_sdio_regrb(bus->sdiodev,
706 SBSDIO_DEVICE_CTL, &err);
708 brcmf_err("Devctl error setting CA: %d\n",
713 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
714 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
716 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
717 bus->clkstate = CLK_PENDING;
720 } else if (bus->clkstate == CLK_PENDING) {
721 /* Cancel CA-only interrupt filter */
722 devctl = brcmf_sdio_regrb(bus->sdiodev,
723 SBSDIO_DEVICE_CTL, &err);
724 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
725 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
729 /* Otherwise, wait here (polling) for HT Avail */
731 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
732 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
733 clkctl = brcmf_sdio_regrb(bus->sdiodev,
734 SBSDIO_FUNC1_CHIPCLKCSR,
736 if (time_after(jiffies, timeout))
739 usleep_range(5000, 10000);
742 brcmf_err("HT Avail request error: %d\n", err);
745 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
746 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
747 PMU_MAX_TRANSITION_DLY, clkctl);
751 /* Mark clock available */
752 bus->clkstate = CLK_AVAIL;
753 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
756 if (!bus->alp_only) {
757 if (SBSDIO_ALPONLY(clkctl))
758 brcmf_err("HT Clock should be on\n");
760 #endif /* defined (DEBUG) */
762 bus->activity = true;
766 if (bus->clkstate == CLK_PENDING) {
767 /* Cancel CA-only interrupt filter */
768 devctl = brcmf_sdio_regrb(bus->sdiodev,
769 SBSDIO_DEVICE_CTL, &err);
770 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
771 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
775 bus->clkstate = CLK_SDONLY;
776 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
778 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
780 brcmf_err("Failed access turning clock off: %d\n",
788 /* Change idle/active SD state */
789 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
791 brcmf_dbg(TRACE, "Enter\n");
794 bus->clkstate = CLK_SDONLY;
796 bus->clkstate = CLK_NONE;
801 /* Transition SD and backplane clock readiness */
802 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
805 uint oldstate = bus->clkstate;
808 brcmf_dbg(TRACE, "Enter\n");
810 /* Early exit if we're already there */
811 if (bus->clkstate == target) {
812 if (target == CLK_AVAIL) {
813 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
814 bus->activity = true;
821 /* Make sure SD clock is available */
822 if (bus->clkstate == CLK_NONE)
823 brcmf_sdbrcm_sdclk(bus, true);
824 /* Now request HT Avail on the backplane */
825 brcmf_sdbrcm_htclk(bus, true, pendok);
826 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
827 bus->activity = true;
831 /* Remove HT request, or bring up SD clock */
832 if (bus->clkstate == CLK_NONE)
833 brcmf_sdbrcm_sdclk(bus, true);
834 else if (bus->clkstate == CLK_AVAIL)
835 brcmf_sdbrcm_htclk(bus, false, false);
837 brcmf_err("request for %d -> %d\n",
838 bus->clkstate, target);
839 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
843 /* Make sure to remove HT request */
844 if (bus->clkstate == CLK_AVAIL)
845 brcmf_sdbrcm_htclk(bus, false, false);
846 /* Now remove the SD clock */
847 brcmf_sdbrcm_sdclk(bus, false);
848 brcmf_sdbrcm_wd_timer(bus, 0);
852 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
858 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
865 brcmf_dbg(TRACE, "Enter\n");
867 /* Read mailbox data and ack that we did so */
868 ret = r_sdreg32(bus, &hmb_data,
869 offsetof(struct sdpcmd_regs, tohostmailboxdata));
872 w_sdreg32(bus, SMB_INT_ACK,
873 offsetof(struct sdpcmd_regs, tosbmailbox));
874 bus->sdcnt.f1regdata += 2;
876 /* Dongle recomposed rx frames, accept them again */
877 if (hmb_data & HMB_DATA_NAKHANDLED) {
878 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
881 brcmf_err("unexpected NAKHANDLED!\n");
884 intstatus |= I_HMB_FRAME_IND;
888 * DEVREADY does not occur with gSPI.
890 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
892 (hmb_data & HMB_DATA_VERSION_MASK) >>
893 HMB_DATA_VERSION_SHIFT;
894 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
895 brcmf_err("Version mismatch, dongle reports %d, "
897 bus->sdpcm_ver, SDPCM_PROT_VERSION);
899 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
904 * Flow Control has been moved into the RX headers and this out of band
905 * method isn't used any more.
906 * remaining backward compatible with older dongles.
908 if (hmb_data & HMB_DATA_FC) {
909 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
910 HMB_DATA_FCDATA_SHIFT;
912 if (fcbits & ~bus->flowcontrol)
913 bus->sdcnt.fc_xoff++;
915 if (bus->flowcontrol & ~fcbits)
918 bus->sdcnt.fc_rcvd++;
919 bus->flowcontrol = fcbits;
922 /* Shouldn't be any others */
923 if (hmb_data & ~(HMB_DATA_DEVREADY |
924 HMB_DATA_NAKHANDLED |
927 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
928 brcmf_err("Unknown mailbox data content: 0x%02x\n",
934 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
941 brcmf_err("%sterminate frame%s\n",
942 abort ? "abort command, " : "",
943 rtx ? ", send NAK" : "");
946 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
948 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
950 bus->sdcnt.f1regdata++;
952 /* Wait until the packet has been flushed (device/FIFO stable) */
953 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
954 hi = brcmf_sdio_regrb(bus->sdiodev,
955 SBSDIO_FUNC1_RFRAMEBCHI, &err);
956 lo = brcmf_sdio_regrb(bus->sdiodev,
957 SBSDIO_FUNC1_RFRAMEBCLO, &err);
958 bus->sdcnt.f1regdata += 2;
960 if ((hi == 0) && (lo == 0))
963 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
964 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
965 lastrbc, (hi << 8) + lo);
967 lastrbc = (hi << 8) + lo;
971 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
973 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
977 err = w_sdreg32(bus, SMB_NAK,
978 offsetof(struct sdpcmd_regs, tosbmailbox));
980 bus->sdcnt.f1regdata++;
985 /* Clear partial in any case */
986 bus->cur_read.len = 0;
988 /* If we can't reach the device, signal failure */
990 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
993 /* copy a buffer into a pkt buffer chain */
994 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1003 skb_queue_walk(&bus->glom, p) {
1004 n = min_t(uint, p->len, len);
1005 memcpy(p->data, buf, n);
1016 /* return total length of buffer chain */
1017 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1023 skb_queue_walk(&bus->glom, p)
1028 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1030 struct sk_buff *cur, *next;
1032 skb_queue_walk_safe(&bus->glom, cur, next) {
1033 skb_unlink(cur, &bus->glom);
1034 brcmu_pkt_buf_free_skb(cur);
1038 static int brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1039 struct brcmf_sdio_read *rd,
1040 enum brcmf_sdio_frmtype type)
1043 u8 rx_seq, fc, tx_seq_max;
1046 * 4 bytes hardware header (frame tag)
1047 * Byte 0~1: Frame length
1048 * Byte 2~3: Checksum, bit-wise inverse of frame length
1050 len = get_unaligned_le16(header);
1051 checksum = get_unaligned_le16(header + sizeof(u16));
1052 /* All zero means no more to read */
1053 if (!(len | checksum)) {
1054 bus->rxpending = false;
1057 if ((u16)(~(len ^ checksum))) {
1058 brcmf_err("HW header checksum error\n");
1059 bus->sdcnt.rx_badhdr++;
1060 brcmf_sdbrcm_rxfail(bus, false, false);
1063 if (len < SDPCM_HDRLEN) {
1064 brcmf_err("HW header length error\n");
1067 if (type == BRCMF_SDIO_FT_SUPER &&
1068 (roundup(len, bus->blocksize) != rd->len)) {
1069 brcmf_err("HW superframe header length error\n");
1072 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1073 brcmf_err("HW subframe header length error\n");
1079 * 8 bytes hardware header
1080 * Byte 0: Rx sequence number
1081 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1082 * Byte 2: Length of next data frame
1083 * Byte 3: Data offset
1084 * Byte 4: Flow control bits
1085 * Byte 5: Maximum Sequence number allow for Tx
1086 * Byte 6~7: Reserved
1088 if (type == BRCMF_SDIO_FT_SUPER &&
1089 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1090 brcmf_err("Glom descriptor found in superframe head\n");
1094 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1095 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1096 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1097 type != BRCMF_SDIO_FT_SUPER) {
1098 brcmf_err("HW header length too long\n");
1099 bus->sdiodev->bus_if->dstats.rx_errors++;
1100 bus->sdcnt.rx_toolong++;
1101 brcmf_sdbrcm_rxfail(bus, false, false);
1105 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1106 brcmf_err("Wrong channel for superframe\n");
1110 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1111 rd->channel != SDPCM_EVENT_CHANNEL) {
1112 brcmf_err("Wrong channel for subframe\n");
1116 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1117 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1118 brcmf_err("seq %d: bad data offset\n", rx_seq);
1119 bus->sdcnt.rx_badhdr++;
1120 brcmf_sdbrcm_rxfail(bus, false, false);
1124 if (rd->seq_num != rx_seq) {
1125 brcmf_err("seq %d: sequence number error, expect %d\n",
1126 rx_seq, rd->seq_num);
1127 bus->sdcnt.rx_badseq++;
1128 rd->seq_num = rx_seq;
1130 /* no need to check the reset for subframe */
1131 if (type == BRCMF_SDIO_FT_SUB)
1133 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1134 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1135 /* only warm for NON glom packet */
1136 if (rd->channel != SDPCM_GLOM_CHANNEL)
1137 brcmf_err("seq %d: next length error\n", rx_seq);
1140 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1141 if (bus->flowcontrol != fc) {
1142 if (~bus->flowcontrol & fc)
1143 bus->sdcnt.fc_xoff++;
1144 if (bus->flowcontrol & ~fc)
1145 bus->sdcnt.fc_xon++;
1146 bus->sdcnt.fc_rcvd++;
1147 bus->flowcontrol = fc;
1149 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1150 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1151 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1152 tx_seq_max = bus->tx_seq + 2;
1154 bus->tx_max = tx_seq_max;
1159 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1165 struct sk_buff *pfirst, *pnext;
1171 bool usechain = bus->use_rxchain;
1173 struct brcmf_sdio_read rd_new;
1175 /* If packets, issue read(s) and send up packet chain */
1176 /* Return sequence numbers consumed? */
1178 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1179 bus->glomd, skb_peek(&bus->glom));
1181 /* If there's a descriptor, generate the packet chain */
1183 pfirst = pnext = NULL;
1184 dlen = (u16) (bus->glomd->len);
1185 dptr = bus->glomd->data;
1186 if (!dlen || (dlen & 1)) {
1187 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1192 for (totlen = num = 0; dlen; num++) {
1193 /* Get (and move past) next length */
1194 sublen = get_unaligned_le16(dptr);
1195 dlen -= sizeof(u16);
1196 dptr += sizeof(u16);
1197 if ((sublen < SDPCM_HDRLEN) ||
1198 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1199 brcmf_err("descriptor len %d bad: %d\n",
1204 if (sublen % BRCMF_SDALIGN) {
1205 brcmf_err("sublen %d not multiple of %d\n",
1206 sublen, BRCMF_SDALIGN);
1211 /* For last frame, adjust read len so total
1212 is a block multiple */
1215 (roundup(totlen, bus->blocksize) - totlen);
1216 totlen = roundup(totlen, bus->blocksize);
1219 /* Allocate/chain packet for next subframe */
1220 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1221 if (pnext == NULL) {
1222 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1226 skb_queue_tail(&bus->glom, pnext);
1228 /* Adhere to start alignment requirements */
1229 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1232 /* If all allocations succeeded, save packet chain
1235 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1237 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1238 totlen != bus->cur_read.len) {
1239 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1240 bus->cur_read.len, totlen, rxseq);
1242 pfirst = pnext = NULL;
1244 brcmf_sdbrcm_free_glom(bus);
1248 /* Done with descriptor packet */
1249 brcmu_pkt_buf_free_skb(bus->glomd);
1251 bus->cur_read.len = 0;
1254 /* Ok -- either we just generated a packet chain,
1255 or had one from before */
1256 if (!skb_queue_empty(&bus->glom)) {
1257 if (BRCMF_GLOM_ON()) {
1258 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1259 skb_queue_walk(&bus->glom, pnext) {
1260 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1261 pnext, (u8 *) (pnext->data),
1262 pnext->len, pnext->len);
1266 pfirst = skb_peek(&bus->glom);
1267 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1269 /* Do an SDIO read for the superframe. Configurable iovar to
1270 * read directly into the chained packet, or allocate a large
1271 * packet and and copy into the chain.
1273 sdio_claim_host(bus->sdiodev->func[1]);
1275 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1276 bus->sdiodev->sbwad,
1277 SDIO_FUNC_2, F2SYNC, &bus->glom);
1278 } else if (bus->dataptr) {
1279 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1280 bus->sdiodev->sbwad,
1281 SDIO_FUNC_2, F2SYNC,
1282 bus->dataptr, dlen);
1283 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1284 if (sublen != dlen) {
1285 brcmf_err("FAILED TO COPY, dlen %d sublen %d\n",
1291 brcmf_err("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1295 sdio_release_host(bus->sdiodev->func[1]);
1296 bus->sdcnt.f2rxdata++;
1298 /* On failure, kill the superframe, allow a couple retries */
1300 brcmf_err("glom read of %d bytes failed: %d\n",
1302 bus->sdiodev->bus_if->dstats.rx_errors++;
1304 sdio_claim_host(bus->sdiodev->func[1]);
1305 if (bus->glomerr++ < 3) {
1306 brcmf_sdbrcm_rxfail(bus, true, true);
1309 brcmf_sdbrcm_rxfail(bus, true, false);
1310 bus->sdcnt.rxglomfail++;
1311 brcmf_sdbrcm_free_glom(bus);
1313 sdio_release_host(bus->sdiodev->func[1]);
1317 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1318 pfirst->data, min_t(int, pfirst->len, 48),
1321 rd_new.seq_num = rxseq;
1323 sdio_claim_host(bus->sdiodev->func[1]);
1324 errcode = brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1325 BRCMF_SDIO_FT_SUPER);
1326 sdio_release_host(bus->sdiodev->func[1]);
1327 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1329 /* Remove superframe header, remember offset */
1330 skb_pull(pfirst, rd_new.dat_offset);
1331 sfdoff = rd_new.dat_offset;
1334 /* Validate all the subframe headers */
1335 skb_queue_walk(&bus->glom, pnext) {
1336 /* leave when invalid subframe is found */
1340 rd_new.len = pnext->len;
1341 rd_new.seq_num = rxseq++;
1342 sdio_claim_host(bus->sdiodev->func[1]);
1343 errcode = brcmf_sdio_hdparser(bus, pnext->data, &rd_new,
1345 sdio_release_host(bus->sdiodev->func[1]);
1346 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1347 pnext->data, 32, "subframe:\n");
1353 /* Terminate frame on error, request
1355 sdio_claim_host(bus->sdiodev->func[1]);
1356 if (bus->glomerr++ < 3) {
1357 /* Restore superframe header space */
1358 skb_push(pfirst, sfdoff);
1359 brcmf_sdbrcm_rxfail(bus, true, true);
1362 brcmf_sdbrcm_rxfail(bus, true, false);
1363 bus->sdcnt.rxglomfail++;
1364 brcmf_sdbrcm_free_glom(bus);
1366 sdio_release_host(bus->sdiodev->func[1]);
1367 bus->cur_read.len = 0;
1371 /* Basic SD framing looks ok - process each packet (header) */
1373 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1374 dptr = (u8 *) (pfirst->data);
1375 sublen = get_unaligned_le16(dptr);
1376 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1378 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1380 "Rx Subframe Data:\n");
1382 __skb_trim(pfirst, sublen);
1383 skb_pull(pfirst, doff);
1385 if (pfirst->len == 0) {
1386 skb_unlink(pfirst, &bus->glom);
1387 brcmu_pkt_buf_free_skb(pfirst);
1389 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1390 &ifidx, pfirst) != 0) {
1391 brcmf_err("rx protocol error\n");
1392 bus->sdiodev->bus_if->dstats.rx_errors++;
1393 skb_unlink(pfirst, &bus->glom);
1394 brcmu_pkt_buf_free_skb(pfirst);
1398 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1400 min_t(int, pfirst->len, 32),
1401 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1402 bus->glom.qlen, pfirst, pfirst->data,
1403 pfirst->len, pfirst->next,
1406 /* sent any remaining packets up */
1408 brcmf_rx_frames(bus->sdiodev->dev, ifidx, &bus->glom);
1410 bus->sdcnt.rxglomframes++;
1411 bus->sdcnt.rxglompkts += bus->glom.qlen;
1416 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1419 DECLARE_WAITQUEUE(wait, current);
1420 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1422 /* Wait until control frame is available */
1423 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1424 set_current_state(TASK_INTERRUPTIBLE);
1426 while (!(*condition) && (!signal_pending(current) && timeout))
1427 timeout = schedule_timeout(timeout);
1429 if (signal_pending(current))
1432 set_current_state(TASK_RUNNING);
1433 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1438 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1440 if (waitqueue_active(&bus->dcmd_resp_wait))
1441 wake_up_interruptible(&bus->dcmd_resp_wait);
1446 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1449 u8 *buf = NULL, *rbuf;
1452 brcmf_dbg(TRACE, "Enter\n");
1455 buf = vzalloc(bus->rxblen);
1457 brcmf_err("no memory for control frame\n");
1461 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1463 rbuf += (BRCMF_SDALIGN - pad);
1465 /* Copy the already-read portion over */
1466 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1467 if (len <= BRCMF_FIRSTREAD)
1470 /* Raise rdlen to next SDIO block to avoid tail command */
1471 rdlen = len - BRCMF_FIRSTREAD;
1472 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1473 pad = bus->blocksize - (rdlen % bus->blocksize);
1474 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1475 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1477 } else if (rdlen % BRCMF_SDALIGN) {
1478 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1481 /* Satisfy length-alignment requirements */
1482 if (rdlen & (ALIGNMENT - 1))
1483 rdlen = roundup(rdlen, ALIGNMENT);
1485 /* Drop if the read is too big or it exceeds our maximum */
1486 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1487 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1488 rdlen, bus->sdiodev->bus_if->maxctl);
1489 bus->sdiodev->bus_if->dstats.rx_errors++;
1490 brcmf_sdbrcm_rxfail(bus, false, false);
1494 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1495 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1496 len, len - doff, bus->sdiodev->bus_if->maxctl);
1497 bus->sdiodev->bus_if->dstats.rx_errors++;
1498 bus->sdcnt.rx_toolong++;
1499 brcmf_sdbrcm_rxfail(bus, false, false);
1503 /* Read remain of frame body */
1504 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1505 bus->sdiodev->sbwad,
1507 F2SYNC, rbuf, rdlen);
1508 bus->sdcnt.f2rxdata++;
1510 /* Control frame failures need retransmission */
1512 brcmf_err("read %d control bytes failed: %d\n",
1514 bus->sdcnt.rxc_errors++;
1515 brcmf_sdbrcm_rxfail(bus, true, true);
1518 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1522 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1523 buf, len, "RxCtrl:\n");
1525 /* Point to valid data and indicate its length */
1526 spin_lock_bh(&bus->rxctl_lock);
1528 brcmf_err("last control frame is being processed.\n");
1529 spin_unlock_bh(&bus->rxctl_lock);
1533 bus->rxctl = buf + doff;
1534 bus->rxctl_orig = buf;
1535 bus->rxlen = len - doff;
1536 spin_unlock_bh(&bus->rxctl_lock);
1539 /* Awake any waiters */
1540 brcmf_sdbrcm_dcmd_resp_wake(bus);
1543 /* Pad read to blocksize for efficiency */
1544 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1546 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1547 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1548 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1549 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1551 } else if (*rdlen % BRCMF_SDALIGN) {
1552 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1556 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1558 struct sk_buff *pkt; /* Packet for event or data frames */
1559 struct sk_buff_head pktlist; /* needed for bus interface */
1560 u16 pad; /* Number of pad bytes to read */
1561 uint rxleft = 0; /* Remaining number of frames allowed */
1562 int sdret; /* Return code from calls */
1564 uint rxcount = 0; /* Total frames read */
1565 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1568 brcmf_dbg(TRACE, "Enter\n");
1570 /* Not finished unless we encounter no more frames indication */
1571 bus->rxpending = true;
1573 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1574 !bus->rxskip && rxleft &&
1575 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1576 rd->seq_num++, rxleft--) {
1578 /* Handle glomming separately */
1579 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1581 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1582 bus->glomd, skb_peek(&bus->glom));
1583 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1584 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1585 rd->seq_num += cnt - 1;
1586 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1590 rd->len_left = rd->len;
1591 /* read header first for unknow frame length */
1592 sdio_claim_host(bus->sdiodev->func[1]);
1594 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1595 bus->sdiodev->sbwad,
1596 SDIO_FUNC_2, F2SYNC,
1599 bus->sdcnt.f2rxhdrs++;
1601 brcmf_err("RXHEADER FAILED: %d\n",
1603 bus->sdcnt.rx_hdrfail++;
1604 brcmf_sdbrcm_rxfail(bus, true, true);
1605 sdio_release_host(bus->sdiodev->func[1]);
1609 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1610 bus->rxhdr, SDPCM_HDRLEN,
1613 if (brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1614 BRCMF_SDIO_FT_NORMAL)) {
1615 sdio_release_host(bus->sdiodev->func[1]);
1616 if (!bus->rxpending)
1622 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1623 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1626 /* prepare the descriptor for the next read */
1627 rd->len = rd->len_nxtfrm << 4;
1629 /* treat all packet as event if we don't know */
1630 rd->channel = SDPCM_EVENT_CHANNEL;
1631 sdio_release_host(bus->sdiodev->func[1]);
1634 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1635 rd->len - BRCMF_FIRSTREAD : 0;
1636 head_read = BRCMF_FIRSTREAD;
1639 brcmf_pad(bus, &pad, &rd->len_left);
1641 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1644 /* Give up on data, request rtx of events */
1645 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1646 bus->sdiodev->bus_if->dstats.rx_dropped++;
1647 brcmf_sdbrcm_rxfail(bus, false,
1648 RETRYCHAN(rd->channel));
1649 sdio_release_host(bus->sdiodev->func[1]);
1652 skb_pull(pkt, head_read);
1653 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1655 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1656 SDIO_FUNC_2, F2SYNC, pkt);
1657 bus->sdcnt.f2rxdata++;
1658 sdio_release_host(bus->sdiodev->func[1]);
1661 brcmf_err("read %d bytes from channel %d failed: %d\n",
1662 rd->len, rd->channel, sdret);
1663 brcmu_pkt_buf_free_skb(pkt);
1664 bus->sdiodev->bus_if->dstats.rx_errors++;
1665 sdio_claim_host(bus->sdiodev->func[1]);
1666 brcmf_sdbrcm_rxfail(bus, true,
1667 RETRYCHAN(rd->channel));
1668 sdio_release_host(bus->sdiodev->func[1]);
1673 skb_push(pkt, head_read);
1674 memcpy(pkt->data, bus->rxhdr, head_read);
1677 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1678 rd_new.seq_num = rd->seq_num;
1679 sdio_claim_host(bus->sdiodev->func[1]);
1680 if (brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1681 BRCMF_SDIO_FT_NORMAL)) {
1683 brcmu_pkt_buf_free_skb(pkt);
1685 bus->sdcnt.rx_readahead_cnt++;
1686 if (rd->len != roundup(rd_new.len, 16)) {
1687 brcmf_err("frame length mismatch:read %d, should be %d\n",
1689 roundup(rd_new.len, 16) >> 4);
1691 brcmf_sdbrcm_rxfail(bus, true, true);
1692 sdio_release_host(bus->sdiodev->func[1]);
1693 brcmu_pkt_buf_free_skb(pkt);
1696 sdio_release_host(bus->sdiodev->func[1]);
1697 rd->len_nxtfrm = rd_new.len_nxtfrm;
1698 rd->channel = rd_new.channel;
1699 rd->dat_offset = rd_new.dat_offset;
1701 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1704 bus->rxhdr, SDPCM_HDRLEN,
1707 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1708 brcmf_err("readahead on control packet %d?\n",
1710 /* Force retry w/normal header read */
1712 sdio_claim_host(bus->sdiodev->func[1]);
1713 brcmf_sdbrcm_rxfail(bus, false, true);
1714 sdio_release_host(bus->sdiodev->func[1]);
1715 brcmu_pkt_buf_free_skb(pkt);
1720 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1721 pkt->data, rd->len, "Rx Data:\n");
1723 /* Save superframe descriptor and allocate packet frame */
1724 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1725 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1726 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1728 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1731 __skb_trim(pkt, rd->len);
1732 skb_pull(pkt, SDPCM_HDRLEN);
1735 brcmf_err("%s: glom superframe w/o "
1736 "descriptor!\n", __func__);
1737 sdio_claim_host(bus->sdiodev->func[1]);
1738 brcmf_sdbrcm_rxfail(bus, false, false);
1739 sdio_release_host(bus->sdiodev->func[1]);
1741 /* prepare the descriptor for the next read */
1742 rd->len = rd->len_nxtfrm << 4;
1744 /* treat all packet as event if we don't know */
1745 rd->channel = SDPCM_EVENT_CHANNEL;
1749 /* Fill in packet len and prio, deliver upward */
1750 __skb_trim(pkt, rd->len);
1751 skb_pull(pkt, rd->dat_offset);
1753 /* prepare the descriptor for the next read */
1754 rd->len = rd->len_nxtfrm << 4;
1756 /* treat all packet as event if we don't know */
1757 rd->channel = SDPCM_EVENT_CHANNEL;
1759 if (pkt->len == 0) {
1760 brcmu_pkt_buf_free_skb(pkt);
1762 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1764 brcmf_err("rx protocol error\n");
1765 brcmu_pkt_buf_free_skb(pkt);
1766 bus->sdiodev->bus_if->dstats.rx_errors++;
1770 skb_queue_head_init(&pktlist);
1771 skb_queue_tail(&pktlist, pkt);
1772 brcmf_rx_frames(bus->sdiodev->dev, ifidx, &pktlist);
1775 rxcount = maxframes - rxleft;
1776 /* Message if we hit the limit */
1778 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1780 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1781 /* Back off rxseq if awaiting rtx, update rx_seq */
1784 bus->rx_seq = rd->seq_num;
1790 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1792 if (waitqueue_active(&bus->ctrl_wait))
1793 wake_up_interruptible(&bus->ctrl_wait);
1797 /* Writes a HW/SW header into the packet and sends it. */
1798 /* Assumes: (a) header space already there, (b) caller holds lock */
1799 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1800 uint chan, bool free_pkt)
1806 struct sk_buff *new;
1809 brcmf_dbg(TRACE, "Enter\n");
1811 frame = (u8 *) (pkt->data);
1813 /* Add alignment padding, allocate new packet if needed */
1814 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1816 if (skb_headroom(pkt) < pad) {
1817 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1818 skb_headroom(pkt), pad);
1819 bus->sdiodev->bus_if->tx_realloc++;
1820 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1822 brcmf_err("couldn't allocate new %d-byte packet\n",
1823 pkt->len + BRCMF_SDALIGN);
1828 pkt_align(new, pkt->len, BRCMF_SDALIGN);
1829 memcpy(new->data, pkt->data, pkt->len);
1831 brcmu_pkt_buf_free_skb(pkt);
1832 /* free the pkt if canned one is not used */
1835 frame = (u8 *) (pkt->data);
1836 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1840 frame = (u8 *) (pkt->data);
1841 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1842 memset(frame, 0, pad + SDPCM_HDRLEN);
1845 /* precondition: pad < BRCMF_SDALIGN */
1847 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1848 len = (u16) (pkt->len);
1849 *(__le16 *) frame = cpu_to_le16(len);
1850 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1852 /* Software tag: channel, sequence number, data offset */
1854 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1856 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1858 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1859 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1862 tx_packets[pkt->priority]++;
1865 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1866 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1867 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1868 frame, len, "Tx Frame:\n");
1869 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1871 chan == SDPCM_CONTROL_CHANNEL) ||
1873 chan != SDPCM_CONTROL_CHANNEL))) &&
1875 frame, min_t(u16, len, 16), "TxHdr:\n");
1877 /* Raise len to next SDIO block to eliminate tail command */
1878 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1879 u16 pad = bus->blocksize - (len % bus->blocksize);
1880 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1882 } else if (len % BRCMF_SDALIGN) {
1883 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1886 /* Some controllers have trouble with odd bytes -- round to even */
1887 if (len & (ALIGNMENT - 1))
1888 len = roundup(len, ALIGNMENT);
1890 sdio_claim_host(bus->sdiodev->func[1]);
1891 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1892 SDIO_FUNC_2, F2SYNC, pkt);
1893 bus->sdcnt.f2txdata++;
1896 /* On failure, abort the command and terminate the frame */
1897 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1899 bus->sdcnt.tx_sderrs++;
1901 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1902 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1904 bus->sdcnt.f1regdata++;
1906 for (i = 0; i < 3; i++) {
1908 hi = brcmf_sdio_regrb(bus->sdiodev,
1909 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1910 lo = brcmf_sdio_regrb(bus->sdiodev,
1911 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1912 bus->sdcnt.f1regdata += 2;
1913 if ((hi == 0) && (lo == 0))
1918 sdio_release_host(bus->sdiodev->func[1]);
1920 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1923 /* restore pkt buffer pointer before calling tx complete routine */
1924 skb_pull(pkt, SDPCM_HDRLEN + pad);
1925 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
1928 brcmu_pkt_buf_free_skb(pkt);
1933 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1935 struct sk_buff *pkt;
1937 int ret = 0, prec_out;
1942 brcmf_dbg(TRACE, "Enter\n");
1944 tx_prec_map = ~bus->flowcontrol;
1946 /* Send frames until the limit or some other event */
1947 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1948 spin_lock_bh(&bus->txqlock);
1949 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1951 spin_unlock_bh(&bus->txqlock);
1954 spin_unlock_bh(&bus->txqlock);
1955 datalen = pkt->len - SDPCM_HDRLEN;
1957 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1959 bus->sdiodev->bus_if->dstats.tx_errors++;
1961 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
1963 /* In poll mode, need to check for other events */
1964 if (!bus->intr && cnt) {
1965 /* Check device status, signal pending interrupt */
1966 sdio_claim_host(bus->sdiodev->func[1]);
1967 ret = r_sdreg32(bus, &intstatus,
1968 offsetof(struct sdpcmd_regs,
1970 sdio_release_host(bus->sdiodev->func[1]);
1971 bus->sdcnt.f2txdata++;
1974 if (intstatus & bus->hostintmask)
1975 atomic_set(&bus->ipend, 1);
1979 /* Deflow-control stack if needed */
1980 if (bus->sdiodev->bus_if->drvr_up &&
1981 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1982 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1984 brcmf_txflowblock(bus->sdiodev->dev, false);
1990 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1992 u32 local_hostintmask;
1995 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1996 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1997 struct brcmf_sdio *bus = sdiodev->bus;
1999 brcmf_dbg(TRACE, "Enter\n");
2001 if (bus->watchdog_tsk) {
2002 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2003 kthread_stop(bus->watchdog_tsk);
2004 bus->watchdog_tsk = NULL;
2007 sdio_claim_host(bus->sdiodev->func[1]);
2009 /* Enable clock for device interrupts */
2010 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2012 /* Disable and clear interrupts at the chip level also */
2013 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2014 local_hostintmask = bus->hostintmask;
2015 bus->hostintmask = 0;
2017 /* Change our idea of bus state */
2018 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2020 /* Force clocks on backplane to be sure F2 interrupt propagates */
2021 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2022 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2024 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2025 (saveclk | SBSDIO_FORCE_HT), &err);
2028 brcmf_err("Failed to force clock for F2: err %d\n", err);
2030 /* Turn off the bus (F2), free any pending packets */
2031 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2032 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2035 /* Clear any pending interrupts now that F2 is disabled */
2036 w_sdreg32(bus, local_hostintmask,
2037 offsetof(struct sdpcmd_regs, intstatus));
2039 /* Turn off the backplane clock (only) */
2040 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2041 sdio_release_host(bus->sdiodev->func[1]);
2043 /* Clear the data packet queues */
2044 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2046 /* Clear any held glomming stuff */
2048 brcmu_pkt_buf_free_skb(bus->glomd);
2049 brcmf_sdbrcm_free_glom(bus);
2051 /* Clear rx control and wake any waiters */
2052 spin_lock_bh(&bus->rxctl_lock);
2054 spin_unlock_bh(&bus->rxctl_lock);
2055 brcmf_sdbrcm_dcmd_resp_wake(bus);
2057 /* Reset some F2 state stuff */
2058 bus->rxskip = false;
2059 bus->tx_seq = bus->rx_seq = 0;
2062 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2063 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2065 unsigned long flags;
2067 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2068 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2069 enable_irq(bus->sdiodev->irq);
2070 bus->sdiodev->irq_en = true;
2072 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2075 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2078 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2080 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2082 struct list_head *new_hd;
2083 unsigned long flags;
2086 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2088 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2092 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2093 list_add_tail(new_hd, &bus->dpc_tsklst);
2094 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2097 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2104 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2105 addr = bus->ci->c_inf[idx].base +
2106 offsetof(struct sdpcmd_regs, intstatus);
2108 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2109 bus->sdcnt.f1regdata++;
2113 val &= bus->hostintmask;
2114 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2116 /* Clear interrupts */
2118 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2119 bus->sdcnt.f1regdata++;
2123 atomic_set(&bus->intstatus, 0);
2125 for_each_set_bit(n, &val, 32)
2126 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2132 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2135 unsigned long intstatus;
2136 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2137 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2138 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2141 brcmf_dbg(TRACE, "Enter\n");
2143 sdio_claim_host(bus->sdiodev->func[1]);
2145 /* If waiting for HTAVAIL, check status */
2146 if (bus->clkstate == CLK_PENDING) {
2147 u8 clkctl, devctl = 0;
2150 /* Check for inconsistent device control */
2151 devctl = brcmf_sdio_regrb(bus->sdiodev,
2152 SBSDIO_DEVICE_CTL, &err);
2154 brcmf_err("error reading DEVCTL: %d\n", err);
2155 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2159 /* Read CSR, if clock on switch to AVAIL, else ignore */
2160 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2161 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2163 brcmf_err("error reading CSR: %d\n",
2165 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2168 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2171 if (SBSDIO_HTAV(clkctl)) {
2172 devctl = brcmf_sdio_regrb(bus->sdiodev,
2173 SBSDIO_DEVICE_CTL, &err);
2175 brcmf_err("error reading DEVCTL: %d\n",
2177 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2179 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2180 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2183 brcmf_err("error writing DEVCTL: %d\n",
2185 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2187 bus->clkstate = CLK_AVAIL;
2191 /* Make sure backplane clock is on */
2192 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2194 /* Pending interrupt indicates new device status */
2195 if (atomic_read(&bus->ipend) > 0) {
2196 atomic_set(&bus->ipend, 0);
2197 err = brcmf_sdio_intr_rstatus(bus);
2200 /* Start with leftover status bits */
2201 intstatus = atomic_xchg(&bus->intstatus, 0);
2203 /* Handle flow-control change: read new state in case our ack
2204 * crossed another change interrupt. If change still set, assume
2205 * FC ON for safety, let next loop through do the debounce.
2207 if (intstatus & I_HMB_FC_CHANGE) {
2208 intstatus &= ~I_HMB_FC_CHANGE;
2209 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2210 offsetof(struct sdpcmd_regs, intstatus));
2212 err = r_sdreg32(bus, &newstatus,
2213 offsetof(struct sdpcmd_regs, intstatus));
2214 bus->sdcnt.f1regdata += 2;
2215 atomic_set(&bus->fcstate,
2216 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2217 intstatus |= (newstatus & bus->hostintmask);
2220 /* Handle host mailbox indication */
2221 if (intstatus & I_HMB_HOST_INT) {
2222 intstatus &= ~I_HMB_HOST_INT;
2223 intstatus |= brcmf_sdbrcm_hostmail(bus);
2226 sdio_release_host(bus->sdiodev->func[1]);
2228 /* Generally don't ask for these, can get CRC errors... */
2229 if (intstatus & I_WR_OOSYNC) {
2230 brcmf_err("Dongle reports WR_OOSYNC\n");
2231 intstatus &= ~I_WR_OOSYNC;
2234 if (intstatus & I_RD_OOSYNC) {
2235 brcmf_err("Dongle reports RD_OOSYNC\n");
2236 intstatus &= ~I_RD_OOSYNC;
2239 if (intstatus & I_SBINT) {
2240 brcmf_err("Dongle reports SBINT\n");
2241 intstatus &= ~I_SBINT;
2244 /* Would be active due to wake-wlan in gSPI */
2245 if (intstatus & I_CHIPACTIVE) {
2246 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2247 intstatus &= ~I_CHIPACTIVE;
2250 /* Ignore frame indications if rxskip is set */
2252 intstatus &= ~I_HMB_FRAME_IND;
2254 /* On frame indication, read available frames */
2255 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2256 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2257 if (!bus->rxpending)
2258 intstatus &= ~I_HMB_FRAME_IND;
2259 rxlimit -= min(framecnt, rxlimit);
2262 /* Keep still-pending events for next scheduling */
2264 for_each_set_bit(n, &intstatus, 32)
2265 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2268 brcmf_sdbrcm_clrintr(bus);
2270 if (data_ok(bus) && bus->ctrl_frame_stat &&
2271 (bus->clkstate == CLK_AVAIL)) {
2274 sdio_claim_host(bus->sdiodev->func[1]);
2275 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2276 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2277 (u32) bus->ctrl_frame_len);
2280 /* On failure, abort the command and
2281 terminate the frame */
2282 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2284 bus->sdcnt.tx_sderrs++;
2286 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2288 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2290 bus->sdcnt.f1regdata++;
2292 for (i = 0; i < 3; i++) {
2294 hi = brcmf_sdio_regrb(bus->sdiodev,
2295 SBSDIO_FUNC1_WFRAMEBCHI,
2297 lo = brcmf_sdio_regrb(bus->sdiodev,
2298 SBSDIO_FUNC1_WFRAMEBCLO,
2300 bus->sdcnt.f1regdata += 2;
2301 if ((hi == 0) && (lo == 0))
2306 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2308 sdio_release_host(bus->sdiodev->func[1]);
2309 bus->ctrl_frame_stat = false;
2310 brcmf_sdbrcm_wait_event_wakeup(bus);
2312 /* Send queued frames (limit 1 if rx may still be pending) */
2313 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2314 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2316 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2318 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2319 txlimit -= framecnt;
2322 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2323 brcmf_err("failed backplane access over SDIO, halting operation\n");
2324 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2325 atomic_set(&bus->intstatus, 0);
2326 } else if (atomic_read(&bus->intstatus) ||
2327 atomic_read(&bus->ipend) > 0 ||
2328 (!atomic_read(&bus->fcstate) &&
2329 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2330 data_ok(bus)) || PKT_AVAILABLE()) {
2331 brcmf_sdbrcm_adddpctsk(bus);
2334 /* If we're done for now, turn off clock request. */
2335 if ((bus->clkstate != CLK_PENDING)
2336 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2337 bus->activity = false;
2338 sdio_claim_host(bus->sdiodev->func[1]);
2339 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2340 sdio_release_host(bus->sdiodev->func[1]);
2344 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2348 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2349 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2350 struct brcmf_sdio *bus = sdiodev->bus;
2351 unsigned long flags;
2353 brcmf_dbg(TRACE, "Enter\n");
2357 /* Add space for the header */
2358 skb_push(pkt, SDPCM_HDRLEN);
2359 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2361 prec = prio2prec((pkt->priority & PRIOMASK));
2363 /* Check for existing queue, current flow-control,
2364 pending event, or pending clock */
2365 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2366 bus->sdcnt.fcqueued++;
2368 /* Priority based enq */
2369 spin_lock_bh(&bus->txqlock);
2370 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2371 skb_pull(pkt, SDPCM_HDRLEN);
2372 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2373 brcmu_pkt_buf_free_skb(pkt);
2374 brcmf_err("out of bus->txq !!!\n");
2379 spin_unlock_bh(&bus->txqlock);
2381 if (pktq_len(&bus->txq) >= TXHI) {
2383 brcmf_txflowblock(bus->sdiodev->dev, true);
2387 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2388 qcount[prec] = pktq_plen(&bus->txq, prec);
2391 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2392 if (list_empty(&bus->dpc_tsklst)) {
2393 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2395 brcmf_sdbrcm_adddpctsk(bus);
2396 queue_work(bus->brcmf_wq, &bus->datawork);
2398 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2405 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2412 /* Determine initial transfer parameters */
2413 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2414 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2415 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2419 sdio_claim_host(bus->sdiodev->func[1]);
2421 /* Set the backplane window to include the start address */
2422 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2424 brcmf_err("window change failed\n");
2428 /* Do the transfer(s) */
2430 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2431 write ? "write" : "read", dsize,
2432 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2433 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2434 sdaddr, data, dsize);
2436 brcmf_err("membytes transfer failed\n");
2440 /* Adjust for next transfer (if any) */
2445 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2448 brcmf_err("window change failed\n");
2452 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2457 /* Return the window to backplane enumeration space for core access */
2458 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2459 brcmf_err("FAILED to set window back to 0x%x\n",
2460 bus->sdiodev->sbwad);
2462 sdio_release_host(bus->sdiodev->func[1]);
2468 #define CONSOLE_LINE_MAX 192
2470 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2472 struct brcmf_console *c = &bus->console;
2473 u8 line[CONSOLE_LINE_MAX], ch;
2477 /* Don't do anything until FWREADY updates console address */
2478 if (bus->console_addr == 0)
2481 /* Read console log struct */
2482 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2483 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2488 /* Allocate console buffer (one time only) */
2489 if (c->buf == NULL) {
2490 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2491 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2496 idx = le32_to_cpu(c->log_le.idx);
2498 /* Protect against corrupt value */
2499 if (idx > c->bufsize)
2502 /* Skip reading the console buffer if the index pointer
2507 /* Read the console buffer */
2508 addr = le32_to_cpu(c->log_le.buf);
2509 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2513 while (c->last != idx) {
2514 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2515 if (c->last == idx) {
2516 /* This would output a partial line.
2518 * the buffer pointer and output this
2519 * line next time around.
2524 c->last = c->bufsize - n;
2527 ch = c->buf[c->last];
2528 c->last = (c->last + 1) % c->bufsize;
2535 if (line[n - 1] == '\r')
2538 pr_debug("CONSOLE: %s\n", line);
2547 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2552 bus->ctrl_frame_stat = false;
2553 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2554 SDIO_FUNC_2, F2SYNC, frame, len);
2557 /* On failure, abort the command and terminate the frame */
2558 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2560 bus->sdcnt.tx_sderrs++;
2562 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2564 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2566 bus->sdcnt.f1regdata++;
2568 for (i = 0; i < 3; i++) {
2570 hi = brcmf_sdio_regrb(bus->sdiodev,
2571 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2572 lo = brcmf_sdio_regrb(bus->sdiodev,
2573 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2574 bus->sdcnt.f1regdata += 2;
2575 if (hi == 0 && lo == 0)
2581 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2587 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2595 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2596 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2597 struct brcmf_sdio *bus = sdiodev->bus;
2598 unsigned long flags;
2600 brcmf_dbg(TRACE, "Enter\n");
2602 /* Back the pointer to make a room for bus header */
2603 frame = msg - SDPCM_HDRLEN;
2604 len = (msglen += SDPCM_HDRLEN);
2606 /* Add alignment padding (optional for ctl frames) */
2607 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2612 memset(frame, 0, doff + SDPCM_HDRLEN);
2614 /* precondition: doff < BRCMF_SDALIGN */
2615 doff += SDPCM_HDRLEN;
2617 /* Round send length to next SDIO block */
2618 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2619 u16 pad = bus->blocksize - (len % bus->blocksize);
2620 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2622 } else if (len % BRCMF_SDALIGN) {
2623 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2626 /* Satisfy length-alignment requirements */
2627 if (len & (ALIGNMENT - 1))
2628 len = roundup(len, ALIGNMENT);
2630 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2632 /* Make sure backplane clock is on */
2633 sdio_claim_host(bus->sdiodev->func[1]);
2634 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2635 sdio_release_host(bus->sdiodev->func[1]);
2637 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2638 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2639 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2641 /* Software tag: channel, sequence number, data offset */
2643 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2645 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2646 SDPCM_DOFFSET_MASK);
2647 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2648 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2650 if (!data_ok(bus)) {
2651 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2652 bus->tx_max, bus->tx_seq);
2653 bus->ctrl_frame_stat = true;
2655 bus->ctrl_frame_buf = frame;
2656 bus->ctrl_frame_len = len;
2658 wait_event_interruptible_timeout(bus->ctrl_wait,
2659 !bus->ctrl_frame_stat,
2660 msecs_to_jiffies(2000));
2662 if (!bus->ctrl_frame_stat) {
2663 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2666 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2672 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2673 frame, len, "Tx Frame:\n");
2674 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2676 frame, min_t(u16, len, 16), "TxHdr:\n");
2679 sdio_claim_host(bus->sdiodev->func[1]);
2680 ret = brcmf_tx_frame(bus, frame, len);
2681 sdio_release_host(bus->sdiodev->func[1]);
2682 } while (ret < 0 && retries++ < TXRETRIES);
2685 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2686 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2687 list_empty(&bus->dpc_tsklst)) {
2688 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2690 bus->activity = false;
2691 sdio_claim_host(bus->sdiodev->func[1]);
2692 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2693 sdio_release_host(bus->sdiodev->func[1]);
2695 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2699 bus->sdcnt.tx_ctlerrs++;
2701 bus->sdcnt.tx_ctlpkts++;
2703 return ret ? -EIO : 0;
2707 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2709 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2712 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2713 struct sdpcm_shared *sh)
2718 struct sdpcm_shared_le sh_le;
2721 shaddr = bus->ramsize - 4;
2724 * Read last word in socram to determine
2725 * address of sdpcm_shared structure
2727 sdio_claim_host(bus->sdiodev->func[1]);
2728 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2730 sdio_claim_host(bus->sdiodev->func[1]);
2734 addr = le32_to_cpu(addr_le);
2736 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2739 * Check if addr is valid.
2740 * NVRAM length at the end of memory should have been overwritten.
2742 if (!brcmf_sdio_valid_shared_address(addr)) {
2743 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2748 /* Read hndrte_shared structure */
2749 sdio_claim_host(bus->sdiodev->func[1]);
2750 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2751 sizeof(struct sdpcm_shared_le));
2752 sdio_release_host(bus->sdiodev->func[1]);
2757 sh->flags = le32_to_cpu(sh_le.flags);
2758 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2759 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2760 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2761 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2762 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2763 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2765 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2766 brcmf_err("sdpcm_shared version mismatch: dhd %d dongle %d\n",
2767 SDPCM_SHARED_VERSION,
2768 sh->flags & SDPCM_SHARED_VERSION_MASK);
2775 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2776 struct sdpcm_shared *sh, char __user *data,
2779 u32 addr, console_ptr, console_size, console_index;
2780 char *conbuf = NULL;
2786 /* obtain console information from device memory */
2787 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2788 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2789 (u8 *)&sh_val, sizeof(u32));
2792 console_ptr = le32_to_cpu(sh_val);
2794 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2795 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2796 (u8 *)&sh_val, sizeof(u32));
2799 console_size = le32_to_cpu(sh_val);
2801 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2802 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2803 (u8 *)&sh_val, sizeof(u32));
2806 console_index = le32_to_cpu(sh_val);
2808 /* allocate buffer for console data */
2809 if (console_size <= CONSOLE_BUFFER_MAX)
2810 conbuf = vzalloc(console_size+1);
2815 /* obtain the console data from device */
2816 conbuf[console_size] = '\0';
2817 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2822 rv = simple_read_from_buffer(data, count, &pos,
2823 conbuf + console_index,
2824 console_size - console_index);
2829 if (console_index > 0) {
2831 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2832 conbuf, console_index - 1);
2842 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2843 char __user *data, size_t count)
2847 struct brcmf_trap_info tr;
2851 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
2854 sdio_claim_host(bus->sdiodev->func[1]);
2855 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
2856 sizeof(struct brcmf_trap_info));
2860 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
2861 sdio_release_host(bus->sdiodev->func[1]);
2865 res = scnprintf(buf, sizeof(buf),
2866 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2867 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2868 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2869 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2870 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2871 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2872 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2873 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2874 le32_to_cpu(tr.pc), sh->trap_addr,
2875 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2876 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2877 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2878 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2880 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
2888 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2889 struct sdpcm_shared *sh, char __user *data,
2894 char file[80] = "?";
2895 char expr[80] = "<???>";
2899 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2900 brcmf_dbg(INFO, "firmware not built with -assert\n");
2902 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2903 brcmf_dbg(INFO, "no assert in dongle\n");
2907 sdio_claim_host(bus->sdiodev->func[1]);
2908 if (sh->assert_file_addr != 0) {
2909 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
2914 if (sh->assert_exp_addr != 0) {
2915 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
2920 sdio_release_host(bus->sdiodev->func[1]);
2922 res = scnprintf(buf, sizeof(buf),
2923 "dongle assert: %s:%d: assert(%s)\n",
2924 file, sh->assert_line, expr);
2925 return simple_read_from_buffer(data, count, &pos, buf, res);
2928 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2931 struct sdpcm_shared sh;
2933 error = brcmf_sdio_readshared(bus, &sh);
2938 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2939 brcmf_dbg(INFO, "firmware not built with -assert\n");
2940 else if (sh.flags & SDPCM_SHARED_ASSERT)
2941 brcmf_err("assertion in dongle\n");
2943 if (sh.flags & SDPCM_SHARED_TRAP)
2944 brcmf_err("firmware trap in dongle\n");
2949 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2950 size_t count, loff_t *ppos)
2953 struct sdpcm_shared sh;
2960 error = brcmf_sdio_readshared(bus, &sh);
2964 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2969 error = brcmf_sdio_trap_info(bus, &sh, data, count);
2979 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2980 size_t count, loff_t *ppos)
2982 struct brcmf_sdio *bus = f->private_data;
2985 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2988 return (ssize_t)res;
2991 static const struct file_operations brcmf_sdio_forensic_ops = {
2992 .owner = THIS_MODULE,
2993 .open = simple_open,
2994 .read = brcmf_sdio_forensic_read
2997 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2999 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3000 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3002 if (IS_ERR_OR_NULL(dentry))
3005 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3006 &brcmf_sdio_forensic_ops);
3007 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3010 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3015 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3021 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3027 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3028 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3029 struct brcmf_sdio *bus = sdiodev->bus;
3031 brcmf_dbg(TRACE, "Enter\n");
3033 /* Wait until control frame is available */
3034 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3036 spin_lock_bh(&bus->rxctl_lock);
3038 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3040 buf = bus->rxctl_orig;
3041 bus->rxctl_orig = NULL;
3043 spin_unlock_bh(&bus->rxctl_lock);
3047 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3049 } else if (timeleft == 0) {
3050 brcmf_err("resumed on timeout\n");
3051 brcmf_sdbrcm_checkdied(bus);
3052 } else if (pending) {
3053 brcmf_dbg(CTL, "cancelled\n");
3054 return -ERESTARTSYS;
3056 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3057 brcmf_sdbrcm_checkdied(bus);
3061 bus->sdcnt.rx_ctlpkts++;
3063 bus->sdcnt.rx_ctlerrs++;
3065 return rxlen ? (int)rxlen : -ETIMEDOUT;
3068 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3075 char *nvram_ularray;
3078 /* Even if there are no vars are to be written, we still
3079 need to set the ramsize. */
3080 varaddr = (bus->ramsize - 4) - bus->varsz;
3083 /* Write the vars list */
3084 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3085 bus->vars, bus->varsz);
3087 /* Verify NVRAM bytes */
3088 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3090 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3094 /* Upload image to verify downloaded contents. */
3095 memset(nvram_ularray, 0xaa, bus->varsz);
3097 /* Read the vars list to temp buffer for comparison */
3098 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3099 nvram_ularray, bus->varsz);
3101 brcmf_err("error %d on reading %d nvram bytes at 0x%08x\n",
3102 bcmerror, bus->varsz, varaddr);
3104 /* Compare the org NVRAM with the one read from RAM */
3105 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3106 brcmf_err("Downloaded NVRAM image is corrupted\n");
3108 brcmf_err("Download/Upload/Compare of NVRAM ok\n");
3110 kfree(nvram_ularray);
3114 /* adjust to the user specified RAM */
3115 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3116 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3117 varaddr, bus->varsz);
3120 * Determine the length token:
3121 * Varsize, converted to words, in lower 16-bits, checksum
3126 varsizew_le = cpu_to_le32(0);
3128 varsizew = bus->varsz / 4;
3129 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3130 varsizew_le = cpu_to_le32(varsizew);
3133 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3134 bus->varsz, varsizew);
3136 /* Write the length token to the last word */
3137 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3138 (u8 *)&varsizew_le, 4);
3143 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3146 struct chip_info *ci = bus->ci;
3148 /* To enter download state, disable ARM and reset SOCRAM.
3149 * To exit download state, simply reset ARM (default is RAM boot).
3152 bus->alp_only = true;
3154 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3156 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3158 /* Clear the top bit of memory */
3161 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3165 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3166 brcmf_err("SOCRAM core is down after reset?\n");
3171 bcmerror = brcmf_sdbrcm_write_vars(bus);
3173 brcmf_err("no vars written to RAM\n");
3177 w_sdreg32(bus, 0xFFFFFFFF,
3178 offsetof(struct sdpcmd_regs, intstatus));
3180 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3182 /* Allow HT Clock now that the ARM is running. */
3183 bus->alp_only = false;
3185 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3191 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3193 if (bus->firmware->size < bus->fw_ptr + len)
3194 len = bus->firmware->size - bus->fw_ptr;
3196 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3201 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3205 u8 *memblock = NULL, *memptr;
3208 brcmf_dbg(INFO, "Enter\n");
3210 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3211 &bus->sdiodev->func[2]->dev);
3213 brcmf_err("Fail to request firmware %d\n", ret);
3218 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3219 if (memblock == NULL) {
3223 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3224 memptr += (BRCMF_SDALIGN -
3225 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3227 /* Download image */
3229 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3230 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3232 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3233 ret, MEMBLOCK, offset);
3243 release_firmware(bus->firmware);
3250 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3251 * and ending in a NUL.
3252 * Removes carriage returns, empty lines, comment lines, and converts
3254 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3258 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3265 uint buf_len, n, len;
3267 len = bus->firmware->size;
3268 varbuf = vmalloc(len);
3272 memcpy(varbuf, bus->firmware->data, len);
3275 findNewline = false;
3278 for (n = 0; n < len; n++) {
3281 if (varbuf[n] == '\r')
3283 if (findNewline && varbuf[n] != '\n')
3285 findNewline = false;
3286 if (varbuf[n] == '#') {
3290 if (varbuf[n] == '\n') {
3300 buf_len = dp - varbuf;
3301 while (dp < varbuf + n)
3305 /* roundup needed for download to device */
3306 bus->varsz = roundup(buf_len + 1, 4);
3307 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3308 if (bus->vars == NULL) {
3314 /* copy the processed variables and add null termination */
3315 memcpy(bus->vars, varbuf, buf_len);
3316 bus->vars[buf_len] = 0;
3322 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3326 if (bus->sdiodev->bus_if->drvr_up)
3329 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3330 &bus->sdiodev->func[2]->dev);
3332 brcmf_err("Fail to request nvram %d\n", ret);
3336 ret = brcmf_process_nvram_vars(bus);
3338 release_firmware(bus->firmware);
3343 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3347 /* Keep arm in reset */
3348 if (brcmf_sdbrcm_download_state(bus, true)) {
3349 brcmf_err("error placing ARM core in reset\n");
3353 /* External image takes precedence if specified */
3354 if (brcmf_sdbrcm_download_code_file(bus)) {
3355 brcmf_err("dongle image file download failed\n");
3359 /* External nvram takes precedence if specified */
3360 if (brcmf_sdbrcm_download_nvram(bus))
3361 brcmf_err("dongle nvram file download failed\n");
3363 /* Take arm out of reset */
3364 if (brcmf_sdbrcm_download_state(bus, false)) {
3365 brcmf_err("error getting out of ARM core reset\n");
3376 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3380 sdio_claim_host(bus->sdiodev->func[1]);
3382 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3384 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3386 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3388 sdio_release_host(bus->sdiodev->func[1]);
3393 static int brcmf_sdbrcm_bus_init(struct device *dev)
3395 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3396 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3397 struct brcmf_sdio *bus = sdiodev->bus;
3398 unsigned long timeout;
3403 brcmf_dbg(TRACE, "Enter\n");
3405 /* try to download image and nvram to the dongle */
3406 if (bus_if->state == BRCMF_BUS_DOWN) {
3407 if (!(brcmf_sdbrcm_download_firmware(bus)))
3411 if (!bus->sdiodev->bus_if->drvr)
3414 /* Start the watchdog timer */
3415 bus->sdcnt.tickcnt = 0;
3416 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3418 sdio_claim_host(bus->sdiodev->func[1]);
3420 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3421 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3422 if (bus->clkstate != CLK_AVAIL)
3425 /* Force clocks on backplane to be sure F2 interrupt propagates */
3426 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3427 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3429 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3430 (saveclk | SBSDIO_FORCE_HT), &err);
3433 brcmf_err("Failed to force clock for F2: err %d\n", err);
3437 /* Enable function 2 (frame transfers) */
3438 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3439 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3440 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3442 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3444 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3446 while (enable != ready) {
3447 ready = brcmf_sdio_regrb(bus->sdiodev,
3448 SDIO_CCCR_IORx, NULL);
3449 if (time_after(jiffies, timeout))
3451 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3452 /* prevent busy waiting if it takes too long */
3453 msleep_interruptible(20);
3456 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3458 /* If F2 successfully enabled, set core and enable interrupts */
3459 if (ready == enable) {
3460 /* Set up the interrupt mask and enable interrupts */
3461 bus->hostintmask = HOSTINTMASK;
3462 w_sdreg32(bus, bus->hostintmask,
3463 offsetof(struct sdpcmd_regs, hostintmask));
3465 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3467 /* Disable F2 again */
3468 enable = SDIO_FUNC_ENABLE_1;
3469 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3473 /* Restore previous clock setting */
3474 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3477 ret = brcmf_sdio_intr_register(bus->sdiodev);
3479 brcmf_err("intr register failed:%d\n", ret);
3482 /* If we didn't come up, turn off backplane clock */
3483 if (bus_if->state != BRCMF_BUS_DATA)
3484 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3487 sdio_release_host(bus->sdiodev->func[1]);
3492 void brcmf_sdbrcm_isr(void *arg)
3494 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3496 brcmf_dbg(TRACE, "Enter\n");
3499 brcmf_err("bus is null pointer, exiting\n");
3503 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3504 brcmf_err("bus is down. we have nothing to do\n");
3507 /* Count the interrupt call */
3508 bus->sdcnt.intrcount++;
3510 atomic_set(&bus->ipend, 1);
3512 if (brcmf_sdio_intr_rstatus(bus)) {
3513 brcmf_err("failed backplane access\n");
3514 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3517 /* Disable additional interrupts (is this needed now)? */
3519 brcmf_err("isr w/o interrupt configured!\n");
3521 brcmf_sdbrcm_adddpctsk(bus);
3522 queue_work(bus->brcmf_wq, &bus->datawork);
3525 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3528 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3530 unsigned long flags;
3532 brcmf_dbg(TIMER, "Enter\n");
3534 /* Poll period: check device if appropriate. */
3535 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3538 /* Reset poll tick */
3541 /* Check device if no interrupts */
3543 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3545 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3546 if (list_empty(&bus->dpc_tsklst)) {
3548 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3550 sdio_claim_host(bus->sdiodev->func[1]);
3551 devpend = brcmf_sdio_regrb(bus->sdiodev,
3554 sdio_release_host(bus->sdiodev->func[1]);
3556 devpend & (INTR_STATUS_FUNC1 |
3559 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3563 /* If there is something, make like the ISR and
3566 bus->sdcnt.pollcnt++;
3567 atomic_set(&bus->ipend, 1);
3569 brcmf_sdbrcm_adddpctsk(bus);
3570 queue_work(bus->brcmf_wq, &bus->datawork);
3574 /* Update interrupt tracking */
3575 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3578 /* Poll for console output periodically */
3579 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3580 bus->console_interval != 0) {
3581 bus->console.count += BRCMF_WD_POLL_MS;
3582 if (bus->console.count >= bus->console_interval) {
3583 bus->console.count -= bus->console_interval;
3584 sdio_claim_host(bus->sdiodev->func[1]);
3585 /* Make sure backplane clock is on */
3586 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3587 if (brcmf_sdbrcm_readconsole(bus) < 0)
3589 bus->console_interval = 0;
3590 sdio_release_host(bus->sdiodev->func[1]);
3595 /* On idle timeout clear activity flag and/or turn off clock */
3596 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3597 if (++bus->idlecount >= bus->idletime) {
3599 if (bus->activity) {
3600 bus->activity = false;
3601 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3603 sdio_claim_host(bus->sdiodev->func[1]);
3604 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3605 sdio_release_host(bus->sdiodev->func[1]);
3610 return (atomic_read(&bus->ipend) > 0);
3613 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3615 if (chipid == BCM43241_CHIP_ID)
3617 if (chipid == BCM4329_CHIP_ID)
3619 if (chipid == BCM4330_CHIP_ID)
3621 if (chipid == BCM4334_CHIP_ID)
3626 static void brcmf_sdio_dataworker(struct work_struct *work)
3628 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3630 struct list_head *cur_hd, *tmp_hd;
3631 unsigned long flags;
3633 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3634 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3635 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3637 brcmf_sdbrcm_dpc(bus);
3639 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3643 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3646 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3648 brcmf_dbg(TRACE, "Enter\n");
3651 bus->rxctl = bus->rxbuf = NULL;
3654 kfree(bus->databuf);
3655 bus->databuf = NULL;
3658 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3660 brcmf_dbg(TRACE, "Enter\n");
3662 if (bus->sdiodev->bus_if->maxctl) {
3664 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3665 ALIGNMENT) + BRCMF_SDALIGN;
3666 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3671 /* Allocate buffer to receive glomed packet */
3672 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3673 if (!(bus->databuf)) {
3674 /* release rxbuf which was already located as above */
3680 /* Align the buffer */
3681 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3682 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3683 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3685 bus->dataptr = bus->databuf;
3694 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3702 bus->alp_only = true;
3704 sdio_claim_host(bus->sdiodev->func[1]);
3706 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3707 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3710 * Force PLL off until brcmf_sdio_chip_attach()
3711 * programs PLL control regs
3714 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3715 BRCMF_INIT_CLKCTL1, &err);
3717 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3718 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3720 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3721 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3722 err, BRCMF_INIT_CLKCTL1, clkctl);
3726 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3727 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3731 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3732 brcmf_err("unsupported chip: 0x%04x\n", bus->ci->chip);
3736 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3737 SDIO_DRIVE_STRENGTH);
3739 /* Get info on the SOCRAM cores... */
3740 bus->ramsize = bus->ci->ramsize;
3741 if (!(bus->ramsize)) {
3742 brcmf_err("failed to find SOCRAM memory!\n");
3746 /* Set core control so an SDIO reset does a backplane reset */
3747 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3748 reg_addr = bus->ci->c_inf[idx].base +
3749 offsetof(struct sdpcmd_regs, corecontrol);
3750 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3751 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3753 sdio_release_host(bus->sdiodev->func[1]);
3755 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3757 /* Locate an appropriately-aligned portion of hdrbuf */
3758 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3761 /* Set the poll and/or interrupt flags */
3770 sdio_release_host(bus->sdiodev->func[1]);
3774 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3776 brcmf_dbg(TRACE, "Enter\n");
3778 sdio_claim_host(bus->sdiodev->func[1]);
3780 /* Disable F2 to clear any intermediate frame state on the dongle */
3781 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3782 SDIO_FUNC_ENABLE_1, NULL);
3784 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3785 bus->rxflow = false;
3787 /* Done with backplane-dependent accesses, can drop clock... */
3788 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3790 sdio_release_host(bus->sdiodev->func[1]);
3792 /* ...and initialize clock/power states */
3793 bus->clkstate = CLK_SDONLY;
3794 bus->idletime = BRCMF_IDLE_INTERVAL;
3795 bus->idleclock = BRCMF_IDLE_ACTIVE;
3797 /* Query the F2 block size, set roundup accordingly */
3798 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3799 bus->roundup = min(max_roundup, bus->blocksize);
3801 /* bus module does not support packet chaining */
3802 bus->use_rxchain = false;
3803 bus->sd_rxchain = false;
3809 brcmf_sdbrcm_watchdog_thread(void *data)
3811 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3813 allow_signal(SIGTERM);
3814 /* Run until signal received */
3816 if (kthread_should_stop())
3818 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3819 brcmf_sdbrcm_bus_watchdog(bus);
3820 /* Count the tick for reference */
3821 bus->sdcnt.tickcnt++;
3829 brcmf_sdbrcm_watchdog(unsigned long data)
3831 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3833 if (bus->watchdog_tsk) {
3834 complete(&bus->watchdog_wait);
3835 /* Reschedule the watchdog */
3836 if (bus->wd_timer_valid)
3837 mod_timer(&bus->timer,
3838 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3842 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3844 brcmf_dbg(TRACE, "Enter\n");
3847 sdio_claim_host(bus->sdiodev->func[1]);
3848 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3849 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3850 sdio_release_host(bus->sdiodev->func[1]);
3851 brcmf_sdio_chip_detach(&bus->ci);
3852 if (bus->vars && bus->varsz)
3857 brcmf_dbg(TRACE, "Disconnected\n");
3860 /* Detach and free everything */
3861 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3863 brcmf_dbg(TRACE, "Enter\n");
3866 /* De-register interrupt handler */
3867 brcmf_sdio_intr_unregister(bus->sdiodev);
3869 cancel_work_sync(&bus->datawork);
3871 destroy_workqueue(bus->brcmf_wq);
3873 if (bus->sdiodev->bus_if->drvr) {
3874 brcmf_detach(bus->sdiodev->dev);
3875 brcmf_sdbrcm_release_dongle(bus);
3878 brcmf_sdbrcm_release_malloc(bus);
3883 brcmf_dbg(TRACE, "Disconnected\n");
3886 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3887 .stop = brcmf_sdbrcm_bus_stop,
3888 .init = brcmf_sdbrcm_bus_init,
3889 .txdata = brcmf_sdbrcm_bus_txdata,
3890 .txctl = brcmf_sdbrcm_bus_txctl,
3891 .rxctl = brcmf_sdbrcm_bus_rxctl,
3894 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3897 struct brcmf_sdio *bus;
3898 struct brcmf_bus_dcmd *dlst;
3900 u32 dngl_txglomalign;
3903 brcmf_dbg(TRACE, "Enter\n");
3905 /* We make an assumption about address window mappings:
3906 * regsva == SI_ENUM_BASE*/
3908 /* Allocate private bus interface state */
3909 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3913 bus->sdiodev = sdiodev;
3915 skb_queue_head_init(&bus->glom);
3916 bus->txbound = BRCMF_TXBOUND;
3917 bus->rxbound = BRCMF_RXBOUND;
3918 bus->txminmax = BRCMF_TXMINMAX;
3919 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3921 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3922 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3923 if (bus->brcmf_wq == NULL) {
3924 brcmf_err("insufficient memory to create txworkqueue\n");
3928 /* attempt to attach to the dongle */
3929 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3930 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3934 spin_lock_init(&bus->rxctl_lock);
3935 spin_lock_init(&bus->txqlock);
3936 init_waitqueue_head(&bus->ctrl_wait);
3937 init_waitqueue_head(&bus->dcmd_resp_wait);
3939 /* Set up the watchdog timer */
3940 init_timer(&bus->timer);
3941 bus->timer.data = (unsigned long)bus;
3942 bus->timer.function = brcmf_sdbrcm_watchdog;
3944 /* Initialize watchdog thread */
3945 init_completion(&bus->watchdog_wait);
3946 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3947 bus, "brcmf_watchdog");
3948 if (IS_ERR(bus->watchdog_tsk)) {
3949 pr_warn("brcmf_watchdog thread failed to start\n");
3950 bus->watchdog_tsk = NULL;
3952 /* Initialize DPC thread */
3953 INIT_LIST_HEAD(&bus->dpc_tsklst);
3954 spin_lock_init(&bus->dpc_tl_lock);
3956 /* Assign bus interface call back */
3957 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3958 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3960 /* Attach to the brcmf/OS/network interface */
3961 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3963 brcmf_err("brcmf_attach failed\n");
3967 /* Allocate buffers */
3968 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3969 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3973 if (!(brcmf_sdbrcm_probe_init(bus))) {
3974 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3978 brcmf_sdio_debugfs_create(bus);
3979 brcmf_dbg(INFO, "completed!!\n");
3981 /* sdio bus core specific dcmd */
3982 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3983 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3985 if (bus->ci->c_inf[idx].rev < 12) {
3986 /* for sdio core rev < 12, disable txgloming */
3988 dlst->name = "bus:txglom";
3989 dlst->param = (char *)&dngl_txglom;
3990 dlst->param_len = sizeof(u32);
3992 /* otherwise, set txglomalign */
3993 dngl_txglomalign = bus->sdiodev->bus_if->align;
3994 dlst->name = "bus:txglomalign";
3995 dlst->param = (char *)&dngl_txglomalign;
3996 dlst->param_len = sizeof(u32);
3998 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4001 /* if firmware path present try to download and bring up bus */
4002 ret = brcmf_bus_start(bus->sdiodev->dev);
4004 brcmf_err("dongle is not responding\n");
4011 brcmf_sdbrcm_release(bus);
4015 void brcmf_sdbrcm_disconnect(void *ptr)
4017 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4019 brcmf_dbg(TRACE, "Enter\n");
4022 brcmf_sdbrcm_release(bus);
4024 brcmf_dbg(TRACE, "Disconnected\n");
4028 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4030 /* Totally stop the timer */
4031 if (!wdtick && bus->wd_timer_valid) {
4032 del_timer_sync(&bus->timer);
4033 bus->wd_timer_valid = false;
4034 bus->save_ms = wdtick;
4038 /* don't start the wd until fw is loaded */
4039 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4043 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4044 if (bus->wd_timer_valid)
4045 /* Stop timer and restart at new value */
4046 del_timer_sync(&bus->timer);
4048 /* Create timer again when watchdog period is
4049 dynamically changed or in the first instance
4051 bus->timer.expires =
4052 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4053 add_timer(&bus->timer);
4056 /* Re arm the timer, at last watchdog period */
4057 mod_timer(&bus->timer,
4058 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4061 bus->wd_timer_valid = true;
4062 bus->save_ms = wdtick;
projects / karo-tx-linux.git / blob