2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
329 * Conversion of 802.1D priority to precedence level
331 static uint prio2prec(u32 prio)
333 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
339 u32 corecontrol; /* 0x00, rev8 */
340 u32 corestatus; /* rev8 */
342 u32 biststatus; /* rev8 */
345 u16 pcmciamesportaladdr; /* 0x010, rev8 */
347 u16 pcmciamesportalmask; /* rev8 */
349 u16 pcmciawrframebc; /* rev8 */
351 u16 pcmciaunderflowtimer; /* rev8 */
355 u32 intstatus; /* 0x020, rev8 */
356 u32 hostintmask; /* rev8 */
357 u32 intmask; /* rev8 */
358 u32 sbintstatus; /* rev8 */
359 u32 sbintmask; /* rev8 */
360 u32 funcintmask; /* rev4 */
362 u32 tosbmailbox; /* 0x040, rev8 */
363 u32 tohostmailbox; /* rev8 */
364 u32 tosbmailboxdata; /* rev8 */
365 u32 tohostmailboxdata; /* rev8 */
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess; /* 0x050, rev8 */
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl; /* 0x060, rev8 */
374 u8 pcmciawatermark; /* rev8 */
377 /* interrupt batching control */
378 u32 intrcvlazy; /* 0x100, rev8 */
382 u32 cmd52rd; /* 0x110, rev8 */
383 u32 cmd52wr; /* rev8 */
384 u32 cmd53rd; /* rev8 */
385 u32 cmd53wr; /* rev8 */
386 u32 abort; /* rev8 */
387 u32 datacrcerror; /* rev8 */
388 u32 rdoutofsync; /* rev8 */
389 u32 wroutofsync; /* rev8 */
390 u32 writebusy; /* rev8 */
391 u32 readwait; /* rev8 */
392 u32 readterm; /* rev8 */
393 u32 writeterm; /* rev8 */
395 u32 clockctlstatus; /* rev8 */
398 u32 PAD[128]; /* DMA engines */
400 /* SDIO/PCMCIA CIS region */
401 char cis[512]; /* 0x400-0x5ff, rev6 */
403 /* PCMCIA function control registers */
404 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
407 /* PCMCIA backplane access */
408 u16 backplanecsr; /* 0x76E, rev6 */
409 u16 backplaneaddr0; /* rev6 */
410 u16 backplaneaddr1; /* rev6 */
411 u16 backplaneaddr2; /* rev6 */
412 u16 backplaneaddr3; /* rev6 */
413 u16 backplanedata0; /* rev6 */
414 u16 backplanedata1; /* rev6 */
415 u16 backplanedata2; /* rev6 */
416 u16 backplanedata3; /* rev6 */
419 /* sprom "size" & "blank" info */
420 u16 spromstatus; /* 0x7BE, rev2 */
427 /* Device console log buffer state */
428 struct brcmf_console {
429 uint count; /* Poll interval msec counter */
430 uint log_addr; /* Log struct address (fixed) */
431 struct rte_log_le log_le; /* Log struct (host copy) */
432 uint bufsize; /* Size of log buffer */
433 u8 *buf; /* Log buffer (host copy) */
434 uint last; /* Last buffer read index */
437 struct brcmf_trap_info {
451 __le32 r9; /* sb/v6 */
452 __le32 r10; /* sl/v7 */
453 __le32 r11; /* fp/v8 */
461 struct sdpcm_shared {
465 u32 assert_file_addr;
467 u32 console_addr; /* Address of struct rte_console */
473 struct sdpcm_shared_le {
476 __le32 assert_exp_addr;
477 __le32 assert_file_addr;
479 __le32 console_addr; /* Address of struct rte_console */
480 __le32 msgtrace_addr;
485 /* SDIO read frame info */
486 struct brcmf_sdio_read {
495 /* misc chip info needed by some of the routines */
496 /* Private data for SDIO bus interaction */
498 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
499 struct chip_info *ci; /* Chip info struct */
500 char *vars; /* Variables (from CIS and/or other) */
501 uint varsz; /* Size of variables buffer */
503 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
505 u32 hostintmask; /* Copy of Host Interrupt Mask */
506 atomic_t intstatus; /* Intstatus bits (events) pending */
507 atomic_t fcstate; /* State of dongle flow-control */
509 uint blocksize; /* Block size of SDIO transfers */
510 uint roundup; /* Max roundup limit */
512 struct pktq txq; /* Queue length used for flow-control */
513 u8 flowcontrol; /* per prio flow control bitmask */
514 u8 tx_seq; /* Transmit sequence number (next) */
515 u8 tx_max; /* Maximum transmit sequence allowed */
517 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
518 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
519 u8 rx_seq; /* Receive sequence number (expected) */
520 struct brcmf_sdio_read cur_read;
521 /* info of current read frame */
522 bool rxskip; /* Skip receive (awaiting NAK ACK) */
523 bool rxpending; /* Data frame pending in dongle */
525 uint rxbound; /* Rx frames to read before resched */
526 uint txbound; /* Tx frames to send before resched */
529 struct sk_buff *glomd; /* Packet containing glomming descriptor */
530 struct sk_buff_head glom; /* Packet list for glommed superframe */
531 uint glomerr; /* Glom packet read errors */
533 u8 *rxbuf; /* Buffer for receiving control packets */
534 uint rxblen; /* Allocated length of rxbuf */
535 u8 *rxctl; /* Aligned pointer into rxbuf */
536 u8 *rxctl_orig; /* pointer for freeing rxctl */
537 u8 *databuf; /* Buffer for receiving big glom packet */
538 u8 *dataptr; /* Aligned pointer into databuf */
539 uint rxlen; /* Length of valid data in buffer */
540 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
542 u8 sdpcm_ver; /* Bus protocol reported by dongle */
544 bool intr; /* Use interrupts */
545 bool poll; /* Use polling */
546 atomic_t ipend; /* Device interrupt is pending */
547 uint spurious; /* Count of spurious interrupts */
548 uint pollrate; /* Ticks between device polls */
549 uint polltick; /* Tick counter */
552 uint console_interval;
553 struct brcmf_console console; /* Console output polling support */
554 uint console_addr; /* Console address from shared struct */
557 uint clkstate; /* State of sd and backplane clock(s) */
558 bool activity; /* Activity flag for clock down */
559 s32 idletime; /* Control for activity timeout */
560 s32 idlecount; /* Activity timeout counter */
561 s32 idleclock; /* How to set bus driver when idle */
563 bool use_rxchain; /* If brcmf should use PKT chains */
564 bool rxflow_mode; /* Rx flow control mode */
565 bool rxflow; /* Is rx flow control on */
566 bool alp_only; /* Don't use HT clock (ALP only) */
570 bool ctrl_frame_stat;
573 wait_queue_head_t ctrl_wait;
574 wait_queue_head_t dcmd_resp_wait;
576 struct timer_list timer;
577 struct completion watchdog_wait;
578 struct task_struct *watchdog_tsk;
582 struct workqueue_struct *brcmf_wq;
583 struct work_struct datawork;
584 struct list_head dpc_tsklst;
585 spinlock_t dpc_tl_lock;
587 struct semaphore sdsem;
589 const struct firmware *firmware;
592 bool txoff; /* Transmit flow-controlled */
593 struct brcmf_sdio_count sdcnt;
599 #define CLK_PENDING 2 /* Not used yet */
603 static int qcount[NUMPRIO];
604 static int tx_packets[NUMPRIO];
607 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
609 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
611 /* Retry count for register access failures */
612 static const uint retry_limit = 2;
614 /* Limit on rounding up frames */
615 static const uint max_roundup = 512;
619 enum brcmf_sdio_frmtype {
620 BRCMF_SDIO_FT_NORMAL,
625 static void pkt_align(struct sk_buff *p, int len, int align)
628 datalign = (unsigned long)(p->data);
629 datalign = roundup(datalign, (align)) - datalign;
631 skb_pull(p, datalign);
635 /* To check if there's window offered */
636 static bool data_ok(struct brcmf_sdio *bus)
638 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
639 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
643 * Reads a register in the SDIO hardware block. This block occupies a series of
644 * adresses on the 32 bit backplane bus.
647 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
649 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
652 *regvar = brcmf_sdio_regrl(bus->sdiodev,
653 bus->ci->c_inf[idx].base + offset, &ret);
659 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
661 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
664 brcmf_sdio_regwl(bus->sdiodev,
665 bus->ci->c_inf[idx].base + reg_offset,
671 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
673 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
675 /* Turn backplane clock on or off */
676 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
679 u8 clkctl, clkreq, devctl;
680 unsigned long timeout;
682 brcmf_dbg(TRACE, "Enter\n");
687 /* Request HT Avail */
689 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
691 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
694 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
698 /* Check current status */
699 clkctl = brcmf_sdio_regrb(bus->sdiodev,
700 SBSDIO_FUNC1_CHIPCLKCSR, &err);
702 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
706 /* Go to pending and await interrupt if appropriate */
707 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
708 /* Allow only clock-available interrupt */
709 devctl = brcmf_sdio_regrb(bus->sdiodev,
710 SBSDIO_DEVICE_CTL, &err);
712 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
717 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
718 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
720 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
721 bus->clkstate = CLK_PENDING;
724 } else if (bus->clkstate == CLK_PENDING) {
725 /* Cancel CA-only interrupt filter */
726 devctl = brcmf_sdio_regrb(bus->sdiodev,
727 SBSDIO_DEVICE_CTL, &err);
728 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
729 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
733 /* Otherwise, wait here (polling) for HT Avail */
735 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
736 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
737 clkctl = brcmf_sdio_regrb(bus->sdiodev,
738 SBSDIO_FUNC1_CHIPCLKCSR,
740 if (time_after(jiffies, timeout))
743 usleep_range(5000, 10000);
746 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
749 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
750 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
751 PMU_MAX_TRANSITION_DLY, clkctl);
755 /* Mark clock available */
756 bus->clkstate = CLK_AVAIL;
757 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
760 if (!bus->alp_only) {
761 if (SBSDIO_ALPONLY(clkctl))
762 brcmf_dbg(ERROR, "HT Clock should be on\n");
764 #endif /* defined (DEBUG) */
766 bus->activity = true;
770 if (bus->clkstate == CLK_PENDING) {
771 /* Cancel CA-only interrupt filter */
772 devctl = brcmf_sdio_regrb(bus->sdiodev,
773 SBSDIO_DEVICE_CTL, &err);
774 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
775 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
779 bus->clkstate = CLK_SDONLY;
780 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
782 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
784 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
792 /* Change idle/active SD state */
793 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
795 brcmf_dbg(TRACE, "Enter\n");
798 bus->clkstate = CLK_SDONLY;
800 bus->clkstate = CLK_NONE;
805 /* Transition SD and backplane clock readiness */
806 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
809 uint oldstate = bus->clkstate;
812 brcmf_dbg(TRACE, "Enter\n");
814 /* Early exit if we're already there */
815 if (bus->clkstate == target) {
816 if (target == CLK_AVAIL) {
817 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
818 bus->activity = true;
825 /* Make sure SD clock is available */
826 if (bus->clkstate == CLK_NONE)
827 brcmf_sdbrcm_sdclk(bus, true);
828 /* Now request HT Avail on the backplane */
829 brcmf_sdbrcm_htclk(bus, true, pendok);
830 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
831 bus->activity = true;
835 /* Remove HT request, or bring up SD clock */
836 if (bus->clkstate == CLK_NONE)
837 brcmf_sdbrcm_sdclk(bus, true);
838 else if (bus->clkstate == CLK_AVAIL)
839 brcmf_sdbrcm_htclk(bus, false, false);
841 brcmf_dbg(ERROR, "request for %d -> %d\n",
842 bus->clkstate, target);
843 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
847 /* Make sure to remove HT request */
848 if (bus->clkstate == CLK_AVAIL)
849 brcmf_sdbrcm_htclk(bus, false, false);
850 /* Now remove the SD clock */
851 brcmf_sdbrcm_sdclk(bus, false);
852 brcmf_sdbrcm_wd_timer(bus, 0);
856 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
862 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
869 brcmf_dbg(TRACE, "Enter\n");
871 /* Read mailbox data and ack that we did so */
872 ret = r_sdreg32(bus, &hmb_data,
873 offsetof(struct sdpcmd_regs, tohostmailboxdata));
876 w_sdreg32(bus, SMB_INT_ACK,
877 offsetof(struct sdpcmd_regs, tosbmailbox));
878 bus->sdcnt.f1regdata += 2;
880 /* Dongle recomposed rx frames, accept them again */
881 if (hmb_data & HMB_DATA_NAKHANDLED) {
882 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
885 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
888 intstatus |= I_HMB_FRAME_IND;
892 * DEVREADY does not occur with gSPI.
894 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
896 (hmb_data & HMB_DATA_VERSION_MASK) >>
897 HMB_DATA_VERSION_SHIFT;
898 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
899 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
901 bus->sdpcm_ver, SDPCM_PROT_VERSION);
903 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
908 * Flow Control has been moved into the RX headers and this out of band
909 * method isn't used any more.
910 * remaining backward compatible with older dongles.
912 if (hmb_data & HMB_DATA_FC) {
913 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
914 HMB_DATA_FCDATA_SHIFT;
916 if (fcbits & ~bus->flowcontrol)
917 bus->sdcnt.fc_xoff++;
919 if (bus->flowcontrol & ~fcbits)
922 bus->sdcnt.fc_rcvd++;
923 bus->flowcontrol = fcbits;
926 /* Shouldn't be any others */
927 if (hmb_data & ~(HMB_DATA_DEVREADY |
928 HMB_DATA_NAKHANDLED |
931 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
932 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
938 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
945 brcmf_dbg(ERROR, "%sterminate frame%s\n",
946 abort ? "abort command, " : "",
947 rtx ? ", send NAK" : "");
950 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
952 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
954 bus->sdcnt.f1regdata++;
956 /* Wait until the packet has been flushed (device/FIFO stable) */
957 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
958 hi = brcmf_sdio_regrb(bus->sdiodev,
959 SBSDIO_FUNC1_RFRAMEBCHI, &err);
960 lo = brcmf_sdio_regrb(bus->sdiodev,
961 SBSDIO_FUNC1_RFRAMEBCLO, &err);
962 bus->sdcnt.f1regdata += 2;
964 if ((hi == 0) && (lo == 0))
967 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
968 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
969 lastrbc, (hi << 8) + lo);
971 lastrbc = (hi << 8) + lo;
975 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
977 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
981 err = w_sdreg32(bus, SMB_NAK,
982 offsetof(struct sdpcmd_regs, tosbmailbox));
984 bus->sdcnt.f1regdata++;
989 /* Clear partial in any case */
990 bus->cur_read.len = 0;
992 /* If we can't reach the device, signal failure */
994 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
997 /* copy a buffer into a pkt buffer chain */
998 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1007 skb_queue_walk(&bus->glom, p) {
1008 n = min_t(uint, p->len, len);
1009 memcpy(p->data, buf, n);
1020 /* return total length of buffer chain */
1021 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1027 skb_queue_walk(&bus->glom, p)
1032 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1034 struct sk_buff *cur, *next;
1036 skb_queue_walk_safe(&bus->glom, cur, next) {
1037 skb_unlink(cur, &bus->glom);
1038 brcmu_pkt_buf_free_skb(cur);
1042 static bool brcmf_sdio_hdparser(struct brcmf_sdio *bus, u8 *header,
1043 struct brcmf_sdio_read *rd,
1044 enum brcmf_sdio_frmtype type)
1047 u8 rx_seq, fc, tx_seq_max;
1050 * 4 bytes hardware header (frame tag)
1051 * Byte 0~1: Frame length
1052 * Byte 2~3: Checksum, bit-wise inverse of frame length
1054 len = get_unaligned_le16(header);
1055 checksum = get_unaligned_le16(header + sizeof(u16));
1056 /* All zero means no more to read */
1057 if (!(len | checksum)) {
1058 bus->rxpending = false;
1061 if ((u16)(~(len ^ checksum))) {
1062 brcmf_dbg(ERROR, "HW header checksum error\n");
1063 bus->sdcnt.rx_badhdr++;
1064 brcmf_sdbrcm_rxfail(bus, false, false);
1067 if (len < SDPCM_HDRLEN) {
1068 brcmf_dbg(ERROR, "HW header length error\n");
1071 if (type == BRCMF_SDIO_FT_SUPER &&
1072 (roundup(len, bus->blocksize) != rd->len)) {
1073 brcmf_dbg(ERROR, "HW superframe header length error\n");
1076 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1077 brcmf_dbg(ERROR, "HW subframe header length error\n");
1083 * 8 bytes hardware header
1084 * Byte 0: Rx sequence number
1085 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1086 * Byte 2: Length of next data frame
1087 * Byte 3: Data offset
1088 * Byte 4: Flow control bits
1089 * Byte 5: Maximum Sequence number allow for Tx
1090 * Byte 6~7: Reserved
1092 if (type == BRCMF_SDIO_FT_SUPER &&
1093 SDPCM_GLOMDESC(&header[SDPCM_FRAMETAG_LEN])) {
1094 brcmf_dbg(ERROR, "Glom descriptor found in superframe head\n");
1098 rx_seq = SDPCM_PACKET_SEQUENCE(&header[SDPCM_FRAMETAG_LEN]);
1099 rd->channel = SDPCM_PACKET_CHANNEL(&header[SDPCM_FRAMETAG_LEN]);
1100 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1101 type != BRCMF_SDIO_FT_SUPER) {
1102 brcmf_dbg(ERROR, "HW header length too long\n");
1103 bus->sdiodev->bus_if->dstats.rx_errors++;
1104 bus->sdcnt.rx_toolong++;
1105 brcmf_sdbrcm_rxfail(bus, false, false);
1109 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1110 brcmf_dbg(ERROR, "Wrong channel for superframe\n");
1114 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1115 rd->channel != SDPCM_EVENT_CHANNEL) {
1116 brcmf_dbg(ERROR, "Wrong channel for subframe\n");
1120 rd->dat_offset = SDPCM_DOFFSET_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1121 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1122 brcmf_dbg(ERROR, "seq %d: bad data offset\n", rx_seq);
1123 bus->sdcnt.rx_badhdr++;
1124 brcmf_sdbrcm_rxfail(bus, false, false);
1128 if (rd->seq_num != rx_seq) {
1129 brcmf_dbg(ERROR, "seq %d: sequence number error, expect %d\n",
1130 rx_seq, rd->seq_num);
1131 bus->sdcnt.rx_badseq++;
1132 rd->seq_num = rx_seq;
1134 /* no need to check the reset for subframe */
1135 if (type == BRCMF_SDIO_FT_SUB)
1137 rd->len_nxtfrm = header[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1138 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1139 /* only warm for NON glom packet */
1140 if (rd->channel != SDPCM_GLOM_CHANNEL)
1141 brcmf_dbg(ERROR, "seq %d: next length error\n", rx_seq);
1144 fc = SDPCM_FCMASK_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1145 if (bus->flowcontrol != fc) {
1146 if (~bus->flowcontrol & fc)
1147 bus->sdcnt.fc_xoff++;
1148 if (bus->flowcontrol & ~fc)
1149 bus->sdcnt.fc_xon++;
1150 bus->sdcnt.fc_rcvd++;
1151 bus->flowcontrol = fc;
1153 tx_seq_max = SDPCM_WINDOW_VALUE(&header[SDPCM_FRAMETAG_LEN]);
1154 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1155 brcmf_dbg(ERROR, "seq %d: max tx seq number error\n", rx_seq);
1156 tx_seq_max = bus->tx_seq + 2;
1158 bus->tx_max = tx_seq_max;
1163 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1169 struct sk_buff *pfirst, *pnext;
1175 bool usechain = bus->use_rxchain;
1177 struct brcmf_sdio_read rd_new;
1179 /* If packets, issue read(s) and send up packet chain */
1180 /* Return sequence numbers consumed? */
1182 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1183 bus->glomd, skb_peek(&bus->glom));
1185 /* If there's a descriptor, generate the packet chain */
1187 pfirst = pnext = NULL;
1188 dlen = (u16) (bus->glomd->len);
1189 dptr = bus->glomd->data;
1190 if (!dlen || (dlen & 1)) {
1191 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1196 for (totlen = num = 0; dlen; num++) {
1197 /* Get (and move past) next length */
1198 sublen = get_unaligned_le16(dptr);
1199 dlen -= sizeof(u16);
1200 dptr += sizeof(u16);
1201 if ((sublen < SDPCM_HDRLEN) ||
1202 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1203 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1208 if (sublen % BRCMF_SDALIGN) {
1209 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1210 sublen, BRCMF_SDALIGN);
1215 /* For last frame, adjust read len so total
1216 is a block multiple */
1219 (roundup(totlen, bus->blocksize) - totlen);
1220 totlen = roundup(totlen, bus->blocksize);
1223 /* Allocate/chain packet for next subframe */
1224 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1225 if (pnext == NULL) {
1226 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1230 skb_queue_tail(&bus->glom, pnext);
1232 /* Adhere to start alignment requirements */
1233 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1236 /* If all allocations succeeded, save packet chain
1239 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1241 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1242 totlen != bus->cur_read.len) {
1243 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1244 bus->cur_read.len, totlen, rxseq);
1246 pfirst = pnext = NULL;
1248 brcmf_sdbrcm_free_glom(bus);
1252 /* Done with descriptor packet */
1253 brcmu_pkt_buf_free_skb(bus->glomd);
1255 bus->cur_read.len = 0;
1258 /* Ok -- either we just generated a packet chain,
1259 or had one from before */
1260 if (!skb_queue_empty(&bus->glom)) {
1261 if (BRCMF_GLOM_ON()) {
1262 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1263 skb_queue_walk(&bus->glom, pnext) {
1264 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1265 pnext, (u8 *) (pnext->data),
1266 pnext->len, pnext->len);
1270 pfirst = skb_peek(&bus->glom);
1271 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1273 /* Do an SDIO read for the superframe. Configurable iovar to
1274 * read directly into the chained packet, or allocate a large
1275 * packet and and copy into the chain.
1278 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1279 bus->sdiodev->sbwad,
1280 SDIO_FUNC_2, F2SYNC, &bus->glom);
1281 } else if (bus->dataptr) {
1282 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1283 bus->sdiodev->sbwad,
1284 SDIO_FUNC_2, F2SYNC,
1285 bus->dataptr, dlen);
1286 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1287 if (sublen != dlen) {
1288 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1294 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1298 bus->sdcnt.f2rxdata++;
1300 /* On failure, kill the superframe, allow a couple retries */
1302 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1304 bus->sdiodev->bus_if->dstats.rx_errors++;
1306 if (bus->glomerr++ < 3) {
1307 brcmf_sdbrcm_rxfail(bus, true, true);
1310 brcmf_sdbrcm_rxfail(bus, true, false);
1311 bus->sdcnt.rxglomfail++;
1312 brcmf_sdbrcm_free_glom(bus);
1317 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1318 pfirst->data, min_t(int, pfirst->len, 48),
1321 rd_new.seq_num = rxseq;
1323 errcode = -!brcmf_sdio_hdparser(bus, pfirst->data, &rd_new,
1324 BRCMF_SDIO_FT_SUPER);
1325 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1327 /* Remove superframe header, remember offset */
1328 skb_pull(pfirst, rd_new.dat_offset);
1329 sfdoff = rd_new.dat_offset;
1332 /* Validate all the subframe headers */
1333 skb_queue_walk(&bus->glom, pnext) {
1334 /* leave when invalid subframe is found */
1338 rd_new.len = pnext->len;
1339 rd_new.seq_num = rxseq++;
1340 errcode = -!brcmf_sdio_hdparser(bus, pnext->data,
1343 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1344 pnext->data, 32, "subframe:\n");
1350 /* Terminate frame on error, request
1352 if (bus->glomerr++ < 3) {
1353 /* Restore superframe header space */
1354 skb_push(pfirst, sfdoff);
1355 brcmf_sdbrcm_rxfail(bus, true, true);
1358 brcmf_sdbrcm_rxfail(bus, true, false);
1359 bus->sdcnt.rxglomfail++;
1360 brcmf_sdbrcm_free_glom(bus);
1362 bus->cur_read.len = 0;
1366 /* Basic SD framing looks ok - process each packet (header) */
1368 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1369 dptr = (u8 *) (pfirst->data);
1370 sublen = get_unaligned_le16(dptr);
1371 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1373 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1375 "Rx Subframe Data:\n");
1377 __skb_trim(pfirst, sublen);
1378 skb_pull(pfirst, doff);
1380 if (pfirst->len == 0) {
1381 skb_unlink(pfirst, &bus->glom);
1382 brcmu_pkt_buf_free_skb(pfirst);
1384 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1385 &ifidx, pfirst) != 0) {
1386 brcmf_dbg(ERROR, "rx protocol error\n");
1387 bus->sdiodev->bus_if->dstats.rx_errors++;
1388 skb_unlink(pfirst, &bus->glom);
1389 brcmu_pkt_buf_free_skb(pfirst);
1393 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1395 min_t(int, pfirst->len, 32),
1396 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1397 bus->glom.qlen, pfirst, pfirst->data,
1398 pfirst->len, pfirst->next,
1401 /* sent any remaining packets up */
1402 if (bus->glom.qlen) {
1404 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1408 bus->sdcnt.rxglomframes++;
1409 bus->sdcnt.rxglompkts += bus->glom.qlen;
1414 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1417 DECLARE_WAITQUEUE(wait, current);
1418 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1420 /* Wait until control frame is available */
1421 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1422 set_current_state(TASK_INTERRUPTIBLE);
1424 while (!(*condition) && (!signal_pending(current) && timeout))
1425 timeout = schedule_timeout(timeout);
1427 if (signal_pending(current))
1430 set_current_state(TASK_RUNNING);
1431 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1436 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1438 if (waitqueue_active(&bus->dcmd_resp_wait))
1439 wake_up_interruptible(&bus->dcmd_resp_wait);
1444 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1447 u8 *buf = NULL, *rbuf;
1450 brcmf_dbg(TRACE, "Enter\n");
1453 buf = vzalloc(bus->rxblen);
1455 brcmf_dbg(ERROR, "no memory for control frame\n");
1459 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1461 rbuf += (BRCMF_SDALIGN - pad);
1463 /* Copy the already-read portion over */
1464 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1465 if (len <= BRCMF_FIRSTREAD)
1468 /* Raise rdlen to next SDIO block to avoid tail command */
1469 rdlen = len - BRCMF_FIRSTREAD;
1470 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1471 pad = bus->blocksize - (rdlen % bus->blocksize);
1472 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1473 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1475 } else if (rdlen % BRCMF_SDALIGN) {
1476 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1479 /* Satisfy length-alignment requirements */
1480 if (rdlen & (ALIGNMENT - 1))
1481 rdlen = roundup(rdlen, ALIGNMENT);
1483 /* Drop if the read is too big or it exceeds our maximum */
1484 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1485 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1486 rdlen, bus->sdiodev->bus_if->maxctl);
1487 bus->sdiodev->bus_if->dstats.rx_errors++;
1488 brcmf_sdbrcm_rxfail(bus, false, false);
1492 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1493 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1494 len, len - doff, bus->sdiodev->bus_if->maxctl);
1495 bus->sdiodev->bus_if->dstats.rx_errors++;
1496 bus->sdcnt.rx_toolong++;
1497 brcmf_sdbrcm_rxfail(bus, false, false);
1501 /* Read remain of frame body */
1502 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1503 bus->sdiodev->sbwad,
1505 F2SYNC, rbuf, rdlen);
1506 bus->sdcnt.f2rxdata++;
1508 /* Control frame failures need retransmission */
1510 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1512 bus->sdcnt.rxc_errors++;
1513 brcmf_sdbrcm_rxfail(bus, true, true);
1516 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1520 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1521 buf, len, "RxCtrl:\n");
1523 /* Point to valid data and indicate its length */
1524 spin_lock_bh(&bus->rxctl_lock);
1526 brcmf_dbg(ERROR, "last control frame is being processed.\n");
1527 spin_unlock_bh(&bus->rxctl_lock);
1531 bus->rxctl = buf + doff;
1532 bus->rxctl_orig = buf;
1533 bus->rxlen = len - doff;
1534 spin_unlock_bh(&bus->rxctl_lock);
1537 /* Awake any waiters */
1538 brcmf_sdbrcm_dcmd_resp_wake(bus);
1541 /* Pad read to blocksize for efficiency */
1542 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1544 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1545 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1546 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1547 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1549 } else if (*rdlen % BRCMF_SDALIGN) {
1550 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1554 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1556 struct sk_buff *pkt; /* Packet for event or data frames */
1557 u16 pad; /* Number of pad bytes to read */
1558 uint rxleft = 0; /* Remaining number of frames allowed */
1559 int sdret; /* Return code from calls */
1561 uint rxcount = 0; /* Total frames read */
1562 struct brcmf_sdio_read *rd = &bus->cur_read, rd_new;
1565 brcmf_dbg(TRACE, "Enter\n");
1567 /* Not finished unless we encounter no more frames indication */
1568 bus->rxpending = true;
1570 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1571 !bus->rxskip && rxleft &&
1572 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1573 rd->seq_num++, rxleft--) {
1575 /* Handle glomming separately */
1576 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1578 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1579 bus->glomd, skb_peek(&bus->glom));
1580 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1581 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1582 rd->seq_num += cnt - 1;
1583 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1587 rd->len_left = rd->len;
1588 /* read header first for unknow frame length */
1590 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1591 bus->sdiodev->sbwad,
1592 SDIO_FUNC_2, F2SYNC,
1595 bus->sdcnt.f2rxhdrs++;
1597 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n",
1599 bus->sdcnt.rx_hdrfail++;
1600 brcmf_sdbrcm_rxfail(bus, true, true);
1604 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1605 bus->rxhdr, SDPCM_HDRLEN,
1608 if (!brcmf_sdio_hdparser(bus, bus->rxhdr, rd,
1609 BRCMF_SDIO_FT_NORMAL)) {
1610 if (!bus->rxpending)
1616 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1617 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1620 /* prepare the descriptor for the next read */
1621 rd->len = rd->len_nxtfrm << 4;
1623 /* treat all packet as event if we don't know */
1624 rd->channel = SDPCM_EVENT_CHANNEL;
1627 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1628 rd->len - BRCMF_FIRSTREAD : 0;
1629 head_read = BRCMF_FIRSTREAD;
1632 brcmf_pad(bus, &pad, &rd->len_left);
1634 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1637 /* Give up on data, request rtx of events */
1638 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed\n");
1639 bus->sdiodev->bus_if->dstats.rx_dropped++;
1640 brcmf_sdbrcm_rxfail(bus, false,
1641 RETRYCHAN(rd->channel));
1644 skb_pull(pkt, head_read);
1645 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1647 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1648 SDIO_FUNC_2, F2SYNC, pkt);
1649 bus->sdcnt.f2rxdata++;
1652 brcmf_dbg(ERROR, "read %d bytes from channel %d failed: %d\n",
1653 rd->len, rd->channel, sdret);
1654 brcmu_pkt_buf_free_skb(pkt);
1655 bus->sdiodev->bus_if->dstats.rx_errors++;
1656 brcmf_sdbrcm_rxfail(bus, true,
1657 RETRYCHAN(rd->channel));
1662 skb_push(pkt, head_read);
1663 memcpy(pkt->data, bus->rxhdr, head_read);
1666 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1667 rd_new.seq_num = rd->seq_num;
1668 if (!brcmf_sdio_hdparser(bus, bus->rxhdr, &rd_new,
1669 BRCMF_SDIO_FT_NORMAL)) {
1671 brcmu_pkt_buf_free_skb(pkt);
1673 bus->sdcnt.rx_readahead_cnt++;
1674 if (rd->len != roundup(rd_new.len, 16)) {
1675 brcmf_dbg(ERROR, "frame length mismatch:read %d, should be %d\n",
1677 roundup(rd_new.len, 16) >> 4);
1679 brcmf_sdbrcm_rxfail(bus, true, true);
1680 brcmu_pkt_buf_free_skb(pkt);
1683 rd->len_nxtfrm = rd_new.len_nxtfrm;
1684 rd->channel = rd_new.channel;
1685 rd->dat_offset = rd_new.dat_offset;
1687 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1690 bus->rxhdr, SDPCM_HDRLEN,
1693 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1694 brcmf_dbg(ERROR, "readahead on control packet %d?\n",
1696 /* Force retry w/normal header read */
1698 brcmf_sdbrcm_rxfail(bus, false, true);
1699 brcmu_pkt_buf_free_skb(pkt);
1704 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1705 pkt->data, rd->len, "Rx Data:\n");
1707 /* Save superframe descriptor and allocate packet frame */
1708 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1709 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1710 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1712 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1715 __skb_trim(pkt, rd->len);
1716 skb_pull(pkt, SDPCM_HDRLEN);
1719 brcmf_dbg(ERROR, "%s: glom superframe w/o "
1720 "descriptor!\n", __func__);
1721 brcmf_sdbrcm_rxfail(bus, false, false);
1723 /* prepare the descriptor for the next read */
1724 rd->len = rd->len_nxtfrm << 4;
1726 /* treat all packet as event if we don't know */
1727 rd->channel = SDPCM_EVENT_CHANNEL;
1731 /* Fill in packet len and prio, deliver upward */
1732 __skb_trim(pkt, rd->len);
1733 skb_pull(pkt, rd->dat_offset);
1735 /* prepare the descriptor for the next read */
1736 rd->len = rd->len_nxtfrm << 4;
1738 /* treat all packet as event if we don't know */
1739 rd->channel = SDPCM_EVENT_CHANNEL;
1741 if (pkt->len == 0) {
1742 brcmu_pkt_buf_free_skb(pkt);
1744 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1746 brcmf_dbg(ERROR, "rx protocol error\n");
1747 brcmu_pkt_buf_free_skb(pkt);
1748 bus->sdiodev->bus_if->dstats.rx_errors++;
1752 /* Unlock during rx call */
1754 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
1758 rxcount = maxframes - rxleft;
1759 /* Message if we hit the limit */
1761 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1763 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1764 /* Back off rxseq if awaiting rtx, update rx_seq */
1767 bus->rx_seq = rd->seq_num;
1773 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
1776 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
1782 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1784 if (waitqueue_active(&bus->ctrl_wait))
1785 wake_up_interruptible(&bus->ctrl_wait);
1789 /* Writes a HW/SW header into the packet and sends it. */
1790 /* Assumes: (a) header space already there, (b) caller holds lock */
1791 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1792 uint chan, bool free_pkt)
1798 struct sk_buff *new;
1801 brcmf_dbg(TRACE, "Enter\n");
1803 frame = (u8 *) (pkt->data);
1805 /* Add alignment padding, allocate new packet if needed */
1806 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1808 if (skb_headroom(pkt) < pad) {
1809 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1810 skb_headroom(pkt), pad);
1811 bus->sdiodev->bus_if->tx_realloc++;
1812 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1814 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
1815 pkt->len + BRCMF_SDALIGN);
1820 pkt_align(new, pkt->len, BRCMF_SDALIGN);
1821 memcpy(new->data, pkt->data, pkt->len);
1823 brcmu_pkt_buf_free_skb(pkt);
1824 /* free the pkt if canned one is not used */
1827 frame = (u8 *) (pkt->data);
1828 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1832 frame = (u8 *) (pkt->data);
1833 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1834 memset(frame, 0, pad + SDPCM_HDRLEN);
1837 /* precondition: pad < BRCMF_SDALIGN */
1839 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1840 len = (u16) (pkt->len);
1841 *(__le16 *) frame = cpu_to_le16(len);
1842 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
1844 /* Software tag: channel, sequence number, data offset */
1846 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1848 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1850 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1851 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1854 tx_packets[pkt->priority]++;
1857 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1858 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1859 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
1860 frame, len, "Tx Frame:\n");
1861 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1863 chan == SDPCM_CONTROL_CHANNEL) ||
1865 chan != SDPCM_CONTROL_CHANNEL))) &&
1867 frame, min_t(u16, len, 16), "TxHdr:\n");
1869 /* Raise len to next SDIO block to eliminate tail command */
1870 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1871 u16 pad = bus->blocksize - (len % bus->blocksize);
1872 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1874 } else if (len % BRCMF_SDALIGN) {
1875 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1878 /* Some controllers have trouble with odd bytes -- round to even */
1879 if (len & (ALIGNMENT - 1))
1880 len = roundup(len, ALIGNMENT);
1882 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1883 SDIO_FUNC_2, F2SYNC, pkt);
1884 bus->sdcnt.f2txdata++;
1887 /* On failure, abort the command and terminate the frame */
1888 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
1890 bus->sdcnt.tx_sderrs++;
1892 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1893 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1895 bus->sdcnt.f1regdata++;
1897 for (i = 0; i < 3; i++) {
1899 hi = brcmf_sdio_regrb(bus->sdiodev,
1900 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1901 lo = brcmf_sdio_regrb(bus->sdiodev,
1902 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1903 bus->sdcnt.f1regdata += 2;
1904 if ((hi == 0) && (lo == 0))
1910 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1913 /* restore pkt buffer pointer before calling tx complete routine */
1914 skb_pull(pkt, SDPCM_HDRLEN + pad);
1916 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
1920 brcmu_pkt_buf_free_skb(pkt);
1925 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
1927 struct sk_buff *pkt;
1929 int ret = 0, prec_out;
1934 brcmf_dbg(TRACE, "Enter\n");
1936 tx_prec_map = ~bus->flowcontrol;
1938 /* Send frames until the limit or some other event */
1939 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
1940 spin_lock_bh(&bus->txqlock);
1941 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1943 spin_unlock_bh(&bus->txqlock);
1946 spin_unlock_bh(&bus->txqlock);
1947 datalen = pkt->len - SDPCM_HDRLEN;
1949 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1951 bus->sdiodev->bus_if->dstats.tx_errors++;
1953 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
1955 /* In poll mode, need to check for other events */
1956 if (!bus->intr && cnt) {
1957 /* Check device status, signal pending interrupt */
1958 ret = r_sdreg32(bus, &intstatus,
1959 offsetof(struct sdpcmd_regs,
1961 bus->sdcnt.f2txdata++;
1964 if (intstatus & bus->hostintmask)
1965 atomic_set(&bus->ipend, 1);
1969 /* Deflow-control stack if needed */
1970 if (bus->sdiodev->bus_if->drvr_up &&
1971 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
1972 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
1974 brcmf_txflowblock(bus->sdiodev->dev, false);
1980 static void brcmf_sdbrcm_bus_stop(struct device *dev)
1982 u32 local_hostintmask;
1985 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
1986 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
1987 struct brcmf_sdio *bus = sdiodev->bus;
1989 brcmf_dbg(TRACE, "Enter\n");
1991 if (bus->watchdog_tsk) {
1992 send_sig(SIGTERM, bus->watchdog_tsk, 1);
1993 kthread_stop(bus->watchdog_tsk);
1994 bus->watchdog_tsk = NULL;
1999 /* Enable clock for device interrupts */
2000 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2002 /* Disable and clear interrupts at the chip level also */
2003 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2004 local_hostintmask = bus->hostintmask;
2005 bus->hostintmask = 0;
2007 /* Change our idea of bus state */
2008 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2010 /* Force clocks on backplane to be sure F2 interrupt propagates */
2011 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2012 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2014 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2015 (saveclk | SBSDIO_FORCE_HT), &err);
2018 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2020 /* Turn off the bus (F2), free any pending packets */
2021 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2022 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2025 /* Clear any pending interrupts now that F2 is disabled */
2026 w_sdreg32(bus, local_hostintmask,
2027 offsetof(struct sdpcmd_regs, intstatus));
2029 /* Turn off the backplane clock (only) */
2030 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2032 /* Clear the data packet queues */
2033 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2035 /* Clear any held glomming stuff */
2037 brcmu_pkt_buf_free_skb(bus->glomd);
2038 brcmf_sdbrcm_free_glom(bus);
2040 /* Clear rx control and wake any waiters */
2041 spin_lock_bh(&bus->rxctl_lock);
2043 spin_unlock_bh(&bus->rxctl_lock);
2044 brcmf_sdbrcm_dcmd_resp_wake(bus);
2046 /* Reset some F2 state stuff */
2047 bus->rxskip = false;
2048 bus->tx_seq = bus->rx_seq = 0;
2053 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2054 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2056 unsigned long flags;
2058 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2059 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2060 enable_irq(bus->sdiodev->irq);
2061 bus->sdiodev->irq_en = true;
2063 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2066 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2069 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2071 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2073 struct list_head *new_hd;
2074 unsigned long flags;
2077 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2079 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2083 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2084 list_add_tail(new_hd, &bus->dpc_tsklst);
2085 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2088 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2095 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2096 addr = bus->ci->c_inf[idx].base +
2097 offsetof(struct sdpcmd_regs, intstatus);
2099 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2100 bus->sdcnt.f1regdata++;
2104 val &= bus->hostintmask;
2105 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2107 /* Clear interrupts */
2109 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2110 bus->sdcnt.f1regdata++;
2114 atomic_set(&bus->intstatus, 0);
2116 for_each_set_bit(n, &val, 32)
2117 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2123 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2126 unsigned long intstatus;
2127 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2128 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2129 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2132 brcmf_dbg(TRACE, "Enter\n");
2136 /* If waiting for HTAVAIL, check status */
2137 if (bus->clkstate == CLK_PENDING) {
2138 u8 clkctl, devctl = 0;
2141 /* Check for inconsistent device control */
2142 devctl = brcmf_sdio_regrb(bus->sdiodev,
2143 SBSDIO_DEVICE_CTL, &err);
2145 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2146 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2150 /* Read CSR, if clock on switch to AVAIL, else ignore */
2151 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2152 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2154 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2156 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2159 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2162 if (SBSDIO_HTAV(clkctl)) {
2163 devctl = brcmf_sdio_regrb(bus->sdiodev,
2164 SBSDIO_DEVICE_CTL, &err);
2166 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2168 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2170 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2171 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2174 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2176 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2178 bus->clkstate = CLK_AVAIL;
2182 /* Make sure backplane clock is on */
2183 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2185 /* Pending interrupt indicates new device status */
2186 if (atomic_read(&bus->ipend) > 0) {
2187 atomic_set(&bus->ipend, 0);
2188 sdio_claim_host(bus->sdiodev->func[1]);
2189 err = brcmf_sdio_intr_rstatus(bus);
2190 sdio_release_host(bus->sdiodev->func[1]);
2193 /* Start with leftover status bits */
2194 intstatus = atomic_xchg(&bus->intstatus, 0);
2196 /* Handle flow-control change: read new state in case our ack
2197 * crossed another change interrupt. If change still set, assume
2198 * FC ON for safety, let next loop through do the debounce.
2200 if (intstatus & I_HMB_FC_CHANGE) {
2201 intstatus &= ~I_HMB_FC_CHANGE;
2202 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2203 offsetof(struct sdpcmd_regs, intstatus));
2205 err = r_sdreg32(bus, &newstatus,
2206 offsetof(struct sdpcmd_regs, intstatus));
2207 bus->sdcnt.f1regdata += 2;
2208 atomic_set(&bus->fcstate,
2209 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2210 intstatus |= (newstatus & bus->hostintmask);
2213 /* Handle host mailbox indication */
2214 if (intstatus & I_HMB_HOST_INT) {
2215 intstatus &= ~I_HMB_HOST_INT;
2216 intstatus |= brcmf_sdbrcm_hostmail(bus);
2219 /* Generally don't ask for these, can get CRC errors... */
2220 if (intstatus & I_WR_OOSYNC) {
2221 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2222 intstatus &= ~I_WR_OOSYNC;
2225 if (intstatus & I_RD_OOSYNC) {
2226 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2227 intstatus &= ~I_RD_OOSYNC;
2230 if (intstatus & I_SBINT) {
2231 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2232 intstatus &= ~I_SBINT;
2235 /* Would be active due to wake-wlan in gSPI */
2236 if (intstatus & I_CHIPACTIVE) {
2237 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2238 intstatus &= ~I_CHIPACTIVE;
2241 /* Ignore frame indications if rxskip is set */
2243 intstatus &= ~I_HMB_FRAME_IND;
2245 /* On frame indication, read available frames */
2246 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2247 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2248 if (!bus->rxpending)
2249 intstatus &= ~I_HMB_FRAME_IND;
2250 rxlimit -= min(framecnt, rxlimit);
2253 /* Keep still-pending events for next scheduling */
2255 for_each_set_bit(n, &intstatus, 32)
2256 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2259 brcmf_sdbrcm_clrintr(bus);
2261 if (data_ok(bus) && bus->ctrl_frame_stat &&
2262 (bus->clkstate == CLK_AVAIL)) {
2265 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2266 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2267 (u32) bus->ctrl_frame_len);
2270 /* On failure, abort the command and
2271 terminate the frame */
2272 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2274 bus->sdcnt.tx_sderrs++;
2276 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2278 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2280 bus->sdcnt.f1regdata++;
2282 for (i = 0; i < 3; i++) {
2284 hi = brcmf_sdio_regrb(bus->sdiodev,
2285 SBSDIO_FUNC1_WFRAMEBCHI,
2287 lo = brcmf_sdio_regrb(bus->sdiodev,
2288 SBSDIO_FUNC1_WFRAMEBCLO,
2290 bus->sdcnt.f1regdata += 2;
2291 if ((hi == 0) && (lo == 0))
2296 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2298 bus->ctrl_frame_stat = false;
2299 brcmf_sdbrcm_wait_event_wakeup(bus);
2301 /* Send queued frames (limit 1 if rx may still be pending) */
2302 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2303 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2305 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2307 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2308 txlimit -= framecnt;
2311 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2312 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n");
2313 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2314 atomic_set(&bus->intstatus, 0);
2315 } else if (atomic_read(&bus->intstatus) ||
2316 atomic_read(&bus->ipend) > 0 ||
2317 (!atomic_read(&bus->fcstate) &&
2318 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2319 data_ok(bus)) || PKT_AVAILABLE()) {
2320 brcmf_sdbrcm_adddpctsk(bus);
2323 /* If we're done for now, turn off clock request. */
2324 if ((bus->clkstate != CLK_PENDING)
2325 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2326 bus->activity = false;
2327 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2333 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2337 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2338 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2339 struct brcmf_sdio *bus = sdiodev->bus;
2340 unsigned long flags;
2342 brcmf_dbg(TRACE, "Enter\n");
2346 /* Add space for the header */
2347 skb_push(pkt, SDPCM_HDRLEN);
2348 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2350 prec = prio2prec((pkt->priority & PRIOMASK));
2352 /* Check for existing queue, current flow-control,
2353 pending event, or pending clock */
2354 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2355 bus->sdcnt.fcqueued++;
2357 /* Priority based enq */
2358 spin_lock_bh(&bus->txqlock);
2359 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2360 skb_pull(pkt, SDPCM_HDRLEN);
2361 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2362 brcmu_pkt_buf_free_skb(pkt);
2363 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2368 spin_unlock_bh(&bus->txqlock);
2370 if (pktq_len(&bus->txq) >= TXHI) {
2372 brcmf_txflowblock(bus->sdiodev->dev, true);
2376 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2377 qcount[prec] = pktq_plen(&bus->txq, prec);
2380 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2381 if (list_empty(&bus->dpc_tsklst)) {
2382 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2384 brcmf_sdbrcm_adddpctsk(bus);
2385 queue_work(bus->brcmf_wq, &bus->datawork);
2387 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2394 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2401 /* Determine initial transfer parameters */
2402 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2403 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2404 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2408 sdio_claim_host(bus->sdiodev->func[1]);
2410 /* Set the backplane window to include the start address */
2411 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2413 brcmf_dbg(ERROR, "window change failed\n");
2417 /* Do the transfer(s) */
2419 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2420 write ? "write" : "read", dsize,
2421 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2422 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2423 sdaddr, data, dsize);
2425 brcmf_dbg(ERROR, "membytes transfer failed\n");
2429 /* Adjust for next transfer (if any) */
2434 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2437 brcmf_dbg(ERROR, "window change failed\n");
2441 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2446 /* Return the window to backplane enumeration space for core access */
2447 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2448 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2449 bus->sdiodev->sbwad);
2451 sdio_release_host(bus->sdiodev->func[1]);
2457 #define CONSOLE_LINE_MAX 192
2459 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2461 struct brcmf_console *c = &bus->console;
2462 u8 line[CONSOLE_LINE_MAX], ch;
2466 /* Don't do anything until FWREADY updates console address */
2467 if (bus->console_addr == 0)
2470 /* Read console log struct */
2471 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2472 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2477 /* Allocate console buffer (one time only) */
2478 if (c->buf == NULL) {
2479 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2480 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2485 idx = le32_to_cpu(c->log_le.idx);
2487 /* Protect against corrupt value */
2488 if (idx > c->bufsize)
2491 /* Skip reading the console buffer if the index pointer
2496 /* Read the console buffer */
2497 addr = le32_to_cpu(c->log_le.buf);
2498 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2502 while (c->last != idx) {
2503 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2504 if (c->last == idx) {
2505 /* This would output a partial line.
2507 * the buffer pointer and output this
2508 * line next time around.
2513 c->last = c->bufsize - n;
2516 ch = c->buf[c->last];
2517 c->last = (c->last + 1) % c->bufsize;
2524 if (line[n - 1] == '\r')
2527 pr_debug("CONSOLE: %s\n", line);
2536 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2541 bus->ctrl_frame_stat = false;
2542 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2543 SDIO_FUNC_2, F2SYNC, frame, len);
2546 /* On failure, abort the command and terminate the frame */
2547 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2549 bus->sdcnt.tx_sderrs++;
2551 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2553 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2555 bus->sdcnt.f1regdata++;
2557 for (i = 0; i < 3; i++) {
2559 hi = brcmf_sdio_regrb(bus->sdiodev,
2560 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2561 lo = brcmf_sdio_regrb(bus->sdiodev,
2562 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2563 bus->sdcnt.f1regdata += 2;
2564 if (hi == 0 && lo == 0)
2570 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2576 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2584 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2585 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2586 struct brcmf_sdio *bus = sdiodev->bus;
2587 unsigned long flags;
2589 brcmf_dbg(TRACE, "Enter\n");
2591 /* Back the pointer to make a room for bus header */
2592 frame = msg - SDPCM_HDRLEN;
2593 len = (msglen += SDPCM_HDRLEN);
2595 /* Add alignment padding (optional for ctl frames) */
2596 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2601 memset(frame, 0, doff + SDPCM_HDRLEN);
2603 /* precondition: doff < BRCMF_SDALIGN */
2604 doff += SDPCM_HDRLEN;
2606 /* Round send length to next SDIO block */
2607 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2608 u16 pad = bus->blocksize - (len % bus->blocksize);
2609 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2611 } else if (len % BRCMF_SDALIGN) {
2612 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2615 /* Satisfy length-alignment requirements */
2616 if (len & (ALIGNMENT - 1))
2617 len = roundup(len, ALIGNMENT);
2619 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2621 /* Need to lock here to protect txseq and SDIO tx calls */
2624 /* Make sure backplane clock is on */
2625 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2627 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2628 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2629 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2631 /* Software tag: channel, sequence number, data offset */
2633 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2635 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2636 SDPCM_DOFFSET_MASK);
2637 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2638 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2640 if (!data_ok(bus)) {
2641 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2642 bus->tx_max, bus->tx_seq);
2643 bus->ctrl_frame_stat = true;
2645 bus->ctrl_frame_buf = frame;
2646 bus->ctrl_frame_len = len;
2648 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2650 if (!bus->ctrl_frame_stat) {
2651 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2654 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2660 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2661 frame, len, "Tx Frame:\n");
2662 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2664 frame, min_t(u16, len, 16), "TxHdr:\n");
2667 ret = brcmf_tx_frame(bus, frame, len);
2668 } while (ret < 0 && retries++ < TXRETRIES);
2671 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2672 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2673 list_empty(&bus->dpc_tsklst)) {
2674 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2676 bus->activity = false;
2677 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2679 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2685 bus->sdcnt.tx_ctlerrs++;
2687 bus->sdcnt.tx_ctlpkts++;
2689 return ret ? -EIO : 0;
2693 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2695 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2698 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2699 struct sdpcm_shared *sh)
2704 struct sdpcm_shared_le sh_le;
2707 shaddr = bus->ramsize - 4;
2710 * Read last word in socram to determine
2711 * address of sdpcm_shared structure
2713 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2718 addr = le32_to_cpu(addr_le);
2720 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2723 * Check if addr is valid.
2724 * NVRAM length at the end of memory should have been overwritten.
2726 if (!brcmf_sdio_valid_shared_address(addr)) {
2727 brcmf_dbg(ERROR, "invalid sdpcm_shared address 0x%08X\n",
2732 /* Read hndrte_shared structure */
2733 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2734 sizeof(struct sdpcm_shared_le));
2739 sh->flags = le32_to_cpu(sh_le.flags);
2740 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2741 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2742 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2743 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2744 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2745 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2747 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2749 "sdpcm_shared version mismatch: dhd %d dongle %d\n",
2750 SDPCM_SHARED_VERSION,
2751 sh->flags & SDPCM_SHARED_VERSION_MASK);
2758 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2759 struct sdpcm_shared *sh, char __user *data,
2762 u32 addr, console_ptr, console_size, console_index;
2763 char *conbuf = NULL;
2769 /* obtain console information from device memory */
2770 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2771 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2772 (u8 *)&sh_val, sizeof(u32));
2775 console_ptr = le32_to_cpu(sh_val);
2777 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2778 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2779 (u8 *)&sh_val, sizeof(u32));
2782 console_size = le32_to_cpu(sh_val);
2784 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2785 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2786 (u8 *)&sh_val, sizeof(u32));
2789 console_index = le32_to_cpu(sh_val);
2791 /* allocate buffer for console data */
2792 if (console_size <= CONSOLE_BUFFER_MAX)
2793 conbuf = vzalloc(console_size+1);
2798 /* obtain the console data from device */
2799 conbuf[console_size] = '\0';
2800 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2805 rv = simple_read_from_buffer(data, count, &pos,
2806 conbuf + console_index,
2807 console_size - console_index);
2812 if (console_index > 0) {
2814 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2815 conbuf, console_index - 1);
2825 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2826 char __user *data, size_t count)
2830 struct brcmf_trap_info tr;
2834 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
2837 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
2838 sizeof(struct brcmf_trap_info));
2842 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
2846 res = scnprintf(buf, sizeof(buf),
2847 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2848 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2849 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2850 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2851 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2852 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2853 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2854 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2855 le32_to_cpu(tr.pc), sh->trap_addr,
2856 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2857 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2858 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2859 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2861 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
2869 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2870 struct sdpcm_shared *sh, char __user *data,
2875 char file[80] = "?";
2876 char expr[80] = "<???>";
2880 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2881 brcmf_dbg(INFO, "firmware not built with -assert\n");
2883 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2884 brcmf_dbg(INFO, "no assert in dongle\n");
2888 if (sh->assert_file_addr != 0) {
2889 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
2894 if (sh->assert_exp_addr != 0) {
2895 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
2901 res = scnprintf(buf, sizeof(buf),
2902 "dongle assert: %s:%d: assert(%s)\n",
2903 file, sh->assert_line, expr);
2904 return simple_read_from_buffer(data, count, &pos, buf, res);
2907 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2910 struct sdpcm_shared sh;
2913 error = brcmf_sdio_readshared(bus, &sh);
2919 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2920 brcmf_dbg(INFO, "firmware not built with -assert\n");
2921 else if (sh.flags & SDPCM_SHARED_ASSERT)
2922 brcmf_dbg(ERROR, "assertion in dongle\n");
2924 if (sh.flags & SDPCM_SHARED_TRAP)
2925 brcmf_dbg(ERROR, "firmware trap in dongle\n");
2930 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2931 size_t count, loff_t *ppos)
2934 struct sdpcm_shared sh;
2942 error = brcmf_sdio_readshared(bus, &sh);
2946 error = brcmf_sdio_assert_info(bus, &sh, data, count);
2951 error = brcmf_sdio_trap_info(bus, &sh, data, count);
2962 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
2963 size_t count, loff_t *ppos)
2965 struct brcmf_sdio *bus = f->private_data;
2968 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
2971 return (ssize_t)res;
2974 static const struct file_operations brcmf_sdio_forensic_ops = {
2975 .owner = THIS_MODULE,
2976 .open = simple_open,
2977 .read = brcmf_sdio_forensic_read
2980 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
2982 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
2983 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
2985 if (IS_ERR_OR_NULL(dentry))
2988 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
2989 &brcmf_sdio_forensic_ops);
2990 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
2993 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2998 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3004 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3010 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3011 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3012 struct brcmf_sdio *bus = sdiodev->bus;
3014 brcmf_dbg(TRACE, "Enter\n");
3016 /* Wait until control frame is available */
3017 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3019 spin_lock_bh(&bus->rxctl_lock);
3021 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3023 buf = bus->rxctl_orig;
3024 bus->rxctl_orig = NULL;
3026 spin_unlock_bh(&bus->rxctl_lock);
3030 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3032 } else if (timeleft == 0) {
3033 brcmf_dbg(ERROR, "resumed on timeout\n");
3034 brcmf_sdbrcm_checkdied(bus);
3035 } else if (pending) {
3036 brcmf_dbg(CTL, "cancelled\n");
3037 return -ERESTARTSYS;
3039 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3040 brcmf_sdbrcm_checkdied(bus);
3044 bus->sdcnt.rx_ctlpkts++;
3046 bus->sdcnt.rx_ctlerrs++;
3048 return rxlen ? (int)rxlen : -ETIMEDOUT;
3051 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3058 char *nvram_ularray;
3061 /* Even if there are no vars are to be written, we still
3062 need to set the ramsize. */
3063 varaddr = (bus->ramsize - 4) - bus->varsz;
3066 /* Write the vars list */
3067 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3068 bus->vars, bus->varsz);
3070 /* Verify NVRAM bytes */
3071 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3073 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3077 /* Upload image to verify downloaded contents. */
3078 memset(nvram_ularray, 0xaa, bus->varsz);
3080 /* Read the vars list to temp buffer for comparison */
3081 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3082 nvram_ularray, bus->varsz);
3084 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3085 bcmerror, bus->varsz, varaddr);
3087 /* Compare the org NVRAM with the one read from RAM */
3088 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3089 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3091 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3093 kfree(nvram_ularray);
3097 /* adjust to the user specified RAM */
3098 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3099 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3100 varaddr, bus->varsz);
3103 * Determine the length token:
3104 * Varsize, converted to words, in lower 16-bits, checksum
3109 varsizew_le = cpu_to_le32(0);
3111 varsizew = bus->varsz / 4;
3112 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3113 varsizew_le = cpu_to_le32(varsizew);
3116 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3117 bus->varsz, varsizew);
3119 /* Write the length token to the last word */
3120 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3121 (u8 *)&varsizew_le, 4);
3126 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3129 struct chip_info *ci = bus->ci;
3131 /* To enter download state, disable ARM and reset SOCRAM.
3132 * To exit download state, simply reset ARM (default is RAM boot).
3135 bus->alp_only = true;
3137 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3139 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3141 /* Clear the top bit of memory */
3144 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3148 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3149 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3154 bcmerror = brcmf_sdbrcm_write_vars(bus);
3156 brcmf_dbg(ERROR, "no vars written to RAM\n");
3160 w_sdreg32(bus, 0xFFFFFFFF,
3161 offsetof(struct sdpcmd_regs, intstatus));
3163 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3165 /* Allow HT Clock now that the ARM is running. */
3166 bus->alp_only = false;
3168 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3174 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3176 if (bus->firmware->size < bus->fw_ptr + len)
3177 len = bus->firmware->size - bus->fw_ptr;
3179 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3184 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3188 u8 *memblock = NULL, *memptr;
3191 brcmf_dbg(INFO, "Enter\n");
3193 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3194 &bus->sdiodev->func[2]->dev);
3196 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3201 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3202 if (memblock == NULL) {
3206 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3207 memptr += (BRCMF_SDALIGN -
3208 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3210 /* Download image */
3212 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3213 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3215 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3216 ret, MEMBLOCK, offset);
3226 release_firmware(bus->firmware);
3233 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3234 * and ending in a NUL.
3235 * Removes carriage returns, empty lines, comment lines, and converts
3237 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3241 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3248 uint buf_len, n, len;
3250 len = bus->firmware->size;
3251 varbuf = vmalloc(len);
3255 memcpy(varbuf, bus->firmware->data, len);
3258 findNewline = false;
3261 for (n = 0; n < len; n++) {
3264 if (varbuf[n] == '\r')
3266 if (findNewline && varbuf[n] != '\n')
3268 findNewline = false;
3269 if (varbuf[n] == '#') {
3273 if (varbuf[n] == '\n') {
3283 buf_len = dp - varbuf;
3284 while (dp < varbuf + n)
3288 /* roundup needed for download to device */
3289 bus->varsz = roundup(buf_len + 1, 4);
3290 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3291 if (bus->vars == NULL) {
3297 /* copy the processed variables and add null termination */
3298 memcpy(bus->vars, varbuf, buf_len);
3299 bus->vars[buf_len] = 0;
3305 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3309 if (bus->sdiodev->bus_if->drvr_up)
3312 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3313 &bus->sdiodev->func[2]->dev);
3315 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3319 ret = brcmf_process_nvram_vars(bus);
3321 release_firmware(bus->firmware);
3326 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3330 /* Keep arm in reset */
3331 if (brcmf_sdbrcm_download_state(bus, true)) {
3332 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3336 /* External image takes precedence if specified */
3337 if (brcmf_sdbrcm_download_code_file(bus)) {
3338 brcmf_dbg(ERROR, "dongle image file download failed\n");
3342 /* External nvram takes precedence if specified */
3343 if (brcmf_sdbrcm_download_nvram(bus))
3344 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3346 /* Take arm out of reset */
3347 if (brcmf_sdbrcm_download_state(bus, false)) {
3348 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3359 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3363 /* Download the firmware */
3364 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3366 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3368 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3373 static int brcmf_sdbrcm_bus_init(struct device *dev)
3375 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3376 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3377 struct brcmf_sdio *bus = sdiodev->bus;
3378 unsigned long timeout;
3383 brcmf_dbg(TRACE, "Enter\n");
3385 /* try to download image and nvram to the dongle */
3386 if (bus_if->state == BRCMF_BUS_DOWN) {
3387 if (!(brcmf_sdbrcm_download_firmware(bus)))
3391 if (!bus->sdiodev->bus_if->drvr)
3394 /* Start the watchdog timer */
3395 bus->sdcnt.tickcnt = 0;
3396 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3400 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3401 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3402 if (bus->clkstate != CLK_AVAIL)
3405 /* Force clocks on backplane to be sure F2 interrupt propagates */
3406 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3407 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3409 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3410 (saveclk | SBSDIO_FORCE_HT), &err);
3413 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3417 /* Enable function 2 (frame transfers) */
3418 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3419 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3420 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3422 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3424 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3426 while (enable != ready) {
3427 ready = brcmf_sdio_regrb(bus->sdiodev,
3428 SDIO_CCCR_IORx, NULL);
3429 if (time_after(jiffies, timeout))
3431 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3432 /* prevent busy waiting if it takes too long */
3433 msleep_interruptible(20);
3436 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3438 /* If F2 successfully enabled, set core and enable interrupts */
3439 if (ready == enable) {
3440 /* Set up the interrupt mask and enable interrupts */
3441 bus->hostintmask = HOSTINTMASK;
3442 w_sdreg32(bus, bus->hostintmask,
3443 offsetof(struct sdpcmd_regs, hostintmask));
3445 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3447 /* Disable F2 again */
3448 enable = SDIO_FUNC_ENABLE_1;
3449 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3453 /* Restore previous clock setting */
3454 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3457 ret = brcmf_sdio_intr_register(bus->sdiodev);
3459 brcmf_dbg(ERROR, "intr register failed:%d\n", ret);
3462 /* If we didn't come up, turn off backplane clock */
3463 if (bus_if->state != BRCMF_BUS_DATA)
3464 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3472 void brcmf_sdbrcm_isr(void *arg)
3474 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3476 brcmf_dbg(TRACE, "Enter\n");
3479 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3483 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3484 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3487 /* Count the interrupt call */
3488 bus->sdcnt.intrcount++;
3490 atomic_set(&bus->ipend, 1);
3492 if (brcmf_sdio_intr_rstatus(bus)) {
3493 brcmf_dbg(ERROR, "failed backplane access\n");
3494 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3497 /* Disable additional interrupts (is this needed now)? */
3499 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3501 brcmf_sdbrcm_adddpctsk(bus);
3502 queue_work(bus->brcmf_wq, &bus->datawork);
3505 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3508 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3510 unsigned long flags;
3512 brcmf_dbg(TIMER, "Enter\n");
3516 /* Poll period: check device if appropriate. */
3517 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3520 /* Reset poll tick */
3523 /* Check device if no interrupts */
3525 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3527 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3528 if (list_empty(&bus->dpc_tsklst)) {
3530 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3532 devpend = brcmf_sdio_regrb(bus->sdiodev,
3536 devpend & (INTR_STATUS_FUNC1 |
3539 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3543 /* If there is something, make like the ISR and
3546 bus->sdcnt.pollcnt++;
3547 atomic_set(&bus->ipend, 1);
3549 brcmf_sdbrcm_adddpctsk(bus);
3550 queue_work(bus->brcmf_wq, &bus->datawork);
3554 /* Update interrupt tracking */
3555 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3558 /* Poll for console output periodically */
3559 if (bus_if->state == BRCMF_BUS_DATA &&
3560 bus->console_interval != 0) {
3561 bus->console.count += BRCMF_WD_POLL_MS;
3562 if (bus->console.count >= bus->console_interval) {
3563 bus->console.count -= bus->console_interval;
3564 /* Make sure backplane clock is on */
3565 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3566 if (brcmf_sdbrcm_readconsole(bus) < 0)
3568 bus->console_interval = 0;
3573 /* On idle timeout clear activity flag and/or turn off clock */
3574 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3575 if (++bus->idlecount >= bus->idletime) {
3577 if (bus->activity) {
3578 bus->activity = false;
3579 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3581 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3588 return (atomic_read(&bus->ipend) > 0);
3591 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3593 if (chipid == BCM43241_CHIP_ID)
3595 if (chipid == BCM4329_CHIP_ID)
3597 if (chipid == BCM4330_CHIP_ID)
3599 if (chipid == BCM4334_CHIP_ID)
3604 static void brcmf_sdio_dataworker(struct work_struct *work)
3606 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3608 struct list_head *cur_hd, *tmp_hd;
3609 unsigned long flags;
3611 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3612 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3613 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3615 brcmf_sdbrcm_dpc(bus);
3617 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3621 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3624 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3626 brcmf_dbg(TRACE, "Enter\n");
3629 bus->rxctl = bus->rxbuf = NULL;
3632 kfree(bus->databuf);
3633 bus->databuf = NULL;
3636 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3638 brcmf_dbg(TRACE, "Enter\n");
3640 if (bus->sdiodev->bus_if->maxctl) {
3642 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3643 ALIGNMENT) + BRCMF_SDALIGN;
3644 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3649 /* Allocate buffer to receive glomed packet */
3650 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3651 if (!(bus->databuf)) {
3652 /* release rxbuf which was already located as above */
3658 /* Align the buffer */
3659 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3660 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3661 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3663 bus->dataptr = bus->databuf;
3672 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3680 bus->alp_only = true;
3682 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3683 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3686 * Force PLL off until brcmf_sdio_chip_attach()
3687 * programs PLL control regs
3690 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3691 BRCMF_INIT_CLKCTL1, &err);
3693 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3694 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3696 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3697 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3698 err, BRCMF_INIT_CLKCTL1, clkctl);
3702 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3703 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3707 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3708 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3712 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3713 SDIO_DRIVE_STRENGTH);
3715 /* Get info on the SOCRAM cores... */
3716 bus->ramsize = bus->ci->ramsize;
3717 if (!(bus->ramsize)) {
3718 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3722 /* Set core control so an SDIO reset does a backplane reset */
3723 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3724 reg_addr = bus->ci->c_inf[idx].base +
3725 offsetof(struct sdpcmd_regs, corecontrol);
3726 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3727 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3729 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3731 /* Locate an appropriately-aligned portion of hdrbuf */
3732 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3735 /* Set the poll and/or interrupt flags */
3747 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3749 brcmf_dbg(TRACE, "Enter\n");
3751 /* Disable F2 to clear any intermediate frame state on the dongle */
3752 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3753 SDIO_FUNC_ENABLE_1, NULL);
3755 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3756 bus->rxflow = false;
3758 /* Done with backplane-dependent accesses, can drop clock... */
3759 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3761 /* ...and initialize clock/power states */
3762 bus->clkstate = CLK_SDONLY;
3763 bus->idletime = BRCMF_IDLE_INTERVAL;
3764 bus->idleclock = BRCMF_IDLE_ACTIVE;
3766 /* Query the F2 block size, set roundup accordingly */
3767 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3768 bus->roundup = min(max_roundup, bus->blocksize);
3770 /* bus module does not support packet chaining */
3771 bus->use_rxchain = false;
3772 bus->sd_rxchain = false;
3778 brcmf_sdbrcm_watchdog_thread(void *data)
3780 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3782 allow_signal(SIGTERM);
3783 /* Run until signal received */
3785 if (kthread_should_stop())
3787 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3788 brcmf_sdbrcm_bus_watchdog(bus);
3789 /* Count the tick for reference */
3790 bus->sdcnt.tickcnt++;
3798 brcmf_sdbrcm_watchdog(unsigned long data)
3800 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3802 if (bus->watchdog_tsk) {
3803 complete(&bus->watchdog_wait);
3804 /* Reschedule the watchdog */
3805 if (bus->wd_timer_valid)
3806 mod_timer(&bus->timer,
3807 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3811 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3813 brcmf_dbg(TRACE, "Enter\n");
3816 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3817 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3818 brcmf_sdio_chip_detach(&bus->ci);
3819 if (bus->vars && bus->varsz)
3824 brcmf_dbg(TRACE, "Disconnected\n");
3827 /* Detach and free everything */
3828 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3830 brcmf_dbg(TRACE, "Enter\n");
3833 /* De-register interrupt handler */
3834 brcmf_sdio_intr_unregister(bus->sdiodev);
3836 cancel_work_sync(&bus->datawork);
3837 destroy_workqueue(bus->brcmf_wq);
3839 if (bus->sdiodev->bus_if->drvr) {
3840 brcmf_detach(bus->sdiodev->dev);
3841 brcmf_sdbrcm_release_dongle(bus);
3844 brcmf_sdbrcm_release_malloc(bus);
3849 brcmf_dbg(TRACE, "Disconnected\n");
3852 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3855 struct brcmf_sdio *bus;
3856 struct brcmf_bus_dcmd *dlst;
3858 u32 dngl_txglomalign;
3861 brcmf_dbg(TRACE, "Enter\n");
3863 /* We make an assumption about address window mappings:
3864 * regsva == SI_ENUM_BASE*/
3866 /* Allocate private bus interface state */
3867 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3871 bus->sdiodev = sdiodev;
3873 skb_queue_head_init(&bus->glom);
3874 bus->txbound = BRCMF_TXBOUND;
3875 bus->rxbound = BRCMF_RXBOUND;
3876 bus->txminmax = BRCMF_TXMINMAX;
3877 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3879 /* attempt to attach to the dongle */
3880 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3881 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3885 spin_lock_init(&bus->rxctl_lock);
3886 spin_lock_init(&bus->txqlock);
3887 init_waitqueue_head(&bus->ctrl_wait);
3888 init_waitqueue_head(&bus->dcmd_resp_wait);
3890 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3891 if (bus->brcmf_wq == NULL) {
3892 brcmf_dbg(ERROR, "insufficient memory to create txworkqueue\n");
3895 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3897 /* Set up the watchdog timer */
3898 init_timer(&bus->timer);
3899 bus->timer.data = (unsigned long)bus;
3900 bus->timer.function = brcmf_sdbrcm_watchdog;
3902 /* Initialize thread based operation and lock */
3903 sema_init(&bus->sdsem, 1);
3905 /* Initialize watchdog thread */
3906 init_completion(&bus->watchdog_wait);
3907 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3908 bus, "brcmf_watchdog");
3909 if (IS_ERR(bus->watchdog_tsk)) {
3910 pr_warn("brcmf_watchdog thread failed to start\n");
3911 bus->watchdog_tsk = NULL;
3913 /* Initialize DPC thread */
3914 INIT_LIST_HEAD(&bus->dpc_tsklst);
3915 spin_lock_init(&bus->dpc_tl_lock);
3917 /* Assign bus interface call back */
3918 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
3919 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
3920 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
3921 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
3922 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
3923 /* Attach to the brcmf/OS/network interface */
3924 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3926 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3930 /* Allocate buffers */
3931 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3932 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3936 if (!(brcmf_sdbrcm_probe_init(bus))) {
3937 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3941 brcmf_sdio_debugfs_create(bus);
3942 brcmf_dbg(INFO, "completed!!\n");
3944 /* sdio bus core specific dcmd */
3945 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3946 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3948 if (bus->ci->c_inf[idx].rev < 12) {
3949 /* for sdio core rev < 12, disable txgloming */
3951 dlst->name = "bus:txglom";
3952 dlst->param = (char *)&dngl_txglom;
3953 dlst->param_len = sizeof(u32);
3955 /* otherwise, set txglomalign */
3956 dngl_txglomalign = bus->sdiodev->bus_if->align;
3957 dlst->name = "bus:txglomalign";
3958 dlst->param = (char *)&dngl_txglomalign;
3959 dlst->param_len = sizeof(u32);
3961 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
3964 /* if firmware path present try to download and bring up bus */
3965 ret = brcmf_bus_start(bus->sdiodev->dev);
3967 if (ret == -ENOLINK) {
3968 brcmf_dbg(ERROR, "dongle is not responding\n");
3976 brcmf_sdbrcm_release(bus);
3980 void brcmf_sdbrcm_disconnect(void *ptr)
3982 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3984 brcmf_dbg(TRACE, "Enter\n");
3987 brcmf_sdbrcm_release(bus);
3989 brcmf_dbg(TRACE, "Disconnected\n");
3993 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
3995 /* Totally stop the timer */
3996 if (!wdtick && bus->wd_timer_valid) {
3997 del_timer_sync(&bus->timer);
3998 bus->wd_timer_valid = false;
3999 bus->save_ms = wdtick;
4003 /* don't start the wd until fw is loaded */
4004 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4008 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4009 if (bus->wd_timer_valid)
4010 /* Stop timer and restart at new value */
4011 del_timer_sync(&bus->timer);
4013 /* Create timer again when watchdog period is
4014 dynamically changed or in the first instance
4016 bus->timer.expires =
4017 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4018 add_timer(&bus->timer);
4021 /* Re arm the timer, at last watchdog period */
4022 mod_timer(&bus->timer,
4023 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4026 bus->wd_timer_valid = true;
4027 bus->save_ms = wdtick;
projects / karo-tx-linux.git / blob