drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <asm/unaligned.h>
  36 #include <defs.h>
  37 #include <brcmu_wifi.h>
  38 #include <brcmu_utils.h>
  39 #include <brcm_hw_ids.h>
  40 #include <soc.h>
  41 #include "sdio_host.h"
  42 #include "sdio_chip.h"
  43
  44 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  45
  46 #ifdef DEBUG
  47
  48 #define BRCMF_TRAP_INFO_SIZE    80
  49
  50 #define CBUF_LEN        (128)
  51
  52 /* Device console log buffer state */
  53 #define CONSOLE_BUFFER_MAX      2024
  54
  55 struct rte_log_le {
  56         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  57         __le32 buf_size;
  58         __le32 idx;
  59         char *_buf_compat;      /* Redundant pointer for backward compat. */
  60 };
  61
  62 struct rte_console {
  63         /* Virtual UART
  64          * When there is no UART (e.g. Quickturn),
  65          * the host should write a complete
  66          * input line directly into cbuf and then write
  67          * the length into vcons_in.
  68          * This may also be used when there is a real UART
  69          * (at risk of conflicting with
  70          * the real UART).  vcons_out is currently unused.
  71          */
  72         uint vcons_in;
  73         uint vcons_out;
  74
  75         /* Output (logging) buffer
  76          * Console output is written to a ring buffer log_buf at index log_idx.
  77          * The host may read the output when it sees log_idx advance.
  78          * Output will be lost if the output wraps around faster than the host
  79          * polls.
  80          */
  81         struct rte_log_le log_le;
  82
  83         /* Console input line buffer
  84          * Characters are read one at a time into cbuf
  85          * until <CR> is received, then
  86          * the buffer is processed as a command line.
  87          * Also used for virtual UART.
  88          */
  89         uint cbuf_idx;
  90         char cbuf[CBUF_LEN];
  91 };
  92
  93 #endif                          /* DEBUG */
  94 #include <chipcommon.h>
  95
  96 #include "dhd_bus.h"
  97 #include "dhd_dbg.h"
  98 #include "tracepoint.h"
  99
 100 #define TXQLEN          2048    /* bulk tx queue length */
 101 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 102 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 103 #define PRIOMASK        7
 104
 105 #define TXRETRIES       2       /* # of retries for tx frames */
 106
 107 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 108                                  one scheduling */
 109
 110 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 111                                  one scheduling */
 112
 113 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 114
 115 #define MEMBLOCK        2048    /* Block size used for downloading
 116                                  of dongle image */
 117 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 118                                  biggest possible glom */
 119
 120 #define BRCMF_FIRSTREAD (1 << 6)
 121
 122
 123 /* SBSDIO_DEVICE_CTL */
 124
 125 /* 1: device will assert busy signal when receiving CMD53 */
 126 #define SBSDIO_DEVCTL_SETBUSY           0x01
 127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 130 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 132  * sdio bus power cycle to clear (rev 9) */
 133 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 134 /* Force SD->SB reset mapping (rev 11) */
 135 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 136 /*   Determined by CoreControl bit */
 137 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 138 /*   Force backplane reset */
 139 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 140 /*   Force no backplane reset */
 141 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 142
 143 /* direct(mapped) cis space */
 144
 145 /* MAPPED common CIS address */
 146 #define SBSDIO_CIS_BASE_COMMON          0x1000
 147 /* maximum bytes in one CIS */
 148 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 149 /* cis offset addr is < 17 bits */
 150 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 151
 152 /* manfid tuple length, include tuple, link bytes */
 153 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 154
 155 /* intstatus */
 156 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 157 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 158 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 159 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 160 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 161 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 162 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 163 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 164 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 165 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 166 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 167 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 168 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 169 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 170 #define I_PC            (1 << 10)       /* descriptor error */
 171 #define I_PD            (1 << 11)       /* data error */
 172 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 173 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 174 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 175 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 176 #define I_RI            (1 << 16)       /* Receive Interrupt */
 177 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 178 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 179 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 180 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 181 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 182 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 183 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 184 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 185 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 186 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 187 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 188 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 189
 190 /* corecontrol */
 191 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 192 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 193 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 194 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 195 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 196 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 197
 198 /* SDA_FRAMECTRL */
 199 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 200 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 201 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 202 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 203
 204 /*
 205  * Software allocation of To SB Mailbox resources
 206  */
 207
 208 /* tosbmailbox bits corresponding to intstatus bits */
 209 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 210 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 211 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 212 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 213
 214 /* tosbmailboxdata */
 215 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 216
 217 /*
 218  * Software allocation of To Host Mailbox resources
 219  */
 220
 221 /* intstatus bits */
 222 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 223 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 224 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 225 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 226
 227 /* tohostmailboxdata */
 228 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 229 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 230 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 231 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 232
 233 #define HMB_DATA_FCDATA_MASK    0xff000000
 234 #define HMB_DATA_FCDATA_SHIFT   24
 235
 236 #define HMB_DATA_VERSION_MASK   0x00ff0000
 237 #define HMB_DATA_VERSION_SHIFT  16
 238
 239 /*
 240  * Software-defined protocol header
 241  */
 242
 243 /* Current protocol version */
 244 #define SDPCM_PROT_VERSION      4
 245
 246 /*
 247  * Shared structure between dongle and the host.
 248  * The structure contains pointers to trap or assert information.
 249  */
 250 #define SDPCM_SHARED_VERSION       0x0003
 251 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 252 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 253 #define SDPCM_SHARED_ASSERT        0x0200
 254 #define SDPCM_SHARED_TRAP          0x0400
 255
 256 /* Space for header read, limit for data packets */
 257 #define MAX_HDR_READ    (1 << 6)
 258 #define MAX_RX_DATASZ   2048
 259
 260 /* Maximum milliseconds to wait for F2 to come up */
 261 #define BRCMF_WAIT_F2RDY        3000
 262
 263 /* Bump up limit on waiting for HT to account for first startup;
 264  * if the image is doing a CRC calculation before programming the PMU
 265  * for HT availability, it could take a couple hundred ms more, so
 266  * max out at a 1 second (1000000us).
 267  */
 268 #undef PMU_MAX_TRANSITION_DLY
 269 #define PMU_MAX_TRANSITION_DLY 1000000
 270
 271 /* Value for ChipClockCSR during initial setup */
 272 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 273                                         SBSDIO_ALP_AVAIL_REQ)
 274
 275 /* Flags for SDH calls */
 276 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 277
 278 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 279 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 280                                          * when idle
 281                                          */
 282 #define BRCMF_IDLE_INTERVAL     1
 283
 284 #define KSO_WAIT_US 50
 285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 286
 287 /*
 288  * Conversion of 802.1D priority to precedence level
 289  */
 290 static uint prio2prec(u32 prio)
 291 {
 292         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 293                (prio^2) : prio;
 294 }
 295
 296 #ifdef DEBUG
 297 /* Device console log buffer state */
 298 struct brcmf_console {
 299         uint count;             /* Poll interval msec counter */
 300         uint log_addr;          /* Log struct address (fixed) */
 301         struct rte_log_le log_le;       /* Log struct (host copy) */
 302         uint bufsize;           /* Size of log buffer */
 303         u8 *buf;                /* Log buffer (host copy) */
 304         uint last;              /* Last buffer read index */
 305 };
 306
 307 struct brcmf_trap_info {
 308         __le32          type;
 309         __le32          epc;
 310         __le32          cpsr;
 311         __le32          spsr;
 312         __le32          r0;     /* a1 */
 313         __le32          r1;     /* a2 */
 314         __le32          r2;     /* a3 */
 315         __le32          r3;     /* a4 */
 316         __le32          r4;     /* v1 */
 317         __le32          r5;     /* v2 */
 318         __le32          r6;     /* v3 */
 319         __le32          r7;     /* v4 */
 320         __le32          r8;     /* v5 */
 321         __le32          r9;     /* sb/v6 */
 322         __le32          r10;    /* sl/v7 */
 323         __le32          r11;    /* fp/v8 */
 324         __le32          r12;    /* ip */
 325         __le32          r13;    /* sp */
 326         __le32          r14;    /* lr */
 327         __le32          pc;     /* r15 */
 328 };
 329 #endif                          /* DEBUG */
 330
 331 struct sdpcm_shared {
 332         u32 flags;
 333         u32 trap_addr;
 334         u32 assert_exp_addr;
 335         u32 assert_file_addr;
 336         u32 assert_line;
 337         u32 console_addr;       /* Address of struct rte_console */
 338         u32 msgtrace_addr;
 339         u8 tag[32];
 340         u32 brpt_addr;
 341 };
 342
 343 struct sdpcm_shared_le {
 344         __le32 flags;
 345         __le32 trap_addr;
 346         __le32 assert_exp_addr;
 347         __le32 assert_file_addr;
 348         __le32 assert_line;
 349         __le32 console_addr;    /* Address of struct rte_console */
 350         __le32 msgtrace_addr;
 351         u8 tag[32];
 352         __le32 brpt_addr;
 353 };
 354
 355 /* dongle SDIO bus specific header info */
 356 struct brcmf_sdio_hdrinfo {
 357         u8 seq_num;
 358         u8 channel;
 359         u16 len;
 360         u16 len_left;
 361         u16 len_nxtfrm;
 362         u8 dat_offset;
 363 };
 364
 365 /* misc chip info needed by some of the routines */
 366 /* Private data for SDIO bus interaction */
 367 struct brcmf_sdio {
 368         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 369         struct chip_info *ci;   /* Chip info struct */
 370         char *vars;             /* Variables (from CIS and/or other) */
 371         uint varsz;             /* Size of variables buffer */
 372
 373         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 374
 375         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 376         atomic_t intstatus;     /* Intstatus bits (events) pending */
 377         atomic_t fcstate;       /* State of dongle flow-control */
 378
 379         uint blocksize;         /* Block size of SDIO transfers */
 380         uint roundup;           /* Max roundup limit */
 381
 382         struct pktq txq;        /* Queue length used for flow-control */
 383         u8 flowcontrol; /* per prio flow control bitmask */
 384         u8 tx_seq;              /* Transmit sequence number (next) */
 385         u8 tx_max;              /* Maximum transmit sequence allowed */
 386
 387         u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
 388         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 389         u8 rx_seq;              /* Receive sequence number (expected) */
 390         struct brcmf_sdio_hdrinfo cur_read;
 391                                 /* info of current read frame */
 392         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 393         bool rxpending;         /* Data frame pending in dongle */
 394
 395         uint rxbound;           /* Rx frames to read before resched */
 396         uint txbound;           /* Tx frames to send before resched */
 397         uint txminmax;
 398
 399         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 400         struct sk_buff_head glom; /* Packet list for glommed superframe */
 401         uint glomerr;           /* Glom packet read errors */
 402
 403         u8 *rxbuf;              /* Buffer for receiving control packets */
 404         uint rxblen;            /* Allocated length of rxbuf */
 405         u8 *rxctl;              /* Aligned pointer into rxbuf */
 406         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 407         uint rxlen;             /* Length of valid data in buffer */
 408         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 409
 410         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 411
 412         bool intr;              /* Use interrupts */
 413         bool poll;              /* Use polling */
 414         atomic_t ipend;         /* Device interrupt is pending */
 415         uint spurious;          /* Count of spurious interrupts */
 416         uint pollrate;          /* Ticks between device polls */
 417         uint polltick;          /* Tick counter */
 418
 419 #ifdef DEBUG
 420         uint console_interval;
 421         struct brcmf_console console;   /* Console output polling support */
 422         uint console_addr;      /* Console address from shared struct */
 423 #endif                          /* DEBUG */
 424
 425         uint clkstate;          /* State of sd and backplane clock(s) */
 426         bool activity;          /* Activity flag for clock down */
 427         s32 idletime;           /* Control for activity timeout */
 428         s32 idlecount;  /* Activity timeout counter */
 429         s32 idleclock;  /* How to set bus driver when idle */
 430         bool rxflow_mode;       /* Rx flow control mode */
 431         bool rxflow;            /* Is rx flow control on */
 432         bool alp_only;          /* Don't use HT clock (ALP only) */
 433
 434         u8 *ctrl_frame_buf;
 435         u32 ctrl_frame_len;
 436         bool ctrl_frame_stat;
 437
 438         spinlock_t txqlock;
 439         wait_queue_head_t ctrl_wait;
 440         wait_queue_head_t dcmd_resp_wait;
 441
 442         struct timer_list timer;
 443         struct completion watchdog_wait;
 444         struct task_struct *watchdog_tsk;
 445         bool wd_timer_valid;
 446         uint save_ms;
 447
 448         struct workqueue_struct *brcmf_wq;
 449         struct work_struct datawork;
 450         atomic_t dpc_tskcnt;
 451
 452         bool txoff;             /* Transmit flow-controlled */
 453         struct brcmf_sdio_count sdcnt;
 454         bool sr_enabled; /* SaveRestore enabled */
 455         bool sleeping; /* SDIO bus sleeping */
 456
 457         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 458 };
 459
 460 /* clkstate */
 461 #define CLK_NONE        0
 462 #define CLK_SDONLY      1
 463 #define CLK_PENDING     2
 464 #define CLK_AVAIL       3
 465
 466 #ifdef DEBUG
 467 static int qcount[NUMPRIO];
 468 #endif                          /* DEBUG */
 469
 470 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 471
 472 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 473
 474 /* Retry count for register access failures */
 475 static const uint retry_limit = 2;
 476
 477 /* Limit on rounding up frames */
 478 static const uint max_roundup = 512;
 479
 480 #define ALIGNMENT  4
 481
 482 enum brcmf_sdio_frmtype {
 483         BRCMF_SDIO_FT_NORMAL,
 484         BRCMF_SDIO_FT_SUPER,
 485         BRCMF_SDIO_FT_SUB,
 486 };
 487
 488 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 489 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 490 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 491 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 492 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 493 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 494 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 495 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 496 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 497 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 498 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 499 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 500 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 501 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 502
 503 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 504 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 505 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 506 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 507 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 508 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 509 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 510 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 511 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 512 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 513 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 514 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 515 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 516 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 517
 518 struct brcmf_firmware_names {
 519         u32 chipid;
 520         u32 revmsk;
 521         const char *bin;
 522         const char *nv;
 523 };
 524
 525 enum brcmf_firmware_type {
 526         BRCMF_FIRMWARE_BIN,
 527         BRCMF_FIRMWARE_NVRAM
 528 };
 529
 530 #define BRCMF_FIRMWARE_NVRAM(name) \
 531         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 532
 533 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 534         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 535         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 536         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 537         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 538         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 539         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 540         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) }
 541 };
 542
 543
 544 static const struct firmware *brcmf_sdbrcm_get_fw(struct brcmf_sdio *bus,
 545                                                   enum brcmf_firmware_type type)
 546 {
 547         const struct firmware *fw;
 548         const char *name;
 549         int err, i;
 550
 551         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 552                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 553                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 554                         switch (type) {
 555                         case BRCMF_FIRMWARE_BIN:
 556                                 name = brcmf_fwname_data[i].bin;
 557                                 break;
 558                         case BRCMF_FIRMWARE_NVRAM:
 559                                 name = brcmf_fwname_data[i].nv;
 560                                 break;
 561                         default:
 562                                 brcmf_err("invalid firmware type (%d)\n", type);
 563                                 return NULL;
 564                         }
 565                         goto found;
 566                 }
 567         }
 568         brcmf_err("Unknown chipid %d [%d]\n",
 569                   bus->ci->chip, bus->ci->chiprev);
 570         return NULL;
 571
 572 found:
 573         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 574         if ((err) || (!fw)) {
 575                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 576                 return NULL;
 577         }
 578
 579         return fw;
 580 }
 581
 582 static void pkt_align(struct sk_buff *p, int len, int align)
 583 {
 584         uint datalign;
 585         datalign = (unsigned long)(p->data);
 586         datalign = roundup(datalign, (align)) - datalign;
 587         if (datalign)
 588                 skb_pull(p, datalign);
 589         __skb_trim(p, len);
 590 }
 591
 592 /* To check if there's window offered */
 593 static bool data_ok(struct brcmf_sdio *bus)
 594 {
 595         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 596                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 597 }
 598
 599 /*
 600  * Reads a register in the SDIO hardware block. This block occupies a series of
 601  * adresses on the 32 bit backplane bus.
 602  */
 603 static int
 604 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 605 {
 606         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 607         int ret;
 608
 609         *regvar = brcmf_sdio_regrl(bus->sdiodev,
 610                                    bus->ci->c_inf[idx].base + offset, &ret);
 611
 612         return ret;
 613 }
 614
 615 static int
 616 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 617 {
 618         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 619         int ret;
 620
 621         brcmf_sdio_regwl(bus->sdiodev,
 622                          bus->ci->c_inf[idx].base + reg_offset,
 623                          regval, &ret);
 624
 625         return ret;
 626 }
 627
 628 static int
 629 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
 630 {
 631         u8 wr_val = 0, rd_val, cmp_val, bmask;
 632         int err = 0;
 633         int try_cnt = 0;
 634
 635         brcmf_dbg(TRACE, "Enter\n");
 636
 637         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 638         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 639         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 640                          wr_val, &err);
 641         if (err) {
 642                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 643                 return err;
 644         }
 645
 646         if (on) {
 647                 /* device WAKEUP through KSO:
 648                  * write bit 0 & read back until
 649                  * both bits 0 (kso bit) & 1 (dev on status) are set
 650                  */
 651                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 652                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 653                 bmask = cmp_val;
 654                 usleep_range(2000, 3000);
 655         } else {
 656                 /* Put device to sleep, turn off KSO */
 657                 cmp_val = 0;
 658                 /* only check for bit0, bit1(dev on status) may not
 659                  * get cleared right away
 660                  */
 661                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 662         }
 663
 664         do {
 665                 /* reliable KSO bit set/clr:
 666                  * the sdiod sleep write access is synced to PMU 32khz clk
 667                  * just one write attempt may fail,
 668                  * read it back until it matches written value
 669                  */
 670                 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 671                                           &err);
 672                 if (((rd_val & bmask) == cmp_val) && !err)
 673                         break;
 674                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 675                           try_cnt, MAX_KSO_ATTEMPTS, err);
 676                 udelay(KSO_WAIT_US);
 677                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 678                                  wr_val, &err);
 679         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 680
 681         return err;
 682 }
 683
 684 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 685
 686 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 687
 688 /* Turn backplane clock on or off */
 689 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 690 {
 691         int err;
 692         u8 clkctl, clkreq, devctl;
 693         unsigned long timeout;
 694
 695         brcmf_dbg(SDIO, "Enter\n");
 696
 697         clkctl = 0;
 698
 699         if (bus->sr_enabled) {
 700                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 701                 return 0;
 702         }
 703
 704         if (on) {
 705                 /* Request HT Avail */
 706                 clkreq =
 707                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 708
 709                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 710                                  clkreq, &err);
 711                 if (err) {
 712                         brcmf_err("HT Avail request error: %d\n", err);
 713                         return -EBADE;
 714                 }
 715
 716                 /* Check current status */
 717                 clkctl = brcmf_sdio_regrb(bus->sdiodev,
 718                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
 719                 if (err) {
 720                         brcmf_err("HT Avail read error: %d\n", err);
 721                         return -EBADE;
 722                 }
 723
 724                 /* Go to pending and await interrupt if appropriate */
 725                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 726                         /* Allow only clock-available interrupt */
 727                         devctl = brcmf_sdio_regrb(bus->sdiodev,
 728                                                   SBSDIO_DEVICE_CTL, &err);
 729                         if (err) {
 730                                 brcmf_err("Devctl error setting CA: %d\n",
 731                                           err);
 732                                 return -EBADE;
 733                         }
 734
 735                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 736                         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 737                                          devctl, &err);
 738                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 739                         bus->clkstate = CLK_PENDING;
 740
 741                         return 0;
 742                 } else if (bus->clkstate == CLK_PENDING) {
 743                         /* Cancel CA-only interrupt filter */
 744                         devctl = brcmf_sdio_regrb(bus->sdiodev,
 745                                                   SBSDIO_DEVICE_CTL, &err);
 746                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 747                         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 748                                          devctl, &err);
 749                 }
 750
 751                 /* Otherwise, wait here (polling) for HT Avail */
 752                 timeout = jiffies +
 753                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 754                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 755                         clkctl = brcmf_sdio_regrb(bus->sdiodev,
 756                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 757                                                   &err);
 758                         if (time_after(jiffies, timeout))
 759                                 break;
 760                         else
 761                                 usleep_range(5000, 10000);
 762                 }
 763                 if (err) {
 764                         brcmf_err("HT Avail request error: %d\n", err);
 765                         return -EBADE;
 766                 }
 767                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 768                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 769                                   PMU_MAX_TRANSITION_DLY, clkctl);
 770                         return -EBADE;
 771                 }
 772
 773                 /* Mark clock available */
 774                 bus->clkstate = CLK_AVAIL;
 775                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 776
 777 #if defined(DEBUG)
 778                 if (!bus->alp_only) {
 779                         if (SBSDIO_ALPONLY(clkctl))
 780                                 brcmf_err("HT Clock should be on\n");
 781                 }
 782 #endif                          /* defined (DEBUG) */
 783
 784                 bus->activity = true;
 785         } else {
 786                 clkreq = 0;
 787
 788                 if (bus->clkstate == CLK_PENDING) {
 789                         /* Cancel CA-only interrupt filter */
 790                         devctl = brcmf_sdio_regrb(bus->sdiodev,
 791                                                   SBSDIO_DEVICE_CTL, &err);
 792                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 793                         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 794                                          devctl, &err);
 795                 }
 796
 797                 bus->clkstate = CLK_SDONLY;
 798                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 799                                  clkreq, &err);
 800                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 801                 if (err) {
 802                         brcmf_err("Failed access turning clock off: %d\n",
 803                                   err);
 804                         return -EBADE;
 805                 }
 806         }
 807         return 0;
 808 }
 809
 810 /* Change idle/active SD state */
 811 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
 812 {
 813         brcmf_dbg(SDIO, "Enter\n");
 814
 815         if (on)
 816                 bus->clkstate = CLK_SDONLY;
 817         else
 818                 bus->clkstate = CLK_NONE;
 819
 820         return 0;
 821 }
 822
 823 /* Transition SD and backplane clock readiness */
 824 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 825 {
 826 #ifdef DEBUG
 827         uint oldstate = bus->clkstate;
 828 #endif                          /* DEBUG */
 829
 830         brcmf_dbg(SDIO, "Enter\n");
 831
 832         /* Early exit if we're already there */
 833         if (bus->clkstate == target) {
 834                 if (target == CLK_AVAIL) {
 835                         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 836                         bus->activity = true;
 837                 }
 838                 return 0;
 839         }
 840
 841         switch (target) {
 842         case CLK_AVAIL:
 843                 /* Make sure SD clock is available */
 844                 if (bus->clkstate == CLK_NONE)
 845                         brcmf_sdbrcm_sdclk(bus, true);
 846                 /* Now request HT Avail on the backplane */
 847                 brcmf_sdbrcm_htclk(bus, true, pendok);
 848                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 849                 bus->activity = true;
 850                 break;
 851
 852         case CLK_SDONLY:
 853                 /* Remove HT request, or bring up SD clock */
 854                 if (bus->clkstate == CLK_NONE)
 855                         brcmf_sdbrcm_sdclk(bus, true);
 856                 else if (bus->clkstate == CLK_AVAIL)
 857                         brcmf_sdbrcm_htclk(bus, false, false);
 858                 else
 859                         brcmf_err("request for %d -> %d\n",
 860                                   bus->clkstate, target);
 861                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
 862                 break;
 863
 864         case CLK_NONE:
 865                 /* Make sure to remove HT request */
 866                 if (bus->clkstate == CLK_AVAIL)
 867                         brcmf_sdbrcm_htclk(bus, false, false);
 868                 /* Now remove the SD clock */
 869                 brcmf_sdbrcm_sdclk(bus, false);
 870                 brcmf_sdbrcm_wd_timer(bus, 0);
 871                 break;
 872         }
 873 #ifdef DEBUG
 874         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 875 #endif                          /* DEBUG */
 876
 877         return 0;
 878 }
 879
 880 static int
 881 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 882 {
 883         int err = 0;
 884         brcmf_dbg(TRACE, "Enter\n");
 885         brcmf_dbg(SDIO, "request %s currently %s\n",
 886                   (sleep ? "SLEEP" : "WAKE"),
 887                   (bus->sleeping ? "SLEEP" : "WAKE"));
 888
 889         /* If SR is enabled control bus state with KSO */
 890         if (bus->sr_enabled) {
 891                 /* Done if we're already in the requested state */
 892                 if (sleep == bus->sleeping)
 893                         goto end;
 894
 895                 /* Going to sleep */
 896                 if (sleep) {
 897                         /* Don't sleep if something is pending */
 898                         if (atomic_read(&bus->intstatus) ||
 899                             atomic_read(&bus->ipend) > 0 ||
 900                             (!atomic_read(&bus->fcstate) &&
 901                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 902                             data_ok(bus)))
 903                                  return -EBUSY;
 904                         err = brcmf_sdbrcm_kso_control(bus, false);
 905                         /* disable watchdog */
 906                         if (!err)
 907                                 brcmf_sdbrcm_wd_timer(bus, 0);
 908                 } else {
 909                         bus->idlecount = 0;
 910                         err = brcmf_sdbrcm_kso_control(bus, true);
 911                 }
 912                 if (!err) {
 913                         /* Change state */
 914                         bus->sleeping = sleep;
 915                         brcmf_dbg(SDIO, "new state %s\n",
 916                                   (sleep ? "SLEEP" : "WAKE"));
 917                 } else {
 918                         brcmf_err("error while changing bus sleep state %d\n",
 919                                   err);
 920                         return err;
 921                 }
 922         }
 923
 924 end:
 925         /* control clocks */
 926         if (sleep) {
 927                 if (!bus->sr_enabled)
 928                         brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
 929         } else {
 930                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
 931         }
 932
 933         return err;
 934
 935 }
 936
 937 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
 938 {
 939         u32 intstatus = 0;
 940         u32 hmb_data;
 941         u8 fcbits;
 942         int ret;
 943
 944         brcmf_dbg(SDIO, "Enter\n");
 945
 946         /* Read mailbox data and ack that we did so */
 947         ret = r_sdreg32(bus, &hmb_data,
 948                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 949
 950         if (ret == 0)
 951                 w_sdreg32(bus, SMB_INT_ACK,
 952                           offsetof(struct sdpcmd_regs, tosbmailbox));
 953         bus->sdcnt.f1regdata += 2;
 954
 955         /* Dongle recomposed rx frames, accept them again */
 956         if (hmb_data & HMB_DATA_NAKHANDLED) {
 957                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 958                           bus->rx_seq);
 959                 if (!bus->rxskip)
 960                         brcmf_err("unexpected NAKHANDLED!\n");
 961
 962                 bus->rxskip = false;
 963                 intstatus |= I_HMB_FRAME_IND;
 964         }
 965
 966         /*
 967          * DEVREADY does not occur with gSPI.
 968          */
 969         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 970                 bus->sdpcm_ver =
 971                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 972                     HMB_DATA_VERSION_SHIFT;
 973                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 974                         brcmf_err("Version mismatch, dongle reports %d, "
 975                                   "expecting %d\n",
 976                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 977                 else
 978                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 979                                   bus->sdpcm_ver);
 980         }
 981
 982         /*
 983          * Flow Control has been moved into the RX headers and this out of band
 984          * method isn't used any more.
 985          * remaining backward compatible with older dongles.
 986          */
 987         if (hmb_data & HMB_DATA_FC) {
 988                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
 989                                                         HMB_DATA_FCDATA_SHIFT;
 990
 991                 if (fcbits & ~bus->flowcontrol)
 992                         bus->sdcnt.fc_xoff++;
 993
 994                 if (bus->flowcontrol & ~fcbits)
 995                         bus->sdcnt.fc_xon++;
 996
 997                 bus->sdcnt.fc_rcvd++;
 998                 bus->flowcontrol = fcbits;
 999         }
1000
1001         /* Shouldn't be any others */
1002         if (hmb_data & ~(HMB_DATA_DEVREADY |
1003                          HMB_DATA_NAKHANDLED |
1004                          HMB_DATA_FC |
1005                          HMB_DATA_FWREADY |
1006                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1007                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1008                           hmb_data);
1009
1010         return intstatus;
1011 }
1012
1013 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1014 {
1015         uint retries = 0;
1016         u16 lastrbc;
1017         u8 hi, lo;
1018         int err;
1019
1020         brcmf_err("%sterminate frame%s\n",
1021                   abort ? "abort command, " : "",
1022                   rtx ? ", send NAK" : "");
1023
1024         if (abort)
1025                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1026
1027         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1028                          SFC_RF_TERM, &err);
1029         bus->sdcnt.f1regdata++;
1030
1031         /* Wait until the packet has been flushed (device/FIFO stable) */
1032         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1033                 hi = brcmf_sdio_regrb(bus->sdiodev,
1034                                       SBSDIO_FUNC1_RFRAMEBCHI, &err);
1035                 lo = brcmf_sdio_regrb(bus->sdiodev,
1036                                       SBSDIO_FUNC1_RFRAMEBCLO, &err);
1037                 bus->sdcnt.f1regdata += 2;
1038
1039                 if ((hi == 0) && (lo == 0))
1040                         break;
1041
1042                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1043                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1044                                   lastrbc, (hi << 8) + lo);
1045                 }
1046                 lastrbc = (hi << 8) + lo;
1047         }
1048
1049         if (!retries)
1050                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1051         else
1052                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1053
1054         if (rtx) {
1055                 bus->sdcnt.rxrtx++;
1056                 err = w_sdreg32(bus, SMB_NAK,
1057                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1058
1059                 bus->sdcnt.f1regdata++;
1060                 if (err == 0)
1061                         bus->rxskip = true;
1062         }
1063
1064         /* Clear partial in any case */
1065         bus->cur_read.len = 0;
1066
1067         /* If we can't reach the device, signal failure */
1068         if (err)
1069                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1070 }
1071
1072 /* return total length of buffer chain */
1073 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1074 {
1075         struct sk_buff *p;
1076         uint total;
1077
1078         total = 0;
1079         skb_queue_walk(&bus->glom, p)
1080                 total += p->len;
1081         return total;
1082 }
1083
1084 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1085 {
1086         struct sk_buff *cur, *next;
1087
1088         skb_queue_walk_safe(&bus->glom, cur, next) {
1089                 skb_unlink(cur, &bus->glom);
1090                 brcmu_pkt_buf_free_skb(cur);
1091         }
1092 }
1093
1094 /**
1095  * brcmfmac sdio bus specific header
1096  * This is the lowest layer header wrapped on the packets transmitted between
1097  * host and WiFi dongle which contains information needed for SDIO core and
1098  * firmware
1099  *
1100  * It consists of 2 parts: hw header and software header
1101  * hardware header (frame tag) - 4 bytes
1102  * Byte 0~1: Frame length
1103  * Byte 2~3: Checksum, bit-wise inverse of frame length
1104  * software header - 8 bytes
1105  * Byte 0: Rx/Tx sequence number
1106  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1107  * Byte 2: Length of next data frame, reserved for Tx
1108  * Byte 3: Data offset
1109  * Byte 4: Flow control bits, reserved for Tx
1110  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1111  * Byte 6~7: Reserved
1112  */
1113 #define SDPCM_HWHDR_LEN                 4
1114 #define SDPCM_SWHDR_LEN                 8
1115 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1116 /* software header */
1117 #define SDPCM_SEQ_MASK                  0x000000ff
1118 #define SDPCM_SEQ_WRAP                  256
1119 #define SDPCM_CHANNEL_MASK              0x00000f00
1120 #define SDPCM_CHANNEL_SHIFT             8
1121 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1122 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1123 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1124 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1125 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1126 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1127 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1128 #define SDPCM_NEXTLEN_SHIFT             16
1129 #define SDPCM_DOFFSET_MASK              0xff000000
1130 #define SDPCM_DOFFSET_SHIFT             24
1131 #define SDPCM_FCMASK_MASK               0x000000ff
1132 #define SDPCM_WINDOW_MASK               0x0000ff00
1133 #define SDPCM_WINDOW_SHIFT              8
1134
1135 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1136 {
1137         u32 hdrvalue;
1138         hdrvalue = *(u32 *)swheader;
1139         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1140 }
1141
1142 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1143                               struct brcmf_sdio_hdrinfo *rd,
1144                               enum brcmf_sdio_frmtype type)
1145 {
1146         u16 len, checksum;
1147         u8 rx_seq, fc, tx_seq_max;
1148         u32 swheader;
1149
1150         /* hw header */
1151         len = get_unaligned_le16(header);
1152         checksum = get_unaligned_le16(header + sizeof(u16));
1153         /* All zero means no more to read */
1154         if (!(len | checksum)) {
1155                 bus->rxpending = false;
1156                 return -ENODATA;
1157         }
1158         if ((u16)(~(len ^ checksum))) {
1159                 brcmf_err("HW header checksum error\n");
1160                 bus->sdcnt.rx_badhdr++;
1161                 brcmf_sdbrcm_rxfail(bus, false, false);
1162                 return -EIO;
1163         }
1164         if (len < SDPCM_HDRLEN) {
1165                 brcmf_err("HW header length error\n");
1166                 return -EPROTO;
1167         }
1168         if (type == BRCMF_SDIO_FT_SUPER &&
1169             (roundup(len, bus->blocksize) != rd->len)) {
1170                 brcmf_err("HW superframe header length error\n");
1171                 return -EPROTO;
1172         }
1173         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1174                 brcmf_err("HW subframe header length error\n");
1175                 return -EPROTO;
1176         }
1177         rd->len = len;
1178
1179         /* software header */
1180         header += SDPCM_HWHDR_LEN;
1181         swheader = le32_to_cpu(*(__le32 *)header);
1182         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1183                 brcmf_err("Glom descriptor found in superframe head\n");
1184                 rd->len = 0;
1185                 return -EINVAL;
1186         }
1187         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1188         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1189         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1190             type != BRCMF_SDIO_FT_SUPER) {
1191                 brcmf_err("HW header length too long\n");
1192                 bus->sdcnt.rx_toolong++;
1193                 brcmf_sdbrcm_rxfail(bus, false, false);
1194                 rd->len = 0;
1195                 return -EPROTO;
1196         }
1197         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1198                 brcmf_err("Wrong channel for superframe\n");
1199                 rd->len = 0;
1200                 return -EINVAL;
1201         }
1202         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1203             rd->channel != SDPCM_EVENT_CHANNEL) {
1204                 brcmf_err("Wrong channel for subframe\n");
1205                 rd->len = 0;
1206                 return -EINVAL;
1207         }
1208         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1209         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1210                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1211                 bus->sdcnt.rx_badhdr++;
1212                 brcmf_sdbrcm_rxfail(bus, false, false);
1213                 rd->len = 0;
1214                 return -ENXIO;
1215         }
1216         if (rd->seq_num != rx_seq) {
1217                 brcmf_err("seq %d: sequence number error, expect %d\n",
1218                           rx_seq, rd->seq_num);
1219                 bus->sdcnt.rx_badseq++;
1220                 rd->seq_num = rx_seq;
1221         }
1222         /* no need to check the reset for subframe */
1223         if (type == BRCMF_SDIO_FT_SUB)
1224                 return 0;
1225         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1226         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1227                 /* only warm for NON glom packet */
1228                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1229                         brcmf_err("seq %d: next length error\n", rx_seq);
1230                 rd->len_nxtfrm = 0;
1231         }
1232         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1233         fc = swheader & SDPCM_FCMASK_MASK;
1234         if (bus->flowcontrol != fc) {
1235                 if (~bus->flowcontrol & fc)
1236                         bus->sdcnt.fc_xoff++;
1237                 if (bus->flowcontrol & ~fc)
1238                         bus->sdcnt.fc_xon++;
1239                 bus->sdcnt.fc_rcvd++;
1240                 bus->flowcontrol = fc;
1241         }
1242         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1243         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1244                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1245                 tx_seq_max = bus->tx_seq + 2;
1246         }
1247         bus->tx_max = tx_seq_max;
1248
1249         return 0;
1250 }
1251
1252 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1253 {
1254         *(__le16 *)header = cpu_to_le16(frm_length);
1255         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1256 }
1257
1258 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1259                               struct brcmf_sdio_hdrinfo *hd_info)
1260 {
1261         u32 sw_header;
1262
1263         brcmf_sdio_update_hwhdr(header, hd_info->len);
1264
1265         sw_header = bus->tx_seq;
1266         sw_header |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1267                      SDPCM_CHANNEL_MASK;
1268         sw_header |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1269                      SDPCM_DOFFSET_MASK;
1270         *(((__le32 *)header) + 1) = cpu_to_le32(sw_header);
1271         *(((__le32 *)header) + 2) = 0;
1272 }
1273
1274 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1275 {
1276         u16 dlen, totlen;
1277         u8 *dptr, num = 0;
1278         u32 align = 0;
1279         u16 sublen;
1280         struct sk_buff *pfirst, *pnext;
1281
1282         int errcode;
1283         u8 doff, sfdoff;
1284
1285         struct brcmf_sdio_hdrinfo rd_new;
1286
1287         /* If packets, issue read(s) and send up packet chain */
1288         /* Return sequence numbers consumed? */
1289
1290         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1291                   bus->glomd, skb_peek(&bus->glom));
1292
1293         if (bus->sdiodev->pdata)
1294                 align = bus->sdiodev->pdata->sd_sgentry_align;
1295         if (align < 4)
1296                 align = 4;
1297
1298         /* If there's a descriptor, generate the packet chain */
1299         if (bus->glomd) {
1300                 pfirst = pnext = NULL;
1301                 dlen = (u16) (bus->glomd->len);
1302                 dptr = bus->glomd->data;
1303                 if (!dlen || (dlen & 1)) {
1304                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1305                                   dlen);
1306                         dlen = 0;
1307                 }
1308
1309                 for (totlen = num = 0; dlen; num++) {
1310                         /* Get (and move past) next length */
1311                         sublen = get_unaligned_le16(dptr);
1312                         dlen -= sizeof(u16);
1313                         dptr += sizeof(u16);
1314                         if ((sublen < SDPCM_HDRLEN) ||
1315                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1316                                 brcmf_err("descriptor len %d bad: %d\n",
1317                                           num, sublen);
1318                                 pnext = NULL;
1319                                 break;
1320                         }
1321                         if (sublen % align) {
1322                                 brcmf_err("sublen %d not multiple of %d\n",
1323                                           sublen, align);
1324                         }
1325                         totlen += sublen;
1326
1327                         /* For last frame, adjust read len so total
1328                                  is a block multiple */
1329                         if (!dlen) {
1330                                 sublen +=
1331                                     (roundup(totlen, bus->blocksize) - totlen);
1332                                 totlen = roundup(totlen, bus->blocksize);
1333                         }
1334
1335                         /* Allocate/chain packet for next subframe */
1336                         pnext = brcmu_pkt_buf_get_skb(sublen + align);
1337                         if (pnext == NULL) {
1338                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1339                                           num, sublen);
1340                                 break;
1341                         }
1342                         skb_queue_tail(&bus->glom, pnext);
1343
1344                         /* Adhere to start alignment requirements */
1345                         pkt_align(pnext, sublen, align);
1346                 }
1347
1348                 /* If all allocations succeeded, save packet chain
1349                          in bus structure */
1350                 if (pnext) {
1351                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1352                                   totlen, num);
1353                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1354                             totlen != bus->cur_read.len) {
1355                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1356                                           bus->cur_read.len, totlen, rxseq);
1357                         }
1358                         pfirst = pnext = NULL;
1359                 } else {
1360                         brcmf_sdbrcm_free_glom(bus);
1361                         num = 0;
1362                 }
1363
1364                 /* Done with descriptor packet */
1365                 brcmu_pkt_buf_free_skb(bus->glomd);
1366                 bus->glomd = NULL;
1367                 bus->cur_read.len = 0;
1368         }
1369
1370         /* Ok -- either we just generated a packet chain,
1371                  or had one from before */
1372         if (!skb_queue_empty(&bus->glom)) {
1373                 if (BRCMF_GLOM_ON()) {
1374                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1375                         skb_queue_walk(&bus->glom, pnext) {
1376                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1377                                           pnext, (u8 *) (pnext->data),
1378                                           pnext->len, pnext->len);
1379                         }
1380                 }
1381
1382                 pfirst = skb_peek(&bus->glom);
1383                 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1384
1385                 /* Do an SDIO read for the superframe.  Configurable iovar to
1386                  * read directly into the chained packet, or allocate a large
1387                  * packet and and copy into the chain.
1388                  */
1389                 sdio_claim_host(bus->sdiodev->func[1]);
1390                 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1391                                 bus->sdiodev->sbwad,
1392                                 SDIO_FUNC_2, F2SYNC, &bus->glom);
1393                 sdio_release_host(bus->sdiodev->func[1]);
1394                 bus->sdcnt.f2rxdata++;
1395
1396                 /* On failure, kill the superframe, allow a couple retries */
1397                 if (errcode < 0) {
1398                         brcmf_err("glom read of %d bytes failed: %d\n",
1399                                   dlen, errcode);
1400
1401                         sdio_claim_host(bus->sdiodev->func[1]);
1402                         if (bus->glomerr++ < 3) {
1403                                 brcmf_sdbrcm_rxfail(bus, true, true);
1404                         } else {
1405                                 bus->glomerr = 0;
1406                                 brcmf_sdbrcm_rxfail(bus, true, false);
1407                                 bus->sdcnt.rxglomfail++;
1408                                 brcmf_sdbrcm_free_glom(bus);
1409                         }
1410                         sdio_release_host(bus->sdiodev->func[1]);
1411                         return 0;
1412                 }
1413
1414                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1415                                    pfirst->data, min_t(int, pfirst->len, 48),
1416                                    "SUPERFRAME:\n");
1417
1418                 rd_new.seq_num = rxseq;
1419                 rd_new.len = dlen;
1420                 sdio_claim_host(bus->sdiodev->func[1]);
1421                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1422                                              BRCMF_SDIO_FT_SUPER);
1423                 sdio_release_host(bus->sdiodev->func[1]);
1424                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1425
1426                 /* Remove superframe header, remember offset */
1427                 skb_pull(pfirst, rd_new.dat_offset);
1428                 sfdoff = rd_new.dat_offset;
1429                 num = 0;
1430
1431                 /* Validate all the subframe headers */
1432                 skb_queue_walk(&bus->glom, pnext) {
1433                         /* leave when invalid subframe is found */
1434                         if (errcode)
1435                                 break;
1436
1437                         rd_new.len = pnext->len;
1438                         rd_new.seq_num = rxseq++;
1439                         sdio_claim_host(bus->sdiodev->func[1]);
1440                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1441                                                      BRCMF_SDIO_FT_SUB);
1442                         sdio_release_host(bus->sdiodev->func[1]);
1443                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1444                                            pnext->data, 32, "subframe:\n");
1445
1446                         num++;
1447                 }
1448
1449                 if (errcode) {
1450                         /* Terminate frame on error, request
1451                                  a couple retries */
1452                         sdio_claim_host(bus->sdiodev->func[1]);
1453                         if (bus->glomerr++ < 3) {
1454                                 /* Restore superframe header space */
1455                                 skb_push(pfirst, sfdoff);
1456                                 brcmf_sdbrcm_rxfail(bus, true, true);
1457                         } else {
1458                                 bus->glomerr = 0;
1459                                 brcmf_sdbrcm_rxfail(bus, true, false);
1460                                 bus->sdcnt.rxglomfail++;
1461                                 brcmf_sdbrcm_free_glom(bus);
1462                         }
1463                         sdio_release_host(bus->sdiodev->func[1]);
1464                         bus->cur_read.len = 0;
1465                         return 0;
1466                 }
1467
1468                 /* Basic SD framing looks ok - process each packet (header) */
1469
1470                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1471                         dptr = (u8 *) (pfirst->data);
1472                         sublen = get_unaligned_le16(dptr);
1473                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1474
1475                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1476                                            dptr, pfirst->len,
1477                                            "Rx Subframe Data:\n");
1478
1479                         __skb_trim(pfirst, sublen);
1480                         skb_pull(pfirst, doff);
1481
1482                         if (pfirst->len == 0) {
1483                                 skb_unlink(pfirst, &bus->glom);
1484                                 brcmu_pkt_buf_free_skb(pfirst);
1485                                 continue;
1486                         }
1487
1488                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1489                                            pfirst->data,
1490                                            min_t(int, pfirst->len, 32),
1491                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1492                                            bus->glom.qlen, pfirst, pfirst->data,
1493                                            pfirst->len, pfirst->next,
1494                                            pfirst->prev);
1495                         skb_unlink(pfirst, &bus->glom);
1496                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1497                         bus->sdcnt.rxglompkts++;
1498                 }
1499
1500                 bus->sdcnt.rxglomframes++;
1501         }
1502         return num;
1503 }
1504
1505 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1506                                         bool *pending)
1507 {
1508         DECLARE_WAITQUEUE(wait, current);
1509         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1510
1511         /* Wait until control frame is available */
1512         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1513         set_current_state(TASK_INTERRUPTIBLE);
1514
1515         while (!(*condition) && (!signal_pending(current) && timeout))
1516                 timeout = schedule_timeout(timeout);
1517
1518         if (signal_pending(current))
1519                 *pending = true;
1520
1521         set_current_state(TASK_RUNNING);
1522         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1523
1524         return timeout;
1525 }
1526
1527 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1528 {
1529         if (waitqueue_active(&bus->dcmd_resp_wait))
1530                 wake_up_interruptible(&bus->dcmd_resp_wait);
1531
1532         return 0;
1533 }
1534 static void
1535 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1536 {
1537         uint rdlen, pad;
1538         u8 *buf = NULL, *rbuf;
1539         int sdret;
1540
1541         brcmf_dbg(TRACE, "Enter\n");
1542
1543         if (bus->rxblen)
1544                 buf = vzalloc(bus->rxblen);
1545         if (!buf)
1546                 goto done;
1547
1548         rbuf = bus->rxbuf;
1549         pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1550         if (pad)
1551                 rbuf += (BRCMF_SDALIGN - pad);
1552
1553         /* Copy the already-read portion over */
1554         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1555         if (len <= BRCMF_FIRSTREAD)
1556                 goto gotpkt;
1557
1558         /* Raise rdlen to next SDIO block to avoid tail command */
1559         rdlen = len - BRCMF_FIRSTREAD;
1560         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1561                 pad = bus->blocksize - (rdlen % bus->blocksize);
1562                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1563                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1564                         rdlen += pad;
1565         } else if (rdlen % BRCMF_SDALIGN) {
1566                 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1567         }
1568
1569         /* Satisfy length-alignment requirements */
1570         if (rdlen & (ALIGNMENT - 1))
1571                 rdlen = roundup(rdlen, ALIGNMENT);
1572
1573         /* Drop if the read is too big or it exceeds our maximum */
1574         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1575                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1576                           rdlen, bus->sdiodev->bus_if->maxctl);
1577                 brcmf_sdbrcm_rxfail(bus, false, false);
1578                 goto done;
1579         }
1580
1581         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1582                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1583                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1584                 bus->sdcnt.rx_toolong++;
1585                 brcmf_sdbrcm_rxfail(bus, false, false);
1586                 goto done;
1587         }
1588
1589         /* Read remain of frame body */
1590         sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1591                                 bus->sdiodev->sbwad,
1592                                 SDIO_FUNC_2,
1593                                 F2SYNC, rbuf, rdlen);
1594         bus->sdcnt.f2rxdata++;
1595
1596         /* Control frame failures need retransmission */
1597         if (sdret < 0) {
1598                 brcmf_err("read %d control bytes failed: %d\n",
1599                           rdlen, sdret);
1600                 bus->sdcnt.rxc_errors++;
1601                 brcmf_sdbrcm_rxfail(bus, true, true);
1602                 goto done;
1603         } else
1604                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1605
1606 gotpkt:
1607
1608         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1609                            buf, len, "RxCtrl:\n");
1610
1611         /* Point to valid data and indicate its length */
1612         spin_lock_bh(&bus->rxctl_lock);
1613         if (bus->rxctl) {
1614                 brcmf_err("last control frame is being processed.\n");
1615                 spin_unlock_bh(&bus->rxctl_lock);
1616                 vfree(buf);
1617                 goto done;
1618         }
1619         bus->rxctl = buf + doff;
1620         bus->rxctl_orig = buf;
1621         bus->rxlen = len - doff;
1622         spin_unlock_bh(&bus->rxctl_lock);
1623
1624 done:
1625         /* Awake any waiters */
1626         brcmf_sdbrcm_dcmd_resp_wake(bus);
1627 }
1628
1629 /* Pad read to blocksize for efficiency */
1630 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1631 {
1632         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1633                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1634                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1635                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1636                         *rdlen += *pad;
1637         } else if (*rdlen % BRCMF_SDALIGN) {
1638                 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1639         }
1640 }
1641
1642 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1643 {
1644         struct sk_buff *pkt;            /* Packet for event or data frames */
1645         u16 pad;                /* Number of pad bytes to read */
1646         uint rxleft = 0;        /* Remaining number of frames allowed */
1647         int ret;                /* Return code from calls */
1648         uint rxcount = 0;       /* Total frames read */
1649         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1650         u8 head_read = 0;
1651
1652         brcmf_dbg(TRACE, "Enter\n");
1653
1654         /* Not finished unless we encounter no more frames indication */
1655         bus->rxpending = true;
1656
1657         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1658              !bus->rxskip && rxleft &&
1659              bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1660              rd->seq_num++, rxleft--) {
1661
1662                 /* Handle glomming separately */
1663                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1664                         u8 cnt;
1665                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1666                                   bus->glomd, skb_peek(&bus->glom));
1667                         cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1668                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1669                         rd->seq_num += cnt - 1;
1670                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1671                         continue;
1672                 }
1673
1674                 rd->len_left = rd->len;
1675                 /* read header first for unknow frame length */
1676                 sdio_claim_host(bus->sdiodev->func[1]);
1677                 if (!rd->len) {
1678                         ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1679                                                       bus->sdiodev->sbwad,
1680                                                       SDIO_FUNC_2, F2SYNC,
1681                                                       bus->rxhdr,
1682                                                       BRCMF_FIRSTREAD);
1683                         bus->sdcnt.f2rxhdrs++;
1684                         if (ret < 0) {
1685                                 brcmf_err("RXHEADER FAILED: %d\n",
1686                                           ret);
1687                                 bus->sdcnt.rx_hdrfail++;
1688                                 brcmf_sdbrcm_rxfail(bus, true, true);
1689                                 sdio_release_host(bus->sdiodev->func[1]);
1690                                 continue;
1691                         }
1692
1693                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1694                                            bus->rxhdr, SDPCM_HDRLEN,
1695                                            "RxHdr:\n");
1696
1697                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1698                                                BRCMF_SDIO_FT_NORMAL)) {
1699                                 sdio_release_host(bus->sdiodev->func[1]);
1700                                 if (!bus->rxpending)
1701                                         break;
1702                                 else
1703                                         continue;
1704                         }
1705
1706                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1707                                 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1708                                                           rd->len,
1709                                                           rd->dat_offset);
1710                                 /* prepare the descriptor for the next read */
1711                                 rd->len = rd->len_nxtfrm << 4;
1712                                 rd->len_nxtfrm = 0;
1713                                 /* treat all packet as event if we don't know */
1714                                 rd->channel = SDPCM_EVENT_CHANNEL;
1715                                 sdio_release_host(bus->sdiodev->func[1]);
1716                                 continue;
1717                         }
1718                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1719                                        rd->len - BRCMF_FIRSTREAD : 0;
1720                         head_read = BRCMF_FIRSTREAD;
1721                 }
1722
1723                 brcmf_pad(bus, &pad, &rd->len_left);
1724
1725                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1726                                             BRCMF_SDALIGN);
1727                 if (!pkt) {
1728                         /* Give up on data, request rtx of events */
1729                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1730                         brcmf_sdbrcm_rxfail(bus, false,
1731                                             RETRYCHAN(rd->channel));
1732                         sdio_release_host(bus->sdiodev->func[1]);
1733                         continue;
1734                 }
1735                 skb_pull(pkt, head_read);
1736                 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1737
1738                 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1739                                               SDIO_FUNC_2, F2SYNC, pkt);
1740                 bus->sdcnt.f2rxdata++;
1741                 sdio_release_host(bus->sdiodev->func[1]);
1742
1743                 if (ret < 0) {
1744                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1745                                   rd->len, rd->channel, ret);
1746                         brcmu_pkt_buf_free_skb(pkt);
1747                         sdio_claim_host(bus->sdiodev->func[1]);
1748                         brcmf_sdbrcm_rxfail(bus, true,
1749                                             RETRYCHAN(rd->channel));
1750                         sdio_release_host(bus->sdiodev->func[1]);
1751                         continue;
1752                 }
1753
1754                 if (head_read) {
1755                         skb_push(pkt, head_read);
1756                         memcpy(pkt->data, bus->rxhdr, head_read);
1757                         head_read = 0;
1758                 } else {
1759                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1760                         rd_new.seq_num = rd->seq_num;
1761                         sdio_claim_host(bus->sdiodev->func[1]);
1762                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1763                                                BRCMF_SDIO_FT_NORMAL)) {
1764                                 rd->len = 0;
1765                                 brcmu_pkt_buf_free_skb(pkt);
1766                         }
1767                         bus->sdcnt.rx_readahead_cnt++;
1768                         if (rd->len != roundup(rd_new.len, 16)) {
1769                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1770                                           rd->len,
1771                                           roundup(rd_new.len, 16) >> 4);
1772                                 rd->len = 0;
1773                                 brcmf_sdbrcm_rxfail(bus, true, true);
1774                                 sdio_release_host(bus->sdiodev->func[1]);
1775                                 brcmu_pkt_buf_free_skb(pkt);
1776                                 continue;
1777                         }
1778                         sdio_release_host(bus->sdiodev->func[1]);
1779                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1780                         rd->channel = rd_new.channel;
1781                         rd->dat_offset = rd_new.dat_offset;
1782
1783                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1784                                              BRCMF_DATA_ON()) &&
1785                                            BRCMF_HDRS_ON(),
1786                                            bus->rxhdr, SDPCM_HDRLEN,
1787                                            "RxHdr:\n");
1788
1789                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1790                                 brcmf_err("readahead on control packet %d?\n",
1791                                           rd_new.seq_num);
1792                                 /* Force retry w/normal header read */
1793                                 rd->len = 0;
1794                                 sdio_claim_host(bus->sdiodev->func[1]);
1795                                 brcmf_sdbrcm_rxfail(bus, false, true);
1796                                 sdio_release_host(bus->sdiodev->func[1]);
1797                                 brcmu_pkt_buf_free_skb(pkt);
1798                                 continue;
1799                         }
1800                 }
1801
1802                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1803                                    pkt->data, rd->len, "Rx Data:\n");
1804
1805                 /* Save superframe descriptor and allocate packet frame */
1806                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1807                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1808                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1809                                           rd->len);
1810                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1811                                                    pkt->data, rd->len,
1812                                                    "Glom Data:\n");
1813                                 __skb_trim(pkt, rd->len);
1814                                 skb_pull(pkt, SDPCM_HDRLEN);
1815                                 bus->glomd = pkt;
1816                         } else {
1817                                 brcmf_err("%s: glom superframe w/o "
1818                                           "descriptor!\n", __func__);
1819                                 sdio_claim_host(bus->sdiodev->func[1]);
1820                                 brcmf_sdbrcm_rxfail(bus, false, false);
1821                                 sdio_release_host(bus->sdiodev->func[1]);
1822                         }
1823                         /* prepare the descriptor for the next read */
1824                         rd->len = rd->len_nxtfrm << 4;
1825                         rd->len_nxtfrm = 0;
1826                         /* treat all packet as event if we don't know */
1827                         rd->channel = SDPCM_EVENT_CHANNEL;
1828                         continue;
1829                 }
1830
1831                 /* Fill in packet len and prio, deliver upward */
1832                 __skb_trim(pkt, rd->len);
1833                 skb_pull(pkt, rd->dat_offset);
1834
1835                 /* prepare the descriptor for the next read */
1836                 rd->len = rd->len_nxtfrm << 4;
1837                 rd->len_nxtfrm = 0;
1838                 /* treat all packet as event if we don't know */
1839                 rd->channel = SDPCM_EVENT_CHANNEL;
1840
1841                 if (pkt->len == 0) {
1842                         brcmu_pkt_buf_free_skb(pkt);
1843                         continue;
1844                 }
1845
1846                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1847         }
1848
1849         rxcount = maxframes - rxleft;
1850         /* Message if we hit the limit */
1851         if (!rxleft)
1852                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1853         else
1854                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1855         /* Back off rxseq if awaiting rtx, update rx_seq */
1856         if (bus->rxskip)
1857                 rd->seq_num--;
1858         bus->rx_seq = rd->seq_num;
1859
1860         return rxcount;
1861 }
1862
1863 static void
1864 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1865 {
1866         if (waitqueue_active(&bus->ctrl_wait))
1867                 wake_up_interruptible(&bus->ctrl_wait);
1868         return;
1869 }
1870
1871 /**
1872  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1873  * bus layer usage.
1874  */
1875 /* flag marking a dummy skb added for DMA alignment requirement */
1876 #define ALIGN_SKB_FLAG          0x8000
1877 /* bit mask of data length chopped from the previous packet */
1878 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1879
1880 /**
1881  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1882  * @bus: brcmf_sdio structure pointer
1883  * @pktq: packet list pointer
1884  * @chan: virtual channel to transmit the packet
1885  *
1886  * Processes to be applied to the packet
1887  *      - Align data buffer pointer
1888  *      - Align data buffer length
1889  *      - Prepare header
1890  * Return: negative value if there is error
1891  */
1892 static int
1893 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1894                       uint chan)
1895 {
1896         u16 head_pad, tail_pad, tail_chop, head_align, sg_align;
1897         int ntail;
1898         struct sk_buff *pkt_next, *pkt_new;
1899         u8 *dat_buf;
1900         unsigned blksize = bus->sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1901         struct brcmf_sdio_hdrinfo hd_info = {0};
1902
1903         /* SDIO ADMA requires at least 32 bit alignment */
1904         head_align = 4;
1905         sg_align = 4;
1906         if (bus->sdiodev->pdata) {
1907                 head_align = bus->sdiodev->pdata->sd_head_align > 4 ?
1908                              bus->sdiodev->pdata->sd_head_align : 4;
1909                 sg_align = bus->sdiodev->pdata->sd_sgentry_align > 4 ?
1910                            bus->sdiodev->pdata->sd_sgentry_align : 4;
1911         }
1912         /* sg entry alignment should be a divisor of block size */
1913         WARN_ON(blksize % sg_align);
1914
1915         pkt_next = pktq->next;
1916         dat_buf = (u8 *)(pkt_next->data);
1917
1918         /* Check head padding */
1919         head_pad = ((unsigned long)dat_buf % head_align);
1920         if (head_pad) {
1921                 if (skb_headroom(pkt_next) < head_pad) {
1922                         bus->sdiodev->bus_if->tx_realloc++;
1923                         head_pad = 0;
1924                         if (skb_cow(pkt_next, head_pad))
1925                                 return -ENOMEM;
1926                 }
1927                 skb_push(pkt_next, head_pad);
1928                 dat_buf = (u8 *)(pkt_next->data);
1929                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1930         }
1931
1932         /* Check tail padding */
1933         pkt_new = NULL;
1934         tail_chop = pkt_next->len % sg_align;
1935         tail_pad = sg_align - tail_chop;
1936         tail_pad += blksize - (pkt_next->len + tail_pad) % blksize;
1937         if (skb_tailroom(pkt_next) < tail_pad && pkt_next->len > blksize) {
1938                 pkt_new = brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1939                 if (pkt_new == NULL)
1940                         return -ENOMEM;
1941                 memcpy(pkt_new->data,
1942                        pkt_next->data + pkt_next->len - tail_chop,
1943                        tail_chop);
1944                 *(u32 *)(pkt_new->cb) = ALIGN_SKB_FLAG + tail_chop;
1945                 skb_trim(pkt_next, pkt_next->len - tail_chop);
1946                 __skb_queue_after(pktq, pkt_next, pkt_new);
1947         } else {
1948                 ntail = pkt_next->data_len + tail_pad -
1949                         (pkt_next->end - pkt_next->tail);
1950                 if (skb_cloned(pkt_next) || ntail > 0)
1951                         if (pskb_expand_head(pkt_next, 0, ntail, GFP_ATOMIC))
1952                                 return -ENOMEM;
1953                 if (skb_linearize(pkt_next))
1954                         return -ENOMEM;
1955                 dat_buf = (u8 *)(pkt_next->data);
1956                 __skb_put(pkt_next, tail_pad);
1957         }
1958
1959         /* Now prep the header */
1960         if (pkt_new)
1961                 hd_info.len = pkt_next->len + tail_chop;
1962         else
1963                 hd_info.len = pkt_next->len - tail_pad;
1964         hd_info.channel = chan;
1965         hd_info.dat_offset = head_pad + bus->tx_hdrlen;
1966         brcmf_sdio_hdpack(bus, dat_buf, &hd_info);
1967
1968         if (BRCMF_BYTES_ON() &&
1969             ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1970              (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
1971                 brcmf_dbg_hex_dump(true, pkt_next, hd_info.len, "Tx Frame:\n");
1972         else if (BRCMF_HDRS_ON())
1973                 brcmf_dbg_hex_dump(true, pkt_next, head_pad + bus->tx_hdrlen,
1974                                    "Tx Header:\n");
1975
1976         return 0;
1977 }
1978
1979 /**
1980  * brcmf_sdio_txpkt_postp - packet post processing for transmit
1981  * @bus: brcmf_sdio structure pointer
1982  * @pktq: packet list pointer
1983  *
1984  * Processes to be applied to the packet
1985  *      - Remove head padding
1986  *      - Remove tail padding
1987  */
1988 static void
1989 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
1990 {
1991         u8 *hdr;
1992         u32 dat_offset;
1993         u32 dummy_flags, chop_len;
1994         struct sk_buff *pkt_next, *tmp, *pkt_prev;
1995
1996         skb_queue_walk_safe(pktq, pkt_next, tmp) {
1997                 dummy_flags = *(u32 *)(pkt_next->cb);
1998                 if (dummy_flags & ALIGN_SKB_FLAG) {
1999                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2000                         if (chop_len) {
2001                                 pkt_prev = pkt_next->prev;
2002                                 memcpy(pkt_prev->data + pkt_prev->len,
2003                                        pkt_next->data, chop_len);
2004                                 skb_put(pkt_prev, chop_len);
2005                         }
2006                         __skb_unlink(pkt_next, pktq);
2007                         brcmu_pkt_buf_free_skb(pkt_next);
2008                 } else {
2009                         hdr = pkt_next->data + SDPCM_HWHDR_LEN;
2010                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2011                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2012                                      SDPCM_DOFFSET_SHIFT;
2013                         skb_pull(pkt_next, dat_offset);
2014                 }
2015         }
2016 }
2017
2018 /* Writes a HW/SW header into the packet and sends it. */
2019 /* Assumes: (a) header space already there, (b) caller holds lock */
2020 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2021                               uint chan)
2022 {
2023         int ret;
2024         int i;
2025         struct sk_buff_head localq;
2026
2027         brcmf_dbg(TRACE, "Enter\n");
2028
2029         __skb_queue_head_init(&localq);
2030         __skb_queue_tail(&localq, pkt);
2031         ret = brcmf_sdio_txpkt_prep(bus, &localq, chan);
2032         if (ret)
2033                 goto done;
2034
2035         sdio_claim_host(bus->sdiodev->func[1]);
2036         ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2037                                     SDIO_FUNC_2, F2SYNC, &localq);
2038         bus->sdcnt.f2txdata++;
2039
2040         if (ret < 0) {
2041                 /* On failure, abort the command and terminate the frame */
2042                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2043                           ret);
2044                 bus->sdcnt.tx_sderrs++;
2045
2046                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2047                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2048                                  SFC_WF_TERM, NULL);
2049                 bus->sdcnt.f1regdata++;
2050
2051                 for (i = 0; i < 3; i++) {
2052                         u8 hi, lo;
2053                         hi = brcmf_sdio_regrb(bus->sdiodev,
2054                                               SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2055                         lo = brcmf_sdio_regrb(bus->sdiodev,
2056                                               SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2057                         bus->sdcnt.f1regdata += 2;
2058                         if ((hi == 0) && (lo == 0))
2059                                 break;
2060                 }
2061
2062         }
2063         sdio_release_host(bus->sdiodev->func[1]);
2064         if (ret == 0)
2065                 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2066
2067 done:
2068         brcmf_sdio_txpkt_postp(bus, &localq);
2069         __skb_dequeue_tail(&localq);
2070         brcmf_txcomplete(bus->sdiodev->dev, pkt, ret == 0);
2071         return ret;
2072 }
2073
2074 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2075 {
2076         struct sk_buff *pkt;
2077         u32 intstatus = 0;
2078         int ret = 0, prec_out;
2079         uint cnt = 0;
2080         u8 tx_prec_map;
2081
2082         brcmf_dbg(TRACE, "Enter\n");
2083
2084         tx_prec_map = ~bus->flowcontrol;
2085
2086         /* Send frames until the limit or some other event */
2087         for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2088                 spin_lock_bh(&bus->txqlock);
2089                 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2090                 if (pkt == NULL) {
2091                         spin_unlock_bh(&bus->txqlock);
2092                         break;
2093                 }
2094                 spin_unlock_bh(&bus->txqlock);
2095
2096                 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL);
2097
2098                 /* In poll mode, need to check for other events */
2099                 if (!bus->intr && cnt) {
2100                         /* Check device status, signal pending interrupt */
2101                         sdio_claim_host(bus->sdiodev->func[1]);
2102                         ret = r_sdreg32(bus, &intstatus,
2103                                         offsetof(struct sdpcmd_regs,
2104                                                  intstatus));
2105                         sdio_release_host(bus->sdiodev->func[1]);
2106                         bus->sdcnt.f2txdata++;
2107                         if (ret != 0)
2108                                 break;
2109                         if (intstatus & bus->hostintmask)
2110                                 atomic_set(&bus->ipend, 1);
2111                 }
2112         }
2113
2114         /* Deflow-control stack if needed */
2115         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2116             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2117                 bus->txoff = false;
2118                 brcmf_txflowblock(bus->sdiodev->dev, false);
2119         }
2120
2121         return cnt;
2122 }
2123
2124 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2125 {
2126         u32 local_hostintmask;
2127         u8 saveclk;
2128         int err;
2129         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2130         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2131         struct brcmf_sdio *bus = sdiodev->bus;
2132
2133         brcmf_dbg(TRACE, "Enter\n");
2134
2135         if (bus->watchdog_tsk) {
2136                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2137                 kthread_stop(bus->watchdog_tsk);
2138                 bus->watchdog_tsk = NULL;
2139         }
2140
2141         sdio_claim_host(bus->sdiodev->func[1]);
2142
2143         /* Enable clock for device interrupts */
2144         brcmf_sdbrcm_bus_sleep(bus, false, false);
2145
2146         /* Disable and clear interrupts at the chip level also */
2147         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2148         local_hostintmask = bus->hostintmask;
2149         bus->hostintmask = 0;
2150
2151         /* Change our idea of bus state */
2152         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2153
2154         /* Force clocks on backplane to be sure F2 interrupt propagates */
2155         saveclk = brcmf_sdio_regrb(bus->sdiodev,
2156                                    SBSDIO_FUNC1_CHIPCLKCSR, &err);
2157         if (!err) {
2158                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2159                                  (saveclk | SBSDIO_FORCE_HT), &err);
2160         }
2161         if (err)
2162                 brcmf_err("Failed to force clock for F2: err %d\n", err);
2163
2164         /* Turn off the bus (F2), free any pending packets */
2165         brcmf_dbg(INTR, "disable SDIO interrupts\n");
2166         brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2167                          NULL);
2168
2169         /* Clear any pending interrupts now that F2 is disabled */
2170         w_sdreg32(bus, local_hostintmask,
2171                   offsetof(struct sdpcmd_regs, intstatus));
2172
2173         /* Turn off the backplane clock (only) */
2174         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2175         sdio_release_host(bus->sdiodev->func[1]);
2176
2177         /* Clear the data packet queues */
2178         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2179
2180         /* Clear any held glomming stuff */
2181         if (bus->glomd)
2182                 brcmu_pkt_buf_free_skb(bus->glomd);
2183         brcmf_sdbrcm_free_glom(bus);
2184
2185         /* Clear rx control and wake any waiters */
2186         spin_lock_bh(&bus->rxctl_lock);
2187         bus->rxlen = 0;
2188         spin_unlock_bh(&bus->rxctl_lock);
2189         brcmf_sdbrcm_dcmd_resp_wake(bus);
2190
2191         /* Reset some F2 state stuff */
2192         bus->rxskip = false;
2193         bus->tx_seq = bus->rx_seq = 0;
2194 }
2195
2196 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2197 {
2198         unsigned long flags;
2199
2200         if (bus->sdiodev->oob_irq_requested) {
2201                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2202                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2203                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2204                         bus->sdiodev->irq_en = true;
2205                 }
2206                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2207         }
2208 }
2209
2210 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2211 {
2212         u8 idx;
2213         u32 addr;
2214         unsigned long val;
2215         int n, ret;
2216
2217         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2218         addr = bus->ci->c_inf[idx].base +
2219                offsetof(struct sdpcmd_regs, intstatus);
2220
2221         ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2222         bus->sdcnt.f1regdata++;
2223         if (ret != 0)
2224                 val = 0;
2225
2226         val &= bus->hostintmask;
2227         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2228
2229         /* Clear interrupts */
2230         if (val) {
2231                 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2232                 bus->sdcnt.f1regdata++;
2233         }
2234
2235         if (ret) {
2236                 atomic_set(&bus->intstatus, 0);
2237         } else if (val) {
2238                 for_each_set_bit(n, &val, 32)
2239                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2240         }
2241
2242         return ret;
2243 }
2244
2245 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2246 {
2247         u32 newstatus = 0;
2248         unsigned long intstatus;
2249         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2250         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2251         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2252         int err = 0, n;
2253
2254         brcmf_dbg(TRACE, "Enter\n");
2255
2256         sdio_claim_host(bus->sdiodev->func[1]);
2257
2258         /* If waiting for HTAVAIL, check status */
2259         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2260                 u8 clkctl, devctl = 0;
2261
2262 #ifdef DEBUG
2263                 /* Check for inconsistent device control */
2264                 devctl = brcmf_sdio_regrb(bus->sdiodev,
2265                                           SBSDIO_DEVICE_CTL, &err);
2266                 if (err) {
2267                         brcmf_err("error reading DEVCTL: %d\n", err);
2268                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2269                 }
2270 #endif                          /* DEBUG */
2271
2272                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2273                 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2274                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
2275                 if (err) {
2276                         brcmf_err("error reading CSR: %d\n",
2277                                   err);
2278                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2279                 }
2280
2281                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2282                           devctl, clkctl);
2283
2284                 if (SBSDIO_HTAV(clkctl)) {
2285                         devctl = brcmf_sdio_regrb(bus->sdiodev,
2286                                                   SBSDIO_DEVICE_CTL, &err);
2287                         if (err) {
2288                                 brcmf_err("error reading DEVCTL: %d\n",
2289                                           err);
2290                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2291                         }
2292                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2293                         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2294                                          devctl, &err);
2295                         if (err) {
2296                                 brcmf_err("error writing DEVCTL: %d\n",
2297                                           err);
2298                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2299                         }
2300                         bus->clkstate = CLK_AVAIL;
2301                 }
2302         }
2303
2304         /* Make sure backplane clock is on */
2305         brcmf_sdbrcm_bus_sleep(bus, false, true);
2306
2307         /* Pending interrupt indicates new device status */
2308         if (atomic_read(&bus->ipend) > 0) {
2309                 atomic_set(&bus->ipend, 0);
2310                 err = brcmf_sdio_intr_rstatus(bus);
2311         }
2312
2313         /* Start with leftover status bits */
2314         intstatus = atomic_xchg(&bus->intstatus, 0);
2315
2316         /* Handle flow-control change: read new state in case our ack
2317          * crossed another change interrupt.  If change still set, assume
2318          * FC ON for safety, let next loop through do the debounce.
2319          */
2320         if (intstatus & I_HMB_FC_CHANGE) {
2321                 intstatus &= ~I_HMB_FC_CHANGE;
2322                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2323                                 offsetof(struct sdpcmd_regs, intstatus));
2324
2325                 err = r_sdreg32(bus, &newstatus,
2326                                 offsetof(struct sdpcmd_regs, intstatus));
2327                 bus->sdcnt.f1regdata += 2;
2328                 atomic_set(&bus->fcstate,
2329                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2330                 intstatus |= (newstatus & bus->hostintmask);
2331         }
2332
2333         /* Handle host mailbox indication */
2334         if (intstatus & I_HMB_HOST_INT) {
2335                 intstatus &= ~I_HMB_HOST_INT;
2336                 intstatus |= brcmf_sdbrcm_hostmail(bus);
2337         }
2338
2339         sdio_release_host(bus->sdiodev->func[1]);
2340
2341         /* Generally don't ask for these, can get CRC errors... */
2342         if (intstatus & I_WR_OOSYNC) {
2343                 brcmf_err("Dongle reports WR_OOSYNC\n");
2344                 intstatus &= ~I_WR_OOSYNC;
2345         }
2346
2347         if (intstatus & I_RD_OOSYNC) {
2348                 brcmf_err("Dongle reports RD_OOSYNC\n");
2349                 intstatus &= ~I_RD_OOSYNC;
2350         }
2351
2352         if (intstatus & I_SBINT) {
2353                 brcmf_err("Dongle reports SBINT\n");
2354                 intstatus &= ~I_SBINT;
2355         }
2356
2357         /* Would be active due to wake-wlan in gSPI */
2358         if (intstatus & I_CHIPACTIVE) {
2359                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2360                 intstatus &= ~I_CHIPACTIVE;
2361         }
2362
2363         /* Ignore frame indications if rxskip is set */
2364         if (bus->rxskip)
2365                 intstatus &= ~I_HMB_FRAME_IND;
2366
2367         /* On frame indication, read available frames */
2368         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2369                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2370                 if (!bus->rxpending)
2371                         intstatus &= ~I_HMB_FRAME_IND;
2372                 rxlimit -= min(framecnt, rxlimit);
2373         }
2374
2375         /* Keep still-pending events for next scheduling */
2376         if (intstatus) {
2377                 for_each_set_bit(n, &intstatus, 32)
2378                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2379         }
2380
2381         brcmf_sdbrcm_clrintr(bus);
2382
2383         if (data_ok(bus) && bus->ctrl_frame_stat &&
2384                 (bus->clkstate == CLK_AVAIL)) {
2385                 int i;
2386
2387                 sdio_claim_host(bus->sdiodev->func[1]);
2388                 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2389                         SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2390                         (u32) bus->ctrl_frame_len);
2391
2392                 if (err < 0) {
2393                         /* On failure, abort the command and
2394                                 terminate the frame */
2395                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2396                                   err);
2397                         bus->sdcnt.tx_sderrs++;
2398
2399                         brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2400
2401                         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2402                                          SFC_WF_TERM, &err);
2403                         bus->sdcnt.f1regdata++;
2404
2405                         for (i = 0; i < 3; i++) {
2406                                 u8 hi, lo;
2407                                 hi = brcmf_sdio_regrb(bus->sdiodev,
2408                                                       SBSDIO_FUNC1_WFRAMEBCHI,
2409                                                       &err);
2410                                 lo = brcmf_sdio_regrb(bus->sdiodev,
2411                                                       SBSDIO_FUNC1_WFRAMEBCLO,
2412                                                       &err);
2413                                 bus->sdcnt.f1regdata += 2;
2414                                 if ((hi == 0) && (lo == 0))
2415                                         break;
2416                         }
2417
2418                 } else {
2419                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2420                 }
2421                 sdio_release_host(bus->sdiodev->func[1]);
2422                 bus->ctrl_frame_stat = false;
2423                 brcmf_sdbrcm_wait_event_wakeup(bus);
2424         }
2425         /* Send queued frames (limit 1 if rx may still be pending) */
2426         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2427                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2428                  && data_ok(bus)) {
2429                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2430                                             txlimit;
2431                 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2432                 txlimit -= framecnt;
2433         }
2434
2435         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2436                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2437                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2438                 atomic_set(&bus->intstatus, 0);
2439         } else if (atomic_read(&bus->intstatus) ||
2440                    atomic_read(&bus->ipend) > 0 ||
2441                    (!atomic_read(&bus->fcstate) &&
2442                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2443                     data_ok(bus)) || PKT_AVAILABLE()) {
2444                 atomic_inc(&bus->dpc_tskcnt);
2445         }
2446
2447         /* If we're done for now, turn off clock request. */
2448         if ((bus->clkstate != CLK_PENDING)
2449             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2450                 bus->activity = false;
2451                 brcmf_dbg(SDIO, "idle state\n");
2452                 sdio_claim_host(bus->sdiodev->func[1]);
2453                 brcmf_sdbrcm_bus_sleep(bus, true, false);
2454                 sdio_release_host(bus->sdiodev->func[1]);
2455         }
2456 }
2457
2458 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2459 {
2460         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2461         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2462         struct brcmf_sdio *bus = sdiodev->bus;
2463
2464         return &bus->txq;
2465 }
2466
2467 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2468 {
2469         int ret = -EBADE;
2470         uint datalen, prec;
2471         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2472         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2473         struct brcmf_sdio *bus = sdiodev->bus;
2474         ulong flags;
2475
2476         brcmf_dbg(TRACE, "Enter\n");
2477
2478         datalen = pkt->len;
2479
2480         /* Add space for the header */
2481         skb_push(pkt, bus->tx_hdrlen);
2482         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2483
2484         prec = prio2prec((pkt->priority & PRIOMASK));
2485
2486         /* Check for existing queue, current flow-control,
2487                          pending event, or pending clock */
2488         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2489         bus->sdcnt.fcqueued++;
2490
2491         /* Priority based enq */
2492         spin_lock_irqsave(&bus->txqlock, flags);
2493         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2494                 skb_pull(pkt, bus->tx_hdrlen);
2495                 brcmf_err("out of bus->txq !!!\n");
2496                 ret = -ENOSR;
2497         } else {
2498                 ret = 0;
2499         }
2500
2501         if (pktq_len(&bus->txq) >= TXHI) {
2502                 bus->txoff = true;
2503                 brcmf_txflowblock(bus->sdiodev->dev, true);
2504         }
2505         spin_unlock_irqrestore(&bus->txqlock, flags);
2506
2507 #ifdef DEBUG
2508         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2509                 qcount[prec] = pktq_plen(&bus->txq, prec);
2510 #endif
2511
2512         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2513                 atomic_inc(&bus->dpc_tskcnt);
2514                 queue_work(bus->brcmf_wq, &bus->datawork);
2515         }
2516
2517         return ret;
2518 }
2519
2520 #ifdef DEBUG
2521 #define CONSOLE_LINE_MAX        192
2522
2523 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2524 {
2525         struct brcmf_console *c = &bus->console;
2526         u8 line[CONSOLE_LINE_MAX], ch;
2527         u32 n, idx, addr;
2528         int rv;
2529
2530         /* Don't do anything until FWREADY updates console address */
2531         if (bus->console_addr == 0)
2532                 return 0;
2533
2534         /* Read console log struct */
2535         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2536         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2537                               sizeof(c->log_le));
2538         if (rv < 0)
2539                 return rv;
2540
2541         /* Allocate console buffer (one time only) */
2542         if (c->buf == NULL) {
2543                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2544                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2545                 if (c->buf == NULL)
2546                         return -ENOMEM;
2547         }
2548
2549         idx = le32_to_cpu(c->log_le.idx);
2550
2551         /* Protect against corrupt value */
2552         if (idx > c->bufsize)
2553                 return -EBADE;
2554
2555         /* Skip reading the console buffer if the index pointer
2556          has not moved */
2557         if (idx == c->last)
2558                 return 0;
2559
2560         /* Read the console buffer */
2561         addr = le32_to_cpu(c->log_le.buf);
2562         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2563         if (rv < 0)
2564                 return rv;
2565
2566         while (c->last != idx) {
2567                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2568                         if (c->last == idx) {
2569                                 /* This would output a partial line.
2570                                  * Instead, back up
2571                                  * the buffer pointer and output this
2572                                  * line next time around.
2573                                  */
2574                                 if (c->last >= n)
2575                                         c->last -= n;
2576                                 else
2577                                         c->last = c->bufsize - n;
2578                                 goto break2;
2579                         }
2580                         ch = c->buf[c->last];
2581                         c->last = (c->last + 1) % c->bufsize;
2582                         if (ch == '\n')
2583                                 break;
2584                         line[n] = ch;
2585                 }
2586
2587                 if (n > 0) {
2588                         if (line[n - 1] == '\r')
2589                                 n--;
2590                         line[n] = 0;
2591                         pr_debug("CONSOLE: %s\n", line);
2592                 }
2593         }
2594 break2:
2595
2596         return 0;
2597 }
2598 #endif                          /* DEBUG */
2599
2600 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2601 {
2602         int i;
2603         int ret;
2604
2605         bus->ctrl_frame_stat = false;
2606         ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2607                                     SDIO_FUNC_2, F2SYNC, frame, len);
2608
2609         if (ret < 0) {
2610                 /* On failure, abort the command and terminate the frame */
2611                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2612                           ret);
2613                 bus->sdcnt.tx_sderrs++;
2614
2615                 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2616
2617                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2618                                  SFC_WF_TERM, NULL);
2619                 bus->sdcnt.f1regdata++;
2620
2621                 for (i = 0; i < 3; i++) {
2622                         u8 hi, lo;
2623                         hi = brcmf_sdio_regrb(bus->sdiodev,
2624                                               SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2625                         lo = brcmf_sdio_regrb(bus->sdiodev,
2626                                               SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2627                         bus->sdcnt.f1regdata += 2;
2628                         if (hi == 0 && lo == 0)
2629                                 break;
2630                 }
2631                 return ret;
2632         }
2633
2634         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2635
2636         return ret;
2637 }
2638
2639 static int
2640 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2641 {
2642         u8 *frame;
2643         u16 len;
2644         uint retries = 0;
2645         u8 doff = 0;
2646         int ret = -1;
2647         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2648         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2649         struct brcmf_sdio *bus = sdiodev->bus;
2650         struct brcmf_sdio_hdrinfo hd_info = {0};
2651
2652         brcmf_dbg(TRACE, "Enter\n");
2653
2654         /* Back the pointer to make a room for bus header */
2655         frame = msg - bus->tx_hdrlen;
2656         len = (msglen += bus->tx_hdrlen);
2657
2658         /* Add alignment padding (optional for ctl frames) */
2659         doff = ((unsigned long)frame % BRCMF_SDALIGN);
2660         if (doff) {
2661                 frame -= doff;
2662                 len += doff;
2663                 msglen += doff;
2664                 memset(frame, 0, doff + bus->tx_hdrlen);
2665         }
2666         /* precondition: doff < BRCMF_SDALIGN */
2667         doff += bus->tx_hdrlen;
2668
2669         /* Round send length to next SDIO block */
2670         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2671                 u16 pad = bus->blocksize - (len % bus->blocksize);
2672                 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2673                         len += pad;
2674         } else if (len % BRCMF_SDALIGN) {
2675                 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2676         }
2677
2678         /* Satisfy length-alignment requirements */
2679         if (len & (ALIGNMENT - 1))
2680                 len = roundup(len, ALIGNMENT);
2681
2682         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2683
2684         /* Make sure backplane clock is on */
2685         sdio_claim_host(bus->sdiodev->func[1]);
2686         brcmf_sdbrcm_bus_sleep(bus, false, false);
2687         sdio_release_host(bus->sdiodev->func[1]);
2688
2689         hd_info.len = (u16)msglen;
2690         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2691         hd_info.dat_offset = doff;
2692         brcmf_sdio_hdpack(bus, frame, &hd_info);
2693
2694         if (!data_ok(bus)) {
2695                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2696                           bus->tx_max, bus->tx_seq);
2697                 bus->ctrl_frame_stat = true;
2698                 /* Send from dpc */
2699                 bus->ctrl_frame_buf = frame;
2700                 bus->ctrl_frame_len = len;
2701
2702                 wait_event_interruptible_timeout(bus->ctrl_wait,
2703                                                  !bus->ctrl_frame_stat,
2704                                                  msecs_to_jiffies(2000));
2705
2706                 if (!bus->ctrl_frame_stat) {
2707                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2708                         ret = 0;
2709                 } else {
2710                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2711                         ret = -1;
2712                 }
2713         }
2714
2715         if (ret == -1) {
2716                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2717                                    frame, len, "Tx Frame:\n");
2718                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2719                                    BRCMF_HDRS_ON(),
2720                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2721
2722                 do {
2723                         sdio_claim_host(bus->sdiodev->func[1]);
2724                         ret = brcmf_tx_frame(bus, frame, len);
2725                         sdio_release_host(bus->sdiodev->func[1]);
2726                 } while (ret < 0 && retries++ < TXRETRIES);
2727         }
2728
2729         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2730             atomic_read(&bus->dpc_tskcnt) == 0) {
2731                 bus->activity = false;
2732                 sdio_claim_host(bus->sdiodev->func[1]);
2733                 brcmf_dbg(INFO, "idle\n");
2734                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2735                 sdio_release_host(bus->sdiodev->func[1]);
2736         }
2737
2738         if (ret)
2739                 bus->sdcnt.tx_ctlerrs++;
2740         else
2741                 bus->sdcnt.tx_ctlpkts++;
2742
2743         return ret ? -EIO : 0;
2744 }
2745
2746 #ifdef DEBUG
2747 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2748 {
2749         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2750 }
2751
2752 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2753                                  struct sdpcm_shared *sh)
2754 {
2755         u32 addr;
2756         int rv;
2757         u32 shaddr = 0;
2758         struct sdpcm_shared_le sh_le;
2759         __le32 addr_le;
2760
2761         shaddr = bus->ci->rambase + bus->ramsize - 4;
2762
2763         /*
2764          * Read last word in socram to determine
2765          * address of sdpcm_shared structure
2766          */
2767         sdio_claim_host(bus->sdiodev->func[1]);
2768         brcmf_sdbrcm_bus_sleep(bus, false, false);
2769         rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2770         sdio_release_host(bus->sdiodev->func[1]);
2771         if (rv < 0)
2772                 return rv;
2773
2774         addr = le32_to_cpu(addr_le);
2775
2776         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2777
2778         /*
2779          * Check if addr is valid.
2780          * NVRAM length at the end of memory should have been overwritten.
2781          */
2782         if (!brcmf_sdio_valid_shared_address(addr)) {
2783                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2784                                   addr);
2785                         return -EINVAL;
2786         }
2787
2788         /* Read hndrte_shared structure */
2789         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2790                               sizeof(struct sdpcm_shared_le));
2791         if (rv < 0)
2792                 return rv;
2793
2794         /* Endianness */
2795         sh->flags = le32_to_cpu(sh_le.flags);
2796         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2797         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2798         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2799         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2800         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2801         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2802
2803         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2804                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2805                           SDPCM_SHARED_VERSION,
2806                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2807                 return -EPROTO;
2808         }
2809
2810         return 0;
2811 }
2812
2813 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2814                                    struct sdpcm_shared *sh, char __user *data,
2815                                    size_t count)
2816 {
2817         u32 addr, console_ptr, console_size, console_index;
2818         char *conbuf = NULL;
2819         __le32 sh_val;
2820         int rv;
2821         loff_t pos = 0;
2822         int nbytes = 0;
2823
2824         /* obtain console information from device memory */
2825         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2826         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2827                               (u8 *)&sh_val, sizeof(u32));
2828         if (rv < 0)
2829                 return rv;
2830         console_ptr = le32_to_cpu(sh_val);
2831
2832         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2833         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2834                               (u8 *)&sh_val, sizeof(u32));
2835         if (rv < 0)
2836                 return rv;
2837         console_size = le32_to_cpu(sh_val);
2838
2839         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2840         rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2841                               (u8 *)&sh_val, sizeof(u32));
2842         if (rv < 0)
2843                 return rv;
2844         console_index = le32_to_cpu(sh_val);
2845
2846         /* allocate buffer for console data */
2847         if (console_size <= CONSOLE_BUFFER_MAX)
2848                 conbuf = vzalloc(console_size+1);
2849
2850         if (!conbuf)
2851                 return -ENOMEM;
2852
2853         /* obtain the console data from device */
2854         conbuf[console_size] = '\0';
2855         rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2856                               console_size);
2857         if (rv < 0)
2858                 goto done;
2859
2860         rv = simple_read_from_buffer(data, count, &pos,
2861                                      conbuf + console_index,
2862                                      console_size - console_index);
2863         if (rv < 0)
2864                 goto done;
2865
2866         nbytes = rv;
2867         if (console_index > 0) {
2868                 pos = 0;
2869                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2870                                              conbuf, console_index - 1);
2871                 if (rv < 0)
2872                         goto done;
2873                 rv += nbytes;
2874         }
2875 done:
2876         vfree(conbuf);
2877         return rv;
2878 }
2879
2880 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2881                                 char __user *data, size_t count)
2882 {
2883         int error, res;
2884         char buf[350];
2885         struct brcmf_trap_info tr;
2886         loff_t pos = 0;
2887
2888         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2889                 brcmf_dbg(INFO, "no trap in firmware\n");
2890                 return 0;
2891         }
2892
2893         error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2894                                  sizeof(struct brcmf_trap_info));
2895         if (error < 0)
2896                 return error;
2897
2898         res = scnprintf(buf, sizeof(buf),
2899                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2900                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2901                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2902                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2903                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2904                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2905                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2906                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2907                         le32_to_cpu(tr.pc), sh->trap_addr,
2908                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2909                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2910                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2911                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2912
2913         return simple_read_from_buffer(data, count, &pos, buf, res);
2914 }
2915
2916 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2917                                   struct sdpcm_shared *sh, char __user *data,
2918                                   size_t count)
2919 {
2920         int error = 0;
2921         char buf[200];
2922         char file[80] = "?";
2923         char expr[80] = "<???>";
2924         int res;
2925         loff_t pos = 0;
2926
2927         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2928                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2929                 return 0;
2930         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2931                 brcmf_dbg(INFO, "no assert in dongle\n");
2932                 return 0;
2933         }
2934
2935         sdio_claim_host(bus->sdiodev->func[1]);
2936         if (sh->assert_file_addr != 0) {
2937                 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2938                                          sh->assert_file_addr, (u8 *)file, 80);
2939                 if (error < 0)
2940                         return error;
2941         }
2942         if (sh->assert_exp_addr != 0) {
2943                 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2944                                          sh->assert_exp_addr, (u8 *)expr, 80);
2945                 if (error < 0)
2946                         return error;
2947         }
2948         sdio_release_host(bus->sdiodev->func[1]);
2949
2950         res = scnprintf(buf, sizeof(buf),
2951                         "dongle assert: %s:%d: assert(%s)\n",
2952                         file, sh->assert_line, expr);
2953         return simple_read_from_buffer(data, count, &pos, buf, res);
2954 }
2955
2956 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2957 {
2958         int error;
2959         struct sdpcm_shared sh;
2960
2961         error = brcmf_sdio_readshared(bus, &sh);
2962
2963         if (error < 0)
2964                 return error;
2965
2966         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2967                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2968         else if (sh.flags & SDPCM_SHARED_ASSERT)
2969                 brcmf_err("assertion in dongle\n");
2970
2971         if (sh.flags & SDPCM_SHARED_TRAP)
2972                 brcmf_err("firmware trap in dongle\n");
2973
2974         return 0;
2975 }
2976
2977 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
2978                                   size_t count, loff_t *ppos)
2979 {
2980         int error = 0;
2981         struct sdpcm_shared sh;
2982         int nbytes = 0;
2983         loff_t pos = *ppos;
2984
2985         if (pos != 0)
2986                 return 0;
2987
2988         error = brcmf_sdio_readshared(bus, &sh);
2989         if (error < 0)
2990                 goto done;
2991
2992         error = brcmf_sdio_assert_info(bus, &sh, data, count);
2993         if (error < 0)
2994                 goto done;
2995         nbytes = error;
2996
2997         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
2998         if (error < 0)
2999                 goto done;
3000         nbytes += error;
3001
3002         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3003         if (error < 0)
3004                 goto done;
3005         nbytes += error;
3006
3007         error = nbytes;
3008         *ppos += nbytes;
3009 done:
3010         return error;
3011 }
3012
3013 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3014                                         size_t count, loff_t *ppos)
3015 {
3016         struct brcmf_sdio *bus = f->private_data;
3017         int res;
3018
3019         res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3020         if (res > 0)
3021                 *ppos += res;
3022         return (ssize_t)res;
3023 }
3024
3025 static const struct file_operations brcmf_sdio_forensic_ops = {
3026         .owner = THIS_MODULE,
3027         .open = simple_open,
3028         .read = brcmf_sdio_forensic_read
3029 };
3030
3031 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3032 {
3033         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3034         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3035
3036         if (IS_ERR_OR_NULL(dentry))
3037                 return;
3038
3039         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3040                             &brcmf_sdio_forensic_ops);
3041         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3042 }
3043 #else
3044 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3045 {
3046         return 0;
3047 }
3048
3049 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3050 {
3051 }
3052 #endif /* DEBUG */
3053
3054 static int
3055 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3056 {
3057         int timeleft;
3058         uint rxlen = 0;
3059         bool pending;
3060         u8 *buf;
3061         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3062         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3063         struct brcmf_sdio *bus = sdiodev->bus;
3064
3065         brcmf_dbg(TRACE, "Enter\n");
3066
3067         /* Wait until control frame is available */
3068         timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3069
3070         spin_lock_bh(&bus->rxctl_lock);
3071         rxlen = bus->rxlen;
3072         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3073         bus->rxctl = NULL;
3074         buf = bus->rxctl_orig;
3075         bus->rxctl_orig = NULL;
3076         bus->rxlen = 0;
3077         spin_unlock_bh(&bus->rxctl_lock);
3078         vfree(buf);
3079
3080         if (rxlen) {
3081                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3082                           rxlen, msglen);
3083         } else if (timeleft == 0) {
3084                 brcmf_err("resumed on timeout\n");
3085                 brcmf_sdbrcm_checkdied(bus);
3086         } else if (pending) {
3087                 brcmf_dbg(CTL, "cancelled\n");
3088                 return -ERESTARTSYS;
3089         } else {
3090                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3091                 brcmf_sdbrcm_checkdied(bus);
3092         }
3093
3094         if (rxlen)
3095                 bus->sdcnt.rx_ctlpkts++;
3096         else
3097                 bus->sdcnt.rx_ctlerrs++;
3098
3099         return rxlen ? (int)rxlen : -ETIMEDOUT;
3100 }
3101
3102 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3103 {
3104         struct chip_info *ci = bus->ci;
3105
3106         /* To enter download state, disable ARM and reset SOCRAM.
3107          * To exit download state, simply reset ARM (default is RAM boot).
3108          */
3109         if (enter) {
3110                 bus->alp_only = true;
3111
3112                 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3113         } else {
3114                 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3115                                                    bus->varsz))
3116                         return false;
3117
3118                 /* Allow HT Clock now that the ARM is running. */
3119                 bus->alp_only = false;
3120
3121                 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3122         }
3123
3124         return true;
3125 }
3126
3127 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3128 {
3129         const struct firmware *fw;
3130         int err;
3131         int offset;
3132         int address;
3133         int len;
3134
3135         fw = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_BIN);
3136         if (fw == NULL)
3137                 return -ENOENT;
3138
3139         if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3140             BRCMF_MAX_CORENUM)
3141                 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3142
3143         err = 0;
3144         offset = 0;
3145         address = bus->ci->rambase;
3146         while (offset < fw->size) {
3147                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3148                       fw->size - offset;
3149                 err = brcmf_sdio_ramrw(bus->sdiodev, true, address,
3150                                        (u8 *)&fw->data[offset], len);
3151                 if (err) {
3152                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3153                                   err, len, address);
3154                         goto failure;
3155                 }
3156                 offset += len;
3157                 address += len;
3158         }
3159
3160 failure:
3161         release_firmware(fw);
3162
3163         return err;
3164 }
3165
3166 /*
3167  * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3168  * and ending in a NUL.
3169  * Removes carriage returns, empty lines, comment lines, and converts
3170  * newlines to NULs.
3171  * Shortens buffer as needed and pads with NULs.  End of buffer is marked
3172  * by two NULs.
3173 */
3174
3175 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus,
3176                                     const struct firmware *nv)
3177 {
3178         char *varbuf;
3179         char *dp;
3180         bool findNewline;
3181         int column;
3182         int ret = 0;
3183         uint buf_len, n, len;
3184
3185         len = nv->size;
3186         varbuf = vmalloc(len);
3187         if (!varbuf)
3188                 return -ENOMEM;
3189
3190         memcpy(varbuf, nv->data, len);
3191         dp = varbuf;
3192
3193         findNewline = false;
3194         column = 0;
3195
3196         for (n = 0; n < len; n++) {
3197                 if (varbuf[n] == 0)
3198                         break;
3199                 if (varbuf[n] == '\r')
3200                         continue;
3201                 if (findNewline && varbuf[n] != '\n')
3202                         continue;
3203                 findNewline = false;
3204                 if (varbuf[n] == '#') {
3205                         findNewline = true;
3206                         continue;
3207                 }
3208                 if (varbuf[n] == '\n') {
3209                         if (column == 0)
3210                                 continue;
3211                         *dp++ = 0;
3212                         column = 0;
3213                         continue;
3214                 }
3215                 *dp++ = varbuf[n];
3216                 column++;
3217         }
3218         buf_len = dp - varbuf;
3219         while (dp < varbuf + n)
3220                 *dp++ = 0;
3221
3222         kfree(bus->vars);
3223         /* roundup needed for download to device */
3224         bus->varsz = roundup(buf_len + 1, 4);
3225         bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3226         if (bus->vars == NULL) {
3227                 bus->varsz = 0;
3228                 ret = -ENOMEM;
3229                 goto err;
3230         }
3231
3232         /* copy the processed variables and add null termination */
3233         memcpy(bus->vars, varbuf, buf_len);
3234         bus->vars[buf_len] = 0;
3235 err:
3236         vfree(varbuf);
3237         return ret;
3238 }
3239
3240 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3241 {
3242         const struct firmware *nv;
3243         int ret;
3244
3245         nv = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3246         if (nv == NULL)
3247                 return -ENOENT;
3248
3249         ret = brcmf_process_nvram_vars(bus, nv);
3250
3251         release_firmware(nv);
3252
3253         return ret;
3254 }
3255
3256 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3257 {
3258         int bcmerror = -1;
3259
3260         /* Keep arm in reset */
3261         if (!brcmf_sdbrcm_download_state(bus, true)) {
3262                 brcmf_err("error placing ARM core in reset\n");
3263                 goto err;
3264         }
3265
3266         if (brcmf_sdbrcm_download_code_file(bus)) {
3267                 brcmf_err("dongle image file download failed\n");
3268                 goto err;
3269         }
3270
3271         if (brcmf_sdbrcm_download_nvram(bus)) {
3272                 brcmf_err("dongle nvram file download failed\n");
3273                 goto err;
3274         }
3275
3276         /* Take arm out of reset */
3277         if (!brcmf_sdbrcm_download_state(bus, false)) {
3278                 brcmf_err("error getting out of ARM core reset\n");
3279                 goto err;
3280         }
3281
3282         bcmerror = 0;
3283
3284 err:
3285         return bcmerror;
3286 }
3287
3288 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3289 {
3290         u32 addr, reg;
3291
3292         brcmf_dbg(TRACE, "Enter\n");
3293
3294         /* old chips with PMU version less than 17 don't support save restore */
3295         if (bus->ci->pmurev < 17)
3296                 return false;
3297
3298         /* read PMU chipcontrol register 3*/
3299         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3300         brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3301         addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3302         reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3303
3304         return (bool)reg;
3305 }
3306
3307 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3308 {
3309         int err = 0;
3310         u8 val;
3311
3312         brcmf_dbg(TRACE, "Enter\n");
3313
3314         val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3315                                &err);
3316         if (err) {
3317                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3318                 return;
3319         }
3320
3321         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3322         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3323                          val, &err);
3324         if (err) {
3325                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3326                 return;
3327         }
3328
3329         /* Add CMD14 Support */
3330         brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3331                          (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3332                           SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3333                          &err);
3334         if (err) {
3335                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3336                 return;
3337         }
3338
3339         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3340                          SBSDIO_FORCE_HT, &err);
3341         if (err) {
3342                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3343                 return;
3344         }
3345
3346         /* set flag */
3347         bus->sr_enabled = true;
3348         brcmf_dbg(INFO, "SR enabled\n");
3349 }
3350
3351 /* enable KSO bit */
3352 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3353 {
3354         u8 val;
3355         int err = 0;
3356
3357         brcmf_dbg(TRACE, "Enter\n");
3358
3359         /* KSO bit added in SDIO core rev 12 */
3360         if (bus->ci->c_inf[1].rev < 12)
3361                 return 0;
3362
3363         val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3364                                &err);
3365         if (err) {
3366                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3367                 return err;
3368         }
3369
3370         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3371                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3372                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3373                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3374                                  val, &err);
3375                 if (err) {
3376                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3377                         return err;
3378                 }
3379         }
3380
3381         return 0;
3382 }
3383
3384
3385 static bool
3386 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3387 {
3388         bool ret;
3389
3390         sdio_claim_host(bus->sdiodev->func[1]);
3391
3392         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3393
3394         ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3395
3396         brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3397
3398         sdio_release_host(bus->sdiodev->func[1]);
3399
3400         return ret;
3401 }
3402
3403 static int brcmf_sdbrcm_bus_init(struct device *dev)
3404 {
3405         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3406         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3407         struct brcmf_sdio *bus = sdiodev->bus;
3408         unsigned long timeout;
3409         u8 ready, enable;
3410         int err, ret = 0;
3411         u8 saveclk;
3412
3413         brcmf_dbg(TRACE, "Enter\n");
3414
3415         /* try to download image and nvram to the dongle */
3416         if (bus_if->state == BRCMF_BUS_DOWN) {
3417                 if (!(brcmf_sdbrcm_download_firmware(bus)))
3418                         return -1;
3419         }
3420
3421         if (!bus->sdiodev->bus_if->drvr)
3422                 return 0;
3423
3424         /* Start the watchdog timer */
3425         bus->sdcnt.tickcnt = 0;
3426         brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3427
3428         sdio_claim_host(bus->sdiodev->func[1]);
3429
3430         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3431         brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3432         if (bus->clkstate != CLK_AVAIL)
3433                 goto exit;
3434
3435         /* Force clocks on backplane to be sure F2 interrupt propagates */
3436         saveclk = brcmf_sdio_regrb(bus->sdiodev,
3437                                    SBSDIO_FUNC1_CHIPCLKCSR, &err);
3438         if (!err) {
3439                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3440                                  (saveclk | SBSDIO_FORCE_HT), &err);
3441         }
3442         if (err) {
3443                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3444                 goto exit;
3445         }
3446
3447         /* Enable function 2 (frame transfers) */
3448         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3449                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3450         enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3451
3452         brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3453
3454         timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3455         ready = 0;
3456         while (enable != ready) {
3457                 ready = brcmf_sdio_regrb(bus->sdiodev,
3458                                          SDIO_CCCR_IORx, NULL);
3459                 if (time_after(jiffies, timeout))
3460                         break;
3461                 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3462                         /* prevent busy waiting if it takes too long */
3463                         msleep_interruptible(20);
3464         }
3465
3466         brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3467
3468         /* If F2 successfully enabled, set core and enable interrupts */
3469         if (ready == enable) {
3470                 /* Set up the interrupt mask and enable interrupts */
3471                 bus->hostintmask = HOSTINTMASK;
3472                 w_sdreg32(bus, bus->hostintmask,
3473                           offsetof(struct sdpcmd_regs, hostintmask));
3474
3475                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3476         } else {
3477                 /* Disable F2 again */
3478                 enable = SDIO_FUNC_ENABLE_1;
3479                 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3480                 ret = -ENODEV;
3481         }
3482
3483         if (brcmf_sdbrcm_sr_capable(bus)) {
3484                 brcmf_sdbrcm_sr_init(bus);
3485         } else {
3486                 /* Restore previous clock setting */
3487                 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3488                                  saveclk, &err);
3489         }
3490
3491         if (ret == 0) {
3492                 ret = brcmf_sdio_intr_register(bus->sdiodev);
3493                 if (ret != 0)
3494                         brcmf_err("intr register failed:%d\n", ret);
3495         }
3496
3497         /* If we didn't come up, turn off backplane clock */
3498         if (bus_if->state != BRCMF_BUS_DATA)
3499                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3500
3501 exit:
3502         sdio_release_host(bus->sdiodev->func[1]);
3503
3504         return ret;
3505 }
3506
3507 void brcmf_sdbrcm_isr(void *arg)
3508 {
3509         struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3510
3511         brcmf_dbg(TRACE, "Enter\n");
3512
3513         if (!bus) {
3514                 brcmf_err("bus is null pointer, exiting\n");
3515                 return;
3516         }
3517
3518         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3519                 brcmf_err("bus is down. we have nothing to do\n");
3520                 return;
3521         }
3522         /* Count the interrupt call */
3523         bus->sdcnt.intrcount++;
3524         if (in_interrupt())
3525                 atomic_set(&bus->ipend, 1);
3526         else
3527                 if (brcmf_sdio_intr_rstatus(bus)) {
3528                         brcmf_err("failed backplane access\n");
3529                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3530                 }
3531
3532         /* Disable additional interrupts (is this needed now)? */
3533         if (!bus->intr)
3534                 brcmf_err("isr w/o interrupt configured!\n");
3535
3536         atomic_inc(&bus->dpc_tskcnt);
3537         queue_work(bus->brcmf_wq, &bus->datawork);
3538 }
3539
3540 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3541 {
3542 #ifdef DEBUG
3543         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3544 #endif  /* DEBUG */
3545
3546         brcmf_dbg(TIMER, "Enter\n");
3547
3548         /* Poll period: check device if appropriate. */
3549         if (!bus->sr_enabled &&
3550             bus->poll && (++bus->polltick >= bus->pollrate)) {
3551                 u32 intstatus = 0;
3552
3553                 /* Reset poll tick */
3554                 bus->polltick = 0;
3555
3556                 /* Check device if no interrupts */
3557                 if (!bus->intr ||
3558                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3559
3560                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3561                                 u8 devpend;
3562
3563                                 sdio_claim_host(bus->sdiodev->func[1]);
3564                                 devpend = brcmf_sdio_regrb(bus->sdiodev,
3565                                                            SDIO_CCCR_INTx,
3566                                                            NULL);
3567                                 sdio_release_host(bus->sdiodev->func[1]);
3568                                 intstatus =
3569                                     devpend & (INTR_STATUS_FUNC1 |
3570                                                INTR_STATUS_FUNC2);
3571                         }
3572
3573                         /* If there is something, make like the ISR and
3574                                  schedule the DPC */
3575                         if (intstatus) {
3576                                 bus->sdcnt.pollcnt++;
3577                                 atomic_set(&bus->ipend, 1);
3578
3579                                 atomic_inc(&bus->dpc_tskcnt);
3580                                 queue_work(bus->brcmf_wq, &bus->datawork);
3581                         }
3582                 }
3583
3584                 /* Update interrupt tracking */
3585                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3586         }
3587 #ifdef DEBUG
3588         /* Poll for console output periodically */
3589         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3590             bus->console_interval != 0) {
3591                 bus->console.count += BRCMF_WD_POLL_MS;
3592                 if (bus->console.count >= bus->console_interval) {
3593                         bus->console.count -= bus->console_interval;
3594                         sdio_claim_host(bus->sdiodev->func[1]);
3595                         /* Make sure backplane clock is on */
3596                         brcmf_sdbrcm_bus_sleep(bus, false, false);
3597                         if (brcmf_sdbrcm_readconsole(bus) < 0)
3598                                 /* stop on error */
3599                                 bus->console_interval = 0;
3600                         sdio_release_host(bus->sdiodev->func[1]);
3601                 }
3602         }
3603 #endif                          /* DEBUG */
3604
3605         /* On idle timeout clear activity flag and/or turn off clock */
3606         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3607                 if (++bus->idlecount >= bus->idletime) {
3608                         bus->idlecount = 0;
3609                         if (bus->activity) {
3610                                 bus->activity = false;
3611                                 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3612                         } else {
3613                                 brcmf_dbg(SDIO, "idle\n");
3614                                 sdio_claim_host(bus->sdiodev->func[1]);
3615                                 brcmf_sdbrcm_bus_sleep(bus, true, false);
3616                                 sdio_release_host(bus->sdiodev->func[1]);
3617                         }
3618                 }
3619         }
3620
3621         return (atomic_read(&bus->ipend) > 0);
3622 }
3623
3624 static void brcmf_sdio_dataworker(struct work_struct *work)
3625 {
3626         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3627                                               datawork);
3628
3629         while (atomic_read(&bus->dpc_tskcnt)) {
3630                 brcmf_sdbrcm_dpc(bus);
3631                 atomic_dec(&bus->dpc_tskcnt);
3632         }
3633 }
3634
3635 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3636 {
3637         brcmf_dbg(TRACE, "Enter\n");
3638
3639         kfree(bus->rxbuf);
3640         bus->rxctl = bus->rxbuf = NULL;
3641         bus->rxlen = 0;
3642 }
3643
3644 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3645 {
3646         brcmf_dbg(TRACE, "Enter\n");
3647
3648         if (bus->sdiodev->bus_if->maxctl) {
3649                 bus->rxblen =
3650                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3651                             ALIGNMENT) + BRCMF_SDALIGN;
3652                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3653                 if (!(bus->rxbuf))
3654                         return false;
3655         }
3656
3657         return true;
3658 }
3659
3660 static bool
3661 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3662 {
3663         u8 clkctl = 0;
3664         int err = 0;
3665         int reg_addr;
3666         u32 reg_val;
3667         u32 drivestrength;
3668
3669         bus->alp_only = true;
3670
3671         sdio_claim_host(bus->sdiodev->func[1]);
3672
3673         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3674                  brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3675
3676         /*
3677          * Force PLL off until brcmf_sdio_chip_attach()
3678          * programs PLL control regs
3679          */
3680
3681         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3682                          BRCMF_INIT_CLKCTL1, &err);
3683         if (!err)
3684                 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3685                                           SBSDIO_FUNC1_CHIPCLKCSR, &err);
3686
3687         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3688                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3689                           err, BRCMF_INIT_CLKCTL1, clkctl);
3690                 goto fail;
3691         }
3692
3693         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3694                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3695                 goto fail;
3696         }
3697
3698         if (brcmf_sdbrcm_kso_init(bus)) {
3699                 brcmf_err("error enabling KSO\n");
3700                 goto fail;
3701         }
3702
3703         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3704                 drivestrength = bus->sdiodev->pdata->drive_strength;
3705         else
3706                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3707         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3708
3709         /* Get info on the SOCRAM cores... */
3710         bus->ramsize = bus->ci->ramsize;
3711         if (!(bus->ramsize)) {
3712                 brcmf_err("failed to find SOCRAM memory!\n");
3713                 goto fail;
3714         }
3715
3716         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3717         reg_val = brcmf_sdio_regrb(bus->sdiodev,
3718                                    SDIO_CCCR_BRCM_CARDCTRL, &err);
3719         if (err)
3720                 goto fail;
3721
3722         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3723
3724         brcmf_sdio_regwb(bus->sdiodev,
3725                          SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3726         if (err)
3727                 goto fail;
3728
3729         /* set PMUControl so a backplane reset does PMU state reload */
3730         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3731                                pmucontrol);
3732         reg_val = brcmf_sdio_regrl(bus->sdiodev,
3733                                    reg_addr,
3734                                    &err);
3735         if (err)
3736                 goto fail;
3737
3738         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3739
3740         brcmf_sdio_regwl(bus->sdiodev,
3741                          reg_addr,
3742                          reg_val,
3743                          &err);
3744         if (err)
3745                 goto fail;
3746
3747
3748         sdio_release_host(bus->sdiodev->func[1]);
3749
3750         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3751
3752         /* Locate an appropriately-aligned portion of hdrbuf */
3753         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3754                                     BRCMF_SDALIGN);
3755
3756         /* Set the poll and/or interrupt flags */
3757         bus->intr = true;
3758         bus->poll = false;
3759         if (bus->poll)
3760                 bus->pollrate = 1;
3761
3762         return true;
3763
3764 fail:
3765         sdio_release_host(bus->sdiodev->func[1]);
3766         return false;
3767 }
3768
3769 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3770 {
3771         brcmf_dbg(TRACE, "Enter\n");
3772
3773         sdio_claim_host(bus->sdiodev->func[1]);
3774
3775         /* Disable F2 to clear any intermediate frame state on the dongle */
3776         brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3777                          SDIO_FUNC_ENABLE_1, NULL);
3778
3779         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3780         bus->rxflow = false;
3781
3782         /* Done with backplane-dependent accesses, can drop clock... */
3783         brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3784
3785         sdio_release_host(bus->sdiodev->func[1]);
3786
3787         /* ...and initialize clock/power states */
3788         bus->clkstate = CLK_SDONLY;
3789         bus->idletime = BRCMF_IDLE_INTERVAL;
3790         bus->idleclock = BRCMF_IDLE_ACTIVE;
3791
3792         /* Query the F2 block size, set roundup accordingly */
3793         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3794         bus->roundup = min(max_roundup, bus->blocksize);
3795
3796         /* SR state */
3797         bus->sleeping = false;
3798         bus->sr_enabled = false;
3799
3800         return true;
3801 }
3802
3803 static int
3804 brcmf_sdbrcm_watchdog_thread(void *data)
3805 {
3806         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3807
3808         allow_signal(SIGTERM);
3809         /* Run until signal received */
3810         while (1) {
3811                 if (kthread_should_stop())
3812                         break;
3813                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3814                         brcmf_sdbrcm_bus_watchdog(bus);
3815                         /* Count the tick for reference */
3816                         bus->sdcnt.tickcnt++;
3817                 } else
3818                         break;
3819         }
3820         return 0;
3821 }
3822
3823 static void
3824 brcmf_sdbrcm_watchdog(unsigned long data)
3825 {
3826         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3827
3828         if (bus->watchdog_tsk) {
3829                 complete(&bus->watchdog_wait);
3830                 /* Reschedule the watchdog */
3831                 if (bus->wd_timer_valid)
3832                         mod_timer(&bus->timer,
3833                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3834         }
3835 }
3836
3837 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3838 {
3839         brcmf_dbg(TRACE, "Enter\n");
3840
3841         if (bus->ci) {
3842                 sdio_claim_host(bus->sdiodev->func[1]);
3843                 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3844                 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3845                 sdio_release_host(bus->sdiodev->func[1]);
3846                 brcmf_sdio_chip_detach(&bus->ci);
3847                 if (bus->vars && bus->varsz)
3848                         kfree(bus->vars);
3849                 bus->vars = NULL;
3850         }
3851
3852         brcmf_dbg(TRACE, "Disconnected\n");
3853 }
3854
3855 /* Detach and free everything */
3856 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3857 {
3858         brcmf_dbg(TRACE, "Enter\n");
3859
3860         if (bus) {
3861                 /* De-register interrupt handler */
3862                 brcmf_sdio_intr_unregister(bus->sdiodev);
3863
3864                 cancel_work_sync(&bus->datawork);
3865                 if (bus->brcmf_wq)
3866                         destroy_workqueue(bus->brcmf_wq);
3867
3868                 if (bus->sdiodev->bus_if->drvr) {
3869                         brcmf_detach(bus->sdiodev->dev);
3870                         brcmf_sdbrcm_release_dongle(bus);
3871                 }
3872
3873                 brcmf_sdbrcm_release_malloc(bus);
3874
3875                 kfree(bus);
3876         }
3877
3878         brcmf_dbg(TRACE, "Disconnected\n");
3879 }
3880
3881 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3882         .stop = brcmf_sdbrcm_bus_stop,
3883         .init = brcmf_sdbrcm_bus_init,
3884         .txdata = brcmf_sdbrcm_bus_txdata,
3885         .txctl = brcmf_sdbrcm_bus_txctl,
3886         .rxctl = brcmf_sdbrcm_bus_rxctl,
3887         .gettxq = brcmf_sdbrcm_bus_gettxq,
3888 };
3889
3890 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3891 {
3892         int ret;
3893         struct brcmf_sdio *bus;
3894         struct brcmf_bus_dcmd *dlst;
3895         u32 dngl_txglom;
3896         u32 txglomalign = 0;
3897         u8 idx;
3898
3899         brcmf_dbg(TRACE, "Enter\n");
3900
3901         /* We make an assumption about address window mappings:
3902          * regsva == SI_ENUM_BASE*/
3903
3904         /* Allocate private bus interface state */
3905         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3906         if (!bus)
3907                 goto fail;
3908
3909         bus->sdiodev = sdiodev;
3910         sdiodev->bus = bus;
3911         skb_queue_head_init(&bus->glom);
3912         bus->txbound = BRCMF_TXBOUND;
3913         bus->rxbound = BRCMF_RXBOUND;
3914         bus->txminmax = BRCMF_TXMINMAX;
3915         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3916
3917         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3918         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3919         if (bus->brcmf_wq == NULL) {
3920                 brcmf_err("insufficient memory to create txworkqueue\n");
3921                 goto fail;
3922         }
3923
3924         /* attempt to attach to the dongle */
3925         if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3926                 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3927                 goto fail;
3928         }
3929
3930         spin_lock_init(&bus->rxctl_lock);
3931         spin_lock_init(&bus->txqlock);
3932         init_waitqueue_head(&bus->ctrl_wait);
3933         init_waitqueue_head(&bus->dcmd_resp_wait);
3934
3935         /* Set up the watchdog timer */
3936         init_timer(&bus->timer);
3937         bus->timer.data = (unsigned long)bus;
3938         bus->timer.function = brcmf_sdbrcm_watchdog;
3939
3940         /* Initialize watchdog thread */
3941         init_completion(&bus->watchdog_wait);
3942         bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3943                                         bus, "brcmf_watchdog");
3944         if (IS_ERR(bus->watchdog_tsk)) {
3945                 pr_warn("brcmf_watchdog thread failed to start\n");
3946                 bus->watchdog_tsk = NULL;
3947         }
3948         /* Initialize DPC thread */
3949         atomic_set(&bus->dpc_tskcnt, 0);
3950
3951         /* Assign bus interface call back */
3952         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3953         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3954         bus->sdiodev->bus_if->chip = bus->ci->chip;
3955         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3956
3957         /* default sdio bus header length for tx packet */
3958         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3959
3960         /* Attach to the common layer, reserve hdr space */
3961         ret = brcmf_attach(bus->tx_hdrlen, bus->sdiodev->dev);
3962         if (ret != 0) {
3963                 brcmf_err("brcmf_attach failed\n");
3964                 goto fail;
3965         }
3966
3967         /* Allocate buffers */
3968         if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3969                 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
3970                 goto fail;
3971         }
3972
3973         if (!(brcmf_sdbrcm_probe_init(bus))) {
3974                 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
3975                 goto fail;
3976         }
3977
3978         brcmf_sdio_debugfs_create(bus);
3979         brcmf_dbg(INFO, "completed!!\n");
3980
3981         /* sdio bus core specific dcmd */
3982         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3983         dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
3984         if (dlst) {
3985                 if (bus->ci->c_inf[idx].rev < 12) {
3986                         /* for sdio core rev < 12, disable txgloming */
3987                         dngl_txglom = 0;
3988                         dlst->name = "bus:txglom";
3989                         dlst->param = (char *)&dngl_txglom;
3990                         dlst->param_len = sizeof(u32);
3991                 } else {
3992                         /* otherwise, set txglomalign */
3993                         if (sdiodev->pdata)
3994                                 txglomalign = sdiodev->pdata->sd_sgentry_align;
3995                         /* SDIO ADMA requires at least 32 bit alignment */
3996                         if (txglomalign < 4)
3997                                 txglomalign = 4;
3998                         dlst->name = "bus:txglomalign";
3999                         dlst->param = (char *)&txglomalign;
4000                         dlst->param_len = sizeof(u32);
4001                 }
4002                 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4003         }
4004
4005         /* if firmware path present try to download and bring up bus */
4006         ret = brcmf_bus_start(bus->sdiodev->dev);
4007         if (ret != 0) {
4008                 brcmf_err("dongle is not responding\n");
4009                 goto fail;
4010         }
4011
4012         return bus;
4013
4014 fail:
4015         brcmf_sdbrcm_release(bus);
4016         return NULL;
4017 }
4018
4019 void brcmf_sdbrcm_disconnect(void *ptr)
4020 {
4021         struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4022
4023         brcmf_dbg(TRACE, "Enter\n");
4024
4025         if (bus)
4026                 brcmf_sdbrcm_release(bus);
4027
4028         brcmf_dbg(TRACE, "Disconnected\n");
4029 }
4030
4031 void
4032 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4033 {
4034         /* Totally stop the timer */
4035         if (!wdtick && bus->wd_timer_valid) {
4036                 del_timer_sync(&bus->timer);
4037                 bus->wd_timer_valid = false;
4038                 bus->save_ms = wdtick;
4039                 return;
4040         }
4041
4042         /* don't start the wd until fw is loaded */
4043         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4044                 return;
4045
4046         if (wdtick) {
4047                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4048                         if (bus->wd_timer_valid)
4049                                 /* Stop timer and restart at new value */
4050                                 del_timer_sync(&bus->timer);
4051
4052                         /* Create timer again when watchdog period is
4053                            dynamically changed or in the first instance
4054                          */
4055                         bus->timer.expires =
4056                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4057                         add_timer(&bus->timer);
4058
4059                 } else {
4060                         /* Re arm the timer, at last watchdog period */
4061                         mod_timer(&bus->timer,
4062                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4063                 }
4064
4065                 bus->wd_timer_valid = true;
4066                 bus->save_ms = wdtick;
4067         }
4068 }