2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <linux/moduleparam.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
99 #include "tracepoint.h"
101 #define TXQLEN 2048 /* bulk tx queue length */
102 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
103 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
106 #define TXRETRIES 2 /* # of retries for tx frames */
108 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
111 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
114 #define BRCMF_DEFAULT_TXGLOM_SIZE 32 /* max tx frames in glom chain */
116 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
118 #define MEMBLOCK 2048 /* Block size used for downloading
120 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
121 biggest possible glom */
123 #define BRCMF_FIRSTREAD (1 << 6)
126 /* SBSDIO_DEVICE_CTL */
128 /* 1: device will assert busy signal when receiving CMD53 */
129 #define SBSDIO_DEVCTL_SETBUSY 0x01
130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
133 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
135 * sdio bus power cycle to clear (rev 9) */
136 #define SBSDIO_DEVCTL_PADS_ISO 0x08
137 /* Force SD->SB reset mapping (rev 11) */
138 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
139 /* Determined by CoreControl bit */
140 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
141 /* Force backplane reset */
142 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
143 /* Force no backplane reset */
144 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
146 /* direct(mapped) cis space */
148 /* MAPPED common CIS address */
149 #define SBSDIO_CIS_BASE_COMMON 0x1000
150 /* maximum bytes in one CIS */
151 #define SBSDIO_CIS_SIZE_LIMIT 0x200
152 /* cis offset addr is < 17 bits */
153 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
155 /* manfid tuple length, include tuple, link bytes */
156 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
159 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
160 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
161 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
162 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
163 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
164 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
165 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
166 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
167 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
168 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
169 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
170 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
171 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
172 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
173 #define I_PC (1 << 10) /* descriptor error */
174 #define I_PD (1 << 11) /* data error */
175 #define I_DE (1 << 12) /* Descriptor protocol Error */
176 #define I_RU (1 << 13) /* Receive descriptor Underflow */
177 #define I_RO (1 << 14) /* Receive fifo Overflow */
178 #define I_XU (1 << 15) /* Transmit fifo Underflow */
179 #define I_RI (1 << 16) /* Receive Interrupt */
180 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
181 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
182 #define I_XI (1 << 24) /* Transmit Interrupt */
183 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
184 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
185 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
186 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
187 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
188 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
189 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
190 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
191 #define I_DMA (I_RI | I_XI | I_ERRORS)
194 #define CC_CISRDY (1 << 0) /* CIS Ready */
195 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
196 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
197 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
198 #define CC_XMTDATAAVAIL_MODE (1 << 4)
199 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
202 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
203 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
204 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
205 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
208 * Software allocation of To SB Mailbox resources
211 /* tosbmailbox bits corresponding to intstatus bits */
212 #define SMB_NAK (1 << 0) /* Frame NAK */
213 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
214 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
215 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
217 /* tosbmailboxdata */
218 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
221 * Software allocation of To Host Mailbox resources
225 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
226 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
227 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
228 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
230 /* tohostmailboxdata */
231 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
232 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
233 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
234 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
236 #define HMB_DATA_FCDATA_MASK 0xff000000
237 #define HMB_DATA_FCDATA_SHIFT 24
239 #define HMB_DATA_VERSION_MASK 0x00ff0000
240 #define HMB_DATA_VERSION_SHIFT 16
243 * Software-defined protocol header
246 /* Current protocol version */
247 #define SDPCM_PROT_VERSION 4
250 * Shared structure between dongle and the host.
251 * The structure contains pointers to trap or assert information.
253 #define SDPCM_SHARED_VERSION 0x0003
254 #define SDPCM_SHARED_VERSION_MASK 0x00FF
255 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
256 #define SDPCM_SHARED_ASSERT 0x0200
257 #define SDPCM_SHARED_TRAP 0x0400
259 /* Space for header read, limit for data packets */
260 #define MAX_HDR_READ (1 << 6)
261 #define MAX_RX_DATASZ 2048
263 /* Bump up limit on waiting for HT to account for first startup;
264 * if the image is doing a CRC calculation before programming the PMU
265 * for HT availability, it could take a couple hundred ms more, so
266 * max out at a 1 second (1000000us).
268 #undef PMU_MAX_TRANSITION_DLY
269 #define PMU_MAX_TRANSITION_DLY 1000000
271 /* Value for ChipClockCSR during initial setup */
272 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
273 SBSDIO_ALP_AVAIL_REQ)
275 /* Flags for SDH calls */
276 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
278 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
279 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
282 #define BRCMF_IDLE_INTERVAL 1
284 #define KSO_WAIT_US 50
285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
288 * Conversion of 802.1D priority to precedence level
290 static uint prio2prec(u32 prio)
292 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
297 /* Device console log buffer state */
298 struct brcmf_console {
299 uint count; /* Poll interval msec counter */
300 uint log_addr; /* Log struct address (fixed) */
301 struct rte_log_le log_le; /* Log struct (host copy) */
302 uint bufsize; /* Size of log buffer */
303 u8 *buf; /* Log buffer (host copy) */
304 uint last; /* Last buffer read index */
307 struct brcmf_trap_info {
321 __le32 r9; /* sb/v6 */
322 __le32 r10; /* sl/v7 */
323 __le32 r11; /* fp/v8 */
331 struct sdpcm_shared {
335 u32 assert_file_addr;
337 u32 console_addr; /* Address of struct rte_console */
343 struct sdpcm_shared_le {
346 __le32 assert_exp_addr;
347 __le32 assert_file_addr;
349 __le32 console_addr; /* Address of struct rte_console */
350 __le32 msgtrace_addr;
355 /* dongle SDIO bus specific header info */
356 struct brcmf_sdio_hdrinfo {
367 /* misc chip info needed by some of the routines */
368 /* Private data for SDIO bus interaction */
370 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
371 struct chip_info *ci; /* Chip info struct */
372 char *vars; /* Variables (from CIS and/or other) */
373 uint varsz; /* Size of variables buffer */
375 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
377 u32 hostintmask; /* Copy of Host Interrupt Mask */
378 atomic_t intstatus; /* Intstatus bits (events) pending */
379 atomic_t fcstate; /* State of dongle flow-control */
381 uint blocksize; /* Block size of SDIO transfers */
382 uint roundup; /* Max roundup limit */
384 struct pktq txq; /* Queue length used for flow-control */
385 u8 flowcontrol; /* per prio flow control bitmask */
386 u8 tx_seq; /* Transmit sequence number (next) */
387 u8 tx_max; /* Maximum transmit sequence allowed */
389 u8 *hdrbuf; /* buffer for handling rx frame */
390 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
391 u8 rx_seq; /* Receive sequence number (expected) */
392 struct brcmf_sdio_hdrinfo cur_read;
393 /* info of current read frame */
394 bool rxskip; /* Skip receive (awaiting NAK ACK) */
395 bool rxpending; /* Data frame pending in dongle */
397 uint rxbound; /* Rx frames to read before resched */
398 uint txbound; /* Tx frames to send before resched */
401 struct sk_buff *glomd; /* Packet containing glomming descriptor */
402 struct sk_buff_head glom; /* Packet list for glommed superframe */
403 uint glomerr; /* Glom packet read errors */
405 u8 *rxbuf; /* Buffer for receiving control packets */
406 uint rxblen; /* Allocated length of rxbuf */
407 u8 *rxctl; /* Aligned pointer into rxbuf */
408 u8 *rxctl_orig; /* pointer for freeing rxctl */
409 uint rxlen; /* Length of valid data in buffer */
410 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
412 u8 sdpcm_ver; /* Bus protocol reported by dongle */
414 bool intr; /* Use interrupts */
415 bool poll; /* Use polling */
416 atomic_t ipend; /* Device interrupt is pending */
417 uint spurious; /* Count of spurious interrupts */
418 uint pollrate; /* Ticks between device polls */
419 uint polltick; /* Tick counter */
422 uint console_interval;
423 struct brcmf_console console; /* Console output polling support */
424 uint console_addr; /* Console address from shared struct */
427 uint clkstate; /* State of sd and backplane clock(s) */
428 bool activity; /* Activity flag for clock down */
429 s32 idletime; /* Control for activity timeout */
430 s32 idlecount; /* Activity timeout counter */
431 s32 idleclock; /* How to set bus driver when idle */
432 bool rxflow_mode; /* Rx flow control mode */
433 bool rxflow; /* Is rx flow control on */
434 bool alp_only; /* Don't use HT clock (ALP only) */
438 bool ctrl_frame_stat;
441 wait_queue_head_t ctrl_wait;
442 wait_queue_head_t dcmd_resp_wait;
444 struct timer_list timer;
445 struct completion watchdog_wait;
446 struct task_struct *watchdog_tsk;
450 struct workqueue_struct *brcmf_wq;
451 struct work_struct datawork;
454 bool txoff; /* Transmit flow-controlled */
455 struct brcmf_sdio_count sdcnt;
456 bool sr_enabled; /* SaveRestore enabled */
457 bool sleeping; /* SDIO bus sleeping */
459 u8 tx_hdrlen; /* sdio bus header length for tx packet */
460 bool txglom; /* host tx glomming enable flag */
461 struct sk_buff *txglom_sgpad; /* scatter-gather padding buffer */
462 u16 head_align; /* buffer pointer alignment */
463 u16 sgentry_align; /* scatter-gather buffer alignment */
469 #define CLK_PENDING 2
473 static int qcount[NUMPRIO];
476 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
478 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
480 /* Retry count for register access failures */
481 static const uint retry_limit = 2;
483 /* Limit on rounding up frames */
484 static const uint max_roundup = 512;
488 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
489 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
490 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
492 enum brcmf_sdio_frmtype {
493 BRCMF_SDIO_FT_NORMAL,
498 #define BCM43143_FIRMWARE_NAME "brcm/brcmfmac43143-sdio.bin"
499 #define BCM43143_NVRAM_NAME "brcm/brcmfmac43143-sdio.txt"
500 #define BCM43241B0_FIRMWARE_NAME "brcm/brcmfmac43241b0-sdio.bin"
501 #define BCM43241B0_NVRAM_NAME "brcm/brcmfmac43241b0-sdio.txt"
502 #define BCM43241B4_FIRMWARE_NAME "brcm/brcmfmac43241b4-sdio.bin"
503 #define BCM43241B4_NVRAM_NAME "brcm/brcmfmac43241b4-sdio.txt"
504 #define BCM4329_FIRMWARE_NAME "brcm/brcmfmac4329-sdio.bin"
505 #define BCM4329_NVRAM_NAME "brcm/brcmfmac4329-sdio.txt"
506 #define BCM4330_FIRMWARE_NAME "brcm/brcmfmac4330-sdio.bin"
507 #define BCM4330_NVRAM_NAME "brcm/brcmfmac4330-sdio.txt"
508 #define BCM4334_FIRMWARE_NAME "brcm/brcmfmac4334-sdio.bin"
509 #define BCM4334_NVRAM_NAME "brcm/brcmfmac4334-sdio.txt"
510 #define BCM4335_FIRMWARE_NAME "brcm/brcmfmac4335-sdio.bin"
511 #define BCM4335_NVRAM_NAME "brcm/brcmfmac4335-sdio.txt"
512 #define BCM43362_FIRMWARE_NAME "brcm/brcmfmac43362-sdio.bin"
513 #define BCM43362_NVRAM_NAME "brcm/brcmfmac43362-sdio.txt"
514 #define BCM4339_FIRMWARE_NAME "brcm/brcmfmac4339-sdio.bin"
515 #define BCM4339_NVRAM_NAME "brcm/brcmfmac4339-sdio.txt"
517 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
518 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
519 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
520 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
521 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
522 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
523 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
524 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
525 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
526 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
527 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
528 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
529 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
530 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
531 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
532 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
533 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
534 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
536 struct brcmf_firmware_names {
543 enum brcmf_firmware_type {
548 #define BRCMF_FIRMWARE_NVRAM(name) \
549 name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
551 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
552 { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
553 { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
554 { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
555 { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
556 { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
557 { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
558 { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
559 { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
560 { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
564 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
565 enum brcmf_firmware_type type)
567 const struct firmware *fw;
571 for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
572 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
573 brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
575 case BRCMF_FIRMWARE_BIN:
576 name = brcmf_fwname_data[i].bin;
578 case BRCMF_FIRMWARE_NVRAM:
579 name = brcmf_fwname_data[i].nv;
582 brcmf_err("invalid firmware type (%d)\n", type);
588 brcmf_err("Unknown chipid %d [%d]\n",
589 bus->ci->chip, bus->ci->chiprev);
593 err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
594 if ((err) || (!fw)) {
595 brcmf_err("fail to request firmware %s (%d)\n", name, err);
602 static void pkt_align(struct sk_buff *p, int len, int align)
605 datalign = (unsigned long)(p->data);
606 datalign = roundup(datalign, (align)) - datalign;
608 skb_pull(p, datalign);
612 /* To check if there's window offered */
613 static bool data_ok(struct brcmf_sdio *bus)
615 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
616 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
620 * Reads a register in the SDIO hardware block. This block occupies a series of
621 * adresses on the 32 bit backplane bus.
624 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
626 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
629 *regvar = brcmf_sdiod_regrl(bus->sdiodev,
630 bus->ci->c_inf[idx].base + offset, &ret);
636 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
638 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
641 brcmf_sdiod_regwl(bus->sdiodev,
642 bus->ci->c_inf[idx].base + reg_offset,
649 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
651 u8 wr_val = 0, rd_val, cmp_val, bmask;
655 brcmf_dbg(TRACE, "Enter\n");
657 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
658 /* 1st KSO write goes to AOS wake up core if device is asleep */
659 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
662 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
667 /* device WAKEUP through KSO:
668 * write bit 0 & read back until
669 * both bits 0 (kso bit) & 1 (dev on status) are set
671 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
672 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
674 usleep_range(2000, 3000);
676 /* Put device to sleep, turn off KSO */
678 /* only check for bit0, bit1(dev on status) may not
679 * get cleared right away
681 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
685 /* reliable KSO bit set/clr:
686 * the sdiod sleep write access is synced to PMU 32khz clk
687 * just one write attempt may fail,
688 * read it back until it matches written value
690 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
692 if (((rd_val & bmask) == cmp_val) && !err)
694 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
695 try_cnt, MAX_KSO_ATTEMPTS, err);
697 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
699 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
704 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
706 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
708 /* Turn backplane clock on or off */
709 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
712 u8 clkctl, clkreq, devctl;
713 unsigned long timeout;
715 brcmf_dbg(SDIO, "Enter\n");
719 if (bus->sr_enabled) {
720 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
725 /* Request HT Avail */
727 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
729 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
732 brcmf_err("HT Avail request error: %d\n", err);
736 /* Check current status */
737 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
738 SBSDIO_FUNC1_CHIPCLKCSR, &err);
740 brcmf_err("HT Avail read error: %d\n", err);
744 /* Go to pending and await interrupt if appropriate */
745 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
746 /* Allow only clock-available interrupt */
747 devctl = brcmf_sdiod_regrb(bus->sdiodev,
748 SBSDIO_DEVICE_CTL, &err);
750 brcmf_err("Devctl error setting CA: %d\n",
755 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
756 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
758 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
759 bus->clkstate = CLK_PENDING;
762 } else if (bus->clkstate == CLK_PENDING) {
763 /* Cancel CA-only interrupt filter */
764 devctl = brcmf_sdiod_regrb(bus->sdiodev,
765 SBSDIO_DEVICE_CTL, &err);
766 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
767 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
771 /* Otherwise, wait here (polling) for HT Avail */
773 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
774 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
775 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
776 SBSDIO_FUNC1_CHIPCLKCSR,
778 if (time_after(jiffies, timeout))
781 usleep_range(5000, 10000);
784 brcmf_err("HT Avail request error: %d\n", err);
787 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
788 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
789 PMU_MAX_TRANSITION_DLY, clkctl);
793 /* Mark clock available */
794 bus->clkstate = CLK_AVAIL;
795 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
798 if (!bus->alp_only) {
799 if (SBSDIO_ALPONLY(clkctl))
800 brcmf_err("HT Clock should be on\n");
802 #endif /* defined (DEBUG) */
804 bus->activity = true;
808 if (bus->clkstate == CLK_PENDING) {
809 /* Cancel CA-only interrupt filter */
810 devctl = brcmf_sdiod_regrb(bus->sdiodev,
811 SBSDIO_DEVICE_CTL, &err);
812 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
813 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
817 bus->clkstate = CLK_SDONLY;
818 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
820 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
822 brcmf_err("Failed access turning clock off: %d\n",
830 /* Change idle/active SD state */
831 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
833 brcmf_dbg(SDIO, "Enter\n");
836 bus->clkstate = CLK_SDONLY;
838 bus->clkstate = CLK_NONE;
843 /* Transition SD and backplane clock readiness */
844 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
847 uint oldstate = bus->clkstate;
850 brcmf_dbg(SDIO, "Enter\n");
852 /* Early exit if we're already there */
853 if (bus->clkstate == target) {
854 if (target == CLK_AVAIL) {
855 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
856 bus->activity = true;
863 /* Make sure SD clock is available */
864 if (bus->clkstate == CLK_NONE)
865 brcmf_sdio_sdclk(bus, true);
866 /* Now request HT Avail on the backplane */
867 brcmf_sdio_htclk(bus, true, pendok);
868 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
869 bus->activity = true;
873 /* Remove HT request, or bring up SD clock */
874 if (bus->clkstate == CLK_NONE)
875 brcmf_sdio_sdclk(bus, true);
876 else if (bus->clkstate == CLK_AVAIL)
877 brcmf_sdio_htclk(bus, false, false);
879 brcmf_err("request for %d -> %d\n",
880 bus->clkstate, target);
881 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
885 /* Make sure to remove HT request */
886 if (bus->clkstate == CLK_AVAIL)
887 brcmf_sdio_htclk(bus, false, false);
888 /* Now remove the SD clock */
889 brcmf_sdio_sdclk(bus, false);
890 brcmf_sdio_wd_timer(bus, 0);
894 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
901 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
904 brcmf_dbg(TRACE, "Enter\n");
905 brcmf_dbg(SDIO, "request %s currently %s\n",
906 (sleep ? "SLEEP" : "WAKE"),
907 (bus->sleeping ? "SLEEP" : "WAKE"));
909 /* If SR is enabled control bus state with KSO */
910 if (bus->sr_enabled) {
911 /* Done if we're already in the requested state */
912 if (sleep == bus->sleeping)
917 /* Don't sleep if something is pending */
918 if (atomic_read(&bus->intstatus) ||
919 atomic_read(&bus->ipend) > 0 ||
920 (!atomic_read(&bus->fcstate) &&
921 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
924 err = brcmf_sdio_kso_control(bus, false);
925 /* disable watchdog */
927 brcmf_sdio_wd_timer(bus, 0);
930 err = brcmf_sdio_kso_control(bus, true);
934 bus->sleeping = sleep;
935 brcmf_dbg(SDIO, "new state %s\n",
936 (sleep ? "SLEEP" : "WAKE"));
938 brcmf_err("error while changing bus sleep state %d\n",
947 if (!bus->sr_enabled)
948 brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
950 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
957 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
964 brcmf_dbg(SDIO, "Enter\n");
966 /* Read mailbox data and ack that we did so */
967 ret = r_sdreg32(bus, &hmb_data,
968 offsetof(struct sdpcmd_regs, tohostmailboxdata));
971 w_sdreg32(bus, SMB_INT_ACK,
972 offsetof(struct sdpcmd_regs, tosbmailbox));
973 bus->sdcnt.f1regdata += 2;
975 /* Dongle recomposed rx frames, accept them again */
976 if (hmb_data & HMB_DATA_NAKHANDLED) {
977 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
980 brcmf_err("unexpected NAKHANDLED!\n");
983 intstatus |= I_HMB_FRAME_IND;
987 * DEVREADY does not occur with gSPI.
989 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
991 (hmb_data & HMB_DATA_VERSION_MASK) >>
992 HMB_DATA_VERSION_SHIFT;
993 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
994 brcmf_err("Version mismatch, dongle reports %d, "
996 bus->sdpcm_ver, SDPCM_PROT_VERSION);
998 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1003 * Flow Control has been moved into the RX headers and this out of band
1004 * method isn't used any more.
1005 * remaining backward compatible with older dongles.
1007 if (hmb_data & HMB_DATA_FC) {
1008 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1009 HMB_DATA_FCDATA_SHIFT;
1011 if (fcbits & ~bus->flowcontrol)
1012 bus->sdcnt.fc_xoff++;
1014 if (bus->flowcontrol & ~fcbits)
1015 bus->sdcnt.fc_xon++;
1017 bus->sdcnt.fc_rcvd++;
1018 bus->flowcontrol = fcbits;
1021 /* Shouldn't be any others */
1022 if (hmb_data & ~(HMB_DATA_DEVREADY |
1023 HMB_DATA_NAKHANDLED |
1026 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1027 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1033 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1040 brcmf_err("%sterminate frame%s\n",
1041 abort ? "abort command, " : "",
1042 rtx ? ", send NAK" : "");
1045 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1047 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1049 bus->sdcnt.f1regdata++;
1051 /* Wait until the packet has been flushed (device/FIFO stable) */
1052 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1053 hi = brcmf_sdiod_regrb(bus->sdiodev,
1054 SBSDIO_FUNC1_RFRAMEBCHI, &err);
1055 lo = brcmf_sdiod_regrb(bus->sdiodev,
1056 SBSDIO_FUNC1_RFRAMEBCLO, &err);
1057 bus->sdcnt.f1regdata += 2;
1059 if ((hi == 0) && (lo == 0))
1062 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1063 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1064 lastrbc, (hi << 8) + lo);
1066 lastrbc = (hi << 8) + lo;
1070 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1072 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1076 err = w_sdreg32(bus, SMB_NAK,
1077 offsetof(struct sdpcmd_regs, tosbmailbox));
1079 bus->sdcnt.f1regdata++;
1084 /* Clear partial in any case */
1085 bus->cur_read.len = 0;
1087 /* If we can't reach the device, signal failure */
1089 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1092 /* return total length of buffer chain */
1093 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1099 skb_queue_walk(&bus->glom, p)
1104 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1106 struct sk_buff *cur, *next;
1108 skb_queue_walk_safe(&bus->glom, cur, next) {
1109 skb_unlink(cur, &bus->glom);
1110 brcmu_pkt_buf_free_skb(cur);
1115 * brcmfmac sdio bus specific header
1116 * This is the lowest layer header wrapped on the packets transmitted between
1117 * host and WiFi dongle which contains information needed for SDIO core and
1120 * It consists of 3 parts: hardware header, hardware extension header and
1122 * hardware header (frame tag) - 4 bytes
1123 * Byte 0~1: Frame length
1124 * Byte 2~3: Checksum, bit-wise inverse of frame length
1125 * hardware extension header - 8 bytes
1126 * Tx glom mode only, N/A for Rx or normal Tx
1127 * Byte 0~1: Packet length excluding hw frame tag
1129 * Byte 3: Frame flags, bit 0: last frame indication
1130 * Byte 4~5: Reserved
1131 * Byte 6~7: Tail padding length
1132 * software header - 8 bytes
1133 * Byte 0: Rx/Tx sequence number
1134 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1135 * Byte 2: Length of next data frame, reserved for Tx
1136 * Byte 3: Data offset
1137 * Byte 4: Flow control bits, reserved for Tx
1138 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1139 * Byte 6~7: Reserved
1141 #define SDPCM_HWHDR_LEN 4
1142 #define SDPCM_HWEXT_LEN 8
1143 #define SDPCM_SWHDR_LEN 8
1144 #define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1145 /* software header */
1146 #define SDPCM_SEQ_MASK 0x000000ff
1147 #define SDPCM_SEQ_WRAP 256
1148 #define SDPCM_CHANNEL_MASK 0x00000f00
1149 #define SDPCM_CHANNEL_SHIFT 8
1150 #define SDPCM_CONTROL_CHANNEL 0 /* Control */
1151 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication */
1152 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv */
1153 #define SDPCM_GLOM_CHANNEL 3 /* Coalesced packets */
1154 #define SDPCM_TEST_CHANNEL 15 /* Test/debug packets */
1155 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1156 #define SDPCM_NEXTLEN_MASK 0x00ff0000
1157 #define SDPCM_NEXTLEN_SHIFT 16
1158 #define SDPCM_DOFFSET_MASK 0xff000000
1159 #define SDPCM_DOFFSET_SHIFT 24
1160 #define SDPCM_FCMASK_MASK 0x000000ff
1161 #define SDPCM_WINDOW_MASK 0x0000ff00
1162 #define SDPCM_WINDOW_SHIFT 8
1164 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1167 hdrvalue = *(u32 *)swheader;
1168 return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1171 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1172 struct brcmf_sdio_hdrinfo *rd,
1173 enum brcmf_sdio_frmtype type)
1176 u8 rx_seq, fc, tx_seq_max;
1179 trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1182 len = get_unaligned_le16(header);
1183 checksum = get_unaligned_le16(header + sizeof(u16));
1184 /* All zero means no more to read */
1185 if (!(len | checksum)) {
1186 bus->rxpending = false;
1189 if ((u16)(~(len ^ checksum))) {
1190 brcmf_err("HW header checksum error\n");
1191 bus->sdcnt.rx_badhdr++;
1192 brcmf_sdio_rxfail(bus, false, false);
1195 if (len < SDPCM_HDRLEN) {
1196 brcmf_err("HW header length error\n");
1199 if (type == BRCMF_SDIO_FT_SUPER &&
1200 (roundup(len, bus->blocksize) != rd->len)) {
1201 brcmf_err("HW superframe header length error\n");
1204 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1205 brcmf_err("HW subframe header length error\n");
1210 /* software header */
1211 header += SDPCM_HWHDR_LEN;
1212 swheader = le32_to_cpu(*(__le32 *)header);
1213 if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1214 brcmf_err("Glom descriptor found in superframe head\n");
1218 rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1219 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1220 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1221 type != BRCMF_SDIO_FT_SUPER) {
1222 brcmf_err("HW header length too long\n");
1223 bus->sdcnt.rx_toolong++;
1224 brcmf_sdio_rxfail(bus, false, false);
1228 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1229 brcmf_err("Wrong channel for superframe\n");
1233 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1234 rd->channel != SDPCM_EVENT_CHANNEL) {
1235 brcmf_err("Wrong channel for subframe\n");
1239 rd->dat_offset = brcmf_sdio_getdatoffset(header);
1240 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1241 brcmf_err("seq %d: bad data offset\n", rx_seq);
1242 bus->sdcnt.rx_badhdr++;
1243 brcmf_sdio_rxfail(bus, false, false);
1247 if (rd->seq_num != rx_seq) {
1248 brcmf_err("seq %d: sequence number error, expect %d\n",
1249 rx_seq, rd->seq_num);
1250 bus->sdcnt.rx_badseq++;
1251 rd->seq_num = rx_seq;
1253 /* no need to check the reset for subframe */
1254 if (type == BRCMF_SDIO_FT_SUB)
1256 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1257 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1258 /* only warm for NON glom packet */
1259 if (rd->channel != SDPCM_GLOM_CHANNEL)
1260 brcmf_err("seq %d: next length error\n", rx_seq);
1263 swheader = le32_to_cpu(*(__le32 *)(header + 4));
1264 fc = swheader & SDPCM_FCMASK_MASK;
1265 if (bus->flowcontrol != fc) {
1266 if (~bus->flowcontrol & fc)
1267 bus->sdcnt.fc_xoff++;
1268 if (bus->flowcontrol & ~fc)
1269 bus->sdcnt.fc_xon++;
1270 bus->sdcnt.fc_rcvd++;
1271 bus->flowcontrol = fc;
1273 tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1274 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1275 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1276 tx_seq_max = bus->tx_seq + 2;
1278 bus->tx_max = tx_seq_max;
1283 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1285 *(__le16 *)header = cpu_to_le16(frm_length);
1286 *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1289 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1290 struct brcmf_sdio_hdrinfo *hd_info)
1295 brcmf_sdio_update_hwhdr(header, hd_info->len);
1296 hdr_offset = SDPCM_HWHDR_LEN;
1299 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1300 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1301 hdrval = (u16)hd_info->tail_pad << 16;
1302 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1303 hdr_offset += SDPCM_HWEXT_LEN;
1306 hdrval = hd_info->seq_num;
1307 hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1309 hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1311 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1312 *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1313 trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1316 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1321 struct sk_buff *pfirst, *pnext;
1326 struct brcmf_sdio_hdrinfo rd_new;
1328 /* If packets, issue read(s) and send up packet chain */
1329 /* Return sequence numbers consumed? */
1331 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1332 bus->glomd, skb_peek(&bus->glom));
1334 /* If there's a descriptor, generate the packet chain */
1336 pfirst = pnext = NULL;
1337 dlen = (u16) (bus->glomd->len);
1338 dptr = bus->glomd->data;
1339 if (!dlen || (dlen & 1)) {
1340 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1345 for (totlen = num = 0; dlen; num++) {
1346 /* Get (and move past) next length */
1347 sublen = get_unaligned_le16(dptr);
1348 dlen -= sizeof(u16);
1349 dptr += sizeof(u16);
1350 if ((sublen < SDPCM_HDRLEN) ||
1351 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1352 brcmf_err("descriptor len %d bad: %d\n",
1357 if (sublen % bus->sgentry_align) {
1358 brcmf_err("sublen %d not multiple of %d\n",
1359 sublen, bus->sgentry_align);
1363 /* For last frame, adjust read len so total
1364 is a block multiple */
1367 (roundup(totlen, bus->blocksize) - totlen);
1368 totlen = roundup(totlen, bus->blocksize);
1371 /* Allocate/chain packet for next subframe */
1372 pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1373 if (pnext == NULL) {
1374 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1378 skb_queue_tail(&bus->glom, pnext);
1380 /* Adhere to start alignment requirements */
1381 pkt_align(pnext, sublen, bus->sgentry_align);
1384 /* If all allocations succeeded, save packet chain
1387 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1389 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1390 totlen != bus->cur_read.len) {
1391 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1392 bus->cur_read.len, totlen, rxseq);
1394 pfirst = pnext = NULL;
1396 brcmf_sdio_free_glom(bus);
1400 /* Done with descriptor packet */
1401 brcmu_pkt_buf_free_skb(bus->glomd);
1403 bus->cur_read.len = 0;
1406 /* Ok -- either we just generated a packet chain,
1407 or had one from before */
1408 if (!skb_queue_empty(&bus->glom)) {
1409 if (BRCMF_GLOM_ON()) {
1410 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1411 skb_queue_walk(&bus->glom, pnext) {
1412 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1413 pnext, (u8 *) (pnext->data),
1414 pnext->len, pnext->len);
1418 pfirst = skb_peek(&bus->glom);
1419 dlen = (u16) brcmf_sdio_glom_len(bus);
1421 /* Do an SDIO read for the superframe. Configurable iovar to
1422 * read directly into the chained packet, or allocate a large
1423 * packet and and copy into the chain.
1425 sdio_claim_host(bus->sdiodev->func[1]);
1426 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1428 sdio_release_host(bus->sdiodev->func[1]);
1429 bus->sdcnt.f2rxdata++;
1431 /* On failure, kill the superframe, allow a couple retries */
1433 brcmf_err("glom read of %d bytes failed: %d\n",
1436 sdio_claim_host(bus->sdiodev->func[1]);
1437 if (bus->glomerr++ < 3) {
1438 brcmf_sdio_rxfail(bus, true, true);
1441 brcmf_sdio_rxfail(bus, true, false);
1442 bus->sdcnt.rxglomfail++;
1443 brcmf_sdio_free_glom(bus);
1445 sdio_release_host(bus->sdiodev->func[1]);
1449 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1450 pfirst->data, min_t(int, pfirst->len, 48),
1453 rd_new.seq_num = rxseq;
1455 sdio_claim_host(bus->sdiodev->func[1]);
1456 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1457 BRCMF_SDIO_FT_SUPER);
1458 sdio_release_host(bus->sdiodev->func[1]);
1459 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1461 /* Remove superframe header, remember offset */
1462 skb_pull(pfirst, rd_new.dat_offset);
1463 sfdoff = rd_new.dat_offset;
1466 /* Validate all the subframe headers */
1467 skb_queue_walk(&bus->glom, pnext) {
1468 /* leave when invalid subframe is found */
1472 rd_new.len = pnext->len;
1473 rd_new.seq_num = rxseq++;
1474 sdio_claim_host(bus->sdiodev->func[1]);
1475 errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1477 sdio_release_host(bus->sdiodev->func[1]);
1478 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1479 pnext->data, 32, "subframe:\n");
1485 /* Terminate frame on error, request
1487 sdio_claim_host(bus->sdiodev->func[1]);
1488 if (bus->glomerr++ < 3) {
1489 /* Restore superframe header space */
1490 skb_push(pfirst, sfdoff);
1491 brcmf_sdio_rxfail(bus, true, true);
1494 brcmf_sdio_rxfail(bus, true, false);
1495 bus->sdcnt.rxglomfail++;
1496 brcmf_sdio_free_glom(bus);
1498 sdio_release_host(bus->sdiodev->func[1]);
1499 bus->cur_read.len = 0;
1503 /* Basic SD framing looks ok - process each packet (header) */
1505 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1506 dptr = (u8 *) (pfirst->data);
1507 sublen = get_unaligned_le16(dptr);
1508 doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1510 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1512 "Rx Subframe Data:\n");
1514 __skb_trim(pfirst, sublen);
1515 skb_pull(pfirst, doff);
1517 if (pfirst->len == 0) {
1518 skb_unlink(pfirst, &bus->glom);
1519 brcmu_pkt_buf_free_skb(pfirst);
1523 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1525 min_t(int, pfirst->len, 32),
1526 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1527 bus->glom.qlen, pfirst, pfirst->data,
1528 pfirst->len, pfirst->next,
1530 skb_unlink(pfirst, &bus->glom);
1531 brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1532 bus->sdcnt.rxglompkts++;
1535 bus->sdcnt.rxglomframes++;
1540 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1543 DECLARE_WAITQUEUE(wait, current);
1544 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1546 /* Wait until control frame is available */
1547 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1548 set_current_state(TASK_INTERRUPTIBLE);
1550 while (!(*condition) && (!signal_pending(current) && timeout))
1551 timeout = schedule_timeout(timeout);
1553 if (signal_pending(current))
1556 set_current_state(TASK_RUNNING);
1557 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1562 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1564 if (waitqueue_active(&bus->dcmd_resp_wait))
1565 wake_up_interruptible(&bus->dcmd_resp_wait);
1570 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1573 u8 *buf = NULL, *rbuf;
1576 brcmf_dbg(TRACE, "Enter\n");
1579 buf = vzalloc(bus->rxblen);
1584 pad = ((unsigned long)rbuf % bus->head_align);
1586 rbuf += (bus->head_align - pad);
1588 /* Copy the already-read portion over */
1589 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1590 if (len <= BRCMF_FIRSTREAD)
1593 /* Raise rdlen to next SDIO block to avoid tail command */
1594 rdlen = len - BRCMF_FIRSTREAD;
1595 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1596 pad = bus->blocksize - (rdlen % bus->blocksize);
1597 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1598 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1600 } else if (rdlen % bus->head_align) {
1601 rdlen += bus->head_align - (rdlen % bus->head_align);
1604 /* Drop if the read is too big or it exceeds our maximum */
1605 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1606 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1607 rdlen, bus->sdiodev->bus_if->maxctl);
1608 brcmf_sdio_rxfail(bus, false, false);
1612 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1613 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1614 len, len - doff, bus->sdiodev->bus_if->maxctl);
1615 bus->sdcnt.rx_toolong++;
1616 brcmf_sdio_rxfail(bus, false, false);
1620 /* Read remain of frame body */
1621 sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1622 bus->sdcnt.f2rxdata++;
1624 /* Control frame failures need retransmission */
1626 brcmf_err("read %d control bytes failed: %d\n",
1628 bus->sdcnt.rxc_errors++;
1629 brcmf_sdio_rxfail(bus, true, true);
1632 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1636 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1637 buf, len, "RxCtrl:\n");
1639 /* Point to valid data and indicate its length */
1640 spin_lock_bh(&bus->rxctl_lock);
1642 brcmf_err("last control frame is being processed.\n");
1643 spin_unlock_bh(&bus->rxctl_lock);
1647 bus->rxctl = buf + doff;
1648 bus->rxctl_orig = buf;
1649 bus->rxlen = len - doff;
1650 spin_unlock_bh(&bus->rxctl_lock);
1653 /* Awake any waiters */
1654 brcmf_sdio_dcmd_resp_wake(bus);
1657 /* Pad read to blocksize for efficiency */
1658 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1660 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1661 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1662 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1663 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1665 } else if (*rdlen % bus->head_align) {
1666 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1670 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1672 struct sk_buff *pkt; /* Packet for event or data frames */
1673 u16 pad; /* Number of pad bytes to read */
1674 uint rxleft = 0; /* Remaining number of frames allowed */
1675 int ret; /* Return code from calls */
1676 uint rxcount = 0; /* Total frames read */
1677 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1680 brcmf_dbg(TRACE, "Enter\n");
1682 /* Not finished unless we encounter no more frames indication */
1683 bus->rxpending = true;
1685 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1686 !bus->rxskip && rxleft &&
1687 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1688 rd->seq_num++, rxleft--) {
1690 /* Handle glomming separately */
1691 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1693 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1694 bus->glomd, skb_peek(&bus->glom));
1695 cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1696 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1697 rd->seq_num += cnt - 1;
1698 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1702 rd->len_left = rd->len;
1703 /* read header first for unknow frame length */
1704 sdio_claim_host(bus->sdiodev->func[1]);
1706 ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1707 bus->rxhdr, BRCMF_FIRSTREAD);
1708 bus->sdcnt.f2rxhdrs++;
1710 brcmf_err("RXHEADER FAILED: %d\n",
1712 bus->sdcnt.rx_hdrfail++;
1713 brcmf_sdio_rxfail(bus, true, true);
1714 sdio_release_host(bus->sdiodev->func[1]);
1718 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1719 bus->rxhdr, SDPCM_HDRLEN,
1722 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1723 BRCMF_SDIO_FT_NORMAL)) {
1724 sdio_release_host(bus->sdiodev->func[1]);
1725 if (!bus->rxpending)
1731 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1732 brcmf_sdio_read_control(bus, bus->rxhdr,
1735 /* prepare the descriptor for the next read */
1736 rd->len = rd->len_nxtfrm << 4;
1738 /* treat all packet as event if we don't know */
1739 rd->channel = SDPCM_EVENT_CHANNEL;
1740 sdio_release_host(bus->sdiodev->func[1]);
1743 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1744 rd->len - BRCMF_FIRSTREAD : 0;
1745 head_read = BRCMF_FIRSTREAD;
1748 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1750 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1753 /* Give up on data, request rtx of events */
1754 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1755 brcmf_sdio_rxfail(bus, false,
1756 RETRYCHAN(rd->channel));
1757 sdio_release_host(bus->sdiodev->func[1]);
1760 skb_pull(pkt, head_read);
1761 pkt_align(pkt, rd->len_left, bus->head_align);
1763 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1764 bus->sdcnt.f2rxdata++;
1765 sdio_release_host(bus->sdiodev->func[1]);
1768 brcmf_err("read %d bytes from channel %d failed: %d\n",
1769 rd->len, rd->channel, ret);
1770 brcmu_pkt_buf_free_skb(pkt);
1771 sdio_claim_host(bus->sdiodev->func[1]);
1772 brcmf_sdio_rxfail(bus, true,
1773 RETRYCHAN(rd->channel));
1774 sdio_release_host(bus->sdiodev->func[1]);
1779 skb_push(pkt, head_read);
1780 memcpy(pkt->data, bus->rxhdr, head_read);
1783 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1784 rd_new.seq_num = rd->seq_num;
1785 sdio_claim_host(bus->sdiodev->func[1]);
1786 if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1787 BRCMF_SDIO_FT_NORMAL)) {
1789 brcmu_pkt_buf_free_skb(pkt);
1791 bus->sdcnt.rx_readahead_cnt++;
1792 if (rd->len != roundup(rd_new.len, 16)) {
1793 brcmf_err("frame length mismatch:read %d, should be %d\n",
1795 roundup(rd_new.len, 16) >> 4);
1797 brcmf_sdio_rxfail(bus, true, true);
1798 sdio_release_host(bus->sdiodev->func[1]);
1799 brcmu_pkt_buf_free_skb(pkt);
1802 sdio_release_host(bus->sdiodev->func[1]);
1803 rd->len_nxtfrm = rd_new.len_nxtfrm;
1804 rd->channel = rd_new.channel;
1805 rd->dat_offset = rd_new.dat_offset;
1807 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1810 bus->rxhdr, SDPCM_HDRLEN,
1813 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1814 brcmf_err("readahead on control packet %d?\n",
1816 /* Force retry w/normal header read */
1818 sdio_claim_host(bus->sdiodev->func[1]);
1819 brcmf_sdio_rxfail(bus, false, true);
1820 sdio_release_host(bus->sdiodev->func[1]);
1821 brcmu_pkt_buf_free_skb(pkt);
1826 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1827 pkt->data, rd->len, "Rx Data:\n");
1829 /* Save superframe descriptor and allocate packet frame */
1830 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1831 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1832 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1834 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1837 __skb_trim(pkt, rd->len);
1838 skb_pull(pkt, SDPCM_HDRLEN);
1841 brcmf_err("%s: glom superframe w/o "
1842 "descriptor!\n", __func__);
1843 sdio_claim_host(bus->sdiodev->func[1]);
1844 brcmf_sdio_rxfail(bus, false, false);
1845 sdio_release_host(bus->sdiodev->func[1]);
1847 /* prepare the descriptor for the next read */
1848 rd->len = rd->len_nxtfrm << 4;
1850 /* treat all packet as event if we don't know */
1851 rd->channel = SDPCM_EVENT_CHANNEL;
1855 /* Fill in packet len and prio, deliver upward */
1856 __skb_trim(pkt, rd->len);
1857 skb_pull(pkt, rd->dat_offset);
1859 /* prepare the descriptor for the next read */
1860 rd->len = rd->len_nxtfrm << 4;
1862 /* treat all packet as event if we don't know */
1863 rd->channel = SDPCM_EVENT_CHANNEL;
1865 if (pkt->len == 0) {
1866 brcmu_pkt_buf_free_skb(pkt);
1870 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1873 rxcount = maxframes - rxleft;
1874 /* Message if we hit the limit */
1876 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1878 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1879 /* Back off rxseq if awaiting rtx, update rx_seq */
1882 bus->rx_seq = rd->seq_num;
1888 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1890 if (waitqueue_active(&bus->ctrl_wait))
1891 wake_up_interruptible(&bus->ctrl_wait);
1895 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1900 dat_buf = (u8 *)(pkt->data);
1902 /* Check head padding */
1903 head_pad = ((unsigned long)dat_buf % bus->head_align);
1905 if (skb_headroom(pkt) < head_pad) {
1906 bus->sdiodev->bus_if->tx_realloc++;
1908 if (skb_cow(pkt, head_pad))
1911 skb_push(pkt, head_pad);
1912 dat_buf = (u8 *)(pkt->data);
1913 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1919 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1922 /* flag marking a dummy skb added for DMA alignment requirement */
1923 #define ALIGN_SKB_FLAG 0x8000
1924 /* bit mask of data length chopped from the previous packet */
1925 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1927 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1928 struct sk_buff_head *pktq,
1929 struct sk_buff *pkt, u16 total_len)
1931 struct brcmf_sdio_dev *sdiodev;
1932 struct sk_buff *pkt_pad;
1933 u16 tail_pad, tail_chop, chain_pad;
1934 unsigned int blksize;
1938 sdiodev = bus->sdiodev;
1939 blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1940 /* sg entry alignment should be a divisor of block size */
1941 WARN_ON(blksize % bus->sgentry_align);
1943 /* Check tail padding */
1944 lastfrm = skb_queue_is_last(pktq, pkt);
1946 tail_chop = pkt->len % bus->sgentry_align;
1948 tail_pad = bus->sgentry_align - tail_chop;
1949 chain_pad = (total_len + tail_pad) % blksize;
1950 if (lastfrm && chain_pad)
1951 tail_pad += blksize - chain_pad;
1952 if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1953 pkt_pad = bus->txglom_sgpad;
1954 if (pkt_pad == NULL)
1955 brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1956 if (pkt_pad == NULL)
1958 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1959 if (unlikely(ret < 0))
1961 memcpy(pkt_pad->data,
1962 pkt->data + pkt->len - tail_chop,
1964 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1965 skb_trim(pkt, pkt->len - tail_chop);
1966 __skb_queue_after(pktq, pkt, pkt_pad);
1968 ntail = pkt->data_len + tail_pad -
1969 (pkt->end - pkt->tail);
1970 if (skb_cloned(pkt) || ntail > 0)
1971 if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1973 if (skb_linearize(pkt))
1975 __skb_put(pkt, tail_pad);
1982 * brcmf_sdio_txpkt_prep - packet preparation for transmit
1983 * @bus: brcmf_sdio structure pointer
1984 * @pktq: packet list pointer
1985 * @chan: virtual channel to transmit the packet
1987 * Processes to be applied to the packet
1988 * - Align data buffer pointer
1989 * - Align data buffer length
1991 * Return: negative value if there is error
1994 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1997 u16 head_pad, total_len;
1998 struct sk_buff *pkt_next;
2001 struct brcmf_sdio_hdrinfo hd_info = {0};
2003 txseq = bus->tx_seq;
2005 skb_queue_walk(pktq, pkt_next) {
2006 /* alignment packet inserted in previous
2007 * loop cycle can be skipped as it is
2008 * already properly aligned and does not
2009 * need an sdpcm header.
2011 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2014 /* align packet data pointer */
2015 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2018 head_pad = (u16)ret;
2020 memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2022 total_len += pkt_next->len;
2024 hd_info.len = pkt_next->len;
2025 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2026 if (bus->txglom && pktq->qlen > 1) {
2027 ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2028 pkt_next, total_len);
2031 hd_info.tail_pad = (u16)ret;
2032 total_len += (u16)ret;
2035 hd_info.channel = chan;
2036 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2037 hd_info.seq_num = txseq++;
2039 /* Now fill the header */
2040 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2042 if (BRCMF_BYTES_ON() &&
2043 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2044 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2045 brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2047 else if (BRCMF_HDRS_ON())
2048 brcmf_dbg_hex_dump(true, pkt_next,
2049 head_pad + bus->tx_hdrlen,
2052 /* Hardware length tag of the first packet should be total
2053 * length of the chain (including padding)
2056 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2061 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2062 * @bus: brcmf_sdio structure pointer
2063 * @pktq: packet list pointer
2065 * Processes to be applied to the packet
2066 * - Remove head padding
2067 * - Remove tail padding
2070 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2075 u32 dummy_flags, chop_len;
2076 struct sk_buff *pkt_next, *tmp, *pkt_prev;
2078 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2079 dummy_flags = *(u32 *)(pkt_next->cb);
2080 if (dummy_flags & ALIGN_SKB_FLAG) {
2081 chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2083 pkt_prev = pkt_next->prev;
2084 skb_put(pkt_prev, chop_len);
2086 __skb_unlink(pkt_next, pktq);
2087 brcmu_pkt_buf_free_skb(pkt_next);
2089 hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2090 dat_offset = le32_to_cpu(*(__le32 *)hdr);
2091 dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2092 SDPCM_DOFFSET_SHIFT;
2093 skb_pull(pkt_next, dat_offset);
2095 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2096 skb_trim(pkt_next, pkt_next->len - tail_pad);
2102 /* Writes a HW/SW header into the packet and sends it. */
2103 /* Assumes: (a) header space already there, (b) caller holds lock */
2104 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2109 struct sk_buff *pkt_next, *tmp;
2111 brcmf_dbg(TRACE, "Enter\n");
2113 ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2117 sdio_claim_host(bus->sdiodev->func[1]);
2118 ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2119 bus->sdcnt.f2txdata++;
2122 /* On failure, abort the command and terminate the frame */
2123 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2125 bus->sdcnt.tx_sderrs++;
2127 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2128 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2130 bus->sdcnt.f1regdata++;
2132 for (i = 0; i < 3; i++) {
2134 hi = brcmf_sdiod_regrb(bus->sdiodev,
2135 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2136 lo = brcmf_sdiod_regrb(bus->sdiodev,
2137 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2138 bus->sdcnt.f1regdata += 2;
2139 if ((hi == 0) && (lo == 0))
2143 sdio_release_host(bus->sdiodev->func[1]);
2146 brcmf_sdio_txpkt_postp(bus, pktq);
2148 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2149 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2150 __skb_unlink(pkt_next, pktq);
2151 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2156 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2158 struct sk_buff *pkt;
2159 struct sk_buff_head pktq;
2161 int ret = 0, prec_out, i;
2163 u8 tx_prec_map, pkt_num;
2165 brcmf_dbg(TRACE, "Enter\n");
2167 tx_prec_map = ~bus->flowcontrol;
2169 /* Send frames until the limit or some other event */
2170 for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2172 __skb_queue_head_init(&pktq);
2174 pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2175 brcmf_sdio_txglomsz);
2176 pkt_num = min_t(u32, pkt_num,
2177 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2178 spin_lock_bh(&bus->txqlock);
2179 for (i = 0; i < pkt_num; i++) {
2180 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2184 __skb_queue_tail(&pktq, pkt);
2186 spin_unlock_bh(&bus->txqlock);
2190 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2193 /* In poll mode, need to check for other events */
2194 if (!bus->intr && cnt) {
2195 /* Check device status, signal pending interrupt */
2196 sdio_claim_host(bus->sdiodev->func[1]);
2197 ret = r_sdreg32(bus, &intstatus,
2198 offsetof(struct sdpcmd_regs,
2200 sdio_release_host(bus->sdiodev->func[1]);
2201 bus->sdcnt.f2txdata++;
2204 if (intstatus & bus->hostintmask)
2205 atomic_set(&bus->ipend, 1);
2209 /* Deflow-control stack if needed */
2210 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2211 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2213 brcmf_txflowblock(bus->sdiodev->dev, false);
2219 static void brcmf_sdio_bus_stop(struct device *dev)
2221 u32 local_hostintmask;
2224 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2225 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2226 struct brcmf_sdio *bus = sdiodev->bus;
2228 brcmf_dbg(TRACE, "Enter\n");
2230 if (bus->watchdog_tsk) {
2231 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2232 kthread_stop(bus->watchdog_tsk);
2233 bus->watchdog_tsk = NULL;
2236 sdio_claim_host(bus->sdiodev->func[1]);
2238 /* Enable clock for device interrupts */
2239 brcmf_sdio_bus_sleep(bus, false, false);
2241 /* Disable and clear interrupts at the chip level also */
2242 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2243 local_hostintmask = bus->hostintmask;
2244 bus->hostintmask = 0;
2246 /* Change our idea of bus state */
2247 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2249 /* Force clocks on backplane to be sure F2 interrupt propagates */
2250 saveclk = brcmf_sdiod_regrb(bus->sdiodev,
2251 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2253 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2254 (saveclk | SBSDIO_FORCE_HT), &err);
2257 brcmf_err("Failed to force clock for F2: err %d\n", err);
2259 /* Turn off the bus (F2), free any pending packets */
2260 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2261 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
2263 /* Clear any pending interrupts now that F2 is disabled */
2264 w_sdreg32(bus, local_hostintmask,
2265 offsetof(struct sdpcmd_regs, intstatus));
2267 /* Turn off the backplane clock (only) */
2268 brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
2269 sdio_release_host(bus->sdiodev->func[1]);
2271 /* Clear the data packet queues */
2272 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2274 /* Clear any held glomming stuff */
2276 brcmu_pkt_buf_free_skb(bus->glomd);
2277 brcmf_sdio_free_glom(bus);
2279 /* Clear rx control and wake any waiters */
2280 spin_lock_bh(&bus->rxctl_lock);
2282 spin_unlock_bh(&bus->rxctl_lock);
2283 brcmf_sdio_dcmd_resp_wake(bus);
2285 /* Reset some F2 state stuff */
2286 bus->rxskip = false;
2287 bus->tx_seq = bus->rx_seq = 0;
2290 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2292 unsigned long flags;
2294 if (bus->sdiodev->oob_irq_requested) {
2295 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2296 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2297 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2298 bus->sdiodev->irq_en = true;
2300 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2304 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2311 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2312 addr = bus->ci->c_inf[idx].base +
2313 offsetof(struct sdpcmd_regs, intstatus);
2315 val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2316 bus->sdcnt.f1regdata++;
2320 val &= bus->hostintmask;
2321 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2323 /* Clear interrupts */
2325 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2326 bus->sdcnt.f1regdata++;
2330 atomic_set(&bus->intstatus, 0);
2332 for_each_set_bit(n, &val, 32)
2333 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2339 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2342 unsigned long intstatus;
2343 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2344 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2345 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2348 brcmf_dbg(TRACE, "Enter\n");
2350 sdio_claim_host(bus->sdiodev->func[1]);
2352 /* If waiting for HTAVAIL, check status */
2353 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2354 u8 clkctl, devctl = 0;
2357 /* Check for inconsistent device control */
2358 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2359 SBSDIO_DEVICE_CTL, &err);
2361 brcmf_err("error reading DEVCTL: %d\n", err);
2362 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2366 /* Read CSR, if clock on switch to AVAIL, else ignore */
2367 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2368 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2370 brcmf_err("error reading CSR: %d\n",
2372 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2375 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2378 if (SBSDIO_HTAV(clkctl)) {
2379 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2380 SBSDIO_DEVICE_CTL, &err);
2382 brcmf_err("error reading DEVCTL: %d\n",
2384 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2386 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2387 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2390 brcmf_err("error writing DEVCTL: %d\n",
2392 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2394 bus->clkstate = CLK_AVAIL;
2398 /* Make sure backplane clock is on */
2399 brcmf_sdio_bus_sleep(bus, false, true);
2401 /* Pending interrupt indicates new device status */
2402 if (atomic_read(&bus->ipend) > 0) {
2403 atomic_set(&bus->ipend, 0);
2404 err = brcmf_sdio_intr_rstatus(bus);
2407 /* Start with leftover status bits */
2408 intstatus = atomic_xchg(&bus->intstatus, 0);
2410 /* Handle flow-control change: read new state in case our ack
2411 * crossed another change interrupt. If change still set, assume
2412 * FC ON for safety, let next loop through do the debounce.
2414 if (intstatus & I_HMB_FC_CHANGE) {
2415 intstatus &= ~I_HMB_FC_CHANGE;
2416 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2417 offsetof(struct sdpcmd_regs, intstatus));
2419 err = r_sdreg32(bus, &newstatus,
2420 offsetof(struct sdpcmd_regs, intstatus));
2421 bus->sdcnt.f1regdata += 2;
2422 atomic_set(&bus->fcstate,
2423 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2424 intstatus |= (newstatus & bus->hostintmask);
2427 /* Handle host mailbox indication */
2428 if (intstatus & I_HMB_HOST_INT) {
2429 intstatus &= ~I_HMB_HOST_INT;
2430 intstatus |= brcmf_sdio_hostmail(bus);
2433 sdio_release_host(bus->sdiodev->func[1]);
2435 /* Generally don't ask for these, can get CRC errors... */
2436 if (intstatus & I_WR_OOSYNC) {
2437 brcmf_err("Dongle reports WR_OOSYNC\n");
2438 intstatus &= ~I_WR_OOSYNC;
2441 if (intstatus & I_RD_OOSYNC) {
2442 brcmf_err("Dongle reports RD_OOSYNC\n");
2443 intstatus &= ~I_RD_OOSYNC;
2446 if (intstatus & I_SBINT) {
2447 brcmf_err("Dongle reports SBINT\n");
2448 intstatus &= ~I_SBINT;
2451 /* Would be active due to wake-wlan in gSPI */
2452 if (intstatus & I_CHIPACTIVE) {
2453 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2454 intstatus &= ~I_CHIPACTIVE;
2457 /* Ignore frame indications if rxskip is set */
2459 intstatus &= ~I_HMB_FRAME_IND;
2461 /* On frame indication, read available frames */
2462 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2463 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2464 if (!bus->rxpending)
2465 intstatus &= ~I_HMB_FRAME_IND;
2466 rxlimit -= min(framecnt, rxlimit);
2469 /* Keep still-pending events for next scheduling */
2471 for_each_set_bit(n, &intstatus, 32)
2472 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2475 brcmf_sdio_clrintr(bus);
2477 if (data_ok(bus) && bus->ctrl_frame_stat &&
2478 (bus->clkstate == CLK_AVAIL)) {
2481 sdio_claim_host(bus->sdiodev->func[1]);
2482 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2483 (u32)bus->ctrl_frame_len);
2486 /* On failure, abort the command and
2487 terminate the frame */
2488 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2490 bus->sdcnt.tx_sderrs++;
2492 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2494 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2496 bus->sdcnt.f1regdata++;
2498 for (i = 0; i < 3; i++) {
2500 hi = brcmf_sdiod_regrb(bus->sdiodev,
2501 SBSDIO_FUNC1_WFRAMEBCHI,
2503 lo = brcmf_sdiod_regrb(bus->sdiodev,
2504 SBSDIO_FUNC1_WFRAMEBCLO,
2506 bus->sdcnt.f1regdata += 2;
2507 if ((hi == 0) && (lo == 0))
2512 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2514 sdio_release_host(bus->sdiodev->func[1]);
2515 bus->ctrl_frame_stat = false;
2516 brcmf_sdio_wait_event_wakeup(bus);
2518 /* Send queued frames (limit 1 if rx may still be pending) */
2519 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2520 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2522 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2524 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2525 txlimit -= framecnt;
2528 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2529 brcmf_err("failed backplane access over SDIO, halting operation\n");
2530 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2531 atomic_set(&bus->intstatus, 0);
2532 } else if (atomic_read(&bus->intstatus) ||
2533 atomic_read(&bus->ipend) > 0 ||
2534 (!atomic_read(&bus->fcstate) &&
2535 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2536 data_ok(bus)) || PKT_AVAILABLE()) {
2537 atomic_inc(&bus->dpc_tskcnt);
2540 /* If we're done for now, turn off clock request. */
2541 if ((bus->clkstate != CLK_PENDING)
2542 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2543 bus->activity = false;
2544 brcmf_dbg(SDIO, "idle state\n");
2545 sdio_claim_host(bus->sdiodev->func[1]);
2546 brcmf_sdio_bus_sleep(bus, true, false);
2547 sdio_release_host(bus->sdiodev->func[1]);
2551 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2553 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2554 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2555 struct brcmf_sdio *bus = sdiodev->bus;
2560 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2564 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2565 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2566 struct brcmf_sdio *bus = sdiodev->bus;
2569 brcmf_dbg(TRACE, "Enter\n");
2573 /* Add space for the header */
2574 skb_push(pkt, bus->tx_hdrlen);
2575 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2577 prec = prio2prec((pkt->priority & PRIOMASK));
2579 /* Check for existing queue, current flow-control,
2580 pending event, or pending clock */
2581 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2582 bus->sdcnt.fcqueued++;
2584 /* Priority based enq */
2585 spin_lock_irqsave(&bus->txqlock, flags);
2586 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2587 skb_pull(pkt, bus->tx_hdrlen);
2588 brcmf_err("out of bus->txq !!!\n");
2594 if (pktq_len(&bus->txq) >= TXHI) {
2596 brcmf_txflowblock(bus->sdiodev->dev, true);
2598 spin_unlock_irqrestore(&bus->txqlock, flags);
2601 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2602 qcount[prec] = pktq_plen(&bus->txq, prec);
2605 if (atomic_read(&bus->dpc_tskcnt) == 0) {
2606 atomic_inc(&bus->dpc_tskcnt);
2607 queue_work(bus->brcmf_wq, &bus->datawork);
2614 #define CONSOLE_LINE_MAX 192
2616 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2618 struct brcmf_console *c = &bus->console;
2619 u8 line[CONSOLE_LINE_MAX], ch;
2623 /* Don't do anything until FWREADY updates console address */
2624 if (bus->console_addr == 0)
2627 /* Read console log struct */
2628 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2629 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2634 /* Allocate console buffer (one time only) */
2635 if (c->buf == NULL) {
2636 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2637 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2642 idx = le32_to_cpu(c->log_le.idx);
2644 /* Protect against corrupt value */
2645 if (idx > c->bufsize)
2648 /* Skip reading the console buffer if the index pointer
2653 /* Read the console buffer */
2654 addr = le32_to_cpu(c->log_le.buf);
2655 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2659 while (c->last != idx) {
2660 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2661 if (c->last == idx) {
2662 /* This would output a partial line.
2664 * the buffer pointer and output this
2665 * line next time around.
2670 c->last = c->bufsize - n;
2673 ch = c->buf[c->last];
2674 c->last = (c->last + 1) % c->bufsize;
2681 if (line[n - 1] == '\r')
2684 pr_debug("CONSOLE: %s\n", line);
2693 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2698 bus->ctrl_frame_stat = false;
2699 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2702 /* On failure, abort the command and terminate the frame */
2703 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2705 bus->sdcnt.tx_sderrs++;
2707 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2709 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2711 bus->sdcnt.f1regdata++;
2713 for (i = 0; i < 3; i++) {
2715 hi = brcmf_sdiod_regrb(bus->sdiodev,
2716 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2717 lo = brcmf_sdiod_regrb(bus->sdiodev,
2718 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2719 bus->sdcnt.f1regdata += 2;
2720 if (hi == 0 && lo == 0)
2726 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2732 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2739 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2740 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2741 struct brcmf_sdio *bus = sdiodev->bus;
2742 struct brcmf_sdio_hdrinfo hd_info = {0};
2744 brcmf_dbg(TRACE, "Enter\n");
2746 /* Back the pointer to make a room for bus header */
2747 frame = msg - bus->tx_hdrlen;
2748 len = (msglen += bus->tx_hdrlen);
2750 /* Add alignment padding (optional for ctl frames) */
2751 doff = ((unsigned long)frame % bus->head_align);
2756 memset(frame, 0, doff + bus->tx_hdrlen);
2758 /* precondition: doff < bus->head_align */
2759 doff += bus->tx_hdrlen;
2761 /* Round send length to next SDIO block */
2763 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2764 pad = bus->blocksize - (len % bus->blocksize);
2765 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2767 } else if (len % bus->head_align) {
2768 pad = bus->head_align - (len % bus->head_align);
2772 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2774 /* Make sure backplane clock is on */
2775 sdio_claim_host(bus->sdiodev->func[1]);
2776 brcmf_sdio_bus_sleep(bus, false, false);
2777 sdio_release_host(bus->sdiodev->func[1]);
2779 hd_info.len = (u16)msglen;
2780 hd_info.channel = SDPCM_CONTROL_CHANNEL;
2781 hd_info.dat_offset = doff;
2782 hd_info.seq_num = bus->tx_seq;
2783 hd_info.lastfrm = true;
2784 hd_info.tail_pad = pad;
2785 brcmf_sdio_hdpack(bus, frame, &hd_info);
2788 brcmf_sdio_update_hwhdr(frame, len);
2790 if (!data_ok(bus)) {
2791 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2792 bus->tx_max, bus->tx_seq);
2793 bus->ctrl_frame_stat = true;
2795 bus->ctrl_frame_buf = frame;
2796 bus->ctrl_frame_len = len;
2798 wait_event_interruptible_timeout(bus->ctrl_wait,
2799 !bus->ctrl_frame_stat,
2800 msecs_to_jiffies(2000));
2802 if (!bus->ctrl_frame_stat) {
2803 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2806 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2812 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2813 frame, len, "Tx Frame:\n");
2814 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2816 frame, min_t(u16, len, 16), "TxHdr:\n");
2819 sdio_claim_host(bus->sdiodev->func[1]);
2820 ret = brcmf_sdio_tx_frame(bus, frame, len);
2821 sdio_release_host(bus->sdiodev->func[1]);
2822 } while (ret < 0 && retries++ < TXRETRIES);
2825 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2826 atomic_read(&bus->dpc_tskcnt) == 0) {
2827 bus->activity = false;
2828 sdio_claim_host(bus->sdiodev->func[1]);
2829 brcmf_dbg(INFO, "idle\n");
2830 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2831 sdio_release_host(bus->sdiodev->func[1]);
2835 bus->sdcnt.tx_ctlerrs++;
2837 bus->sdcnt.tx_ctlpkts++;
2839 return ret ? -EIO : 0;
2843 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2845 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2848 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2849 struct sdpcm_shared *sh)
2854 struct sdpcm_shared_le sh_le;
2857 shaddr = bus->ci->rambase + bus->ramsize - 4;
2860 * Read last word in socram to determine
2861 * address of sdpcm_shared structure
2863 sdio_claim_host(bus->sdiodev->func[1]);
2864 brcmf_sdio_bus_sleep(bus, false, false);
2865 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2866 sdio_release_host(bus->sdiodev->func[1]);
2870 addr = le32_to_cpu(addr_le);
2872 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2875 * Check if addr is valid.
2876 * NVRAM length at the end of memory should have been overwritten.
2878 if (!brcmf_sdio_valid_shared_address(addr)) {
2879 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2884 /* Read hndrte_shared structure */
2885 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2886 sizeof(struct sdpcm_shared_le));
2891 sh->flags = le32_to_cpu(sh_le.flags);
2892 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2893 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2894 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2895 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2896 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2897 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2899 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2900 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2901 SDPCM_SHARED_VERSION,
2902 sh->flags & SDPCM_SHARED_VERSION_MASK);
2909 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2910 struct sdpcm_shared *sh, char __user *data,
2913 u32 addr, console_ptr, console_size, console_index;
2914 char *conbuf = NULL;
2920 /* obtain console information from device memory */
2921 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2922 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2923 (u8 *)&sh_val, sizeof(u32));
2926 console_ptr = le32_to_cpu(sh_val);
2928 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2929 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2930 (u8 *)&sh_val, sizeof(u32));
2933 console_size = le32_to_cpu(sh_val);
2935 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2936 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2937 (u8 *)&sh_val, sizeof(u32));
2940 console_index = le32_to_cpu(sh_val);
2942 /* allocate buffer for console data */
2943 if (console_size <= CONSOLE_BUFFER_MAX)
2944 conbuf = vzalloc(console_size+1);
2949 /* obtain the console data from device */
2950 conbuf[console_size] = '\0';
2951 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2956 rv = simple_read_from_buffer(data, count, &pos,
2957 conbuf + console_index,
2958 console_size - console_index);
2963 if (console_index > 0) {
2965 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2966 conbuf, console_index - 1);
2976 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2977 char __user *data, size_t count)
2981 struct brcmf_trap_info tr;
2984 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2985 brcmf_dbg(INFO, "no trap in firmware\n");
2989 error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2990 sizeof(struct brcmf_trap_info));
2994 res = scnprintf(buf, sizeof(buf),
2995 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2996 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2997 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2998 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2999 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3000 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3001 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3002 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3003 le32_to_cpu(tr.pc), sh->trap_addr,
3004 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3005 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3006 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3007 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3009 return simple_read_from_buffer(data, count, &pos, buf, res);
3012 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3013 struct sdpcm_shared *sh, char __user *data,
3018 char file[80] = "?";
3019 char expr[80] = "<???>";
3023 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3024 brcmf_dbg(INFO, "firmware not built with -assert\n");
3026 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3027 brcmf_dbg(INFO, "no assert in dongle\n");
3031 sdio_claim_host(bus->sdiodev->func[1]);
3032 if (sh->assert_file_addr != 0) {
3033 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3034 sh->assert_file_addr, (u8 *)file, 80);
3038 if (sh->assert_exp_addr != 0) {
3039 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3040 sh->assert_exp_addr, (u8 *)expr, 80);
3044 sdio_release_host(bus->sdiodev->func[1]);
3046 res = scnprintf(buf, sizeof(buf),
3047 "dongle assert: %s:%d: assert(%s)\n",
3048 file, sh->assert_line, expr);
3049 return simple_read_from_buffer(data, count, &pos, buf, res);
3052 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3055 struct sdpcm_shared sh;
3057 error = brcmf_sdio_readshared(bus, &sh);
3062 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3063 brcmf_dbg(INFO, "firmware not built with -assert\n");
3064 else if (sh.flags & SDPCM_SHARED_ASSERT)
3065 brcmf_err("assertion in dongle\n");
3067 if (sh.flags & SDPCM_SHARED_TRAP)
3068 brcmf_err("firmware trap in dongle\n");
3073 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3074 size_t count, loff_t *ppos)
3077 struct sdpcm_shared sh;
3084 error = brcmf_sdio_readshared(bus, &sh);
3088 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3093 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3098 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3109 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3110 size_t count, loff_t *ppos)
3112 struct brcmf_sdio *bus = f->private_data;
3115 res = brcmf_sdio_died_dump(bus, data, count, ppos);
3118 return (ssize_t)res;
3121 static const struct file_operations brcmf_sdio_forensic_ops = {
3122 .owner = THIS_MODULE,
3123 .open = simple_open,
3124 .read = brcmf_sdio_forensic_read
3127 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3129 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3130 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3132 if (IS_ERR_OR_NULL(dentry))
3135 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3136 &brcmf_sdio_forensic_ops);
3137 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3140 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3145 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3151 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3157 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3158 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3159 struct brcmf_sdio *bus = sdiodev->bus;
3161 brcmf_dbg(TRACE, "Enter\n");
3163 /* Wait until control frame is available */
3164 timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3166 spin_lock_bh(&bus->rxctl_lock);
3168 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3170 buf = bus->rxctl_orig;
3171 bus->rxctl_orig = NULL;
3173 spin_unlock_bh(&bus->rxctl_lock);
3177 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3179 } else if (timeleft == 0) {
3180 brcmf_err("resumed on timeout\n");
3181 brcmf_sdio_checkdied(bus);
3182 } else if (pending) {
3183 brcmf_dbg(CTL, "cancelled\n");
3184 return -ERESTARTSYS;
3186 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3187 brcmf_sdio_checkdied(bus);
3191 bus->sdcnt.rx_ctlpkts++;
3193 bus->sdcnt.rx_ctlerrs++;
3195 return rxlen ? (int)rxlen : -ETIMEDOUT;
3198 static bool brcmf_sdio_download_state(struct brcmf_sdio *bus, bool enter)
3200 struct chip_info *ci = bus->ci;
3202 /* To enter download state, disable ARM and reset SOCRAM.
3203 * To exit download state, simply reset ARM (default is RAM boot).
3206 bus->alp_only = true;
3208 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3210 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3214 /* Allow HT Clock now that the ARM is running. */
3215 bus->alp_only = false;
3217 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3223 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus)
3225 const struct firmware *fw;
3231 fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3235 if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3237 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3241 address = bus->ci->rambase;
3242 while (offset < fw->size) {
3243 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3245 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3246 (u8 *)&fw->data[offset], len);
3248 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3257 release_firmware(fw);
3263 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3264 * and ending in a NUL.
3265 * Removes carriage returns, empty lines, comment lines, and converts
3267 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3271 static int brcmf_sdio_strip_nvram(struct brcmf_sdio *bus,
3272 const struct firmware *nv)
3279 uint buf_len, n, len;
3282 varbuf = vmalloc(len);
3286 memcpy(varbuf, nv->data, len);
3289 findNewline = false;
3292 for (n = 0; n < len; n++) {
3295 if (varbuf[n] == '\r')
3297 if (findNewline && varbuf[n] != '\n')
3299 findNewline = false;
3300 if (varbuf[n] == '#') {
3304 if (varbuf[n] == '\n') {
3314 buf_len = dp - varbuf;
3315 while (dp < varbuf + n)
3319 /* roundup needed for download to device */
3320 bus->varsz = roundup(buf_len + 1, 4);
3321 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3322 if (bus->vars == NULL) {
3328 /* copy the processed variables and add null termination */
3329 memcpy(bus->vars, varbuf, buf_len);
3330 bus->vars[buf_len] = 0;
3336 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus)
3338 const struct firmware *nv;
3341 nv = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3345 ret = brcmf_sdio_strip_nvram(bus, nv);
3347 release_firmware(nv);
3352 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3354 int bcmerror = -EFAULT;
3357 sdio_claim_host(bus->sdiodev->func[1]);
3358 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3360 /* Keep arm in reset */
3361 if (!brcmf_sdio_download_state(bus, true)) {
3362 brcmf_err("error placing ARM core in reset\n");
3366 if (brcmf_sdio_download_code_file(bus)) {
3367 brcmf_err("dongle image file download failed\n");
3371 if (brcmf_sdio_download_nvram(bus)) {
3372 brcmf_err("dongle nvram file download failed\n");
3376 /* Take arm out of reset */
3377 if (!brcmf_sdio_download_state(bus, false)) {
3378 brcmf_err("error getting out of ARM core reset\n");
3385 brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3386 sdio_release_host(bus->sdiodev->func[1]);
3390 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3392 u32 addr, reg, pmu_cc3_mask = ~0;
3395 brcmf_dbg(TRACE, "Enter\n");
3397 /* old chips with PMU version less than 17 don't support save restore */
3398 if (bus->ci->pmurev < 17)
3401 switch (bus->ci->chip) {
3402 case BCM43241_CHIP_ID:
3403 case BCM4335_CHIP_ID:
3404 case BCM4339_CHIP_ID:
3405 /* read PMU chipcontrol register 3 */
3406 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3407 brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3408 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3409 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3410 return (reg & pmu_cc3_mask) != 0;
3412 addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext);
3413 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err);
3414 if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
3417 addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl);
3418 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3419 return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
3420 PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
3424 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3429 brcmf_dbg(TRACE, "Enter\n");
3431 val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3433 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3437 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3438 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3440 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3444 /* Add CMD14 Support */
3445 brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3446 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3447 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3450 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3454 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3455 SBSDIO_FORCE_HT, &err);
3457 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3462 bus->sr_enabled = true;
3463 brcmf_dbg(INFO, "SR enabled\n");
3466 /* enable KSO bit */
3467 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3472 brcmf_dbg(TRACE, "Enter\n");
3474 /* KSO bit added in SDIO core rev 12 */
3475 if (bus->ci->c_inf[1].rev < 12)
3478 val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3480 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3484 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3485 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3486 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3487 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3490 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3499 static int brcmf_sdio_bus_preinit(struct device *dev)
3501 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3502 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3503 struct brcmf_sdio *bus = sdiodev->bus;
3509 /* the commands below use the terms tx and rx from
3510 * a device perspective, ie. bus:txglom affects the
3511 * bus transfers from device to host.
3513 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3514 if (bus->ci->c_inf[idx].rev < 12) {
3515 /* for sdio core rev < 12, disable txgloming */
3517 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3520 /* otherwise, set txglomalign */
3523 value = sdiodev->pdata->sd_sgentry_align;
3524 /* SDIO ADMA requires at least 32 bit alignment */
3525 value = max_t(u32, value, 4);
3526 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3533 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3534 if (sdiodev->sg_support) {
3535 bus->txglom = false;
3537 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3538 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3539 if (!bus->txglom_sgpad)
3540 brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3542 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3543 &value, sizeof(u32));
3545 /* bus:rxglom is allowed to fail */
3549 bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3552 brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3558 static int brcmf_sdio_bus_init(struct device *dev)
3560 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3561 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3562 struct brcmf_sdio *bus = sdiodev->bus;
3566 brcmf_dbg(TRACE, "Enter\n");
3568 /* try to download image and nvram to the dongle */
3569 if (bus_if->state == BRCMF_BUS_DOWN) {
3570 err = brcmf_sdio_download_firmware(bus);
3575 if (!bus->sdiodev->bus_if->drvr)
3578 /* Start the watchdog timer */
3579 bus->sdcnt.tickcnt = 0;
3580 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3582 sdio_claim_host(bus->sdiodev->func[1]);
3584 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3585 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3586 if (bus->clkstate != CLK_AVAIL)
3589 /* Force clocks on backplane to be sure F2 interrupt propagates */
3590 saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3591 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3593 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3594 (saveclk | SBSDIO_FORCE_HT), &err);
3597 brcmf_err("Failed to force clock for F2: err %d\n", err);
3601 /* Enable function 2 (frame transfers) */
3602 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3603 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3604 err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3607 brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3609 /* If F2 successfully enabled, set core and enable interrupts */
3611 /* Set up the interrupt mask and enable interrupts */
3612 bus->hostintmask = HOSTINTMASK;
3613 w_sdreg32(bus, bus->hostintmask,
3614 offsetof(struct sdpcmd_regs, hostintmask));
3616 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3618 /* Disable F2 again */
3619 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3623 if (brcmf_sdio_sr_capable(bus)) {
3624 brcmf_sdio_sr_init(bus);
3626 /* Restore previous clock setting */
3627 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3632 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3634 brcmf_err("intr register failed:%d\n", ret);
3637 /* If we didn't come up, turn off backplane clock */
3639 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3642 sdio_release_host(bus->sdiodev->func[1]);
3647 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3649 brcmf_dbg(TRACE, "Enter\n");
3652 brcmf_err("bus is null pointer, exiting\n");
3656 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3657 brcmf_err("bus is down. we have nothing to do\n");
3660 /* Count the interrupt call */
3661 bus->sdcnt.intrcount++;
3663 atomic_set(&bus->ipend, 1);
3665 if (brcmf_sdio_intr_rstatus(bus)) {
3666 brcmf_err("failed backplane access\n");
3667 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3670 /* Disable additional interrupts (is this needed now)? */
3672 brcmf_err("isr w/o interrupt configured!\n");
3674 atomic_inc(&bus->dpc_tskcnt);
3675 queue_work(bus->brcmf_wq, &bus->datawork);
3678 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3681 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3684 brcmf_dbg(TIMER, "Enter\n");
3686 /* Poll period: check device if appropriate. */
3687 if (!bus->sr_enabled &&
3688 bus->poll && (++bus->polltick >= bus->pollrate)) {
3691 /* Reset poll tick */
3694 /* Check device if no interrupts */
3696 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3698 if (atomic_read(&bus->dpc_tskcnt) == 0) {
3701 sdio_claim_host(bus->sdiodev->func[1]);
3702 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3705 sdio_release_host(bus->sdiodev->func[1]);
3707 devpend & (INTR_STATUS_FUNC1 |
3711 /* If there is something, make like the ISR and
3714 bus->sdcnt.pollcnt++;
3715 atomic_set(&bus->ipend, 1);
3717 atomic_inc(&bus->dpc_tskcnt);
3718 queue_work(bus->brcmf_wq, &bus->datawork);
3722 /* Update interrupt tracking */
3723 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3726 /* Poll for console output periodically */
3727 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3728 bus->console_interval != 0) {
3729 bus->console.count += BRCMF_WD_POLL_MS;
3730 if (bus->console.count >= bus->console_interval) {
3731 bus->console.count -= bus->console_interval;
3732 sdio_claim_host(bus->sdiodev->func[1]);
3733 /* Make sure backplane clock is on */
3734 brcmf_sdio_bus_sleep(bus, false, false);
3735 if (brcmf_sdio_readconsole(bus) < 0)
3737 bus->console_interval = 0;
3738 sdio_release_host(bus->sdiodev->func[1]);
3743 /* On idle timeout clear activity flag and/or turn off clock */
3744 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3745 if (++bus->idlecount >= bus->idletime) {
3747 if (bus->activity) {
3748 bus->activity = false;
3749 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3751 brcmf_dbg(SDIO, "idle\n");
3752 sdio_claim_host(bus->sdiodev->func[1]);
3753 brcmf_sdio_bus_sleep(bus, true, false);
3754 sdio_release_host(bus->sdiodev->func[1]);
3759 return (atomic_read(&bus->ipend) > 0);
3762 static void brcmf_sdio_dataworker(struct work_struct *work)
3764 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3767 while (atomic_read(&bus->dpc_tskcnt)) {
3768 brcmf_sdio_dpc(bus);
3769 atomic_dec(&bus->dpc_tskcnt);
3774 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3782 bus->alp_only = true;
3784 sdio_claim_host(bus->sdiodev->func[1]);
3786 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3787 brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3790 * Force PLL off until brcmf_sdio_chip_attach()
3791 * programs PLL control regs
3794 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3795 BRCMF_INIT_CLKCTL1, &err);
3797 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3798 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3800 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3801 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3802 err, BRCMF_INIT_CLKCTL1, clkctl);
3806 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3807 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3811 if (brcmf_sdio_kso_init(bus)) {
3812 brcmf_err("error enabling KSO\n");
3816 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3817 drivestrength = bus->sdiodev->pdata->drive_strength;
3819 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3820 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3822 /* Get info on the SOCRAM cores... */
3823 bus->ramsize = bus->ci->ramsize;
3824 if (!(bus->ramsize)) {
3825 brcmf_err("failed to find SOCRAM memory!\n");
3829 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3830 reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3831 SDIO_CCCR_BRCM_CARDCTRL, &err);
3835 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3837 brcmf_sdiod_regwb(bus->sdiodev,
3838 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3842 /* set PMUControl so a backplane reset does PMU state reload */
3843 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3845 reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3851 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3853 brcmf_sdiod_regwl(bus->sdiodev,
3861 sdio_release_host(bus->sdiodev->func[1]);
3863 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3865 /* allocate header buffer */
3866 bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3869 /* Locate an appropriately-aligned portion of hdrbuf */
3870 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3873 /* Set the poll and/or interrupt flags */
3882 sdio_release_host(bus->sdiodev->func[1]);
3887 brcmf_sdio_watchdog_thread(void *data)
3889 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3891 allow_signal(SIGTERM);
3892 /* Run until signal received */
3894 if (kthread_should_stop())
3896 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3897 brcmf_sdio_bus_watchdog(bus);
3898 /* Count the tick for reference */
3899 bus->sdcnt.tickcnt++;
3907 brcmf_sdio_watchdog(unsigned long data)
3909 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3911 if (bus->watchdog_tsk) {
3912 complete(&bus->watchdog_wait);
3913 /* Reschedule the watchdog */
3914 if (bus->wd_timer_valid)
3915 mod_timer(&bus->timer,
3916 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3920 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3921 .stop = brcmf_sdio_bus_stop,
3922 .preinit = brcmf_sdio_bus_preinit,
3923 .init = brcmf_sdio_bus_init,
3924 .txdata = brcmf_sdio_bus_txdata,
3925 .txctl = brcmf_sdio_bus_txctl,
3926 .rxctl = brcmf_sdio_bus_rxctl,
3927 .gettxq = brcmf_sdio_bus_gettxq,
3930 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3933 struct brcmf_sdio *bus;
3935 brcmf_dbg(TRACE, "Enter\n");
3937 /* Allocate private bus interface state */
3938 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3942 bus->sdiodev = sdiodev;
3944 skb_queue_head_init(&bus->glom);
3945 bus->txbound = BRCMF_TXBOUND;
3946 bus->rxbound = BRCMF_RXBOUND;
3947 bus->txminmax = BRCMF_TXMINMAX;
3948 bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3950 /* platform specific configuration:
3951 * alignments must be at least 4 bytes for ADMA
3953 bus->head_align = ALIGNMENT;
3954 bus->sgentry_align = ALIGNMENT;
3955 if (sdiodev->pdata) {
3956 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
3957 bus->head_align = sdiodev->pdata->sd_head_align;
3958 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
3959 bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
3962 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3963 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3964 if (bus->brcmf_wq == NULL) {
3965 brcmf_err("insufficient memory to create txworkqueue\n");
3969 /* attempt to attach to the dongle */
3970 if (!(brcmf_sdio_probe_attach(bus))) {
3971 brcmf_err("brcmf_sdio_probe_attach failed\n");
3975 spin_lock_init(&bus->rxctl_lock);
3976 spin_lock_init(&bus->txqlock);
3977 init_waitqueue_head(&bus->ctrl_wait);
3978 init_waitqueue_head(&bus->dcmd_resp_wait);
3980 /* Set up the watchdog timer */
3981 init_timer(&bus->timer);
3982 bus->timer.data = (unsigned long)bus;
3983 bus->timer.function = brcmf_sdio_watchdog;
3985 /* Initialize watchdog thread */
3986 init_completion(&bus->watchdog_wait);
3987 bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
3988 bus, "brcmf_watchdog");
3989 if (IS_ERR(bus->watchdog_tsk)) {
3990 pr_warn("brcmf_watchdog thread failed to start\n");
3991 bus->watchdog_tsk = NULL;
3993 /* Initialize DPC thread */
3994 atomic_set(&bus->dpc_tskcnt, 0);
3996 /* Assign bus interface call back */
3997 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3998 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3999 bus->sdiodev->bus_if->chip = bus->ci->chip;
4000 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4002 /* default sdio bus header length for tx packet */
4003 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4005 /* Attach to the common layer, reserve hdr space */
4006 ret = brcmf_attach(bus->sdiodev->dev);
4008 brcmf_err("brcmf_attach failed\n");
4012 /* Allocate buffers */
4013 if (bus->sdiodev->bus_if->maxctl) {
4015 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4016 ALIGNMENT) + bus->head_align;
4017 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4018 if (!(bus->rxbuf)) {
4019 brcmf_err("rxbuf allocation failed\n");
4024 sdio_claim_host(bus->sdiodev->func[1]);
4026 /* Disable F2 to clear any intermediate frame state on the dongle */
4027 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4029 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
4030 bus->rxflow = false;
4032 /* Done with backplane-dependent accesses, can drop clock... */
4033 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4035 sdio_release_host(bus->sdiodev->func[1]);
4037 /* ...and initialize clock/power states */
4038 bus->clkstate = CLK_SDONLY;
4039 bus->idletime = BRCMF_IDLE_INTERVAL;
4040 bus->idleclock = BRCMF_IDLE_ACTIVE;
4042 /* Query the F2 block size, set roundup accordingly */
4043 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4044 bus->roundup = min(max_roundup, bus->blocksize);
4047 bus->sleeping = false;
4048 bus->sr_enabled = false;
4050 brcmf_sdio_debugfs_create(bus);
4051 brcmf_dbg(INFO, "completed!!\n");
4053 /* if firmware path present try to download and bring up bus */
4054 ret = brcmf_bus_start(bus->sdiodev->dev);
4056 brcmf_err("dongle is not responding\n");
4063 brcmf_sdio_remove(bus);
4067 /* Detach and free everything */
4068 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4070 brcmf_dbg(TRACE, "Enter\n");
4073 /* De-register interrupt handler */
4074 brcmf_sdiod_intr_unregister(bus->sdiodev);
4076 cancel_work_sync(&bus->datawork);
4078 destroy_workqueue(bus->brcmf_wq);
4080 if (bus->sdiodev->bus_if->drvr) {
4081 brcmf_detach(bus->sdiodev->dev);
4085 sdio_claim_host(bus->sdiodev->func[1]);
4086 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4087 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4088 sdio_release_host(bus->sdiodev->func[1]);
4089 brcmf_sdio_chip_detach(&bus->ci);
4092 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4099 brcmf_dbg(TRACE, "Disconnected\n");
4102 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4104 /* Totally stop the timer */
4105 if (!wdtick && bus->wd_timer_valid) {
4106 del_timer_sync(&bus->timer);
4107 bus->wd_timer_valid = false;
4108 bus->save_ms = wdtick;
4112 /* don't start the wd until fw is loaded */
4113 if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4117 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4118 if (bus->wd_timer_valid)
4119 /* Stop timer and restart at new value */
4120 del_timer_sync(&bus->timer);
4122 /* Create timer again when watchdog period is
4123 dynamically changed or in the first instance
4125 bus->timer.expires =
4126 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4127 add_timer(&bus->timer);
4130 /* Re arm the timer, at last watchdog period */
4131 mod_timer(&bus->timer,
4132 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4135 bus->wd_timer_valid = true;
4136 bus->save_ms = wdtick;